zoran_device.c 42 KB

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  1. /*
  2. * Zoran zr36057/zr36067 PCI controller driver, for the
  3. * Pinnacle/Miro DC10/DC10+/DC30/DC30+, Iomega Buz, Linux
  4. * Media Labs LML33/LML33R10.
  5. *
  6. * This part handles device access (PCI/I2C/codec/...)
  7. *
  8. * Copyright (C) 2000 Serguei Miridonov <mirsev@cicese.mx>
  9. *
  10. * Currently maintained by:
  11. * Ronald Bultje <rbultje@ronald.bitfreak.net>
  12. * Laurent Pinchart <laurent.pinchart@skynet.be>
  13. * Mailinglist <mjpeg-users@lists.sf.net>
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, write to the Free Software
  27. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  28. */
  29. #include <linux/types.h>
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/vmalloc.h>
  33. #include <linux/ktime.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/proc_fs.h>
  36. #include <linux/i2c.h>
  37. #include <linux/i2c-algo-bit.h>
  38. #include <linux/videodev2.h>
  39. #include <media/v4l2-common.h>
  40. #include <linux/spinlock.h>
  41. #include <linux/sem.h>
  42. #include <linux/pci.h>
  43. #include <linux/delay.h>
  44. #include <linux/wait.h>
  45. #include <asm/byteorder.h>
  46. #include <asm/io.h>
  47. #include "videocodec.h"
  48. #include "zoran.h"
  49. #include "zoran_device.h"
  50. #include "zoran_card.h"
  51. #define IRQ_MASK ( ZR36057_ISR_GIRQ0 | \
  52. ZR36057_ISR_GIRQ1 | \
  53. ZR36057_ISR_JPEGRepIRQ )
  54. static bool lml33dpath; /* default = 0
  55. * 1 will use digital path in capture
  56. * mode instead of analog. It can be
  57. * used for picture adjustments using
  58. * tool like xawtv while watching image
  59. * on TV monitor connected to the output.
  60. * However, due to absence of 75 Ohm
  61. * load on Bt819 input, there will be
  62. * some image imperfections */
  63. module_param(lml33dpath, bool, 0644);
  64. MODULE_PARM_DESC(lml33dpath,
  65. "Use digital path capture mode (on LML33 cards)");
  66. static void
  67. zr36057_init_vfe (struct zoran *zr);
  68. /*
  69. * General Purpose I/O and Guest bus access
  70. */
  71. /*
  72. * This is a bit tricky. When a board lacks a GPIO function, the corresponding
  73. * GPIO bit number in the card_info structure is set to 0.
  74. */
  75. void
  76. GPIO (struct zoran *zr,
  77. int bit,
  78. unsigned int value)
  79. {
  80. u32 reg;
  81. u32 mask;
  82. /* Make sure the bit number is legal
  83. * A bit number of -1 (lacking) gives a mask of 0,
  84. * making it harmless */
  85. mask = (1 << (24 + bit)) & 0xff000000;
  86. reg = btread(ZR36057_GPPGCR1) & ~mask;
  87. if (value) {
  88. reg |= mask;
  89. }
  90. btwrite(reg, ZR36057_GPPGCR1);
  91. udelay(1);
  92. }
  93. /*
  94. * Wait til post office is no longer busy
  95. */
  96. int
  97. post_office_wait (struct zoran *zr)
  98. {
  99. u32 por;
  100. // while (((por = btread(ZR36057_POR)) & (ZR36057_POR_POPen | ZR36057_POR_POTime)) == ZR36057_POR_POPen) {
  101. while ((por = btread(ZR36057_POR)) & ZR36057_POR_POPen) {
  102. /* wait for something to happen */
  103. }
  104. if ((por & ZR36057_POR_POTime) && !zr->card.gws_not_connected) {
  105. /* In LML33/BUZ \GWS line is not connected, so it has always timeout set */
  106. dprintk(1, KERN_INFO "%s: pop timeout %08x\n", ZR_DEVNAME(zr),
  107. por);
  108. return -1;
  109. }
  110. return 0;
  111. }
  112. int
  113. post_office_write (struct zoran *zr,
  114. unsigned int guest,
  115. unsigned int reg,
  116. unsigned int value)
  117. {
  118. u32 por;
  119. por =
  120. ZR36057_POR_PODir | ZR36057_POR_POTime | ((guest & 7) << 20) |
  121. ((reg & 7) << 16) | (value & 0xFF);
  122. btwrite(por, ZR36057_POR);
  123. return post_office_wait(zr);
  124. }
  125. int
  126. post_office_read (struct zoran *zr,
  127. unsigned int guest,
  128. unsigned int reg)
  129. {
  130. u32 por;
  131. por = ZR36057_POR_POTime | ((guest & 7) << 20) | ((reg & 7) << 16);
  132. btwrite(por, ZR36057_POR);
  133. if (post_office_wait(zr) < 0) {
  134. return -1;
  135. }
  136. return btread(ZR36057_POR) & 0xFF;
  137. }
  138. /*
  139. * detect guests
  140. */
  141. static void
  142. dump_guests (struct zoran *zr)
  143. {
  144. if (zr36067_debug > 2) {
  145. int i, guest[8];
  146. for (i = 1; i < 8; i++) { // Don't read jpeg codec here
  147. guest[i] = post_office_read(zr, i, 0);
  148. }
  149. printk(KERN_INFO "%s: Guests:", ZR_DEVNAME(zr));
  150. for (i = 1; i < 8; i++) {
  151. printk(" 0x%02x", guest[i]);
  152. }
  153. printk("\n");
  154. }
  155. }
  156. void
  157. detect_guest_activity (struct zoran *zr)
  158. {
  159. int timeout, i, j, res, guest[8], guest0[8], change[8][3];
  160. ktime_t t0, t1;
  161. dump_guests(zr);
  162. printk(KERN_INFO "%s: Detecting guests activity, please wait...\n",
  163. ZR_DEVNAME(zr));
  164. for (i = 1; i < 8; i++) { // Don't read jpeg codec here
  165. guest0[i] = guest[i] = post_office_read(zr, i, 0);
  166. }
  167. timeout = 0;
  168. j = 0;
  169. t0 = ktime_get();
  170. while (timeout < 10000) {
  171. udelay(10);
  172. timeout++;
  173. for (i = 1; (i < 8) && (j < 8); i++) {
  174. res = post_office_read(zr, i, 0);
  175. if (res != guest[i]) {
  176. t1 = ktime_get();
  177. change[j][0] = ktime_to_us(ktime_sub(t1, t0));
  178. t0 = t1;
  179. change[j][1] = i;
  180. change[j][2] = res;
  181. j++;
  182. guest[i] = res;
  183. }
  184. }
  185. if (j >= 8)
  186. break;
  187. }
  188. printk(KERN_INFO "%s: Guests:", ZR_DEVNAME(zr));
  189. for (i = 1; i < 8; i++) {
  190. printk(" 0x%02x", guest0[i]);
  191. }
  192. printk("\n");
  193. if (j == 0) {
  194. printk(KERN_INFO "%s: No activity detected.\n", ZR_DEVNAME(zr));
  195. return;
  196. }
  197. for (i = 0; i < j; i++) {
  198. printk(KERN_INFO "%s: %6d: %d => 0x%02x\n", ZR_DEVNAME(zr),
  199. change[i][0], change[i][1], change[i][2]);
  200. }
  201. }
  202. /*
  203. * JPEG Codec access
  204. */
  205. void
  206. jpeg_codec_sleep (struct zoran *zr,
  207. int sleep)
  208. {
  209. GPIO(zr, zr->card.gpio[ZR_GPIO_JPEG_SLEEP], !sleep);
  210. if (!sleep) {
  211. dprintk(3,
  212. KERN_DEBUG
  213. "%s: jpeg_codec_sleep() - wake GPIO=0x%08x\n",
  214. ZR_DEVNAME(zr), btread(ZR36057_GPPGCR1));
  215. udelay(500);
  216. } else {
  217. dprintk(3,
  218. KERN_DEBUG
  219. "%s: jpeg_codec_sleep() - sleep GPIO=0x%08x\n",
  220. ZR_DEVNAME(zr), btread(ZR36057_GPPGCR1));
  221. udelay(2);
  222. }
  223. }
  224. int
  225. jpeg_codec_reset (struct zoran *zr)
  226. {
  227. /* Take the codec out of sleep */
  228. jpeg_codec_sleep(zr, 0);
  229. if (zr->card.gpcs[GPCS_JPEG_RESET] != 0xff) {
  230. post_office_write(zr, zr->card.gpcs[GPCS_JPEG_RESET], 0,
  231. 0);
  232. udelay(2);
  233. } else {
  234. GPIO(zr, zr->card.gpio[ZR_GPIO_JPEG_RESET], 0);
  235. udelay(2);
  236. GPIO(zr, zr->card.gpio[ZR_GPIO_JPEG_RESET], 1);
  237. udelay(2);
  238. }
  239. return 0;
  240. }
  241. /*
  242. * Set the registers for the size we have specified. Don't bother
  243. * trying to understand this without the ZR36057 manual in front of
  244. * you [AC].
  245. *
  246. * PS: The manual is free for download in .pdf format from
  247. * www.zoran.com - nicely done those folks.
  248. */
  249. static void
  250. zr36057_adjust_vfe (struct zoran *zr,
  251. enum zoran_codec_mode mode)
  252. {
  253. u32 reg;
  254. switch (mode) {
  255. case BUZ_MODE_MOTION_DECOMPRESS:
  256. btand(~ZR36057_VFESPFR_ExtFl, ZR36057_VFESPFR);
  257. reg = btread(ZR36057_VFEHCR);
  258. if ((reg & (1 << 10)) && zr->card.type != LML33R10) {
  259. reg += ((1 << 10) | 1);
  260. }
  261. btwrite(reg, ZR36057_VFEHCR);
  262. break;
  263. case BUZ_MODE_MOTION_COMPRESS:
  264. case BUZ_MODE_IDLE:
  265. default:
  266. if ((zr->norm & V4L2_STD_NTSC) ||
  267. (zr->card.type == LML33R10 &&
  268. (zr->norm & V4L2_STD_PAL)))
  269. btand(~ZR36057_VFESPFR_ExtFl, ZR36057_VFESPFR);
  270. else
  271. btor(ZR36057_VFESPFR_ExtFl, ZR36057_VFESPFR);
  272. reg = btread(ZR36057_VFEHCR);
  273. if (!(reg & (1 << 10)) && zr->card.type != LML33R10) {
  274. reg -= ((1 << 10) | 1);
  275. }
  276. btwrite(reg, ZR36057_VFEHCR);
  277. break;
  278. }
  279. }
  280. /*
  281. * set geometry
  282. */
  283. static void
  284. zr36057_set_vfe (struct zoran *zr,
  285. int video_width,
  286. int video_height,
  287. const struct zoran_format *format)
  288. {
  289. struct tvnorm *tvn;
  290. unsigned HStart, HEnd, VStart, VEnd;
  291. unsigned DispMode;
  292. unsigned VidWinWid, VidWinHt;
  293. unsigned hcrop1, hcrop2, vcrop1, vcrop2;
  294. unsigned Wa, We, Ha, He;
  295. unsigned X, Y, HorDcm, VerDcm;
  296. u32 reg;
  297. unsigned mask_line_size;
  298. tvn = zr->timing;
  299. Wa = tvn->Wa;
  300. Ha = tvn->Ha;
  301. dprintk(2, KERN_INFO "%s: set_vfe() - width = %d, height = %d\n",
  302. ZR_DEVNAME(zr), video_width, video_height);
  303. if (video_width < BUZ_MIN_WIDTH ||
  304. video_height < BUZ_MIN_HEIGHT ||
  305. video_width > Wa || video_height > Ha) {
  306. dprintk(1, KERN_ERR "%s: set_vfe: w=%d h=%d not valid\n",
  307. ZR_DEVNAME(zr), video_width, video_height);
  308. return;
  309. }
  310. /**** zr36057 ****/
  311. /* horizontal */
  312. VidWinWid = video_width;
  313. X = DIV_ROUND_UP(VidWinWid * 64, tvn->Wa);
  314. We = (VidWinWid * 64) / X;
  315. HorDcm = 64 - X;
  316. hcrop1 = 2 * ((tvn->Wa - We) / 4);
  317. hcrop2 = tvn->Wa - We - hcrop1;
  318. HStart = tvn->HStart ? tvn->HStart : 1;
  319. /* (Ronald) Original comment:
  320. * "| 1 Doesn't have any effect, tested on both a DC10 and a DC10+"
  321. * this is false. It inverses chroma values on the LML33R10 (so Cr
  322. * suddenly is shown as Cb and reverse, really cool effect if you
  323. * want to see blue faces, not useful otherwise). So don't use |1.
  324. * However, the DC10 has '0' as HStart, but does need |1, so we
  325. * use a dirty check...
  326. */
  327. HEnd = HStart + tvn->Wa - 1;
  328. HStart += hcrop1;
  329. HEnd -= hcrop2;
  330. reg = ((HStart & ZR36057_VFEHCR_Hmask) << ZR36057_VFEHCR_HStart)
  331. | ((HEnd & ZR36057_VFEHCR_Hmask) << ZR36057_VFEHCR_HEnd);
  332. if (zr->card.vfe_pol.hsync_pol)
  333. reg |= ZR36057_VFEHCR_HSPol;
  334. btwrite(reg, ZR36057_VFEHCR);
  335. /* Vertical */
  336. DispMode = !(video_height > BUZ_MAX_HEIGHT / 2);
  337. VidWinHt = DispMode ? video_height : video_height / 2;
  338. Y = DIV_ROUND_UP(VidWinHt * 64 * 2, tvn->Ha);
  339. He = (VidWinHt * 64) / Y;
  340. VerDcm = 64 - Y;
  341. vcrop1 = (tvn->Ha / 2 - He) / 2;
  342. vcrop2 = tvn->Ha / 2 - He - vcrop1;
  343. VStart = tvn->VStart;
  344. VEnd = VStart + tvn->Ha / 2; // - 1; FIXME SnapShot times out with -1 in 768*576 on the DC10 - LP
  345. VStart += vcrop1;
  346. VEnd -= vcrop2;
  347. reg = ((VStart & ZR36057_VFEVCR_Vmask) << ZR36057_VFEVCR_VStart)
  348. | ((VEnd & ZR36057_VFEVCR_Vmask) << ZR36057_VFEVCR_VEnd);
  349. if (zr->card.vfe_pol.vsync_pol)
  350. reg |= ZR36057_VFEVCR_VSPol;
  351. btwrite(reg, ZR36057_VFEVCR);
  352. /* scaler and pixel format */
  353. reg = 0;
  354. reg |= (HorDcm << ZR36057_VFESPFR_HorDcm);
  355. reg |= (VerDcm << ZR36057_VFESPFR_VerDcm);
  356. reg |= (DispMode << ZR36057_VFESPFR_DispMode);
  357. /* RJ: I don't know, why the following has to be the opposite
  358. * of the corresponding ZR36060 setting, but only this way
  359. * we get the correct colors when uncompressing to the screen */
  360. //reg |= ZR36057_VFESPFR_VCLKPol; /**/
  361. /* RJ: Don't know if that is needed for NTSC also */
  362. if (!(zr->norm & V4L2_STD_NTSC))
  363. reg |= ZR36057_VFESPFR_ExtFl; // NEEDED!!!!!!! Wolfgang
  364. reg |= ZR36057_VFESPFR_TopField;
  365. if (HorDcm >= 48) {
  366. reg |= 3 << ZR36057_VFESPFR_HFilter; /* 5 tap filter */
  367. } else if (HorDcm >= 32) {
  368. reg |= 2 << ZR36057_VFESPFR_HFilter; /* 4 tap filter */
  369. } else if (HorDcm >= 16) {
  370. reg |= 1 << ZR36057_VFESPFR_HFilter; /* 3 tap filter */
  371. }
  372. reg |= format->vfespfr;
  373. btwrite(reg, ZR36057_VFESPFR);
  374. /* display configuration */
  375. reg = (16 << ZR36057_VDCR_MinPix)
  376. | (VidWinHt << ZR36057_VDCR_VidWinHt)
  377. | (VidWinWid << ZR36057_VDCR_VidWinWid);
  378. if (pci_pci_problems & PCIPCI_TRITON)
  379. // || zr->revision < 1) // Revision 1 has also Triton support
  380. reg &= ~ZR36057_VDCR_Triton;
  381. else
  382. reg |= ZR36057_VDCR_Triton;
  383. btwrite(reg, ZR36057_VDCR);
  384. /* (Ronald) don't write this if overlay_mask = NULL */
  385. if (zr->overlay_mask) {
  386. /* Write overlay clipping mask data, but don't enable overlay clipping */
  387. /* RJ: since this makes only sense on the screen, we use
  388. * zr->overlay_settings.width instead of video_width */
  389. mask_line_size = (BUZ_MAX_WIDTH + 31) / 32;
  390. reg = virt_to_bus(zr->overlay_mask);
  391. btwrite(reg, ZR36057_MMTR);
  392. reg = virt_to_bus(zr->overlay_mask + mask_line_size);
  393. btwrite(reg, ZR36057_MMBR);
  394. reg =
  395. mask_line_size - (zr->overlay_settings.width +
  396. 31) / 32;
  397. if (DispMode == 0)
  398. reg += mask_line_size;
  399. reg <<= ZR36057_OCR_MaskStride;
  400. btwrite(reg, ZR36057_OCR);
  401. }
  402. zr36057_adjust_vfe(zr, zr->codec_mode);
  403. }
  404. /*
  405. * Switch overlay on or off
  406. */
  407. void
  408. zr36057_overlay (struct zoran *zr,
  409. int on)
  410. {
  411. u32 reg;
  412. if (on) {
  413. /* do the necessary settings ... */
  414. btand(~ZR36057_VDCR_VidEn, ZR36057_VDCR); /* switch it off first */
  415. zr36057_set_vfe(zr,
  416. zr->overlay_settings.width,
  417. zr->overlay_settings.height,
  418. zr->overlay_settings.format);
  419. /* Start and length of each line MUST be 4-byte aligned.
  420. * This should be already checked before the call to this routine.
  421. * All error messages are internal driver checking only! */
  422. /* video display top and bottom registers */
  423. reg = (long) zr->vbuf_base +
  424. zr->overlay_settings.x *
  425. ((zr->overlay_settings.format->depth + 7) / 8) +
  426. zr->overlay_settings.y *
  427. zr->vbuf_bytesperline;
  428. btwrite(reg, ZR36057_VDTR);
  429. if (reg & 3)
  430. dprintk(1,
  431. KERN_ERR
  432. "%s: zr36057_overlay() - video_address not aligned\n",
  433. ZR_DEVNAME(zr));
  434. if (zr->overlay_settings.height > BUZ_MAX_HEIGHT / 2)
  435. reg += zr->vbuf_bytesperline;
  436. btwrite(reg, ZR36057_VDBR);
  437. /* video stride, status, and frame grab register */
  438. reg = zr->vbuf_bytesperline -
  439. zr->overlay_settings.width *
  440. ((zr->overlay_settings.format->depth + 7) / 8);
  441. if (zr->overlay_settings.height > BUZ_MAX_HEIGHT / 2)
  442. reg += zr->vbuf_bytesperline;
  443. if (reg & 3)
  444. dprintk(1,
  445. KERN_ERR
  446. "%s: zr36057_overlay() - video_stride not aligned\n",
  447. ZR_DEVNAME(zr));
  448. reg = (reg << ZR36057_VSSFGR_DispStride);
  449. reg |= ZR36057_VSSFGR_VidOvf; /* clear overflow status */
  450. btwrite(reg, ZR36057_VSSFGR);
  451. /* Set overlay clipping */
  452. if (zr->overlay_settings.clipcount > 0)
  453. btor(ZR36057_OCR_OvlEnable, ZR36057_OCR);
  454. /* ... and switch it on */
  455. btor(ZR36057_VDCR_VidEn, ZR36057_VDCR);
  456. } else {
  457. /* Switch it off */
  458. btand(~ZR36057_VDCR_VidEn, ZR36057_VDCR);
  459. }
  460. }
  461. /*
  462. * The overlay mask has one bit for each pixel on a scan line,
  463. * and the maximum window size is BUZ_MAX_WIDTH * BUZ_MAX_HEIGHT pixels.
  464. */
  465. void write_overlay_mask(struct zoran_fh *fh, struct v4l2_clip *vp, int count)
  466. {
  467. struct zoran *zr = fh->zr;
  468. unsigned mask_line_size = (BUZ_MAX_WIDTH + 31) / 32;
  469. u32 *mask;
  470. int x, y, width, height;
  471. unsigned i, j, k;
  472. /* fill mask with one bits */
  473. memset(fh->overlay_mask, ~0, mask_line_size * 4 * BUZ_MAX_HEIGHT);
  474. for (i = 0; i < count; ++i) {
  475. /* pick up local copy of clip */
  476. x = vp[i].c.left;
  477. y = vp[i].c.top;
  478. width = vp[i].c.width;
  479. height = vp[i].c.height;
  480. /* trim clips that extend beyond the window */
  481. if (x < 0) {
  482. width += x;
  483. x = 0;
  484. }
  485. if (y < 0) {
  486. height += y;
  487. y = 0;
  488. }
  489. if (x + width > fh->overlay_settings.width) {
  490. width = fh->overlay_settings.width - x;
  491. }
  492. if (y + height > fh->overlay_settings.height) {
  493. height = fh->overlay_settings.height - y;
  494. }
  495. /* ignore degenerate clips */
  496. if (height <= 0) {
  497. continue;
  498. }
  499. if (width <= 0) {
  500. continue;
  501. }
  502. /* apply clip for each scan line */
  503. for (j = 0; j < height; ++j) {
  504. /* reset bit for each pixel */
  505. /* this can be optimized later if need be */
  506. mask = fh->overlay_mask + (y + j) * mask_line_size;
  507. for (k = 0; k < width; ++k) {
  508. mask[(x + k) / 32] &=
  509. ~((u32) 1 << (x + k) % 32);
  510. }
  511. }
  512. }
  513. }
  514. /* Enable/Disable uncompressed memory grabbing of the 36057 */
  515. void
  516. zr36057_set_memgrab (struct zoran *zr,
  517. int mode)
  518. {
  519. if (mode) {
  520. /* We only check SnapShot and not FrameGrab here. SnapShot==1
  521. * means a capture is already in progress, but FrameGrab==1
  522. * doesn't necessary mean that. It's more correct to say a 1
  523. * to 0 transition indicates a capture completed. If a
  524. * capture is pending when capturing is tuned off, FrameGrab
  525. * will be stuck at 1 until capturing is turned back on.
  526. */
  527. if (btread(ZR36057_VSSFGR) & ZR36057_VSSFGR_SnapShot)
  528. dprintk(1,
  529. KERN_WARNING
  530. "%s: zr36057_set_memgrab(1) with SnapShot on!?\n",
  531. ZR_DEVNAME(zr));
  532. /* switch on VSync interrupts */
  533. btwrite(IRQ_MASK, ZR36057_ISR); // Clear Interrupts
  534. btor(zr->card.vsync_int, ZR36057_ICR); // SW
  535. /* enable SnapShot */
  536. btor(ZR36057_VSSFGR_SnapShot, ZR36057_VSSFGR);
  537. /* Set zr36057 video front end and enable video */
  538. zr36057_set_vfe(zr, zr->v4l_settings.width,
  539. zr->v4l_settings.height,
  540. zr->v4l_settings.format);
  541. zr->v4l_memgrab_active = 1;
  542. } else {
  543. /* switch off VSync interrupts */
  544. btand(~zr->card.vsync_int, ZR36057_ICR); // SW
  545. zr->v4l_memgrab_active = 0;
  546. zr->v4l_grab_frame = NO_GRAB_ACTIVE;
  547. /* reenable grabbing to screen if it was running */
  548. if (zr->v4l_overlay_active) {
  549. zr36057_overlay(zr, 1);
  550. } else {
  551. btand(~ZR36057_VDCR_VidEn, ZR36057_VDCR);
  552. btand(~ZR36057_VSSFGR_SnapShot, ZR36057_VSSFGR);
  553. }
  554. }
  555. }
  556. int
  557. wait_grab_pending (struct zoran *zr)
  558. {
  559. unsigned long flags;
  560. /* wait until all pending grabs are finished */
  561. if (!zr->v4l_memgrab_active)
  562. return 0;
  563. wait_event_interruptible(zr->v4l_capq,
  564. (zr->v4l_pend_tail == zr->v4l_pend_head));
  565. if (signal_pending(current))
  566. return -ERESTARTSYS;
  567. spin_lock_irqsave(&zr->spinlock, flags);
  568. zr36057_set_memgrab(zr, 0);
  569. spin_unlock_irqrestore(&zr->spinlock, flags);
  570. return 0;
  571. }
  572. /*****************************************************************************
  573. * *
  574. * Set up the Buz-specific MJPEG part *
  575. * *
  576. *****************************************************************************/
  577. static inline void
  578. set_frame (struct zoran *zr,
  579. int val)
  580. {
  581. GPIO(zr, zr->card.gpio[ZR_GPIO_JPEG_FRAME], val);
  582. }
  583. static void
  584. set_videobus_dir (struct zoran *zr,
  585. int val)
  586. {
  587. switch (zr->card.type) {
  588. case LML33:
  589. case LML33R10:
  590. if (!lml33dpath)
  591. GPIO(zr, 5, val);
  592. else
  593. GPIO(zr, 5, 1);
  594. break;
  595. default:
  596. GPIO(zr, zr->card.gpio[ZR_GPIO_VID_DIR],
  597. zr->card.gpio_pol[ZR_GPIO_VID_DIR] ? !val : val);
  598. break;
  599. }
  600. }
  601. static void
  602. init_jpeg_queue (struct zoran *zr)
  603. {
  604. int i;
  605. /* re-initialize DMA ring stuff */
  606. zr->jpg_que_head = 0;
  607. zr->jpg_dma_head = 0;
  608. zr->jpg_dma_tail = 0;
  609. zr->jpg_que_tail = 0;
  610. zr->jpg_seq_num = 0;
  611. zr->JPEG_error = 0;
  612. zr->num_errors = 0;
  613. zr->jpg_err_seq = 0;
  614. zr->jpg_err_shift = 0;
  615. zr->jpg_queued_num = 0;
  616. for (i = 0; i < zr->jpg_buffers.num_buffers; i++) {
  617. zr->jpg_buffers.buffer[i].state = BUZ_STATE_USER; /* nothing going on */
  618. }
  619. for (i = 0; i < BUZ_NUM_STAT_COM; i++) {
  620. zr->stat_com[i] = cpu_to_le32(1); /* mark as unavailable to zr36057 */
  621. }
  622. }
  623. static void
  624. zr36057_set_jpg (struct zoran *zr,
  625. enum zoran_codec_mode mode)
  626. {
  627. struct tvnorm *tvn;
  628. u32 reg;
  629. tvn = zr->timing;
  630. /* assert P_Reset, disable code transfer, deassert Active */
  631. btwrite(0, ZR36057_JPC);
  632. /* MJPEG compression mode */
  633. switch (mode) {
  634. case BUZ_MODE_MOTION_COMPRESS:
  635. default:
  636. reg = ZR36057_JMC_MJPGCmpMode;
  637. break;
  638. case BUZ_MODE_MOTION_DECOMPRESS:
  639. reg = ZR36057_JMC_MJPGExpMode;
  640. reg |= ZR36057_JMC_SyncMstr;
  641. /* RJ: The following is experimental - improves the output to screen */
  642. //if(zr->jpg_settings.VFIFO_FB) reg |= ZR36057_JMC_VFIFO_FB; // No, it doesn't. SM
  643. break;
  644. case BUZ_MODE_STILL_COMPRESS:
  645. reg = ZR36057_JMC_JPGCmpMode;
  646. break;
  647. case BUZ_MODE_STILL_DECOMPRESS:
  648. reg = ZR36057_JMC_JPGExpMode;
  649. break;
  650. }
  651. reg |= ZR36057_JMC_JPG;
  652. if (zr->jpg_settings.field_per_buff == 1)
  653. reg |= ZR36057_JMC_Fld_per_buff;
  654. btwrite(reg, ZR36057_JMC);
  655. /* vertical */
  656. btor(ZR36057_VFEVCR_VSPol, ZR36057_VFEVCR);
  657. reg = (6 << ZR36057_VSP_VsyncSize) |
  658. (tvn->Ht << ZR36057_VSP_FrmTot);
  659. btwrite(reg, ZR36057_VSP);
  660. reg = ((zr->jpg_settings.img_y + tvn->VStart) << ZR36057_FVAP_NAY) |
  661. (zr->jpg_settings.img_height << ZR36057_FVAP_PAY);
  662. btwrite(reg, ZR36057_FVAP);
  663. /* horizontal */
  664. if (zr->card.vfe_pol.hsync_pol)
  665. btor(ZR36057_VFEHCR_HSPol, ZR36057_VFEHCR);
  666. else
  667. btand(~ZR36057_VFEHCR_HSPol, ZR36057_VFEHCR);
  668. reg = ((tvn->HSyncStart) << ZR36057_HSP_HsyncStart) |
  669. (tvn->Wt << ZR36057_HSP_LineTot);
  670. btwrite(reg, ZR36057_HSP);
  671. reg = ((zr->jpg_settings.img_x +
  672. tvn->HStart + 4) << ZR36057_FHAP_NAX) |
  673. (zr->jpg_settings.img_width << ZR36057_FHAP_PAX);
  674. btwrite(reg, ZR36057_FHAP);
  675. /* field process parameters */
  676. if (zr->jpg_settings.odd_even)
  677. reg = ZR36057_FPP_Odd_Even;
  678. else
  679. reg = 0;
  680. btwrite(reg, ZR36057_FPP);
  681. /* Set proper VCLK Polarity, else colors will be wrong during playback */
  682. //btor(ZR36057_VFESPFR_VCLKPol, ZR36057_VFESPFR);
  683. /* code base address */
  684. reg = virt_to_bus(zr->stat_com);
  685. btwrite(reg, ZR36057_JCBA);
  686. /* FIFO threshold (FIFO is 160. double words) */
  687. /* NOTE: decimal values here */
  688. switch (mode) {
  689. case BUZ_MODE_STILL_COMPRESS:
  690. case BUZ_MODE_MOTION_COMPRESS:
  691. if (zr->card.type != BUZ)
  692. reg = 140;
  693. else
  694. reg = 60;
  695. break;
  696. case BUZ_MODE_STILL_DECOMPRESS:
  697. case BUZ_MODE_MOTION_DECOMPRESS:
  698. reg = 20;
  699. break;
  700. default:
  701. reg = 80;
  702. break;
  703. }
  704. btwrite(reg, ZR36057_JCFT);
  705. zr36057_adjust_vfe(zr, mode);
  706. }
  707. void
  708. print_interrupts (struct zoran *zr)
  709. {
  710. int res, noerr = 0;
  711. printk(KERN_INFO "%s: interrupts received:", ZR_DEVNAME(zr));
  712. if ((res = zr->field_counter) < -1 || res > 1) {
  713. printk(" FD:%d", res);
  714. }
  715. if ((res = zr->intr_counter_GIRQ1) != 0) {
  716. printk(" GIRQ1:%d", res);
  717. noerr++;
  718. }
  719. if ((res = zr->intr_counter_GIRQ0) != 0) {
  720. printk(" GIRQ0:%d", res);
  721. noerr++;
  722. }
  723. if ((res = zr->intr_counter_CodRepIRQ) != 0) {
  724. printk(" CodRepIRQ:%d", res);
  725. noerr++;
  726. }
  727. if ((res = zr->intr_counter_JPEGRepIRQ) != 0) {
  728. printk(" JPEGRepIRQ:%d", res);
  729. noerr++;
  730. }
  731. if (zr->JPEG_max_missed) {
  732. printk(" JPEG delays: max=%d min=%d", zr->JPEG_max_missed,
  733. zr->JPEG_min_missed);
  734. }
  735. if (zr->END_event_missed) {
  736. printk(" ENDs missed: %d", zr->END_event_missed);
  737. }
  738. //if (zr->jpg_queued_num) {
  739. printk(" queue_state=%ld/%ld/%ld/%ld", zr->jpg_que_tail,
  740. zr->jpg_dma_tail, zr->jpg_dma_head, zr->jpg_que_head);
  741. //}
  742. if (!noerr) {
  743. printk(": no interrupts detected.");
  744. }
  745. printk("\n");
  746. }
  747. void
  748. clear_interrupt_counters (struct zoran *zr)
  749. {
  750. zr->intr_counter_GIRQ1 = 0;
  751. zr->intr_counter_GIRQ0 = 0;
  752. zr->intr_counter_CodRepIRQ = 0;
  753. zr->intr_counter_JPEGRepIRQ = 0;
  754. zr->field_counter = 0;
  755. zr->IRQ1_in = 0;
  756. zr->IRQ1_out = 0;
  757. zr->JPEG_in = 0;
  758. zr->JPEG_out = 0;
  759. zr->JPEG_0 = 0;
  760. zr->JPEG_1 = 0;
  761. zr->END_event_missed = 0;
  762. zr->JPEG_missed = 0;
  763. zr->JPEG_max_missed = 0;
  764. zr->JPEG_min_missed = 0x7fffffff;
  765. }
  766. static u32
  767. count_reset_interrupt (struct zoran *zr)
  768. {
  769. u32 isr;
  770. if ((isr = btread(ZR36057_ISR) & 0x78000000)) {
  771. if (isr & ZR36057_ISR_GIRQ1) {
  772. btwrite(ZR36057_ISR_GIRQ1, ZR36057_ISR);
  773. zr->intr_counter_GIRQ1++;
  774. }
  775. if (isr & ZR36057_ISR_GIRQ0) {
  776. btwrite(ZR36057_ISR_GIRQ0, ZR36057_ISR);
  777. zr->intr_counter_GIRQ0++;
  778. }
  779. if (isr & ZR36057_ISR_CodRepIRQ) {
  780. btwrite(ZR36057_ISR_CodRepIRQ, ZR36057_ISR);
  781. zr->intr_counter_CodRepIRQ++;
  782. }
  783. if (isr & ZR36057_ISR_JPEGRepIRQ) {
  784. btwrite(ZR36057_ISR_JPEGRepIRQ, ZR36057_ISR);
  785. zr->intr_counter_JPEGRepIRQ++;
  786. }
  787. }
  788. return isr;
  789. }
  790. void
  791. jpeg_start (struct zoran *zr)
  792. {
  793. int reg;
  794. zr->frame_num = 0;
  795. /* deassert P_reset, disable code transfer, deassert Active */
  796. btwrite(ZR36057_JPC_P_Reset, ZR36057_JPC);
  797. /* stop flushing the internal code buffer */
  798. btand(~ZR36057_MCTCR_CFlush, ZR36057_MCTCR);
  799. /* enable code transfer */
  800. btor(ZR36057_JPC_CodTrnsEn, ZR36057_JPC);
  801. /* clear IRQs */
  802. btwrite(IRQ_MASK, ZR36057_ISR);
  803. /* enable the JPEG IRQs */
  804. btwrite(zr->card.jpeg_int |
  805. ZR36057_ICR_JPEGRepIRQ |
  806. ZR36057_ICR_IntPinEn,
  807. ZR36057_ICR);
  808. set_frame(zr, 0); // \FRAME
  809. /* set the JPEG codec guest ID */
  810. reg = (zr->card.gpcs[1] << ZR36057_JCGI_JPEGuestID) |
  811. (0 << ZR36057_JCGI_JPEGuestReg);
  812. btwrite(reg, ZR36057_JCGI);
  813. if (zr->card.video_vfe == CODEC_TYPE_ZR36016 &&
  814. zr->card.video_codec == CODEC_TYPE_ZR36050) {
  815. /* Enable processing on the ZR36016 */
  816. if (zr->vfe)
  817. zr36016_write(zr->vfe, 0, 1);
  818. /* load the address of the GO register in the ZR36050 latch */
  819. post_office_write(zr, 0, 0, 0);
  820. }
  821. /* assert Active */
  822. btor(ZR36057_JPC_Active, ZR36057_JPC);
  823. /* enable the Go generation */
  824. btor(ZR36057_JMC_Go_en, ZR36057_JMC);
  825. udelay(30);
  826. set_frame(zr, 1); // /FRAME
  827. dprintk(3, KERN_DEBUG "%s: jpeg_start\n", ZR_DEVNAME(zr));
  828. }
  829. void
  830. zr36057_enable_jpg (struct zoran *zr,
  831. enum zoran_codec_mode mode)
  832. {
  833. struct vfe_settings cap;
  834. int field_size =
  835. zr->jpg_buffers.buffer_size / zr->jpg_settings.field_per_buff;
  836. zr->codec_mode = mode;
  837. cap.x = zr->jpg_settings.img_x;
  838. cap.y = zr->jpg_settings.img_y;
  839. cap.width = zr->jpg_settings.img_width;
  840. cap.height = zr->jpg_settings.img_height;
  841. cap.decimation =
  842. zr->jpg_settings.HorDcm | (zr->jpg_settings.VerDcm << 8);
  843. cap.quality = zr->jpg_settings.jpg_comp.quality;
  844. switch (mode) {
  845. case BUZ_MODE_MOTION_COMPRESS: {
  846. struct jpeg_app_marker app;
  847. struct jpeg_com_marker com;
  848. /* In motion compress mode, the decoder output must be enabled, and
  849. * the video bus direction set to input.
  850. */
  851. set_videobus_dir(zr, 0);
  852. decoder_call(zr, video, s_stream, 1);
  853. encoder_call(zr, video, s_routing, 0, 0, 0);
  854. /* Take the JPEG codec and the VFE out of sleep */
  855. jpeg_codec_sleep(zr, 0);
  856. /* set JPEG app/com marker */
  857. app.appn = zr->jpg_settings.jpg_comp.APPn;
  858. app.len = zr->jpg_settings.jpg_comp.APP_len;
  859. memcpy(app.data, zr->jpg_settings.jpg_comp.APP_data, 60);
  860. zr->codec->control(zr->codec, CODEC_S_JPEG_APP_DATA,
  861. sizeof(struct jpeg_app_marker), &app);
  862. com.len = zr->jpg_settings.jpg_comp.COM_len;
  863. memcpy(com.data, zr->jpg_settings.jpg_comp.COM_data, 60);
  864. zr->codec->control(zr->codec, CODEC_S_JPEG_COM_DATA,
  865. sizeof(struct jpeg_com_marker), &com);
  866. /* Setup the JPEG codec */
  867. zr->codec->control(zr->codec, CODEC_S_JPEG_TDS_BYTE,
  868. sizeof(int), &field_size);
  869. zr->codec->set_video(zr->codec, zr->timing, &cap,
  870. &zr->card.vfe_pol);
  871. zr->codec->set_mode(zr->codec, CODEC_DO_COMPRESSION);
  872. /* Setup the VFE */
  873. if (zr->vfe) {
  874. zr->vfe->control(zr->vfe, CODEC_S_JPEG_TDS_BYTE,
  875. sizeof(int), &field_size);
  876. zr->vfe->set_video(zr->vfe, zr->timing, &cap,
  877. &zr->card.vfe_pol);
  878. zr->vfe->set_mode(zr->vfe, CODEC_DO_COMPRESSION);
  879. }
  880. init_jpeg_queue(zr);
  881. zr36057_set_jpg(zr, mode); // \P_Reset, ... Video param, FIFO
  882. clear_interrupt_counters(zr);
  883. dprintk(2, KERN_INFO "%s: enable_jpg(MOTION_COMPRESS)\n",
  884. ZR_DEVNAME(zr));
  885. break;
  886. }
  887. case BUZ_MODE_MOTION_DECOMPRESS:
  888. /* In motion decompression mode, the decoder output must be disabled, and
  889. * the video bus direction set to output.
  890. */
  891. decoder_call(zr, video, s_stream, 0);
  892. set_videobus_dir(zr, 1);
  893. encoder_call(zr, video, s_routing, 1, 0, 0);
  894. /* Take the JPEG codec and the VFE out of sleep */
  895. jpeg_codec_sleep(zr, 0);
  896. /* Setup the VFE */
  897. if (zr->vfe) {
  898. zr->vfe->set_video(zr->vfe, zr->timing, &cap,
  899. &zr->card.vfe_pol);
  900. zr->vfe->set_mode(zr->vfe, CODEC_DO_EXPANSION);
  901. }
  902. /* Setup the JPEG codec */
  903. zr->codec->set_video(zr->codec, zr->timing, &cap,
  904. &zr->card.vfe_pol);
  905. zr->codec->set_mode(zr->codec, CODEC_DO_EXPANSION);
  906. init_jpeg_queue(zr);
  907. zr36057_set_jpg(zr, mode); // \P_Reset, ... Video param, FIFO
  908. clear_interrupt_counters(zr);
  909. dprintk(2, KERN_INFO "%s: enable_jpg(MOTION_DECOMPRESS)\n",
  910. ZR_DEVNAME(zr));
  911. break;
  912. case BUZ_MODE_IDLE:
  913. default:
  914. /* shut down processing */
  915. btand(~(zr->card.jpeg_int | ZR36057_ICR_JPEGRepIRQ),
  916. ZR36057_ICR);
  917. btwrite(zr->card.jpeg_int | ZR36057_ICR_JPEGRepIRQ,
  918. ZR36057_ISR);
  919. btand(~ZR36057_JMC_Go_en, ZR36057_JMC); // \Go_en
  920. msleep(50);
  921. set_videobus_dir(zr, 0);
  922. set_frame(zr, 1); // /FRAME
  923. btor(ZR36057_MCTCR_CFlush, ZR36057_MCTCR); // /CFlush
  924. btwrite(0, ZR36057_JPC); // \P_Reset,\CodTrnsEn,\Active
  925. btand(~ZR36057_JMC_VFIFO_FB, ZR36057_JMC);
  926. btand(~ZR36057_JMC_SyncMstr, ZR36057_JMC);
  927. jpeg_codec_reset(zr);
  928. jpeg_codec_sleep(zr, 1);
  929. zr36057_adjust_vfe(zr, mode);
  930. decoder_call(zr, video, s_stream, 1);
  931. encoder_call(zr, video, s_routing, 0, 0, 0);
  932. dprintk(2, KERN_INFO "%s: enable_jpg(IDLE)\n", ZR_DEVNAME(zr));
  933. break;
  934. }
  935. }
  936. /* when this is called the spinlock must be held */
  937. void
  938. zoran_feed_stat_com (struct zoran *zr)
  939. {
  940. /* move frames from pending queue to DMA */
  941. int frame, i, max_stat_com;
  942. max_stat_com =
  943. (zr->jpg_settings.TmpDcm ==
  944. 1) ? BUZ_NUM_STAT_COM : (BUZ_NUM_STAT_COM >> 1);
  945. while ((zr->jpg_dma_head - zr->jpg_dma_tail) < max_stat_com &&
  946. zr->jpg_dma_head < zr->jpg_que_head) {
  947. frame = zr->jpg_pend[zr->jpg_dma_head & BUZ_MASK_FRAME];
  948. if (zr->jpg_settings.TmpDcm == 1) {
  949. /* fill 1 stat_com entry */
  950. i = (zr->jpg_dma_head -
  951. zr->jpg_err_shift) & BUZ_MASK_STAT_COM;
  952. if (!(zr->stat_com[i] & cpu_to_le32(1)))
  953. break;
  954. zr->stat_com[i] =
  955. cpu_to_le32(zr->jpg_buffers.buffer[frame].jpg.frag_tab_bus);
  956. } else {
  957. /* fill 2 stat_com entries */
  958. i = ((zr->jpg_dma_head -
  959. zr->jpg_err_shift) & 1) * 2;
  960. if (!(zr->stat_com[i] & cpu_to_le32(1)))
  961. break;
  962. zr->stat_com[i] =
  963. cpu_to_le32(zr->jpg_buffers.buffer[frame].jpg.frag_tab_bus);
  964. zr->stat_com[i + 1] =
  965. cpu_to_le32(zr->jpg_buffers.buffer[frame].jpg.frag_tab_bus);
  966. }
  967. zr->jpg_buffers.buffer[frame].state = BUZ_STATE_DMA;
  968. zr->jpg_dma_head++;
  969. }
  970. if (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS)
  971. zr->jpg_queued_num++;
  972. }
  973. /* when this is called the spinlock must be held */
  974. static void
  975. zoran_reap_stat_com (struct zoran *zr)
  976. {
  977. /* move frames from DMA queue to done queue */
  978. int i;
  979. u32 stat_com;
  980. unsigned int seq;
  981. unsigned int dif;
  982. struct zoran_buffer *buffer;
  983. int frame;
  984. /* In motion decompress we don't have a hardware frame counter,
  985. * we just count the interrupts here */
  986. if (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS) {
  987. zr->jpg_seq_num++;
  988. }
  989. while (zr->jpg_dma_tail < zr->jpg_dma_head) {
  990. if (zr->jpg_settings.TmpDcm == 1)
  991. i = (zr->jpg_dma_tail -
  992. zr->jpg_err_shift) & BUZ_MASK_STAT_COM;
  993. else
  994. i = ((zr->jpg_dma_tail -
  995. zr->jpg_err_shift) & 1) * 2 + 1;
  996. stat_com = le32_to_cpu(zr->stat_com[i]);
  997. if ((stat_com & 1) == 0) {
  998. return;
  999. }
  1000. frame = zr->jpg_pend[zr->jpg_dma_tail & BUZ_MASK_FRAME];
  1001. buffer = &zr->jpg_buffers.buffer[frame];
  1002. v4l2_get_timestamp(&buffer->bs.timestamp);
  1003. if (zr->codec_mode == BUZ_MODE_MOTION_COMPRESS) {
  1004. buffer->bs.length = (stat_com & 0x7fffff) >> 1;
  1005. /* update sequence number with the help of the counter in stat_com */
  1006. seq = ((stat_com >> 24) + zr->jpg_err_seq) & 0xff;
  1007. dif = (seq - zr->jpg_seq_num) & 0xff;
  1008. zr->jpg_seq_num += dif;
  1009. } else {
  1010. buffer->bs.length = 0;
  1011. }
  1012. buffer->bs.seq =
  1013. zr->jpg_settings.TmpDcm ==
  1014. 2 ? (zr->jpg_seq_num >> 1) : zr->jpg_seq_num;
  1015. buffer->state = BUZ_STATE_DONE;
  1016. zr->jpg_dma_tail++;
  1017. }
  1018. }
  1019. static void zoran_restart(struct zoran *zr)
  1020. {
  1021. /* Now the stat_comm buffer is ready for restart */
  1022. unsigned int status = 0;
  1023. int mode;
  1024. if (zr->codec_mode == BUZ_MODE_MOTION_COMPRESS) {
  1025. decoder_call(zr, video, g_input_status, &status);
  1026. mode = CODEC_DO_COMPRESSION;
  1027. } else {
  1028. status = V4L2_IN_ST_NO_SIGNAL;
  1029. mode = CODEC_DO_EXPANSION;
  1030. }
  1031. if (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS ||
  1032. !(status & V4L2_IN_ST_NO_SIGNAL)) {
  1033. /********** RESTART code *************/
  1034. jpeg_codec_reset(zr);
  1035. zr->codec->set_mode(zr->codec, mode);
  1036. zr36057_set_jpg(zr, zr->codec_mode);
  1037. jpeg_start(zr);
  1038. if (zr->num_errors <= 8)
  1039. dprintk(2, KERN_INFO "%s: Restart\n",
  1040. ZR_DEVNAME(zr));
  1041. zr->JPEG_missed = 0;
  1042. zr->JPEG_error = 2;
  1043. /********** End RESTART code ***********/
  1044. }
  1045. }
  1046. static void
  1047. error_handler (struct zoran *zr,
  1048. u32 astat,
  1049. u32 stat)
  1050. {
  1051. int i;
  1052. /* This is JPEG error handling part */
  1053. if (zr->codec_mode != BUZ_MODE_MOTION_COMPRESS &&
  1054. zr->codec_mode != BUZ_MODE_MOTION_DECOMPRESS) {
  1055. return;
  1056. }
  1057. if ((stat & 1) == 0 &&
  1058. zr->codec_mode == BUZ_MODE_MOTION_COMPRESS &&
  1059. zr->jpg_dma_tail - zr->jpg_que_tail >= zr->jpg_buffers.num_buffers) {
  1060. /* No free buffers... */
  1061. zoran_reap_stat_com(zr);
  1062. zoran_feed_stat_com(zr);
  1063. wake_up_interruptible(&zr->jpg_capq);
  1064. zr->JPEG_missed = 0;
  1065. return;
  1066. }
  1067. if (zr->JPEG_error == 1) {
  1068. zoran_restart(zr);
  1069. return;
  1070. }
  1071. /*
  1072. * First entry: error just happened during normal operation
  1073. *
  1074. * In BUZ_MODE_MOTION_COMPRESS:
  1075. *
  1076. * Possible glitch in TV signal. In this case we should
  1077. * stop the codec and wait for good quality signal before
  1078. * restarting it to avoid further problems
  1079. *
  1080. * In BUZ_MODE_MOTION_DECOMPRESS:
  1081. *
  1082. * Bad JPEG frame: we have to mark it as processed (codec crashed
  1083. * and was not able to do it itself), and to remove it from queue.
  1084. */
  1085. btand(~ZR36057_JMC_Go_en, ZR36057_JMC);
  1086. udelay(1);
  1087. stat = stat | (post_office_read(zr, 7, 0) & 3) << 8;
  1088. btwrite(0, ZR36057_JPC);
  1089. btor(ZR36057_MCTCR_CFlush, ZR36057_MCTCR);
  1090. jpeg_codec_reset(zr);
  1091. jpeg_codec_sleep(zr, 1);
  1092. zr->JPEG_error = 1;
  1093. zr->num_errors++;
  1094. /* Report error */
  1095. if (zr36067_debug > 1 && zr->num_errors <= 8) {
  1096. long frame;
  1097. int j;
  1098. frame = zr->jpg_pend[zr->jpg_dma_tail & BUZ_MASK_FRAME];
  1099. printk(KERN_ERR
  1100. "%s: JPEG error stat=0x%08x(0x%08x) queue_state=%ld/%ld/%ld/%ld seq=%ld frame=%ld. Codec stopped. ",
  1101. ZR_DEVNAME(zr), stat, zr->last_isr,
  1102. zr->jpg_que_tail, zr->jpg_dma_tail,
  1103. zr->jpg_dma_head, zr->jpg_que_head,
  1104. zr->jpg_seq_num, frame);
  1105. printk(KERN_INFO "stat_com frames:");
  1106. for (j = 0; j < BUZ_NUM_STAT_COM; j++) {
  1107. for (i = 0; i < zr->jpg_buffers.num_buffers; i++) {
  1108. if (le32_to_cpu(zr->stat_com[j]) == zr->jpg_buffers.buffer[i].jpg.frag_tab_bus)
  1109. printk(KERN_CONT "% d->%d", j, i);
  1110. }
  1111. }
  1112. printk(KERN_CONT "\n");
  1113. }
  1114. /* Find an entry in stat_com and rotate contents */
  1115. if (zr->jpg_settings.TmpDcm == 1)
  1116. i = (zr->jpg_dma_tail - zr->jpg_err_shift) & BUZ_MASK_STAT_COM;
  1117. else
  1118. i = ((zr->jpg_dma_tail - zr->jpg_err_shift) & 1) * 2;
  1119. if (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS) {
  1120. /* Mimic zr36067 operation */
  1121. zr->stat_com[i] |= cpu_to_le32(1);
  1122. if (zr->jpg_settings.TmpDcm != 1)
  1123. zr->stat_com[i + 1] |= cpu_to_le32(1);
  1124. /* Refill */
  1125. zoran_reap_stat_com(zr);
  1126. zoran_feed_stat_com(zr);
  1127. wake_up_interruptible(&zr->jpg_capq);
  1128. /* Find an entry in stat_com again after refill */
  1129. if (zr->jpg_settings.TmpDcm == 1)
  1130. i = (zr->jpg_dma_tail - zr->jpg_err_shift) & BUZ_MASK_STAT_COM;
  1131. else
  1132. i = ((zr->jpg_dma_tail - zr->jpg_err_shift) & 1) * 2;
  1133. }
  1134. if (i) {
  1135. /* Rotate stat_comm entries to make current entry first */
  1136. int j;
  1137. __le32 bus_addr[BUZ_NUM_STAT_COM];
  1138. /* Here we are copying the stat_com array, which
  1139. * is already in little endian format, so
  1140. * no endian conversions here
  1141. */
  1142. memcpy(bus_addr, zr->stat_com, sizeof(bus_addr));
  1143. for (j = 0; j < BUZ_NUM_STAT_COM; j++)
  1144. zr->stat_com[j] = bus_addr[(i + j) & BUZ_MASK_STAT_COM];
  1145. zr->jpg_err_shift += i;
  1146. zr->jpg_err_shift &= BUZ_MASK_STAT_COM;
  1147. }
  1148. if (zr->codec_mode == BUZ_MODE_MOTION_COMPRESS)
  1149. zr->jpg_err_seq = zr->jpg_seq_num; /* + 1; */
  1150. zoran_restart(zr);
  1151. }
  1152. irqreturn_t
  1153. zoran_irq (int irq,
  1154. void *dev_id)
  1155. {
  1156. u32 stat, astat;
  1157. int count;
  1158. struct zoran *zr;
  1159. unsigned long flags;
  1160. zr = dev_id;
  1161. count = 0;
  1162. if (zr->testing) {
  1163. /* Testing interrupts */
  1164. spin_lock_irqsave(&zr->spinlock, flags);
  1165. while ((stat = count_reset_interrupt(zr))) {
  1166. if (count++ > 100) {
  1167. btand(~ZR36057_ICR_IntPinEn, ZR36057_ICR);
  1168. dprintk(1,
  1169. KERN_ERR
  1170. "%s: IRQ lockup while testing, isr=0x%08x, cleared int mask\n",
  1171. ZR_DEVNAME(zr), stat);
  1172. wake_up_interruptible(&zr->test_q);
  1173. }
  1174. }
  1175. zr->last_isr = stat;
  1176. spin_unlock_irqrestore(&zr->spinlock, flags);
  1177. return IRQ_HANDLED;
  1178. }
  1179. spin_lock_irqsave(&zr->spinlock, flags);
  1180. while (1) {
  1181. /* get/clear interrupt status bits */
  1182. stat = count_reset_interrupt(zr);
  1183. astat = stat & IRQ_MASK;
  1184. if (!astat) {
  1185. break;
  1186. }
  1187. dprintk(4,
  1188. KERN_DEBUG
  1189. "zoran_irq: astat: 0x%08x, mask: 0x%08x\n",
  1190. astat, btread(ZR36057_ICR));
  1191. if (astat & zr->card.vsync_int) { // SW
  1192. if (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS ||
  1193. zr->codec_mode == BUZ_MODE_MOTION_COMPRESS) {
  1194. /* count missed interrupts */
  1195. zr->JPEG_missed++;
  1196. }
  1197. //post_office_read(zr,1,0);
  1198. /* Interrupts may still happen when
  1199. * zr->v4l_memgrab_active is switched off.
  1200. * We simply ignore them */
  1201. if (zr->v4l_memgrab_active) {
  1202. /* A lot more checks should be here ... */
  1203. if ((btread(ZR36057_VSSFGR) & ZR36057_VSSFGR_SnapShot) == 0)
  1204. dprintk(1,
  1205. KERN_WARNING
  1206. "%s: BuzIRQ with SnapShot off ???\n",
  1207. ZR_DEVNAME(zr));
  1208. if (zr->v4l_grab_frame != NO_GRAB_ACTIVE) {
  1209. /* There is a grab on a frame going on, check if it has finished */
  1210. if ((btread(ZR36057_VSSFGR) & ZR36057_VSSFGR_FrameGrab) == 0) {
  1211. /* it is finished, notify the user */
  1212. zr->v4l_buffers.buffer[zr->v4l_grab_frame].state = BUZ_STATE_DONE;
  1213. zr->v4l_buffers.buffer[zr->v4l_grab_frame].bs.seq = zr->v4l_grab_seq;
  1214. v4l2_get_timestamp(&zr->v4l_buffers.buffer[zr->v4l_grab_frame].bs.timestamp);
  1215. zr->v4l_grab_frame = NO_GRAB_ACTIVE;
  1216. zr->v4l_pend_tail++;
  1217. }
  1218. }
  1219. if (zr->v4l_grab_frame == NO_GRAB_ACTIVE)
  1220. wake_up_interruptible(&zr->v4l_capq);
  1221. /* Check if there is another grab queued */
  1222. if (zr->v4l_grab_frame == NO_GRAB_ACTIVE &&
  1223. zr->v4l_pend_tail != zr->v4l_pend_head) {
  1224. int frame = zr->v4l_pend[zr->v4l_pend_tail & V4L_MASK_FRAME];
  1225. u32 reg;
  1226. zr->v4l_grab_frame = frame;
  1227. /* Set zr36057 video front end and enable video */
  1228. /* Buffer address */
  1229. reg = zr->v4l_buffers.buffer[frame].v4l.fbuffer_bus;
  1230. btwrite(reg, ZR36057_VDTR);
  1231. if (zr->v4l_settings.height > BUZ_MAX_HEIGHT / 2)
  1232. reg += zr->v4l_settings.bytesperline;
  1233. btwrite(reg, ZR36057_VDBR);
  1234. /* video stride, status, and frame grab register */
  1235. reg = 0;
  1236. if (zr->v4l_settings.height > BUZ_MAX_HEIGHT / 2)
  1237. reg += zr->v4l_settings.bytesperline;
  1238. reg = (reg << ZR36057_VSSFGR_DispStride);
  1239. reg |= ZR36057_VSSFGR_VidOvf;
  1240. reg |= ZR36057_VSSFGR_SnapShot;
  1241. reg |= ZR36057_VSSFGR_FrameGrab;
  1242. btwrite(reg, ZR36057_VSSFGR);
  1243. btor(ZR36057_VDCR_VidEn,
  1244. ZR36057_VDCR);
  1245. }
  1246. }
  1247. /* even if we don't grab, we do want to increment
  1248. * the sequence counter to see lost frames */
  1249. zr->v4l_grab_seq++;
  1250. }
  1251. #if (IRQ_MASK & ZR36057_ISR_CodRepIRQ)
  1252. if (astat & ZR36057_ISR_CodRepIRQ) {
  1253. zr->intr_counter_CodRepIRQ++;
  1254. IDEBUG(printk(KERN_DEBUG "%s: ZR36057_ISR_CodRepIRQ\n",
  1255. ZR_DEVNAME(zr)));
  1256. btand(~ZR36057_ICR_CodRepIRQ, ZR36057_ICR);
  1257. }
  1258. #endif /* (IRQ_MASK & ZR36057_ISR_CodRepIRQ) */
  1259. #if (IRQ_MASK & ZR36057_ISR_JPEGRepIRQ)
  1260. if ((astat & ZR36057_ISR_JPEGRepIRQ) &&
  1261. (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS ||
  1262. zr->codec_mode == BUZ_MODE_MOTION_COMPRESS)) {
  1263. if (zr36067_debug > 1 && (!zr->frame_num || zr->JPEG_error)) {
  1264. char sv[BUZ_NUM_STAT_COM + 1];
  1265. int i;
  1266. printk(KERN_INFO
  1267. "%s: first frame ready: state=0x%08x odd_even=%d field_per_buff=%d delay=%d\n",
  1268. ZR_DEVNAME(zr), stat,
  1269. zr->jpg_settings.odd_even,
  1270. zr->jpg_settings.field_per_buff,
  1271. zr->JPEG_missed);
  1272. for (i = 0; i < BUZ_NUM_STAT_COM; i++)
  1273. sv[i] = le32_to_cpu(zr->stat_com[i]) & 1 ? '1' : '0';
  1274. sv[BUZ_NUM_STAT_COM] = 0;
  1275. printk(KERN_INFO
  1276. "%s: stat_com=%s queue_state=%ld/%ld/%ld/%ld\n",
  1277. ZR_DEVNAME(zr), sv,
  1278. zr->jpg_que_tail,
  1279. zr->jpg_dma_tail,
  1280. zr->jpg_dma_head,
  1281. zr->jpg_que_head);
  1282. } else {
  1283. /* Get statistics */
  1284. if (zr->JPEG_missed > zr->JPEG_max_missed)
  1285. zr->JPEG_max_missed = zr->JPEG_missed;
  1286. if (zr->JPEG_missed < zr->JPEG_min_missed)
  1287. zr->JPEG_min_missed = zr->JPEG_missed;
  1288. }
  1289. if (zr36067_debug > 2 && zr->frame_num < 6) {
  1290. int i;
  1291. printk(KERN_INFO "%s: seq=%ld stat_com:",
  1292. ZR_DEVNAME(zr), zr->jpg_seq_num);
  1293. for (i = 0; i < 4; i++) {
  1294. printk(KERN_CONT " %08x",
  1295. le32_to_cpu(zr->stat_com[i]));
  1296. }
  1297. printk(KERN_CONT "\n");
  1298. }
  1299. zr->frame_num++;
  1300. zr->JPEG_missed = 0;
  1301. zr->JPEG_error = 0;
  1302. zoran_reap_stat_com(zr);
  1303. zoran_feed_stat_com(zr);
  1304. wake_up_interruptible(&zr->jpg_capq);
  1305. }
  1306. #endif /* (IRQ_MASK & ZR36057_ISR_JPEGRepIRQ) */
  1307. /* DATERR, too many fields missed, error processing */
  1308. if ((astat & zr->card.jpeg_int) ||
  1309. zr->JPEG_missed > 25 ||
  1310. zr->JPEG_error == 1 ||
  1311. ((zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS) &&
  1312. (zr->frame_num && (zr->JPEG_missed > zr->jpg_settings.field_per_buff)))) {
  1313. error_handler(zr, astat, stat);
  1314. }
  1315. count++;
  1316. if (count > 10) {
  1317. dprintk(2, KERN_WARNING "%s: irq loop %d\n",
  1318. ZR_DEVNAME(zr), count);
  1319. if (count > 20) {
  1320. btand(~ZR36057_ICR_IntPinEn, ZR36057_ICR);
  1321. dprintk(2,
  1322. KERN_ERR
  1323. "%s: IRQ lockup, cleared int mask\n",
  1324. ZR_DEVNAME(zr));
  1325. break;
  1326. }
  1327. }
  1328. zr->last_isr = stat;
  1329. }
  1330. spin_unlock_irqrestore(&zr->spinlock, flags);
  1331. return IRQ_HANDLED;
  1332. }
  1333. void
  1334. zoran_set_pci_master (struct zoran *zr,
  1335. int set_master)
  1336. {
  1337. if (set_master) {
  1338. pci_set_master(zr->pci_dev);
  1339. } else {
  1340. u16 command;
  1341. pci_read_config_word(zr->pci_dev, PCI_COMMAND, &command);
  1342. command &= ~PCI_COMMAND_MASTER;
  1343. pci_write_config_word(zr->pci_dev, PCI_COMMAND, command);
  1344. }
  1345. }
  1346. void
  1347. zoran_init_hardware (struct zoran *zr)
  1348. {
  1349. /* Enable bus-mastering */
  1350. zoran_set_pci_master(zr, 1);
  1351. /* Initialize the board */
  1352. if (zr->card.init) {
  1353. zr->card.init(zr);
  1354. }
  1355. decoder_call(zr, core, init, 0);
  1356. decoder_call(zr, video, s_std, zr->norm);
  1357. decoder_call(zr, video, s_routing,
  1358. zr->card.input[zr->input].muxsel, 0, 0);
  1359. encoder_call(zr, core, init, 0);
  1360. encoder_call(zr, video, s_std_output, zr->norm);
  1361. encoder_call(zr, video, s_routing, 0, 0, 0);
  1362. /* toggle JPEG codec sleep to sync PLL */
  1363. jpeg_codec_sleep(zr, 1);
  1364. jpeg_codec_sleep(zr, 0);
  1365. /*
  1366. * set individual interrupt enables (without GIRQ1)
  1367. * but don't global enable until zoran_open()
  1368. */
  1369. zr36057_init_vfe(zr);
  1370. zr36057_enable_jpg(zr, BUZ_MODE_IDLE);
  1371. btwrite(IRQ_MASK, ZR36057_ISR); // Clears interrupts
  1372. }
  1373. void
  1374. zr36057_restart (struct zoran *zr)
  1375. {
  1376. btwrite(0, ZR36057_SPGPPCR);
  1377. mdelay(1);
  1378. btor(ZR36057_SPGPPCR_SoftReset, ZR36057_SPGPPCR);
  1379. mdelay(1);
  1380. /* assert P_Reset */
  1381. btwrite(0, ZR36057_JPC);
  1382. /* set up GPIO direction - all output */
  1383. btwrite(ZR36057_SPGPPCR_SoftReset | 0, ZR36057_SPGPPCR);
  1384. /* set up GPIO pins and guest bus timing */
  1385. btwrite((0x81 << 24) | 0x8888, ZR36057_GPPGCR1);
  1386. }
  1387. /*
  1388. * initialize video front end
  1389. */
  1390. static void
  1391. zr36057_init_vfe (struct zoran *zr)
  1392. {
  1393. u32 reg;
  1394. reg = btread(ZR36057_VFESPFR);
  1395. reg |= ZR36057_VFESPFR_LittleEndian;
  1396. reg &= ~ZR36057_VFESPFR_VCLKPol;
  1397. reg |= ZR36057_VFESPFR_ExtFl;
  1398. reg |= ZR36057_VFESPFR_TopField;
  1399. btwrite(reg, ZR36057_VFESPFR);
  1400. reg = btread(ZR36057_VDCR);
  1401. if (pci_pci_problems & PCIPCI_TRITON)
  1402. // || zr->revision < 1) // Revision 1 has also Triton support
  1403. reg &= ~ZR36057_VDCR_Triton;
  1404. else
  1405. reg |= ZR36057_VDCR_Triton;
  1406. btwrite(reg, ZR36057_VDCR);
  1407. }