cx88-dvb.c 49 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "s5h1409.h"
  41. #include "xc4000.h"
  42. #include "xc5000.h"
  43. #include "nxt200x.h"
  44. #include "cx24123.h"
  45. #include "isl6421.h"
  46. #include "tuner-simple.h"
  47. #include "tda9887.h"
  48. #include "s5h1411.h"
  49. #include "stv0299.h"
  50. #include "z0194a.h"
  51. #include "stv0288.h"
  52. #include "stb6000.h"
  53. #include "cx24116.h"
  54. #include "stv0900.h"
  55. #include "stb6100.h"
  56. #include "stb6100_proc.h"
  57. #include "mb86a16.h"
  58. #include "ts2020.h"
  59. #include "ds3000.h"
  60. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  61. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  62. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  63. MODULE_LICENSE("GPL");
  64. MODULE_VERSION(CX88_VERSION);
  65. static unsigned int debug;
  66. module_param(debug, int, 0644);
  67. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  68. static unsigned int dvb_buf_tscnt = 32;
  69. module_param(dvb_buf_tscnt, int, 0644);
  70. MODULE_PARM_DESC(dvb_buf_tscnt, "DVB Buffer TS count [dvb]");
  71. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  72. #define dprintk(level,fmt, arg...) if (debug >= level) \
  73. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  74. /* ------------------------------------------------------------------ */
  75. static int queue_setup(struct vb2_queue *q, const struct v4l2_format *fmt,
  76. unsigned int *num_buffers, unsigned int *num_planes,
  77. unsigned int sizes[], void *alloc_ctxs[])
  78. {
  79. struct cx8802_dev *dev = q->drv_priv;
  80. *num_planes = 1;
  81. dev->ts_packet_size = 188 * 4;
  82. dev->ts_packet_count = dvb_buf_tscnt;
  83. sizes[0] = dev->ts_packet_size * dev->ts_packet_count;
  84. alloc_ctxs[0] = dev->alloc_ctx;
  85. *num_buffers = dvb_buf_tscnt;
  86. return 0;
  87. }
  88. static int buffer_prepare(struct vb2_buffer *vb)
  89. {
  90. struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
  91. struct cx88_buffer *buf = container_of(vb, struct cx88_buffer, vb);
  92. return cx8802_buf_prepare(vb->vb2_queue, dev, buf);
  93. }
  94. static void buffer_finish(struct vb2_buffer *vb)
  95. {
  96. struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
  97. struct cx88_buffer *buf = container_of(vb, struct cx88_buffer, vb);
  98. struct cx88_riscmem *risc = &buf->risc;
  99. if (risc->cpu)
  100. pci_free_consistent(dev->pci, risc->size, risc->cpu, risc->dma);
  101. memset(risc, 0, sizeof(*risc));
  102. }
  103. static void buffer_queue(struct vb2_buffer *vb)
  104. {
  105. struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
  106. struct cx88_buffer *buf = container_of(vb, struct cx88_buffer, vb);
  107. cx8802_buf_queue(dev, buf);
  108. }
  109. static int start_streaming(struct vb2_queue *q, unsigned int count)
  110. {
  111. struct cx8802_dev *dev = q->drv_priv;
  112. struct cx88_dmaqueue *dmaq = &dev->mpegq;
  113. struct cx88_buffer *buf;
  114. buf = list_entry(dmaq->active.next, struct cx88_buffer, list);
  115. cx8802_start_dma(dev, dmaq, buf);
  116. return 0;
  117. }
  118. static void stop_streaming(struct vb2_queue *q)
  119. {
  120. struct cx8802_dev *dev = q->drv_priv;
  121. struct cx88_dmaqueue *dmaq = &dev->mpegq;
  122. unsigned long flags;
  123. cx8802_cancel_buffers(dev);
  124. spin_lock_irqsave(&dev->slock, flags);
  125. while (!list_empty(&dmaq->active)) {
  126. struct cx88_buffer *buf = list_entry(dmaq->active.next,
  127. struct cx88_buffer, list);
  128. list_del(&buf->list);
  129. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  130. }
  131. spin_unlock_irqrestore(&dev->slock, flags);
  132. }
  133. static struct vb2_ops dvb_qops = {
  134. .queue_setup = queue_setup,
  135. .buf_prepare = buffer_prepare,
  136. .buf_finish = buffer_finish,
  137. .buf_queue = buffer_queue,
  138. .wait_prepare = vb2_ops_wait_prepare,
  139. .wait_finish = vb2_ops_wait_finish,
  140. .start_streaming = start_streaming,
  141. .stop_streaming = stop_streaming,
  142. };
  143. /* ------------------------------------------------------------------ */
  144. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  145. {
  146. struct cx8802_dev *dev= fe->dvb->priv;
  147. struct cx8802_driver *drv = NULL;
  148. int ret = 0;
  149. int fe_id;
  150. fe_id = vb2_dvb_find_frontend(&dev->frontends, fe);
  151. if (!fe_id) {
  152. printk(KERN_ERR "%s() No frontend found\n", __func__);
  153. return -EINVAL;
  154. }
  155. mutex_lock(&dev->core->lock);
  156. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  157. if (drv) {
  158. if (acquire){
  159. dev->frontends.active_fe_id = fe_id;
  160. ret = drv->request_acquire(drv);
  161. } else {
  162. ret = drv->request_release(drv);
  163. dev->frontends.active_fe_id = 0;
  164. }
  165. }
  166. mutex_unlock(&dev->core->lock);
  167. return ret;
  168. }
  169. static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open)
  170. {
  171. struct vb2_dvb_frontends *f;
  172. struct vb2_dvb_frontend *fe;
  173. if (!core->dvbdev)
  174. return;
  175. f = &core->dvbdev->frontends;
  176. if (!f)
  177. return;
  178. if (f->gate <= 1) /* undefined or fe0 */
  179. fe = vb2_dvb_get_frontend(f, 1);
  180. else
  181. fe = vb2_dvb_get_frontend(f, f->gate);
  182. if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
  183. fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
  184. }
  185. /* ------------------------------------------------------------------ */
  186. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  187. {
  188. static const u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  189. static const u8 reset [] = { RESET, 0x80 };
  190. static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  191. static const u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  192. static const u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  193. static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  194. mt352_write(fe, clock_config, sizeof(clock_config));
  195. udelay(200);
  196. mt352_write(fe, reset, sizeof(reset));
  197. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  198. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  199. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  200. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  201. return 0;
  202. }
  203. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  204. {
  205. static const u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  206. static const u8 reset [] = { RESET, 0x80 };
  207. static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  208. static const u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  209. static const u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  210. static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  211. mt352_write(fe, clock_config, sizeof(clock_config));
  212. udelay(200);
  213. mt352_write(fe, reset, sizeof(reset));
  214. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  215. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  216. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  217. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  218. return 0;
  219. }
  220. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  221. {
  222. static const u8 clock_config [] = { 0x89, 0x38, 0x39 };
  223. static const u8 reset [] = { 0x50, 0x80 };
  224. static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  225. static const u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  226. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  227. static const u8 dntv_extra[] = { 0xB5, 0x7A };
  228. static const u8 capt_range_cfg[] = { 0x75, 0x32 };
  229. mt352_write(fe, clock_config, sizeof(clock_config));
  230. udelay(2000);
  231. mt352_write(fe, reset, sizeof(reset));
  232. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  233. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  234. udelay(2000);
  235. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  236. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  237. return 0;
  238. }
  239. static const struct mt352_config dvico_fusionhdtv = {
  240. .demod_address = 0x0f,
  241. .demod_init = dvico_fusionhdtv_demod_init,
  242. };
  243. static const struct mt352_config dntv_live_dvbt_config = {
  244. .demod_address = 0x0f,
  245. .demod_init = dntv_live_dvbt_demod_init,
  246. };
  247. static const struct mt352_config dvico_fusionhdtv_dual = {
  248. .demod_address = 0x0f,
  249. .demod_init = dvico_dual_demod_init,
  250. };
  251. static const struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
  252. .demod_address = (0x1e >> 1),
  253. .no_tuner = 1,
  254. .if2 = 45600,
  255. };
  256. static struct mb86a16_config twinhan_vp1027 = {
  257. .demod_address = 0x08,
  258. };
  259. #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
  260. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  261. {
  262. static const u8 clock_config [] = { 0x89, 0x38, 0x38 };
  263. static const u8 reset [] = { 0x50, 0x80 };
  264. static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  265. static const u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  266. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  267. static const u8 dntv_extra[] = { 0xB5, 0x7A };
  268. static const u8 capt_range_cfg[] = { 0x75, 0x32 };
  269. mt352_write(fe, clock_config, sizeof(clock_config));
  270. udelay(2000);
  271. mt352_write(fe, reset, sizeof(reset));
  272. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  273. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  274. udelay(2000);
  275. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  276. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  277. return 0;
  278. }
  279. static const struct mt352_config dntv_live_dvbt_pro_config = {
  280. .demod_address = 0x0f,
  281. .no_tuner = 1,
  282. .demod_init = dntv_live_dvbt_pro_demod_init,
  283. };
  284. #endif
  285. static const struct zl10353_config dvico_fusionhdtv_hybrid = {
  286. .demod_address = 0x0f,
  287. .no_tuner = 1,
  288. };
  289. static const struct zl10353_config dvico_fusionhdtv_xc3028 = {
  290. .demod_address = 0x0f,
  291. .if2 = 45600,
  292. .no_tuner = 1,
  293. };
  294. static const struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
  295. .demod_address = 0x0f,
  296. .if2 = 4560,
  297. .no_tuner = 1,
  298. .demod_init = dvico_fusionhdtv_demod_init,
  299. };
  300. static const struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  301. .demod_address = 0x0f,
  302. };
  303. static const struct cx22702_config connexant_refboard_config = {
  304. .demod_address = 0x43,
  305. .output_mode = CX22702_SERIAL_OUTPUT,
  306. };
  307. static const struct cx22702_config hauppauge_hvr_config = {
  308. .demod_address = 0x63,
  309. .output_mode = CX22702_SERIAL_OUTPUT,
  310. };
  311. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  312. {
  313. struct cx8802_dev *dev= fe->dvb->priv;
  314. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  315. return 0;
  316. }
  317. static const struct or51132_config pchdtv_hd3000 = {
  318. .demod_address = 0x15,
  319. .set_ts_params = or51132_set_ts_param,
  320. };
  321. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  322. {
  323. struct cx8802_dev *dev= fe->dvb->priv;
  324. struct cx88_core *core = dev->core;
  325. dprintk(1, "%s: index = %d\n", __func__, index);
  326. if (index == 0)
  327. cx_clear(MO_GP0_IO, 8);
  328. else
  329. cx_set(MO_GP0_IO, 8);
  330. return 0;
  331. }
  332. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  333. {
  334. struct cx8802_dev *dev= fe->dvb->priv;
  335. if (is_punctured)
  336. dev->ts_gen_cntrl |= 0x04;
  337. else
  338. dev->ts_gen_cntrl &= ~0x04;
  339. return 0;
  340. }
  341. static struct lgdt330x_config fusionhdtv_3_gold = {
  342. .demod_address = 0x0e,
  343. .demod_chip = LGDT3302,
  344. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  345. .set_ts_params = lgdt330x_set_ts_param,
  346. };
  347. static const struct lgdt330x_config fusionhdtv_5_gold = {
  348. .demod_address = 0x0e,
  349. .demod_chip = LGDT3303,
  350. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  351. .set_ts_params = lgdt330x_set_ts_param,
  352. };
  353. static const struct lgdt330x_config pchdtv_hd5500 = {
  354. .demod_address = 0x59,
  355. .demod_chip = LGDT3303,
  356. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  357. .set_ts_params = lgdt330x_set_ts_param,
  358. };
  359. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  360. {
  361. struct cx8802_dev *dev= fe->dvb->priv;
  362. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  363. return 0;
  364. }
  365. static const struct nxt200x_config ati_hdtvwonder = {
  366. .demod_address = 0x0a,
  367. .set_ts_params = nxt200x_set_ts_param,
  368. };
  369. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  370. int is_punctured)
  371. {
  372. struct cx8802_dev *dev= fe->dvb->priv;
  373. dev->ts_gen_cntrl = 0x02;
  374. return 0;
  375. }
  376. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  377. enum fe_sec_voltage voltage)
  378. {
  379. struct cx8802_dev *dev= fe->dvb->priv;
  380. struct cx88_core *core = dev->core;
  381. if (voltage == SEC_VOLTAGE_OFF)
  382. cx_write(MO_GP0_IO, 0x000006fb);
  383. else
  384. cx_write(MO_GP0_IO, 0x000006f9);
  385. if (core->prev_set_voltage)
  386. return core->prev_set_voltage(fe, voltage);
  387. return 0;
  388. }
  389. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  390. enum fe_sec_voltage voltage)
  391. {
  392. struct cx8802_dev *dev= fe->dvb->priv;
  393. struct cx88_core *core = dev->core;
  394. if (voltage == SEC_VOLTAGE_OFF) {
  395. dprintk(1,"LNB Voltage OFF\n");
  396. cx_write(MO_GP0_IO, 0x0000efff);
  397. }
  398. if (core->prev_set_voltage)
  399. return core->prev_set_voltage(fe, voltage);
  400. return 0;
  401. }
  402. static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
  403. enum fe_sec_voltage voltage)
  404. {
  405. struct cx8802_dev *dev= fe->dvb->priv;
  406. struct cx88_core *core = dev->core;
  407. cx_set(MO_GP0_IO, 0x6040);
  408. switch (voltage) {
  409. case SEC_VOLTAGE_13:
  410. cx_clear(MO_GP0_IO, 0x20);
  411. break;
  412. case SEC_VOLTAGE_18:
  413. cx_set(MO_GP0_IO, 0x20);
  414. break;
  415. case SEC_VOLTAGE_OFF:
  416. cx_clear(MO_GP0_IO, 0x20);
  417. break;
  418. }
  419. if (core->prev_set_voltage)
  420. return core->prev_set_voltage(fe, voltage);
  421. return 0;
  422. }
  423. static int vp1027_set_voltage(struct dvb_frontend *fe,
  424. enum fe_sec_voltage voltage)
  425. {
  426. struct cx8802_dev *dev = fe->dvb->priv;
  427. struct cx88_core *core = dev->core;
  428. switch (voltage) {
  429. case SEC_VOLTAGE_13:
  430. dprintk(1, "LNB SEC Voltage=13\n");
  431. cx_write(MO_GP0_IO, 0x00001220);
  432. break;
  433. case SEC_VOLTAGE_18:
  434. dprintk(1, "LNB SEC Voltage=18\n");
  435. cx_write(MO_GP0_IO, 0x00001222);
  436. break;
  437. case SEC_VOLTAGE_OFF:
  438. dprintk(1, "LNB Voltage OFF\n");
  439. cx_write(MO_GP0_IO, 0x00001230);
  440. break;
  441. }
  442. if (core->prev_set_voltage)
  443. return core->prev_set_voltage(fe, voltage);
  444. return 0;
  445. }
  446. static const struct cx24123_config geniatech_dvbs_config = {
  447. .demod_address = 0x55,
  448. .set_ts_params = cx24123_set_ts_param,
  449. };
  450. static const struct cx24123_config hauppauge_novas_config = {
  451. .demod_address = 0x55,
  452. .set_ts_params = cx24123_set_ts_param,
  453. };
  454. static const struct cx24123_config kworld_dvbs_100_config = {
  455. .demod_address = 0x15,
  456. .set_ts_params = cx24123_set_ts_param,
  457. .lnb_polarity = 1,
  458. };
  459. static const struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  460. .demod_address = 0x32 >> 1,
  461. .output_mode = S5H1409_PARALLEL_OUTPUT,
  462. .gpio = S5H1409_GPIO_ON,
  463. .qam_if = 44000,
  464. .inversion = S5H1409_INVERSION_OFF,
  465. .status_mode = S5H1409_DEMODLOCKING,
  466. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  467. };
  468. static const struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  469. .demod_address = 0x32 >> 1,
  470. .output_mode = S5H1409_SERIAL_OUTPUT,
  471. .gpio = S5H1409_GPIO_OFF,
  472. .inversion = S5H1409_INVERSION_OFF,
  473. .status_mode = S5H1409_DEMODLOCKING,
  474. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  475. };
  476. static const struct s5h1409_config kworld_atsc_120_config = {
  477. .demod_address = 0x32 >> 1,
  478. .output_mode = S5H1409_SERIAL_OUTPUT,
  479. .gpio = S5H1409_GPIO_OFF,
  480. .inversion = S5H1409_INVERSION_OFF,
  481. .status_mode = S5H1409_DEMODLOCKING,
  482. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  483. };
  484. static const struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  485. .i2c_address = 0x64,
  486. .if_khz = 5380,
  487. };
  488. static const struct zl10353_config cx88_pinnacle_hybrid_pctv = {
  489. .demod_address = (0x1e >> 1),
  490. .no_tuner = 1,
  491. .if2 = 45600,
  492. };
  493. static const struct zl10353_config cx88_geniatech_x8000_mt = {
  494. .demod_address = (0x1e >> 1),
  495. .no_tuner = 1,
  496. .disable_i2c_gate_ctrl = 1,
  497. };
  498. static const struct s5h1411_config dvico_fusionhdtv7_config = {
  499. .output_mode = S5H1411_SERIAL_OUTPUT,
  500. .gpio = S5H1411_GPIO_ON,
  501. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  502. .qam_if = S5H1411_IF_44000,
  503. .vsb_if = S5H1411_IF_44000,
  504. .inversion = S5H1411_INVERSION_OFF,
  505. .status_mode = S5H1411_DEMODLOCKING
  506. };
  507. static const struct xc5000_config dvico_fusionhdtv7_tuner_config = {
  508. .i2c_address = 0xc2 >> 1,
  509. .if_khz = 5380,
  510. };
  511. static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
  512. {
  513. struct dvb_frontend *fe;
  514. struct vb2_dvb_frontend *fe0 = NULL;
  515. struct xc2028_ctrl ctl;
  516. struct xc2028_config cfg = {
  517. .i2c_adap = &dev->core->i2c_adap,
  518. .i2c_addr = addr,
  519. .ctrl = &ctl,
  520. };
  521. /* Get the first frontend */
  522. fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
  523. if (!fe0)
  524. return -EINVAL;
  525. if (!fe0->dvb.frontend) {
  526. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  527. "Can't attach xc3028\n",
  528. dev->core->name);
  529. return -EINVAL;
  530. }
  531. /*
  532. * Some xc3028 devices may be hidden by an I2C gate. This is known
  533. * to happen with some s5h1409-based devices.
  534. * Now that I2C gate is open, sets up xc3028 configuration
  535. */
  536. cx88_setup_xc3028(dev->core, &ctl);
  537. fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
  538. if (!fe) {
  539. printk(KERN_ERR "%s/2: xc3028 attach failed\n",
  540. dev->core->name);
  541. dvb_frontend_detach(fe0->dvb.frontend);
  542. dvb_unregister_frontend(fe0->dvb.frontend);
  543. fe0->dvb.frontend = NULL;
  544. return -EINVAL;
  545. }
  546. printk(KERN_INFO "%s/2: xc3028 attached\n",
  547. dev->core->name);
  548. return 0;
  549. }
  550. static int attach_xc4000(struct cx8802_dev *dev, struct xc4000_config *cfg)
  551. {
  552. struct dvb_frontend *fe;
  553. struct vb2_dvb_frontend *fe0 = NULL;
  554. /* Get the first frontend */
  555. fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
  556. if (!fe0)
  557. return -EINVAL;
  558. if (!fe0->dvb.frontend) {
  559. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  560. "Can't attach xc4000\n",
  561. dev->core->name);
  562. return -EINVAL;
  563. }
  564. fe = dvb_attach(xc4000_attach, fe0->dvb.frontend, &dev->core->i2c_adap,
  565. cfg);
  566. if (!fe) {
  567. printk(KERN_ERR "%s/2: xc4000 attach failed\n",
  568. dev->core->name);
  569. dvb_frontend_detach(fe0->dvb.frontend);
  570. dvb_unregister_frontend(fe0->dvb.frontend);
  571. fe0->dvb.frontend = NULL;
  572. return -EINVAL;
  573. }
  574. printk(KERN_INFO "%s/2: xc4000 attached\n", dev->core->name);
  575. return 0;
  576. }
  577. static int cx24116_set_ts_param(struct dvb_frontend *fe,
  578. int is_punctured)
  579. {
  580. struct cx8802_dev *dev = fe->dvb->priv;
  581. dev->ts_gen_cntrl = 0x2;
  582. return 0;
  583. }
  584. static int stv0900_set_ts_param(struct dvb_frontend *fe,
  585. int is_punctured)
  586. {
  587. struct cx8802_dev *dev = fe->dvb->priv;
  588. dev->ts_gen_cntrl = 0;
  589. return 0;
  590. }
  591. static int cx24116_reset_device(struct dvb_frontend *fe)
  592. {
  593. struct cx8802_dev *dev = fe->dvb->priv;
  594. struct cx88_core *core = dev->core;
  595. /* Reset the part */
  596. /* Put the cx24116 into reset */
  597. cx_write(MO_SRST_IO, 0);
  598. msleep(10);
  599. /* Take the cx24116 out of reset */
  600. cx_write(MO_SRST_IO, 1);
  601. msleep(10);
  602. return 0;
  603. }
  604. static const struct cx24116_config hauppauge_hvr4000_config = {
  605. .demod_address = 0x05,
  606. .set_ts_params = cx24116_set_ts_param,
  607. .reset_device = cx24116_reset_device,
  608. };
  609. static const struct cx24116_config tevii_s460_config = {
  610. .demod_address = 0x55,
  611. .set_ts_params = cx24116_set_ts_param,
  612. .reset_device = cx24116_reset_device,
  613. };
  614. static int ds3000_set_ts_param(struct dvb_frontend *fe,
  615. int is_punctured)
  616. {
  617. struct cx8802_dev *dev = fe->dvb->priv;
  618. dev->ts_gen_cntrl = 4;
  619. return 0;
  620. }
  621. static struct ds3000_config tevii_ds3000_config = {
  622. .demod_address = 0x68,
  623. .set_ts_params = ds3000_set_ts_param,
  624. };
  625. static struct ts2020_config tevii_ts2020_config = {
  626. .tuner_address = 0x60,
  627. .clk_out_div = 1,
  628. };
  629. static const struct stv0900_config prof_7301_stv0900_config = {
  630. .demod_address = 0x6a,
  631. /* demod_mode = 0,*/
  632. .xtal = 27000000,
  633. .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
  634. .diseqc_mode = 2,/* 2/3 PWM */
  635. .tun1_maddress = 0,/* 0x60 */
  636. .tun1_adc = 0,/* 2 Vpp */
  637. .path1_mode = 3,
  638. .set_ts_params = stv0900_set_ts_param,
  639. };
  640. static const struct stb6100_config prof_7301_stb6100_config = {
  641. .tuner_address = 0x60,
  642. .refclock = 27000000,
  643. };
  644. static const struct stv0299_config tevii_tuner_sharp_config = {
  645. .demod_address = 0x68,
  646. .inittab = sharp_z0194a_inittab,
  647. .mclk = 88000000UL,
  648. .invert = 1,
  649. .skip_reinit = 0,
  650. .lock_output = 1,
  651. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  652. .min_delay_ms = 100,
  653. .set_symbol_rate = sharp_z0194a_set_symbol_rate,
  654. .set_ts_params = cx24116_set_ts_param,
  655. };
  656. static const struct stv0288_config tevii_tuner_earda_config = {
  657. .demod_address = 0x68,
  658. .min_delay_ms = 100,
  659. .set_ts_params = cx24116_set_ts_param,
  660. };
  661. static int cx8802_alloc_frontends(struct cx8802_dev *dev)
  662. {
  663. struct cx88_core *core = dev->core;
  664. struct vb2_dvb_frontend *fe = NULL;
  665. int i;
  666. mutex_init(&dev->frontends.lock);
  667. INIT_LIST_HEAD(&dev->frontends.felist);
  668. if (!core->board.num_frontends)
  669. return -ENODEV;
  670. printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
  671. core->board.num_frontends);
  672. for (i = 1; i <= core->board.num_frontends; i++) {
  673. fe = vb2_dvb_alloc_frontend(&dev->frontends, i);
  674. if (!fe) {
  675. printk(KERN_ERR "%s() failed to alloc\n", __func__);
  676. vb2_dvb_dealloc_frontends(&dev->frontends);
  677. return -ENOMEM;
  678. }
  679. }
  680. return 0;
  681. }
  682. static const u8 samsung_smt_7020_inittab[] = {
  683. 0x01, 0x15,
  684. 0x02, 0x00,
  685. 0x03, 0x00,
  686. 0x04, 0x7D,
  687. 0x05, 0x0F,
  688. 0x06, 0x02,
  689. 0x07, 0x00,
  690. 0x08, 0x60,
  691. 0x0A, 0xC2,
  692. 0x0B, 0x00,
  693. 0x0C, 0x01,
  694. 0x0D, 0x81,
  695. 0x0E, 0x44,
  696. 0x0F, 0x09,
  697. 0x10, 0x3C,
  698. 0x11, 0x84,
  699. 0x12, 0xDA,
  700. 0x13, 0x99,
  701. 0x14, 0x8D,
  702. 0x15, 0xCE,
  703. 0x16, 0xE8,
  704. 0x17, 0x43,
  705. 0x18, 0x1C,
  706. 0x19, 0x1B,
  707. 0x1A, 0x1D,
  708. 0x1C, 0x12,
  709. 0x1D, 0x00,
  710. 0x1E, 0x00,
  711. 0x1F, 0x00,
  712. 0x20, 0x00,
  713. 0x21, 0x00,
  714. 0x22, 0x00,
  715. 0x23, 0x00,
  716. 0x28, 0x02,
  717. 0x29, 0x28,
  718. 0x2A, 0x14,
  719. 0x2B, 0x0F,
  720. 0x2C, 0x09,
  721. 0x2D, 0x05,
  722. 0x31, 0x1F,
  723. 0x32, 0x19,
  724. 0x33, 0xFC,
  725. 0x34, 0x13,
  726. 0xff, 0xff,
  727. };
  728. static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe)
  729. {
  730. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  731. struct cx8802_dev *dev = fe->dvb->priv;
  732. u8 buf[4];
  733. u32 div;
  734. struct i2c_msg msg = {
  735. .addr = 0x61,
  736. .flags = 0,
  737. .buf = buf,
  738. .len = sizeof(buf) };
  739. div = c->frequency / 125;
  740. buf[0] = (div >> 8) & 0x7f;
  741. buf[1] = div & 0xff;
  742. buf[2] = 0x84; /* 0xC4 */
  743. buf[3] = 0x00;
  744. if (c->frequency < 1500000)
  745. buf[3] |= 0x10;
  746. if (fe->ops.i2c_gate_ctrl)
  747. fe->ops.i2c_gate_ctrl(fe, 1);
  748. if (i2c_transfer(&dev->core->i2c_adap, &msg, 1) != 1)
  749. return -EIO;
  750. return 0;
  751. }
  752. static int samsung_smt_7020_set_tone(struct dvb_frontend *fe,
  753. enum fe_sec_tone_mode tone)
  754. {
  755. struct cx8802_dev *dev = fe->dvb->priv;
  756. struct cx88_core *core = dev->core;
  757. cx_set(MO_GP0_IO, 0x0800);
  758. switch (tone) {
  759. case SEC_TONE_ON:
  760. cx_set(MO_GP0_IO, 0x08);
  761. break;
  762. case SEC_TONE_OFF:
  763. cx_clear(MO_GP0_IO, 0x08);
  764. break;
  765. default:
  766. return -EINVAL;
  767. }
  768. return 0;
  769. }
  770. static int samsung_smt_7020_set_voltage(struct dvb_frontend *fe,
  771. enum fe_sec_voltage voltage)
  772. {
  773. struct cx8802_dev *dev = fe->dvb->priv;
  774. struct cx88_core *core = dev->core;
  775. u8 data;
  776. struct i2c_msg msg = {
  777. .addr = 8,
  778. .flags = 0,
  779. .buf = &data,
  780. .len = sizeof(data) };
  781. cx_set(MO_GP0_IO, 0x8000);
  782. switch (voltage) {
  783. case SEC_VOLTAGE_OFF:
  784. break;
  785. case SEC_VOLTAGE_13:
  786. data = ISL6421_EN1 | ISL6421_LLC1;
  787. cx_clear(MO_GP0_IO, 0x80);
  788. break;
  789. case SEC_VOLTAGE_18:
  790. data = ISL6421_EN1 | ISL6421_LLC1 | ISL6421_VSEL1;
  791. cx_clear(MO_GP0_IO, 0x80);
  792. break;
  793. default:
  794. return -EINVAL;
  795. }
  796. return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO;
  797. }
  798. static int samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend *fe,
  799. u32 srate, u32 ratio)
  800. {
  801. u8 aclk = 0;
  802. u8 bclk = 0;
  803. if (srate < 1500000) {
  804. aclk = 0xb7;
  805. bclk = 0x47;
  806. } else if (srate < 3000000) {
  807. aclk = 0xb7;
  808. bclk = 0x4b;
  809. } else if (srate < 7000000) {
  810. aclk = 0xb7;
  811. bclk = 0x4f;
  812. } else if (srate < 14000000) {
  813. aclk = 0xb7;
  814. bclk = 0x53;
  815. } else if (srate < 30000000) {
  816. aclk = 0xb6;
  817. bclk = 0x53;
  818. } else if (srate < 45000000) {
  819. aclk = 0xb4;
  820. bclk = 0x51;
  821. }
  822. stv0299_writereg(fe, 0x13, aclk);
  823. stv0299_writereg(fe, 0x14, bclk);
  824. stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
  825. stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
  826. stv0299_writereg(fe, 0x21, ratio & 0xf0);
  827. return 0;
  828. }
  829. static const struct stv0299_config samsung_stv0299_config = {
  830. .demod_address = 0x68,
  831. .inittab = samsung_smt_7020_inittab,
  832. .mclk = 88000000UL,
  833. .invert = 0,
  834. .skip_reinit = 0,
  835. .lock_output = STV0299_LOCKOUTPUT_LK,
  836. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  837. .min_delay_ms = 100,
  838. .set_symbol_rate = samsung_smt_7020_stv0299_set_symbol_rate,
  839. };
  840. static int dvb_register(struct cx8802_dev *dev)
  841. {
  842. struct cx88_core *core = dev->core;
  843. struct vb2_dvb_frontend *fe0, *fe1 = NULL;
  844. int mfe_shared = 0; /* bus not shared by default */
  845. int res = -EINVAL;
  846. if (0 != core->i2c_rc) {
  847. printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name);
  848. goto frontend_detach;
  849. }
  850. /* Get the first frontend */
  851. fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
  852. if (!fe0)
  853. goto frontend_detach;
  854. /* multi-frontend gate control is undefined or defaults to fe0 */
  855. dev->frontends.gate = 0;
  856. /* Sets the gate control callback to be used by i2c command calls */
  857. core->gate_ctrl = cx88_dvb_gate_ctrl;
  858. /* init frontend(s) */
  859. switch (core->boardnr) {
  860. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  861. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  862. &connexant_refboard_config,
  863. &core->i2c_adap);
  864. if (fe0->dvb.frontend != NULL) {
  865. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  866. 0x61, &core->i2c_adap,
  867. DVB_PLL_THOMSON_DTT759X))
  868. goto frontend_detach;
  869. }
  870. break;
  871. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  872. case CX88_BOARD_CONEXANT_DVB_T1:
  873. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  874. case CX88_BOARD_WINFAST_DTV1000:
  875. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  876. &connexant_refboard_config,
  877. &core->i2c_adap);
  878. if (fe0->dvb.frontend != NULL) {
  879. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  880. 0x60, &core->i2c_adap,
  881. DVB_PLL_THOMSON_DTT7579))
  882. goto frontend_detach;
  883. }
  884. break;
  885. case CX88_BOARD_WINFAST_DTV2000H:
  886. case CX88_BOARD_HAUPPAUGE_HVR1100:
  887. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  888. case CX88_BOARD_HAUPPAUGE_HVR1300:
  889. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  890. &hauppauge_hvr_config,
  891. &core->i2c_adap);
  892. if (fe0->dvb.frontend != NULL) {
  893. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  894. &core->i2c_adap, 0x61,
  895. TUNER_PHILIPS_FMD1216ME_MK3))
  896. goto frontend_detach;
  897. }
  898. break;
  899. case CX88_BOARD_WINFAST_DTV2000H_J:
  900. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  901. &hauppauge_hvr_config,
  902. &core->i2c_adap);
  903. if (fe0->dvb.frontend != NULL) {
  904. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  905. &core->i2c_adap, 0x61,
  906. TUNER_PHILIPS_FMD1216MEX_MK3))
  907. goto frontend_detach;
  908. }
  909. break;
  910. case CX88_BOARD_HAUPPAUGE_HVR3000:
  911. /* MFE frontend 1 */
  912. mfe_shared = 1;
  913. dev->frontends.gate = 2;
  914. /* DVB-S init */
  915. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  916. &hauppauge_novas_config,
  917. &dev->core->i2c_adap);
  918. if (fe0->dvb.frontend) {
  919. if (!dvb_attach(isl6421_attach,
  920. fe0->dvb.frontend,
  921. &dev->core->i2c_adap,
  922. 0x08, ISL6421_DCL, 0x00, false))
  923. goto frontend_detach;
  924. }
  925. /* MFE frontend 2 */
  926. fe1 = vb2_dvb_get_frontend(&dev->frontends, 2);
  927. if (!fe1)
  928. goto frontend_detach;
  929. /* DVB-T init */
  930. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  931. &hauppauge_hvr_config,
  932. &dev->core->i2c_adap);
  933. if (fe1->dvb.frontend) {
  934. fe1->dvb.frontend->id = 1;
  935. if (!dvb_attach(simple_tuner_attach,
  936. fe1->dvb.frontend,
  937. &dev->core->i2c_adap,
  938. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  939. goto frontend_detach;
  940. }
  941. break;
  942. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  943. fe0->dvb.frontend = dvb_attach(mt352_attach,
  944. &dvico_fusionhdtv,
  945. &core->i2c_adap);
  946. if (fe0->dvb.frontend != NULL) {
  947. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  948. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  949. goto frontend_detach;
  950. break;
  951. }
  952. /* ZL10353 replaces MT352 on later cards */
  953. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  954. &dvico_fusionhdtv_plus_v1_1,
  955. &core->i2c_adap);
  956. if (fe0->dvb.frontend != NULL) {
  957. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  958. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  959. goto frontend_detach;
  960. }
  961. break;
  962. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  963. /* The tin box says DEE1601, but it seems to be DTT7579
  964. * compatible, with a slightly different MT352 AGC gain. */
  965. fe0->dvb.frontend = dvb_attach(mt352_attach,
  966. &dvico_fusionhdtv_dual,
  967. &core->i2c_adap);
  968. if (fe0->dvb.frontend != NULL) {
  969. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  970. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  971. goto frontend_detach;
  972. break;
  973. }
  974. /* ZL10353 replaces MT352 on later cards */
  975. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  976. &dvico_fusionhdtv_plus_v1_1,
  977. &core->i2c_adap);
  978. if (fe0->dvb.frontend != NULL) {
  979. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  980. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  981. goto frontend_detach;
  982. }
  983. break;
  984. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  985. fe0->dvb.frontend = dvb_attach(mt352_attach,
  986. &dvico_fusionhdtv,
  987. &core->i2c_adap);
  988. if (fe0->dvb.frontend != NULL) {
  989. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  990. 0x61, NULL, DVB_PLL_LG_Z201))
  991. goto frontend_detach;
  992. }
  993. break;
  994. case CX88_BOARD_KWORLD_DVB_T:
  995. case CX88_BOARD_DNTV_LIVE_DVB_T:
  996. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  997. fe0->dvb.frontend = dvb_attach(mt352_attach,
  998. &dntv_live_dvbt_config,
  999. &core->i2c_adap);
  1000. if (fe0->dvb.frontend != NULL) {
  1001. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  1002. 0x61, NULL, DVB_PLL_UNKNOWN_1))
  1003. goto frontend_detach;
  1004. }
  1005. break;
  1006. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  1007. #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
  1008. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  1009. fe0->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  1010. &dev->vp3054->adap);
  1011. if (fe0->dvb.frontend != NULL) {
  1012. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1013. &core->i2c_adap, 0x61,
  1014. TUNER_PHILIPS_FMD1216ME_MK3))
  1015. goto frontend_detach;
  1016. }
  1017. #else
  1018. printk(KERN_ERR "%s/2: built without vp3054 support\n",
  1019. core->name);
  1020. #endif
  1021. break;
  1022. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  1023. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1024. &dvico_fusionhdtv_hybrid,
  1025. &core->i2c_adap);
  1026. if (fe0->dvb.frontend != NULL) {
  1027. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1028. &core->i2c_adap, 0x61,
  1029. TUNER_THOMSON_FE6600))
  1030. goto frontend_detach;
  1031. }
  1032. break;
  1033. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
  1034. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1035. &dvico_fusionhdtv_xc3028,
  1036. &core->i2c_adap);
  1037. if (fe0->dvb.frontend == NULL)
  1038. fe0->dvb.frontend = dvb_attach(mt352_attach,
  1039. &dvico_fusionhdtv_mt352_xc3028,
  1040. &core->i2c_adap);
  1041. /*
  1042. * On this board, the demod provides the I2C bus pullup.
  1043. * We must not permit gate_ctrl to be performed, or
  1044. * the xc3028 cannot communicate on the bus.
  1045. */
  1046. if (fe0->dvb.frontend)
  1047. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1048. if (attach_xc3028(0x61, dev) < 0)
  1049. goto frontend_detach;
  1050. break;
  1051. case CX88_BOARD_PCHDTV_HD3000:
  1052. fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  1053. &core->i2c_adap);
  1054. if (fe0->dvb.frontend != NULL) {
  1055. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1056. &core->i2c_adap, 0x61,
  1057. TUNER_THOMSON_DTT761X))
  1058. goto frontend_detach;
  1059. }
  1060. break;
  1061. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  1062. dev->ts_gen_cntrl = 0x08;
  1063. /* Do a hardware reset of chip before using it. */
  1064. cx_clear(MO_GP0_IO, 1);
  1065. mdelay(100);
  1066. cx_set(MO_GP0_IO, 1);
  1067. mdelay(200);
  1068. /* Select RF connector callback */
  1069. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  1070. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1071. &fusionhdtv_3_gold,
  1072. &core->i2c_adap);
  1073. if (fe0->dvb.frontend != NULL) {
  1074. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1075. &core->i2c_adap, 0x61,
  1076. TUNER_MICROTUNE_4042FI5))
  1077. goto frontend_detach;
  1078. }
  1079. break;
  1080. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  1081. dev->ts_gen_cntrl = 0x08;
  1082. /* Do a hardware reset of chip before using it. */
  1083. cx_clear(MO_GP0_IO, 1);
  1084. mdelay(100);
  1085. cx_set(MO_GP0_IO, 9);
  1086. mdelay(200);
  1087. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1088. &fusionhdtv_3_gold,
  1089. &core->i2c_adap);
  1090. if (fe0->dvb.frontend != NULL) {
  1091. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1092. &core->i2c_adap, 0x61,
  1093. TUNER_THOMSON_DTT761X))
  1094. goto frontend_detach;
  1095. }
  1096. break;
  1097. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  1098. dev->ts_gen_cntrl = 0x08;
  1099. /* Do a hardware reset of chip before using it. */
  1100. cx_clear(MO_GP0_IO, 1);
  1101. mdelay(100);
  1102. cx_set(MO_GP0_IO, 1);
  1103. mdelay(200);
  1104. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1105. &fusionhdtv_5_gold,
  1106. &core->i2c_adap);
  1107. if (fe0->dvb.frontend != NULL) {
  1108. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1109. &core->i2c_adap, 0x61,
  1110. TUNER_LG_TDVS_H06XF))
  1111. goto frontend_detach;
  1112. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  1113. &core->i2c_adap, 0x43))
  1114. goto frontend_detach;
  1115. }
  1116. break;
  1117. case CX88_BOARD_PCHDTV_HD5500:
  1118. dev->ts_gen_cntrl = 0x08;
  1119. /* Do a hardware reset of chip before using it. */
  1120. cx_clear(MO_GP0_IO, 1);
  1121. mdelay(100);
  1122. cx_set(MO_GP0_IO, 1);
  1123. mdelay(200);
  1124. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1125. &pchdtv_hd5500,
  1126. &core->i2c_adap);
  1127. if (fe0->dvb.frontend != NULL) {
  1128. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1129. &core->i2c_adap, 0x61,
  1130. TUNER_LG_TDVS_H06XF))
  1131. goto frontend_detach;
  1132. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  1133. &core->i2c_adap, 0x43))
  1134. goto frontend_detach;
  1135. }
  1136. break;
  1137. case CX88_BOARD_ATI_HDTVWONDER:
  1138. fe0->dvb.frontend = dvb_attach(nxt200x_attach,
  1139. &ati_hdtvwonder,
  1140. &core->i2c_adap);
  1141. if (fe0->dvb.frontend != NULL) {
  1142. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1143. &core->i2c_adap, 0x61,
  1144. TUNER_PHILIPS_TUV1236D))
  1145. goto frontend_detach;
  1146. }
  1147. break;
  1148. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  1149. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  1150. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1151. &hauppauge_novas_config,
  1152. &core->i2c_adap);
  1153. if (fe0->dvb.frontend) {
  1154. bool override_tone;
  1155. if (core->model == 92001)
  1156. override_tone = true;
  1157. else
  1158. override_tone = false;
  1159. if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
  1160. &core->i2c_adap, 0x08, ISL6421_DCL, 0x00,
  1161. override_tone))
  1162. goto frontend_detach;
  1163. }
  1164. break;
  1165. case CX88_BOARD_KWORLD_DVBS_100:
  1166. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1167. &kworld_dvbs_100_config,
  1168. &core->i2c_adap);
  1169. if (fe0->dvb.frontend) {
  1170. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1171. fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  1172. }
  1173. break;
  1174. case CX88_BOARD_GENIATECH_DVBS:
  1175. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1176. &geniatech_dvbs_config,
  1177. &core->i2c_adap);
  1178. if (fe0->dvb.frontend) {
  1179. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1180. fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  1181. }
  1182. break;
  1183. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  1184. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1185. &pinnacle_pctv_hd_800i_config,
  1186. &core->i2c_adap);
  1187. if (fe0->dvb.frontend != NULL) {
  1188. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  1189. &core->i2c_adap,
  1190. &pinnacle_pctv_hd_800i_tuner_config))
  1191. goto frontend_detach;
  1192. }
  1193. break;
  1194. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  1195. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1196. &dvico_hdtv5_pci_nano_config,
  1197. &core->i2c_adap);
  1198. if (fe0->dvb.frontend != NULL) {
  1199. struct dvb_frontend *fe;
  1200. struct xc2028_config cfg = {
  1201. .i2c_adap = &core->i2c_adap,
  1202. .i2c_addr = 0x61,
  1203. };
  1204. static struct xc2028_ctrl ctl = {
  1205. .fname = XC2028_DEFAULT_FIRMWARE,
  1206. .max_len = 64,
  1207. .scode_table = XC3028_FE_OREN538,
  1208. };
  1209. fe = dvb_attach(xc2028_attach,
  1210. fe0->dvb.frontend, &cfg);
  1211. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  1212. fe->ops.tuner_ops.set_config(fe, &ctl);
  1213. }
  1214. break;
  1215. case CX88_BOARD_PINNACLE_HYBRID_PCTV:
  1216. case CX88_BOARD_WINFAST_DTV1800H:
  1217. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1218. &cx88_pinnacle_hybrid_pctv,
  1219. &core->i2c_adap);
  1220. if (fe0->dvb.frontend) {
  1221. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1222. if (attach_xc3028(0x61, dev) < 0)
  1223. goto frontend_detach;
  1224. }
  1225. break;
  1226. case CX88_BOARD_WINFAST_DTV1800H_XC4000:
  1227. case CX88_BOARD_WINFAST_DTV2000H_PLUS:
  1228. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1229. &cx88_pinnacle_hybrid_pctv,
  1230. &core->i2c_adap);
  1231. if (fe0->dvb.frontend) {
  1232. struct xc4000_config cfg = {
  1233. .i2c_address = 0x61,
  1234. .default_pm = 0,
  1235. .dvb_amplitude = 134,
  1236. .set_smoothedcvbs = 1,
  1237. .if_khz = 4560
  1238. };
  1239. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1240. if (attach_xc4000(dev, &cfg) < 0)
  1241. goto frontend_detach;
  1242. }
  1243. break;
  1244. case CX88_BOARD_GENIATECH_X8000_MT:
  1245. dev->ts_gen_cntrl = 0x00;
  1246. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1247. &cx88_geniatech_x8000_mt,
  1248. &core->i2c_adap);
  1249. if (attach_xc3028(0x61, dev) < 0)
  1250. goto frontend_detach;
  1251. break;
  1252. case CX88_BOARD_KWORLD_ATSC_120:
  1253. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1254. &kworld_atsc_120_config,
  1255. &core->i2c_adap);
  1256. if (attach_xc3028(0x61, dev) < 0)
  1257. goto frontend_detach;
  1258. break;
  1259. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
  1260. fe0->dvb.frontend = dvb_attach(s5h1411_attach,
  1261. &dvico_fusionhdtv7_config,
  1262. &core->i2c_adap);
  1263. if (fe0->dvb.frontend != NULL) {
  1264. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  1265. &core->i2c_adap,
  1266. &dvico_fusionhdtv7_tuner_config))
  1267. goto frontend_detach;
  1268. }
  1269. break;
  1270. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1271. /* MFE frontend 1 */
  1272. mfe_shared = 1;
  1273. dev->frontends.gate = 2;
  1274. /* DVB-S/S2 Init */
  1275. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1276. &hauppauge_hvr4000_config,
  1277. &dev->core->i2c_adap);
  1278. if (fe0->dvb.frontend) {
  1279. if (!dvb_attach(isl6421_attach,
  1280. fe0->dvb.frontend,
  1281. &dev->core->i2c_adap,
  1282. 0x08, ISL6421_DCL, 0x00, false))
  1283. goto frontend_detach;
  1284. }
  1285. /* MFE frontend 2 */
  1286. fe1 = vb2_dvb_get_frontend(&dev->frontends, 2);
  1287. if (!fe1)
  1288. goto frontend_detach;
  1289. /* DVB-T Init */
  1290. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  1291. &hauppauge_hvr_config,
  1292. &dev->core->i2c_adap);
  1293. if (fe1->dvb.frontend) {
  1294. fe1->dvb.frontend->id = 1;
  1295. if (!dvb_attach(simple_tuner_attach,
  1296. fe1->dvb.frontend,
  1297. &dev->core->i2c_adap,
  1298. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  1299. goto frontend_detach;
  1300. }
  1301. break;
  1302. case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
  1303. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1304. &hauppauge_hvr4000_config,
  1305. &dev->core->i2c_adap);
  1306. if (fe0->dvb.frontend) {
  1307. if (!dvb_attach(isl6421_attach,
  1308. fe0->dvb.frontend,
  1309. &dev->core->i2c_adap,
  1310. 0x08, ISL6421_DCL, 0x00, false))
  1311. goto frontend_detach;
  1312. }
  1313. break;
  1314. case CX88_BOARD_PROF_6200:
  1315. case CX88_BOARD_TBS_8910:
  1316. case CX88_BOARD_TEVII_S420:
  1317. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  1318. &tevii_tuner_sharp_config,
  1319. &core->i2c_adap);
  1320. if (fe0->dvb.frontend != NULL) {
  1321. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
  1322. &core->i2c_adap, DVB_PLL_OPERA1))
  1323. goto frontend_detach;
  1324. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1325. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1326. } else {
  1327. fe0->dvb.frontend = dvb_attach(stv0288_attach,
  1328. &tevii_tuner_earda_config,
  1329. &core->i2c_adap);
  1330. if (fe0->dvb.frontend != NULL) {
  1331. if (!dvb_attach(stb6000_attach, fe0->dvb.frontend, 0x61,
  1332. &core->i2c_adap))
  1333. goto frontend_detach;
  1334. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1335. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1336. }
  1337. }
  1338. break;
  1339. case CX88_BOARD_TEVII_S460:
  1340. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1341. &tevii_s460_config,
  1342. &core->i2c_adap);
  1343. if (fe0->dvb.frontend != NULL)
  1344. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1345. break;
  1346. case CX88_BOARD_TEVII_S464:
  1347. fe0->dvb.frontend = dvb_attach(ds3000_attach,
  1348. &tevii_ds3000_config,
  1349. &core->i2c_adap);
  1350. if (fe0->dvb.frontend != NULL) {
  1351. dvb_attach(ts2020_attach, fe0->dvb.frontend,
  1352. &tevii_ts2020_config, &core->i2c_adap);
  1353. fe0->dvb.frontend->ops.set_voltage =
  1354. tevii_dvbs_set_voltage;
  1355. }
  1356. break;
  1357. case CX88_BOARD_OMICOM_SS4_PCI:
  1358. case CX88_BOARD_TBS_8920:
  1359. case CX88_BOARD_PROF_7300:
  1360. case CX88_BOARD_SATTRADE_ST4200:
  1361. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1362. &hauppauge_hvr4000_config,
  1363. &core->i2c_adap);
  1364. if (fe0->dvb.frontend != NULL)
  1365. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1366. break;
  1367. case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII:
  1368. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1369. &cx88_terratec_cinergy_ht_pci_mkii_config,
  1370. &core->i2c_adap);
  1371. if (fe0->dvb.frontend) {
  1372. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1373. if (attach_xc3028(0x61, dev) < 0)
  1374. goto frontend_detach;
  1375. }
  1376. break;
  1377. case CX88_BOARD_PROF_7301:{
  1378. struct dvb_tuner_ops *tuner_ops = NULL;
  1379. fe0->dvb.frontend = dvb_attach(stv0900_attach,
  1380. &prof_7301_stv0900_config,
  1381. &core->i2c_adap, 0);
  1382. if (fe0->dvb.frontend != NULL) {
  1383. if (!dvb_attach(stb6100_attach, fe0->dvb.frontend,
  1384. &prof_7301_stb6100_config,
  1385. &core->i2c_adap))
  1386. goto frontend_detach;
  1387. tuner_ops = &fe0->dvb.frontend->ops.tuner_ops;
  1388. tuner_ops->set_frequency = stb6100_set_freq;
  1389. tuner_ops->get_frequency = stb6100_get_freq;
  1390. tuner_ops->set_bandwidth = stb6100_set_bandw;
  1391. tuner_ops->get_bandwidth = stb6100_get_bandw;
  1392. core->prev_set_voltage =
  1393. fe0->dvb.frontend->ops.set_voltage;
  1394. fe0->dvb.frontend->ops.set_voltage =
  1395. tevii_dvbs_set_voltage;
  1396. }
  1397. break;
  1398. }
  1399. case CX88_BOARD_SAMSUNG_SMT_7020:
  1400. dev->ts_gen_cntrl = 0x08;
  1401. cx_set(MO_GP0_IO, 0x0101);
  1402. cx_clear(MO_GP0_IO, 0x01);
  1403. mdelay(100);
  1404. cx_set(MO_GP0_IO, 0x01);
  1405. mdelay(200);
  1406. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  1407. &samsung_stv0299_config,
  1408. &dev->core->i2c_adap);
  1409. if (fe0->dvb.frontend) {
  1410. fe0->dvb.frontend->ops.tuner_ops.set_params =
  1411. samsung_smt_7020_tuner_set_params;
  1412. fe0->dvb.frontend->tuner_priv =
  1413. &dev->core->i2c_adap;
  1414. fe0->dvb.frontend->ops.set_voltage =
  1415. samsung_smt_7020_set_voltage;
  1416. fe0->dvb.frontend->ops.set_tone =
  1417. samsung_smt_7020_set_tone;
  1418. }
  1419. break;
  1420. case CX88_BOARD_TWINHAN_VP1027_DVBS:
  1421. dev->ts_gen_cntrl = 0x00;
  1422. fe0->dvb.frontend = dvb_attach(mb86a16_attach,
  1423. &twinhan_vp1027,
  1424. &core->i2c_adap);
  1425. if (fe0->dvb.frontend) {
  1426. core->prev_set_voltage =
  1427. fe0->dvb.frontend->ops.set_voltage;
  1428. fe0->dvb.frontend->ops.set_voltage =
  1429. vp1027_set_voltage;
  1430. }
  1431. break;
  1432. default:
  1433. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  1434. core->name);
  1435. break;
  1436. }
  1437. if ( (NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend) ) {
  1438. printk(KERN_ERR
  1439. "%s/2: frontend initialization failed\n",
  1440. core->name);
  1441. goto frontend_detach;
  1442. }
  1443. /* define general-purpose callback pointer */
  1444. fe0->dvb.frontend->callback = cx88_tuner_callback;
  1445. /* Ensure all frontends negotiate bus access */
  1446. fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1447. if (fe1)
  1448. fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1449. /* Put the analog decoder in standby to keep it quiet */
  1450. call_all(core, core, s_power, 0);
  1451. /* register everything */
  1452. res = vb2_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
  1453. &dev->pci->dev, adapter_nr, mfe_shared);
  1454. if (res)
  1455. goto frontend_detach;
  1456. return res;
  1457. frontend_detach:
  1458. core->gate_ctrl = NULL;
  1459. vb2_dvb_dealloc_frontends(&dev->frontends);
  1460. return res;
  1461. }
  1462. /* ----------------------------------------------------------- */
  1463. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  1464. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  1465. {
  1466. struct cx88_core *core = drv->core;
  1467. int err = 0;
  1468. dprintk( 1, "%s\n", __func__);
  1469. switch (core->boardnr) {
  1470. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1471. /* We arrive here with either the cx23416 or the cx22702
  1472. * on the bus. Take the bus from the cx23416 and enable the
  1473. * cx22702 demod
  1474. */
  1475. /* Toggle reset on cx22702 leaving i2c active */
  1476. cx_set(MO_GP0_IO, 0x00000080);
  1477. udelay(1000);
  1478. cx_clear(MO_GP0_IO, 0x00000080);
  1479. udelay(50);
  1480. cx_set(MO_GP0_IO, 0x00000080);
  1481. udelay(1000);
  1482. /* enable the cx22702 pins */
  1483. cx_clear(MO_GP0_IO, 0x00000004);
  1484. udelay(1000);
  1485. break;
  1486. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1487. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1488. /* Toggle reset on cx22702 leaving i2c active */
  1489. cx_set(MO_GP0_IO, 0x00000080);
  1490. udelay(1000);
  1491. cx_clear(MO_GP0_IO, 0x00000080);
  1492. udelay(50);
  1493. cx_set(MO_GP0_IO, 0x00000080);
  1494. udelay(1000);
  1495. switch (core->dvbdev->frontends.active_fe_id) {
  1496. case 1: /* DVB-S/S2 Enabled */
  1497. /* tri-state the cx22702 pins */
  1498. cx_set(MO_GP0_IO, 0x00000004);
  1499. /* Take the cx24116/cx24123 out of reset */
  1500. cx_write(MO_SRST_IO, 1);
  1501. core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
  1502. break;
  1503. case 2: /* DVB-T Enabled */
  1504. /* Put the cx24116/cx24123 into reset */
  1505. cx_write(MO_SRST_IO, 0);
  1506. /* enable the cx22702 pins */
  1507. cx_clear(MO_GP0_IO, 0x00000004);
  1508. core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
  1509. break;
  1510. }
  1511. udelay(1000);
  1512. break;
  1513. case CX88_BOARD_WINFAST_DTV2000H_PLUS:
  1514. /* set RF input to AIR for DVB-T (GPIO 16) */
  1515. cx_write(MO_GP2_IO, 0x0101);
  1516. break;
  1517. default:
  1518. err = -ENODEV;
  1519. }
  1520. return err;
  1521. }
  1522. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  1523. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  1524. {
  1525. struct cx88_core *core = drv->core;
  1526. int err = 0;
  1527. dprintk( 1, "%s\n", __func__);
  1528. switch (core->boardnr) {
  1529. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1530. /* Do Nothing, leave the cx22702 on the bus. */
  1531. break;
  1532. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1533. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1534. break;
  1535. default:
  1536. err = -ENODEV;
  1537. }
  1538. return err;
  1539. }
  1540. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  1541. {
  1542. struct cx88_core *core = drv->core;
  1543. struct cx8802_dev *dev = drv->core->dvbdev;
  1544. int err;
  1545. struct vb2_dvb_frontend *fe;
  1546. int i;
  1547. dprintk( 1, "%s\n", __func__);
  1548. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  1549. core->boardnr,
  1550. core->name,
  1551. core->pci_bus,
  1552. core->pci_slot);
  1553. err = -ENODEV;
  1554. if (!(core->board.mpeg & CX88_MPEG_DVB))
  1555. goto fail_core;
  1556. /* If vp3054 isn't enabled, a stub will just return 0 */
  1557. err = vp3054_i2c_probe(dev);
  1558. if (0 != err)
  1559. goto fail_core;
  1560. /* dvb stuff */
  1561. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  1562. dev->ts_gen_cntrl = 0x0c;
  1563. err = cx8802_alloc_frontends(dev);
  1564. if (err)
  1565. goto fail_core;
  1566. err = -ENODEV;
  1567. for (i = 1; i <= core->board.num_frontends; i++) {
  1568. struct vb2_queue *q;
  1569. fe = vb2_dvb_get_frontend(&core->dvbdev->frontends, i);
  1570. if (fe == NULL) {
  1571. printk(KERN_ERR "%s() failed to get frontend(%d)\n",
  1572. __func__, i);
  1573. goto fail_probe;
  1574. }
  1575. q = &fe->dvb.dvbq;
  1576. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  1577. q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
  1578. q->gfp_flags = GFP_DMA32;
  1579. q->min_buffers_needed = 2;
  1580. q->drv_priv = dev;
  1581. q->buf_struct_size = sizeof(struct cx88_buffer);
  1582. q->ops = &dvb_qops;
  1583. q->mem_ops = &vb2_dma_sg_memops;
  1584. q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1585. q->lock = &core->lock;
  1586. err = vb2_queue_init(q);
  1587. if (err < 0)
  1588. goto fail_probe;
  1589. /* init struct vb2_dvb */
  1590. fe->dvb.name = dev->core->name;
  1591. }
  1592. err = dvb_register(dev);
  1593. if (err)
  1594. /* frontends/adapter de-allocated in dvb_register */
  1595. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  1596. core->name, err);
  1597. return err;
  1598. fail_probe:
  1599. vb2_dvb_dealloc_frontends(&core->dvbdev->frontends);
  1600. fail_core:
  1601. return err;
  1602. }
  1603. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  1604. {
  1605. struct cx88_core *core = drv->core;
  1606. struct cx8802_dev *dev = drv->core->dvbdev;
  1607. dprintk( 1, "%s\n", __func__);
  1608. vb2_dvb_unregister_bus(&dev->frontends);
  1609. vp3054_i2c_remove(dev);
  1610. core->gate_ctrl = NULL;
  1611. return 0;
  1612. }
  1613. static struct cx8802_driver cx8802_dvb_driver = {
  1614. .type_id = CX88_MPEG_DVB,
  1615. .hw_access = CX8802_DRVCTL_SHARED,
  1616. .probe = cx8802_dvb_probe,
  1617. .remove = cx8802_dvb_remove,
  1618. .advise_acquire = cx8802_dvb_advise_acquire,
  1619. .advise_release = cx8802_dvb_advise_release,
  1620. };
  1621. static int __init dvb_init(void)
  1622. {
  1623. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %s loaded\n",
  1624. CX88_VERSION);
  1625. return cx8802_register_driver(&cx8802_dvb_driver);
  1626. }
  1627. static void __exit dvb_fini(void)
  1628. {
  1629. cx8802_unregister_driver(&cx8802_dvb_driver);
  1630. }
  1631. module_init(dvb_init);
  1632. module_exit(dvb_fini);