pci-dma.c 5.7 KB

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  1. /*
  2. * DMA coherent memory allocation.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the
  6. * Free Software Foundation; either version 2 of the License, or (at your
  7. * option) any later version.
  8. *
  9. * Copyright (C) 2002 - 2005 Tensilica Inc.
  10. * Copyright (C) 2015 Cadence Design Systems Inc.
  11. *
  12. * Based on version for i386.
  13. *
  14. * Chris Zankel <chris@zankel.net>
  15. * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
  16. */
  17. #include <linux/types.h>
  18. #include <linux/mm.h>
  19. #include <linux/string.h>
  20. #include <linux/pci.h>
  21. #include <linux/gfp.h>
  22. #include <linux/module.h>
  23. #include <asm/io.h>
  24. #include <asm/cacheflush.h>
  25. void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
  26. enum dma_data_direction dir)
  27. {
  28. switch (dir) {
  29. case DMA_BIDIRECTIONAL:
  30. __flush_invalidate_dcache_range((unsigned long)vaddr, size);
  31. break;
  32. case DMA_FROM_DEVICE:
  33. __invalidate_dcache_range((unsigned long)vaddr, size);
  34. break;
  35. case DMA_TO_DEVICE:
  36. __flush_dcache_range((unsigned long)vaddr, size);
  37. break;
  38. case DMA_NONE:
  39. BUG();
  40. break;
  41. }
  42. }
  43. EXPORT_SYMBOL(dma_cache_sync);
  44. static void xtensa_sync_single_for_cpu(struct device *dev,
  45. dma_addr_t dma_handle, size_t size,
  46. enum dma_data_direction dir)
  47. {
  48. void *vaddr;
  49. switch (dir) {
  50. case DMA_BIDIRECTIONAL:
  51. case DMA_FROM_DEVICE:
  52. vaddr = bus_to_virt(dma_handle);
  53. __invalidate_dcache_range((unsigned long)vaddr, size);
  54. break;
  55. case DMA_NONE:
  56. BUG();
  57. break;
  58. default:
  59. break;
  60. }
  61. }
  62. static void xtensa_sync_single_for_device(struct device *dev,
  63. dma_addr_t dma_handle, size_t size,
  64. enum dma_data_direction dir)
  65. {
  66. void *vaddr;
  67. switch (dir) {
  68. case DMA_BIDIRECTIONAL:
  69. case DMA_TO_DEVICE:
  70. vaddr = bus_to_virt(dma_handle);
  71. __flush_dcache_range((unsigned long)vaddr, size);
  72. break;
  73. case DMA_NONE:
  74. BUG();
  75. break;
  76. default:
  77. break;
  78. }
  79. }
  80. static void xtensa_sync_sg_for_cpu(struct device *dev,
  81. struct scatterlist *sg, int nents,
  82. enum dma_data_direction dir)
  83. {
  84. struct scatterlist *s;
  85. int i;
  86. for_each_sg(sg, s, nents, i) {
  87. xtensa_sync_single_for_cpu(dev, sg_dma_address(s),
  88. sg_dma_len(s), dir);
  89. }
  90. }
  91. static void xtensa_sync_sg_for_device(struct device *dev,
  92. struct scatterlist *sg, int nents,
  93. enum dma_data_direction dir)
  94. {
  95. struct scatterlist *s;
  96. int i;
  97. for_each_sg(sg, s, nents, i) {
  98. xtensa_sync_single_for_device(dev, sg_dma_address(s),
  99. sg_dma_len(s), dir);
  100. }
  101. }
  102. /*
  103. * Note: We assume that the full memory space is always mapped to 'kseg'
  104. * Otherwise we have to use page attributes (not implemented).
  105. */
  106. static void *xtensa_dma_alloc(struct device *dev, size_t size,
  107. dma_addr_t *handle, gfp_t flag,
  108. struct dma_attrs *attrs)
  109. {
  110. unsigned long ret;
  111. unsigned long uncached = 0;
  112. /* ignore region speicifiers */
  113. flag &= ~(__GFP_DMA | __GFP_HIGHMEM);
  114. if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff))
  115. flag |= GFP_DMA;
  116. ret = (unsigned long)__get_free_pages(flag, get_order(size));
  117. if (ret == 0)
  118. return NULL;
  119. /* We currently don't support coherent memory outside KSEG */
  120. BUG_ON(ret < XCHAL_KSEG_CACHED_VADDR ||
  121. ret > XCHAL_KSEG_CACHED_VADDR + XCHAL_KSEG_SIZE - 1);
  122. uncached = ret + XCHAL_KSEG_BYPASS_VADDR - XCHAL_KSEG_CACHED_VADDR;
  123. *handle = virt_to_bus((void *)ret);
  124. __invalidate_dcache_range(ret, size);
  125. return (void *)uncached;
  126. }
  127. static void xtensa_dma_free(struct device *hwdev, size_t size, void *vaddr,
  128. dma_addr_t dma_handle, struct dma_attrs *attrs)
  129. {
  130. unsigned long addr = (unsigned long)vaddr +
  131. XCHAL_KSEG_CACHED_VADDR - XCHAL_KSEG_BYPASS_VADDR;
  132. BUG_ON(addr < XCHAL_KSEG_CACHED_VADDR ||
  133. addr > XCHAL_KSEG_CACHED_VADDR + XCHAL_KSEG_SIZE - 1);
  134. free_pages(addr, get_order(size));
  135. }
  136. static dma_addr_t xtensa_map_page(struct device *dev, struct page *page,
  137. unsigned long offset, size_t size,
  138. enum dma_data_direction dir,
  139. struct dma_attrs *attrs)
  140. {
  141. dma_addr_t dma_handle = page_to_phys(page) + offset;
  142. BUG_ON(PageHighMem(page));
  143. xtensa_sync_single_for_device(dev, dma_handle, size, dir);
  144. return dma_handle;
  145. }
  146. static void xtensa_unmap_page(struct device *dev, dma_addr_t dma_handle,
  147. size_t size, enum dma_data_direction dir,
  148. struct dma_attrs *attrs)
  149. {
  150. xtensa_sync_single_for_cpu(dev, dma_handle, size, dir);
  151. }
  152. static int xtensa_map_sg(struct device *dev, struct scatterlist *sg,
  153. int nents, enum dma_data_direction dir,
  154. struct dma_attrs *attrs)
  155. {
  156. struct scatterlist *s;
  157. int i;
  158. for_each_sg(sg, s, nents, i) {
  159. s->dma_address = xtensa_map_page(dev, sg_page(s), s->offset,
  160. s->length, dir, attrs);
  161. }
  162. return nents;
  163. }
  164. static void xtensa_unmap_sg(struct device *dev,
  165. struct scatterlist *sg, int nents,
  166. enum dma_data_direction dir,
  167. struct dma_attrs *attrs)
  168. {
  169. struct scatterlist *s;
  170. int i;
  171. for_each_sg(sg, s, nents, i) {
  172. xtensa_unmap_page(dev, sg_dma_address(s),
  173. sg_dma_len(s), dir, attrs);
  174. }
  175. }
  176. int xtensa_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
  177. {
  178. return 0;
  179. }
  180. struct dma_map_ops xtensa_dma_map_ops = {
  181. .alloc = xtensa_dma_alloc,
  182. .free = xtensa_dma_free,
  183. .map_page = xtensa_map_page,
  184. .unmap_page = xtensa_unmap_page,
  185. .map_sg = xtensa_map_sg,
  186. .unmap_sg = xtensa_unmap_sg,
  187. .sync_single_for_cpu = xtensa_sync_single_for_cpu,
  188. .sync_single_for_device = xtensa_sync_single_for_device,
  189. .sync_sg_for_cpu = xtensa_sync_sg_for_cpu,
  190. .sync_sg_for_device = xtensa_sync_sg_for_device,
  191. .mapping_error = xtensa_dma_mapping_error,
  192. };
  193. EXPORT_SYMBOL(xtensa_dma_map_ops);
  194. #define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)
  195. static int __init xtensa_dma_init(void)
  196. {
  197. dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
  198. return 0;
  199. }
  200. fs_initcall(xtensa_dma_init);