ioapic.h 3.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126
  1. #ifndef __KVM_IO_APIC_H
  2. #define __KVM_IO_APIC_H
  3. #include <linux/kvm_host.h>
  4. #include <kvm/iodev.h>
  5. struct kvm;
  6. struct kvm_vcpu;
  7. #define IOAPIC_NUM_PINS KVM_IOAPIC_NUM_PINS
  8. #define IOAPIC_VERSION_ID 0x11 /* IOAPIC version */
  9. #define IOAPIC_EDGE_TRIG 0
  10. #define IOAPIC_LEVEL_TRIG 1
  11. #define IOAPIC_DEFAULT_BASE_ADDRESS 0xfec00000
  12. #define IOAPIC_MEM_LENGTH 0x100
  13. /* Direct registers. */
  14. #define IOAPIC_REG_SELECT 0x00
  15. #define IOAPIC_REG_WINDOW 0x10
  16. /* Indirect registers. */
  17. #define IOAPIC_REG_APIC_ID 0x00 /* x86 IOAPIC only */
  18. #define IOAPIC_REG_VERSION 0x01
  19. #define IOAPIC_REG_ARB_ID 0x02 /* x86 IOAPIC only */
  20. /*ioapic delivery mode*/
  21. #define IOAPIC_FIXED 0x0
  22. #define IOAPIC_LOWEST_PRIORITY 0x1
  23. #define IOAPIC_PMI 0x2
  24. #define IOAPIC_NMI 0x4
  25. #define IOAPIC_INIT 0x5
  26. #define IOAPIC_EXTINT 0x7
  27. #ifdef CONFIG_X86
  28. #define RTC_GSI 8
  29. #else
  30. #define RTC_GSI -1U
  31. #endif
  32. struct rtc_status {
  33. int pending_eoi;
  34. DECLARE_BITMAP(dest_map, KVM_MAX_VCPUS);
  35. };
  36. union kvm_ioapic_redirect_entry {
  37. u64 bits;
  38. struct {
  39. u8 vector;
  40. u8 delivery_mode:3;
  41. u8 dest_mode:1;
  42. u8 delivery_status:1;
  43. u8 polarity:1;
  44. u8 remote_irr:1;
  45. u8 trig_mode:1;
  46. u8 mask:1;
  47. u8 reserve:7;
  48. u8 reserved[4];
  49. u8 dest_id;
  50. } fields;
  51. };
  52. struct kvm_ioapic {
  53. u64 base_address;
  54. u32 ioregsel;
  55. u32 id;
  56. u32 irr;
  57. u32 pad;
  58. union kvm_ioapic_redirect_entry redirtbl[IOAPIC_NUM_PINS];
  59. unsigned long irq_states[IOAPIC_NUM_PINS];
  60. struct kvm_io_device dev;
  61. struct kvm *kvm;
  62. void (*ack_notifier)(void *opaque, int irq);
  63. spinlock_t lock;
  64. DECLARE_BITMAP(handled_vectors, 256);
  65. struct rtc_status rtc_status;
  66. struct delayed_work eoi_inject;
  67. u32 irq_eoi[IOAPIC_NUM_PINS];
  68. u32 irr_delivered;
  69. };
  70. #ifdef DEBUG
  71. #define ASSERT(x) \
  72. do { \
  73. if (!(x)) { \
  74. printk(KERN_EMERG "assertion failed %s: %d: %s\n", \
  75. __FILE__, __LINE__, #x); \
  76. BUG(); \
  77. } \
  78. } while (0)
  79. #else
  80. #define ASSERT(x) do { } while (0)
  81. #endif
  82. static inline struct kvm_ioapic *ioapic_irqchip(struct kvm *kvm)
  83. {
  84. return kvm->arch.vioapic;
  85. }
  86. static inline bool kvm_ioapic_handles_vector(struct kvm *kvm, int vector)
  87. {
  88. struct kvm_ioapic *ioapic = kvm->arch.vioapic;
  89. smp_rmb();
  90. return test_bit(vector, ioapic->handled_vectors);
  91. }
  92. void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu);
  93. bool kvm_apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source,
  94. int short_hand, unsigned int dest, int dest_mode);
  95. int kvm_apic_compare_prio(struct kvm_vcpu *vcpu1, struct kvm_vcpu *vcpu2);
  96. void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector,
  97. int trigger_mode);
  98. int kvm_ioapic_init(struct kvm *kvm);
  99. void kvm_ioapic_destroy(struct kvm *kvm);
  100. int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
  101. int level, bool line_status);
  102. void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id);
  103. int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
  104. struct kvm_lapic_irq *irq, unsigned long *dest_map);
  105. int kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state);
  106. int kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state);
  107. void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap,
  108. u32 *tmr);
  109. #endif