xmon.c 69 KB

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  1. /*
  2. * Routines providing a simple monitor for use on the PowerMac.
  3. *
  4. * Copyright (C) 1996-2005 Paul Mackerras.
  5. * Copyright (C) 2001 PPC64 Team, IBM Corp
  6. * Copyrignt (C) 2006 Michael Ellerman, IBM Corp
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * as published by the Free Software Foundation; either version
  11. * 2 of the License, or (at your option) any later version.
  12. */
  13. #include <linux/errno.h>
  14. #include <linux/sched.h>
  15. #include <linux/smp.h>
  16. #include <linux/mm.h>
  17. #include <linux/reboot.h>
  18. #include <linux/delay.h>
  19. #include <linux/kallsyms.h>
  20. #include <linux/kmsg_dump.h>
  21. #include <linux/cpumask.h>
  22. #include <linux/export.h>
  23. #include <linux/sysrq.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/bug.h>
  27. #include <linux/nmi.h>
  28. #include <linux/ctype.h>
  29. #include <asm/ptrace.h>
  30. #include <asm/string.h>
  31. #include <asm/prom.h>
  32. #include <asm/machdep.h>
  33. #include <asm/xmon.h>
  34. #include <asm/processor.h>
  35. #include <asm/pgtable.h>
  36. #include <asm/mmu.h>
  37. #include <asm/mmu_context.h>
  38. #include <asm/cputable.h>
  39. #include <asm/rtas.h>
  40. #include <asm/sstep.h>
  41. #include <asm/irq_regs.h>
  42. #include <asm/spu.h>
  43. #include <asm/spu_priv1.h>
  44. #include <asm/setjmp.h>
  45. #include <asm/reg.h>
  46. #include <asm/debug.h>
  47. #include <asm/hw_breakpoint.h>
  48. #ifdef CONFIG_PPC64
  49. #include <asm/hvcall.h>
  50. #include <asm/paca.h>
  51. #endif
  52. #if defined(CONFIG_PPC_SPLPAR)
  53. #include <asm/plpar_wrappers.h>
  54. #else
  55. static inline long plapr_set_ciabr(unsigned long ciabr) {return 0; };
  56. #endif
  57. #include "nonstdio.h"
  58. #include "dis-asm.h"
  59. #ifdef CONFIG_SMP
  60. static cpumask_t cpus_in_xmon = CPU_MASK_NONE;
  61. static unsigned long xmon_taken = 1;
  62. static int xmon_owner;
  63. static int xmon_gate;
  64. #else
  65. #define xmon_owner 0
  66. #endif /* CONFIG_SMP */
  67. static unsigned long in_xmon __read_mostly = 0;
  68. static unsigned long adrs;
  69. static int size = 1;
  70. #define MAX_DUMP (128 * 1024)
  71. static unsigned long ndump = 64;
  72. static unsigned long nidump = 16;
  73. static unsigned long ncsum = 4096;
  74. static int termch;
  75. static char tmpstr[128];
  76. static long bus_error_jmp[JMP_BUF_LEN];
  77. static int catch_memory_errors;
  78. static long *xmon_fault_jmp[NR_CPUS];
  79. /* Breakpoint stuff */
  80. struct bpt {
  81. unsigned long address;
  82. unsigned int instr[2];
  83. atomic_t ref_count;
  84. int enabled;
  85. unsigned long pad;
  86. };
  87. /* Bits in bpt.enabled */
  88. #define BP_CIABR 1
  89. #define BP_TRAP 2
  90. #define BP_DABR 4
  91. #define NBPTS 256
  92. static struct bpt bpts[NBPTS];
  93. static struct bpt dabr;
  94. static struct bpt *iabr;
  95. static unsigned bpinstr = 0x7fe00008; /* trap */
  96. #define BP_NUM(bp) ((bp) - bpts + 1)
  97. /* Prototypes */
  98. static int cmds(struct pt_regs *);
  99. static int mread(unsigned long, void *, int);
  100. static int mwrite(unsigned long, void *, int);
  101. static int handle_fault(struct pt_regs *);
  102. static void byterev(unsigned char *, int);
  103. static void memex(void);
  104. static int bsesc(void);
  105. static void dump(void);
  106. static void prdump(unsigned long, long);
  107. static int ppc_inst_dump(unsigned long, long, int);
  108. static void dump_log_buf(void);
  109. static void backtrace(struct pt_regs *);
  110. static void excprint(struct pt_regs *);
  111. static void prregs(struct pt_regs *);
  112. static void memops(int);
  113. static void memlocate(void);
  114. static void memzcan(void);
  115. static void memdiffs(unsigned char *, unsigned char *, unsigned, unsigned);
  116. int skipbl(void);
  117. int scanhex(unsigned long *valp);
  118. static void scannl(void);
  119. static int hexdigit(int);
  120. void getstring(char *, int);
  121. static void flush_input(void);
  122. static int inchar(void);
  123. static void take_input(char *);
  124. static unsigned long read_spr(int);
  125. static void write_spr(int, unsigned long);
  126. static void super_regs(void);
  127. static void remove_bpts(void);
  128. static void insert_bpts(void);
  129. static void remove_cpu_bpts(void);
  130. static void insert_cpu_bpts(void);
  131. static struct bpt *at_breakpoint(unsigned long pc);
  132. static struct bpt *in_breakpoint_table(unsigned long pc, unsigned long *offp);
  133. static int do_step(struct pt_regs *);
  134. static void bpt_cmds(void);
  135. static void cacheflush(void);
  136. static int cpu_cmd(void);
  137. static void csum(void);
  138. static void bootcmds(void);
  139. static void proccall(void);
  140. void dump_segments(void);
  141. static void symbol_lookup(void);
  142. static void xmon_show_stack(unsigned long sp, unsigned long lr,
  143. unsigned long pc);
  144. static void xmon_print_symbol(unsigned long address, const char *mid,
  145. const char *after);
  146. static const char *getvecname(unsigned long vec);
  147. static int do_spu_cmd(void);
  148. #ifdef CONFIG_44x
  149. static void dump_tlb_44x(void);
  150. #endif
  151. #ifdef CONFIG_PPC_BOOK3E
  152. static void dump_tlb_book3e(void);
  153. #endif
  154. static int xmon_no_auto_backtrace;
  155. extern void xmon_enter(void);
  156. extern void xmon_leave(void);
  157. #ifdef CONFIG_PPC64
  158. #define REG "%.16lx"
  159. #else
  160. #define REG "%.8lx"
  161. #endif
  162. #ifdef __LITTLE_ENDIAN__
  163. #define GETWORD(v) (((v)[3] << 24) + ((v)[2] << 16) + ((v)[1] << 8) + (v)[0])
  164. #else
  165. #define GETWORD(v) (((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3])
  166. #endif
  167. static char *help_string = "\
  168. Commands:\n\
  169. b show breakpoints\n\
  170. bd set data breakpoint\n\
  171. bi set instruction breakpoint\n\
  172. bc clear breakpoint\n"
  173. #ifdef CONFIG_SMP
  174. "\
  175. c print cpus stopped in xmon\n\
  176. c# try to switch to cpu number h (in hex)\n"
  177. #endif
  178. "\
  179. C checksum\n\
  180. d dump bytes\n\
  181. di dump instructions\n\
  182. df dump float values\n\
  183. dd dump double values\n\
  184. dl dump the kernel log buffer\n"
  185. #ifdef CONFIG_PPC64
  186. "\
  187. dp[#] dump paca for current cpu, or cpu #\n\
  188. dpa dump paca for all possible cpus\n"
  189. #endif
  190. "\
  191. dr dump stream of raw bytes\n\
  192. e print exception information\n\
  193. f flush cache\n\
  194. la lookup symbol+offset of specified address\n\
  195. ls lookup address of specified symbol\n\
  196. m examine/change memory\n\
  197. mm move a block of memory\n\
  198. ms set a block of memory\n\
  199. md compare two blocks of memory\n\
  200. ml locate a block of memory\n\
  201. mz zero a block of memory\n\
  202. mi show information about memory allocation\n\
  203. p call a procedure\n\
  204. r print registers\n\
  205. s single step\n"
  206. #ifdef CONFIG_SPU_BASE
  207. " ss stop execution on all spus\n\
  208. sr restore execution on stopped spus\n\
  209. sf # dump spu fields for spu # (in hex)\n\
  210. sd # dump spu local store for spu # (in hex)\n\
  211. sdi # disassemble spu local store for spu # (in hex)\n"
  212. #endif
  213. " S print special registers\n\
  214. t print backtrace\n\
  215. x exit monitor and recover\n\
  216. X exit monitor and dont recover\n"
  217. #if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_BOOK3E)
  218. " u dump segment table or SLB\n"
  219. #elif defined(CONFIG_PPC_STD_MMU_32)
  220. " u dump segment registers\n"
  221. #elif defined(CONFIG_44x) || defined(CONFIG_PPC_BOOK3E)
  222. " u dump TLB\n"
  223. #endif
  224. " ? help\n"
  225. " zr reboot\n\
  226. zh halt\n"
  227. ;
  228. static struct pt_regs *xmon_regs;
  229. static inline void sync(void)
  230. {
  231. asm volatile("sync; isync");
  232. }
  233. static inline void store_inst(void *p)
  234. {
  235. asm volatile ("dcbst 0,%0; sync; icbi 0,%0; isync" : : "r" (p));
  236. }
  237. static inline void cflush(void *p)
  238. {
  239. asm volatile ("dcbf 0,%0; icbi 0,%0" : : "r" (p));
  240. }
  241. static inline void cinval(void *p)
  242. {
  243. asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p));
  244. }
  245. /**
  246. * write_ciabr() - write the CIABR SPR
  247. * @ciabr: The value to write.
  248. *
  249. * This function writes a value to the CIARB register either directly
  250. * through mtspr instruction if the kernel is in HV privilege mode or
  251. * call a hypervisor function to achieve the same in case the kernel
  252. * is in supervisor privilege mode.
  253. */
  254. static void write_ciabr(unsigned long ciabr)
  255. {
  256. if (!cpu_has_feature(CPU_FTR_ARCH_207S))
  257. return;
  258. if (cpu_has_feature(CPU_FTR_HVMODE)) {
  259. mtspr(SPRN_CIABR, ciabr);
  260. return;
  261. }
  262. plapr_set_ciabr(ciabr);
  263. }
  264. /**
  265. * set_ciabr() - set the CIABR
  266. * @addr: The value to set.
  267. *
  268. * This function sets the correct privilege value into the the HW
  269. * breakpoint address before writing it up in the CIABR register.
  270. */
  271. static void set_ciabr(unsigned long addr)
  272. {
  273. addr &= ~CIABR_PRIV;
  274. if (cpu_has_feature(CPU_FTR_HVMODE))
  275. addr |= CIABR_PRIV_HYPER;
  276. else
  277. addr |= CIABR_PRIV_SUPER;
  278. write_ciabr(addr);
  279. }
  280. /*
  281. * Disable surveillance (the service processor watchdog function)
  282. * while we are in xmon.
  283. * XXX we should re-enable it when we leave. :)
  284. */
  285. #define SURVEILLANCE_TOKEN 9000
  286. static inline void disable_surveillance(void)
  287. {
  288. #ifdef CONFIG_PPC_PSERIES
  289. /* Since this can't be a module, args should end up below 4GB. */
  290. static struct rtas_args args;
  291. /*
  292. * At this point we have got all the cpus we can into
  293. * xmon, so there is hopefully no other cpu calling RTAS
  294. * at the moment, even though we don't take rtas.lock.
  295. * If we did try to take rtas.lock there would be a
  296. * real possibility of deadlock.
  297. */
  298. args.token = rtas_token("set-indicator");
  299. if (args.token == RTAS_UNKNOWN_SERVICE)
  300. return;
  301. args.token = cpu_to_be32(args.token);
  302. args.nargs = cpu_to_be32(3);
  303. args.nret = cpu_to_be32(1);
  304. args.rets = &args.args[3];
  305. args.args[0] = cpu_to_be32(SURVEILLANCE_TOKEN);
  306. args.args[1] = 0;
  307. args.args[2] = 0;
  308. enter_rtas(__pa(&args));
  309. #endif /* CONFIG_PPC_PSERIES */
  310. }
  311. #ifdef CONFIG_SMP
  312. static int xmon_speaker;
  313. static void get_output_lock(void)
  314. {
  315. int me = smp_processor_id() + 0x100;
  316. int last_speaker = 0, prev;
  317. long timeout;
  318. if (xmon_speaker == me)
  319. return;
  320. for (;;) {
  321. last_speaker = cmpxchg(&xmon_speaker, 0, me);
  322. if (last_speaker == 0)
  323. return;
  324. /*
  325. * Wait a full second for the lock, we might be on a slow
  326. * console, but check every 100us.
  327. */
  328. timeout = 10000;
  329. while (xmon_speaker == last_speaker) {
  330. if (--timeout > 0) {
  331. udelay(100);
  332. continue;
  333. }
  334. /* hostile takeover */
  335. prev = cmpxchg(&xmon_speaker, last_speaker, me);
  336. if (prev == last_speaker)
  337. return;
  338. break;
  339. }
  340. }
  341. }
  342. static void release_output_lock(void)
  343. {
  344. xmon_speaker = 0;
  345. }
  346. int cpus_are_in_xmon(void)
  347. {
  348. return !cpumask_empty(&cpus_in_xmon);
  349. }
  350. #endif
  351. static inline int unrecoverable_excp(struct pt_regs *regs)
  352. {
  353. #if defined(CONFIG_4xx) || defined(CONFIG_PPC_BOOK3E)
  354. /* We have no MSR_RI bit on 4xx or Book3e, so we simply return false */
  355. return 0;
  356. #else
  357. return ((regs->msr & MSR_RI) == 0);
  358. #endif
  359. }
  360. static int xmon_core(struct pt_regs *regs, int fromipi)
  361. {
  362. int cmd = 0;
  363. struct bpt *bp;
  364. long recurse_jmp[JMP_BUF_LEN];
  365. unsigned long offset;
  366. unsigned long flags;
  367. #ifdef CONFIG_SMP
  368. int cpu;
  369. int secondary;
  370. unsigned long timeout;
  371. #endif
  372. local_irq_save(flags);
  373. hard_irq_disable();
  374. bp = in_breakpoint_table(regs->nip, &offset);
  375. if (bp != NULL) {
  376. regs->nip = bp->address + offset;
  377. atomic_dec(&bp->ref_count);
  378. }
  379. remove_cpu_bpts();
  380. #ifdef CONFIG_SMP
  381. cpu = smp_processor_id();
  382. if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
  383. get_output_lock();
  384. excprint(regs);
  385. printf("cpu 0x%x: Exception %lx %s in xmon, "
  386. "returning to main loop\n",
  387. cpu, regs->trap, getvecname(TRAP(regs)));
  388. release_output_lock();
  389. longjmp(xmon_fault_jmp[cpu], 1);
  390. }
  391. if (setjmp(recurse_jmp) != 0) {
  392. if (!in_xmon || !xmon_gate) {
  393. get_output_lock();
  394. printf("xmon: WARNING: bad recursive fault "
  395. "on cpu 0x%x\n", cpu);
  396. release_output_lock();
  397. goto waiting;
  398. }
  399. secondary = !(xmon_taken && cpu == xmon_owner);
  400. goto cmdloop;
  401. }
  402. xmon_fault_jmp[cpu] = recurse_jmp;
  403. bp = NULL;
  404. if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT))
  405. bp = at_breakpoint(regs->nip);
  406. if (bp || unrecoverable_excp(regs))
  407. fromipi = 0;
  408. if (!fromipi) {
  409. get_output_lock();
  410. excprint(regs);
  411. if (bp) {
  412. printf("cpu 0x%x stopped at breakpoint 0x%lx (",
  413. cpu, BP_NUM(bp));
  414. xmon_print_symbol(regs->nip, " ", ")\n");
  415. }
  416. if (unrecoverable_excp(regs))
  417. printf("WARNING: exception is not recoverable, "
  418. "can't continue\n");
  419. release_output_lock();
  420. }
  421. cpumask_set_cpu(cpu, &cpus_in_xmon);
  422. waiting:
  423. secondary = 1;
  424. while (secondary && !xmon_gate) {
  425. if (in_xmon == 0) {
  426. if (fromipi)
  427. goto leave;
  428. secondary = test_and_set_bit(0, &in_xmon);
  429. }
  430. barrier();
  431. }
  432. if (!secondary && !xmon_gate) {
  433. /* we are the first cpu to come in */
  434. /* interrupt other cpu(s) */
  435. int ncpus = num_online_cpus();
  436. xmon_owner = cpu;
  437. mb();
  438. if (ncpus > 1) {
  439. smp_send_debugger_break();
  440. /* wait for other cpus to come in */
  441. for (timeout = 100000000; timeout != 0; --timeout) {
  442. if (cpumask_weight(&cpus_in_xmon) >= ncpus)
  443. break;
  444. barrier();
  445. }
  446. }
  447. remove_bpts();
  448. disable_surveillance();
  449. /* for breakpoint or single step, print the current instr. */
  450. if (bp || TRAP(regs) == 0xd00)
  451. ppc_inst_dump(regs->nip, 1, 0);
  452. printf("enter ? for help\n");
  453. mb();
  454. xmon_gate = 1;
  455. barrier();
  456. }
  457. cmdloop:
  458. while (in_xmon) {
  459. if (secondary) {
  460. if (cpu == xmon_owner) {
  461. if (!test_and_set_bit(0, &xmon_taken)) {
  462. secondary = 0;
  463. continue;
  464. }
  465. /* missed it */
  466. while (cpu == xmon_owner)
  467. barrier();
  468. }
  469. barrier();
  470. } else {
  471. cmd = cmds(regs);
  472. if (cmd != 0) {
  473. /* exiting xmon */
  474. insert_bpts();
  475. xmon_gate = 0;
  476. wmb();
  477. in_xmon = 0;
  478. break;
  479. }
  480. /* have switched to some other cpu */
  481. secondary = 1;
  482. }
  483. }
  484. leave:
  485. cpumask_clear_cpu(cpu, &cpus_in_xmon);
  486. xmon_fault_jmp[cpu] = NULL;
  487. #else
  488. /* UP is simple... */
  489. if (in_xmon) {
  490. printf("Exception %lx %s in xmon, returning to main loop\n",
  491. regs->trap, getvecname(TRAP(regs)));
  492. longjmp(xmon_fault_jmp[0], 1);
  493. }
  494. if (setjmp(recurse_jmp) == 0) {
  495. xmon_fault_jmp[0] = recurse_jmp;
  496. in_xmon = 1;
  497. excprint(regs);
  498. bp = at_breakpoint(regs->nip);
  499. if (bp) {
  500. printf("Stopped at breakpoint %lx (", BP_NUM(bp));
  501. xmon_print_symbol(regs->nip, " ", ")\n");
  502. }
  503. if (unrecoverable_excp(regs))
  504. printf("WARNING: exception is not recoverable, "
  505. "can't continue\n");
  506. remove_bpts();
  507. disable_surveillance();
  508. /* for breakpoint or single step, print the current instr. */
  509. if (bp || TRAP(regs) == 0xd00)
  510. ppc_inst_dump(regs->nip, 1, 0);
  511. printf("enter ? for help\n");
  512. }
  513. cmd = cmds(regs);
  514. insert_bpts();
  515. in_xmon = 0;
  516. #endif
  517. #ifdef CONFIG_BOOKE
  518. if (regs->msr & MSR_DE) {
  519. bp = at_breakpoint(regs->nip);
  520. if (bp != NULL) {
  521. regs->nip = (unsigned long) &bp->instr[0];
  522. atomic_inc(&bp->ref_count);
  523. }
  524. }
  525. #else
  526. if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
  527. bp = at_breakpoint(regs->nip);
  528. if (bp != NULL) {
  529. int stepped = emulate_step(regs, bp->instr[0]);
  530. if (stepped == 0) {
  531. regs->nip = (unsigned long) &bp->instr[0];
  532. atomic_inc(&bp->ref_count);
  533. } else if (stepped < 0) {
  534. printf("Couldn't single-step %s instruction\n",
  535. (IS_RFID(bp->instr[0])? "rfid": "mtmsrd"));
  536. }
  537. }
  538. }
  539. #endif
  540. insert_cpu_bpts();
  541. touch_nmi_watchdog();
  542. local_irq_restore(flags);
  543. return cmd != 'X' && cmd != EOF;
  544. }
  545. int xmon(struct pt_regs *excp)
  546. {
  547. struct pt_regs regs;
  548. if (excp == NULL) {
  549. ppc_save_regs(&regs);
  550. excp = &regs;
  551. }
  552. return xmon_core(excp, 0);
  553. }
  554. EXPORT_SYMBOL(xmon);
  555. irqreturn_t xmon_irq(int irq, void *d)
  556. {
  557. unsigned long flags;
  558. local_irq_save(flags);
  559. printf("Keyboard interrupt\n");
  560. xmon(get_irq_regs());
  561. local_irq_restore(flags);
  562. return IRQ_HANDLED;
  563. }
  564. static int xmon_bpt(struct pt_regs *regs)
  565. {
  566. struct bpt *bp;
  567. unsigned long offset;
  568. if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
  569. return 0;
  570. /* Are we at the trap at bp->instr[1] for some bp? */
  571. bp = in_breakpoint_table(regs->nip, &offset);
  572. if (bp != NULL && offset == 4) {
  573. regs->nip = bp->address + 4;
  574. atomic_dec(&bp->ref_count);
  575. return 1;
  576. }
  577. /* Are we at a breakpoint? */
  578. bp = at_breakpoint(regs->nip);
  579. if (!bp)
  580. return 0;
  581. xmon_core(regs, 0);
  582. return 1;
  583. }
  584. static int xmon_sstep(struct pt_regs *regs)
  585. {
  586. if (user_mode(regs))
  587. return 0;
  588. xmon_core(regs, 0);
  589. return 1;
  590. }
  591. static int xmon_break_match(struct pt_regs *regs)
  592. {
  593. if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
  594. return 0;
  595. if (dabr.enabled == 0)
  596. return 0;
  597. xmon_core(regs, 0);
  598. return 1;
  599. }
  600. static int xmon_iabr_match(struct pt_regs *regs)
  601. {
  602. if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
  603. return 0;
  604. if (iabr == NULL)
  605. return 0;
  606. xmon_core(regs, 0);
  607. return 1;
  608. }
  609. static int xmon_ipi(struct pt_regs *regs)
  610. {
  611. #ifdef CONFIG_SMP
  612. if (in_xmon && !cpumask_test_cpu(smp_processor_id(), &cpus_in_xmon))
  613. xmon_core(regs, 1);
  614. #endif
  615. return 0;
  616. }
  617. static int xmon_fault_handler(struct pt_regs *regs)
  618. {
  619. struct bpt *bp;
  620. unsigned long offset;
  621. if (in_xmon && catch_memory_errors)
  622. handle_fault(regs); /* doesn't return */
  623. if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
  624. bp = in_breakpoint_table(regs->nip, &offset);
  625. if (bp != NULL) {
  626. regs->nip = bp->address + offset;
  627. atomic_dec(&bp->ref_count);
  628. }
  629. }
  630. return 0;
  631. }
  632. static struct bpt *at_breakpoint(unsigned long pc)
  633. {
  634. int i;
  635. struct bpt *bp;
  636. bp = bpts;
  637. for (i = 0; i < NBPTS; ++i, ++bp)
  638. if (bp->enabled && pc == bp->address)
  639. return bp;
  640. return NULL;
  641. }
  642. static struct bpt *in_breakpoint_table(unsigned long nip, unsigned long *offp)
  643. {
  644. unsigned long off;
  645. off = nip - (unsigned long) bpts;
  646. if (off >= sizeof(bpts))
  647. return NULL;
  648. off %= sizeof(struct bpt);
  649. if (off != offsetof(struct bpt, instr[0])
  650. && off != offsetof(struct bpt, instr[1]))
  651. return NULL;
  652. *offp = off - offsetof(struct bpt, instr[0]);
  653. return (struct bpt *) (nip - off);
  654. }
  655. static struct bpt *new_breakpoint(unsigned long a)
  656. {
  657. struct bpt *bp;
  658. a &= ~3UL;
  659. bp = at_breakpoint(a);
  660. if (bp)
  661. return bp;
  662. for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
  663. if (!bp->enabled && atomic_read(&bp->ref_count) == 0) {
  664. bp->address = a;
  665. bp->instr[1] = bpinstr;
  666. store_inst(&bp->instr[1]);
  667. return bp;
  668. }
  669. }
  670. printf("Sorry, no free breakpoints. Please clear one first.\n");
  671. return NULL;
  672. }
  673. static void insert_bpts(void)
  674. {
  675. int i;
  676. struct bpt *bp;
  677. bp = bpts;
  678. for (i = 0; i < NBPTS; ++i, ++bp) {
  679. if ((bp->enabled & (BP_TRAP|BP_CIABR)) == 0)
  680. continue;
  681. if (mread(bp->address, &bp->instr[0], 4) != 4) {
  682. printf("Couldn't read instruction at %lx, "
  683. "disabling breakpoint there\n", bp->address);
  684. bp->enabled = 0;
  685. continue;
  686. }
  687. if (IS_MTMSRD(bp->instr[0]) || IS_RFID(bp->instr[0])) {
  688. printf("Breakpoint at %lx is on an mtmsrd or rfid "
  689. "instruction, disabling it\n", bp->address);
  690. bp->enabled = 0;
  691. continue;
  692. }
  693. store_inst(&bp->instr[0]);
  694. if (bp->enabled & BP_CIABR)
  695. continue;
  696. if (mwrite(bp->address, &bpinstr, 4) != 4) {
  697. printf("Couldn't write instruction at %lx, "
  698. "disabling breakpoint there\n", bp->address);
  699. bp->enabled &= ~BP_TRAP;
  700. continue;
  701. }
  702. store_inst((void *)bp->address);
  703. }
  704. }
  705. static void insert_cpu_bpts(void)
  706. {
  707. struct arch_hw_breakpoint brk;
  708. if (dabr.enabled) {
  709. brk.address = dabr.address;
  710. brk.type = (dabr.enabled & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL;
  711. brk.len = 8;
  712. __set_breakpoint(&brk);
  713. }
  714. if (iabr)
  715. set_ciabr(iabr->address);
  716. }
  717. static void remove_bpts(void)
  718. {
  719. int i;
  720. struct bpt *bp;
  721. unsigned instr;
  722. bp = bpts;
  723. for (i = 0; i < NBPTS; ++i, ++bp) {
  724. if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP)
  725. continue;
  726. if (mread(bp->address, &instr, 4) == 4
  727. && instr == bpinstr
  728. && mwrite(bp->address, &bp->instr, 4) != 4)
  729. printf("Couldn't remove breakpoint at %lx\n",
  730. bp->address);
  731. else
  732. store_inst((void *)bp->address);
  733. }
  734. }
  735. static void remove_cpu_bpts(void)
  736. {
  737. hw_breakpoint_disable();
  738. write_ciabr(0);
  739. }
  740. /* Command interpreting routine */
  741. static char *last_cmd;
  742. static int
  743. cmds(struct pt_regs *excp)
  744. {
  745. int cmd = 0;
  746. last_cmd = NULL;
  747. xmon_regs = excp;
  748. if (!xmon_no_auto_backtrace) {
  749. xmon_no_auto_backtrace = 1;
  750. xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
  751. }
  752. for(;;) {
  753. #ifdef CONFIG_SMP
  754. printf("%x:", smp_processor_id());
  755. #endif /* CONFIG_SMP */
  756. printf("mon> ");
  757. flush_input();
  758. termch = 0;
  759. cmd = skipbl();
  760. if( cmd == '\n' ) {
  761. if (last_cmd == NULL)
  762. continue;
  763. take_input(last_cmd);
  764. last_cmd = NULL;
  765. cmd = inchar();
  766. }
  767. switch (cmd) {
  768. case 'm':
  769. cmd = inchar();
  770. switch (cmd) {
  771. case 'm':
  772. case 's':
  773. case 'd':
  774. memops(cmd);
  775. break;
  776. case 'l':
  777. memlocate();
  778. break;
  779. case 'z':
  780. memzcan();
  781. break;
  782. case 'i':
  783. show_mem(0);
  784. break;
  785. default:
  786. termch = cmd;
  787. memex();
  788. }
  789. break;
  790. case 'd':
  791. dump();
  792. break;
  793. case 'l':
  794. symbol_lookup();
  795. break;
  796. case 'r':
  797. prregs(excp); /* print regs */
  798. break;
  799. case 'e':
  800. excprint(excp);
  801. break;
  802. case 'S':
  803. super_regs();
  804. break;
  805. case 't':
  806. backtrace(excp);
  807. break;
  808. case 'f':
  809. cacheflush();
  810. break;
  811. case 's':
  812. if (do_spu_cmd() == 0)
  813. break;
  814. if (do_step(excp))
  815. return cmd;
  816. break;
  817. case 'x':
  818. case 'X':
  819. return cmd;
  820. case EOF:
  821. printf(" <no input ...>\n");
  822. mdelay(2000);
  823. return cmd;
  824. case '?':
  825. xmon_puts(help_string);
  826. break;
  827. case 'b':
  828. bpt_cmds();
  829. break;
  830. case 'C':
  831. csum();
  832. break;
  833. case 'c':
  834. if (cpu_cmd())
  835. return 0;
  836. break;
  837. case 'z':
  838. bootcmds();
  839. break;
  840. case 'p':
  841. proccall();
  842. break;
  843. #ifdef CONFIG_PPC_STD_MMU
  844. case 'u':
  845. dump_segments();
  846. break;
  847. #elif defined(CONFIG_44x)
  848. case 'u':
  849. dump_tlb_44x();
  850. break;
  851. #elif defined(CONFIG_PPC_BOOK3E)
  852. case 'u':
  853. dump_tlb_book3e();
  854. break;
  855. #endif
  856. default:
  857. printf("Unrecognized command: ");
  858. do {
  859. if (' ' < cmd && cmd <= '~')
  860. putchar(cmd);
  861. else
  862. printf("\\x%x", cmd);
  863. cmd = inchar();
  864. } while (cmd != '\n');
  865. printf(" (type ? for help)\n");
  866. break;
  867. }
  868. }
  869. }
  870. #ifdef CONFIG_BOOKE
  871. static int do_step(struct pt_regs *regs)
  872. {
  873. regs->msr |= MSR_DE;
  874. mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM);
  875. return 1;
  876. }
  877. #else
  878. /*
  879. * Step a single instruction.
  880. * Some instructions we emulate, others we execute with MSR_SE set.
  881. */
  882. static int do_step(struct pt_regs *regs)
  883. {
  884. unsigned int instr;
  885. int stepped;
  886. /* check we are in 64-bit kernel mode, translation enabled */
  887. if ((regs->msr & (MSR_64BIT|MSR_PR|MSR_IR)) == (MSR_64BIT|MSR_IR)) {
  888. if (mread(regs->nip, &instr, 4) == 4) {
  889. stepped = emulate_step(regs, instr);
  890. if (stepped < 0) {
  891. printf("Couldn't single-step %s instruction\n",
  892. (IS_RFID(instr)? "rfid": "mtmsrd"));
  893. return 0;
  894. }
  895. if (stepped > 0) {
  896. regs->trap = 0xd00 | (regs->trap & 1);
  897. printf("stepped to ");
  898. xmon_print_symbol(regs->nip, " ", "\n");
  899. ppc_inst_dump(regs->nip, 1, 0);
  900. return 0;
  901. }
  902. }
  903. }
  904. regs->msr |= MSR_SE;
  905. return 1;
  906. }
  907. #endif
  908. static void bootcmds(void)
  909. {
  910. int cmd;
  911. cmd = inchar();
  912. if (cmd == 'r')
  913. ppc_md.restart(NULL);
  914. else if (cmd == 'h')
  915. ppc_md.halt();
  916. else if (cmd == 'p')
  917. if (pm_power_off)
  918. pm_power_off();
  919. }
  920. static int cpu_cmd(void)
  921. {
  922. #ifdef CONFIG_SMP
  923. unsigned long cpu, first_cpu, last_cpu;
  924. int timeout;
  925. if (!scanhex(&cpu)) {
  926. /* print cpus waiting or in xmon */
  927. printf("cpus stopped:");
  928. last_cpu = first_cpu = NR_CPUS;
  929. for_each_possible_cpu(cpu) {
  930. if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
  931. if (cpu == last_cpu + 1) {
  932. last_cpu = cpu;
  933. } else {
  934. if (last_cpu != first_cpu)
  935. printf("-0x%lx", last_cpu);
  936. last_cpu = first_cpu = cpu;
  937. printf(" 0x%lx", cpu);
  938. }
  939. }
  940. }
  941. if (last_cpu != first_cpu)
  942. printf("-0x%lx", last_cpu);
  943. printf("\n");
  944. return 0;
  945. }
  946. /* try to switch to cpu specified */
  947. if (!cpumask_test_cpu(cpu, &cpus_in_xmon)) {
  948. printf("cpu 0x%x isn't in xmon\n", cpu);
  949. return 0;
  950. }
  951. xmon_taken = 0;
  952. mb();
  953. xmon_owner = cpu;
  954. timeout = 10000000;
  955. while (!xmon_taken) {
  956. if (--timeout == 0) {
  957. if (test_and_set_bit(0, &xmon_taken))
  958. break;
  959. /* take control back */
  960. mb();
  961. xmon_owner = smp_processor_id();
  962. printf("cpu 0x%x didn't take control\n", cpu);
  963. return 0;
  964. }
  965. barrier();
  966. }
  967. return 1;
  968. #else
  969. return 0;
  970. #endif /* CONFIG_SMP */
  971. }
  972. static unsigned short fcstab[256] = {
  973. 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
  974. 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
  975. 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
  976. 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
  977. 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
  978. 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
  979. 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
  980. 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
  981. 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
  982. 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3,
  983. 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a,
  984. 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72,
  985. 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9,
  986. 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1,
  987. 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738,
  988. 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70,
  989. 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7,
  990. 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff,
  991. 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036,
  992. 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e,
  993. 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5,
  994. 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd,
  995. 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134,
  996. 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c,
  997. 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3,
  998. 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb,
  999. 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232,
  1000. 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a,
  1001. 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1,
  1002. 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9,
  1003. 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330,
  1004. 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78
  1005. };
  1006. #define FCS(fcs, c) (((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff])
  1007. static void
  1008. csum(void)
  1009. {
  1010. unsigned int i;
  1011. unsigned short fcs;
  1012. unsigned char v;
  1013. if (!scanhex(&adrs))
  1014. return;
  1015. if (!scanhex(&ncsum))
  1016. return;
  1017. fcs = 0xffff;
  1018. for (i = 0; i < ncsum; ++i) {
  1019. if (mread(adrs+i, &v, 1) == 0) {
  1020. printf("csum stopped at "REG"\n", adrs+i);
  1021. break;
  1022. }
  1023. fcs = FCS(fcs, v);
  1024. }
  1025. printf("%x\n", fcs);
  1026. }
  1027. /*
  1028. * Check if this is a suitable place to put a breakpoint.
  1029. */
  1030. static long check_bp_loc(unsigned long addr)
  1031. {
  1032. unsigned int instr;
  1033. addr &= ~3;
  1034. if (!is_kernel_addr(addr)) {
  1035. printf("Breakpoints may only be placed at kernel addresses\n");
  1036. return 0;
  1037. }
  1038. if (!mread(addr, &instr, sizeof(instr))) {
  1039. printf("Can't read instruction at address %lx\n", addr);
  1040. return 0;
  1041. }
  1042. if (IS_MTMSRD(instr) || IS_RFID(instr)) {
  1043. printf("Breakpoints may not be placed on mtmsrd or rfid "
  1044. "instructions\n");
  1045. return 0;
  1046. }
  1047. return 1;
  1048. }
  1049. static char *breakpoint_help_string =
  1050. "Breakpoint command usage:\n"
  1051. "b show breakpoints\n"
  1052. "b <addr> [cnt] set breakpoint at given instr addr\n"
  1053. "bc clear all breakpoints\n"
  1054. "bc <n/addr> clear breakpoint number n or at addr\n"
  1055. "bi <addr> [cnt] set hardware instr breakpoint (POWER8 only)\n"
  1056. "bd <addr> [cnt] set hardware data breakpoint\n"
  1057. "";
  1058. static void
  1059. bpt_cmds(void)
  1060. {
  1061. int cmd;
  1062. unsigned long a;
  1063. int mode, i;
  1064. struct bpt *bp;
  1065. const char badaddr[] = "Only kernel addresses are permitted "
  1066. "for breakpoints\n";
  1067. cmd = inchar();
  1068. switch (cmd) {
  1069. #ifndef CONFIG_8xx
  1070. case 'd': /* bd - hardware data breakpoint */
  1071. mode = 7;
  1072. cmd = inchar();
  1073. if (cmd == 'r')
  1074. mode = 5;
  1075. else if (cmd == 'w')
  1076. mode = 6;
  1077. else
  1078. termch = cmd;
  1079. dabr.address = 0;
  1080. dabr.enabled = 0;
  1081. if (scanhex(&dabr.address)) {
  1082. if (!is_kernel_addr(dabr.address)) {
  1083. printf(badaddr);
  1084. break;
  1085. }
  1086. dabr.address &= ~HW_BRK_TYPE_DABR;
  1087. dabr.enabled = mode | BP_DABR;
  1088. }
  1089. break;
  1090. case 'i': /* bi - hardware instr breakpoint */
  1091. if (!cpu_has_feature(CPU_FTR_ARCH_207S)) {
  1092. printf("Hardware instruction breakpoint "
  1093. "not supported on this cpu\n");
  1094. break;
  1095. }
  1096. if (iabr) {
  1097. iabr->enabled &= ~BP_CIABR;
  1098. iabr = NULL;
  1099. }
  1100. if (!scanhex(&a))
  1101. break;
  1102. if (!check_bp_loc(a))
  1103. break;
  1104. bp = new_breakpoint(a);
  1105. if (bp != NULL) {
  1106. bp->enabled |= BP_CIABR;
  1107. iabr = bp;
  1108. }
  1109. break;
  1110. #endif
  1111. case 'c':
  1112. if (!scanhex(&a)) {
  1113. /* clear all breakpoints */
  1114. for (i = 0; i < NBPTS; ++i)
  1115. bpts[i].enabled = 0;
  1116. iabr = NULL;
  1117. dabr.enabled = 0;
  1118. printf("All breakpoints cleared\n");
  1119. break;
  1120. }
  1121. if (a <= NBPTS && a >= 1) {
  1122. /* assume a breakpoint number */
  1123. bp = &bpts[a-1]; /* bp nums are 1 based */
  1124. } else {
  1125. /* assume a breakpoint address */
  1126. bp = at_breakpoint(a);
  1127. if (bp == NULL) {
  1128. printf("No breakpoint at %lx\n", a);
  1129. break;
  1130. }
  1131. }
  1132. printf("Cleared breakpoint %lx (", BP_NUM(bp));
  1133. xmon_print_symbol(bp->address, " ", ")\n");
  1134. bp->enabled = 0;
  1135. break;
  1136. default:
  1137. termch = cmd;
  1138. cmd = skipbl();
  1139. if (cmd == '?') {
  1140. printf(breakpoint_help_string);
  1141. break;
  1142. }
  1143. termch = cmd;
  1144. if (!scanhex(&a)) {
  1145. /* print all breakpoints */
  1146. printf(" type address\n");
  1147. if (dabr.enabled) {
  1148. printf(" data "REG" [", dabr.address);
  1149. if (dabr.enabled & 1)
  1150. printf("r");
  1151. if (dabr.enabled & 2)
  1152. printf("w");
  1153. printf("]\n");
  1154. }
  1155. for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
  1156. if (!bp->enabled)
  1157. continue;
  1158. printf("%2x %s ", BP_NUM(bp),
  1159. (bp->enabled & BP_CIABR) ? "inst": "trap");
  1160. xmon_print_symbol(bp->address, " ", "\n");
  1161. }
  1162. break;
  1163. }
  1164. if (!check_bp_loc(a))
  1165. break;
  1166. bp = new_breakpoint(a);
  1167. if (bp != NULL)
  1168. bp->enabled |= BP_TRAP;
  1169. break;
  1170. }
  1171. }
  1172. /* Very cheap human name for vector lookup. */
  1173. static
  1174. const char *getvecname(unsigned long vec)
  1175. {
  1176. char *ret;
  1177. switch (vec) {
  1178. case 0x100: ret = "(System Reset)"; break;
  1179. case 0x200: ret = "(Machine Check)"; break;
  1180. case 0x300: ret = "(Data Access)"; break;
  1181. case 0x380: ret = "(Data SLB Access)"; break;
  1182. case 0x400: ret = "(Instruction Access)"; break;
  1183. case 0x480: ret = "(Instruction SLB Access)"; break;
  1184. case 0x500: ret = "(Hardware Interrupt)"; break;
  1185. case 0x600: ret = "(Alignment)"; break;
  1186. case 0x700: ret = "(Program Check)"; break;
  1187. case 0x800: ret = "(FPU Unavailable)"; break;
  1188. case 0x900: ret = "(Decrementer)"; break;
  1189. case 0x980: ret = "(Hypervisor Decrementer)"; break;
  1190. case 0xa00: ret = "(Doorbell)"; break;
  1191. case 0xc00: ret = "(System Call)"; break;
  1192. case 0xd00: ret = "(Single Step)"; break;
  1193. case 0xe40: ret = "(Emulation Assist)"; break;
  1194. case 0xe60: ret = "(HMI)"; break;
  1195. case 0xe80: ret = "(Hypervisor Doorbell)"; break;
  1196. case 0xf00: ret = "(Performance Monitor)"; break;
  1197. case 0xf20: ret = "(Altivec Unavailable)"; break;
  1198. case 0x1300: ret = "(Instruction Breakpoint)"; break;
  1199. case 0x1500: ret = "(Denormalisation)"; break;
  1200. case 0x1700: ret = "(Altivec Assist)"; break;
  1201. default: ret = "";
  1202. }
  1203. return ret;
  1204. }
  1205. static void get_function_bounds(unsigned long pc, unsigned long *startp,
  1206. unsigned long *endp)
  1207. {
  1208. unsigned long size, offset;
  1209. const char *name;
  1210. *startp = *endp = 0;
  1211. if (pc == 0)
  1212. return;
  1213. if (setjmp(bus_error_jmp) == 0) {
  1214. catch_memory_errors = 1;
  1215. sync();
  1216. name = kallsyms_lookup(pc, &size, &offset, NULL, tmpstr);
  1217. if (name != NULL) {
  1218. *startp = pc - offset;
  1219. *endp = pc - offset + size;
  1220. }
  1221. sync();
  1222. }
  1223. catch_memory_errors = 0;
  1224. }
  1225. #define LRSAVE_OFFSET (STACK_FRAME_LR_SAVE * sizeof(unsigned long))
  1226. #define MARKER_OFFSET (STACK_FRAME_MARKER * sizeof(unsigned long))
  1227. static void xmon_show_stack(unsigned long sp, unsigned long lr,
  1228. unsigned long pc)
  1229. {
  1230. int max_to_print = 64;
  1231. unsigned long ip;
  1232. unsigned long newsp;
  1233. unsigned long marker;
  1234. struct pt_regs regs;
  1235. while (max_to_print--) {
  1236. if (sp < PAGE_OFFSET) {
  1237. if (sp != 0)
  1238. printf("SP (%lx) is in userspace\n", sp);
  1239. break;
  1240. }
  1241. if (!mread(sp + LRSAVE_OFFSET, &ip, sizeof(unsigned long))
  1242. || !mread(sp, &newsp, sizeof(unsigned long))) {
  1243. printf("Couldn't read stack frame at %lx\n", sp);
  1244. break;
  1245. }
  1246. /*
  1247. * For the first stack frame, try to work out if
  1248. * LR and/or the saved LR value in the bottommost
  1249. * stack frame are valid.
  1250. */
  1251. if ((pc | lr) != 0) {
  1252. unsigned long fnstart, fnend;
  1253. unsigned long nextip;
  1254. int printip = 1;
  1255. get_function_bounds(pc, &fnstart, &fnend);
  1256. nextip = 0;
  1257. if (newsp > sp)
  1258. mread(newsp + LRSAVE_OFFSET, &nextip,
  1259. sizeof(unsigned long));
  1260. if (lr == ip) {
  1261. if (lr < PAGE_OFFSET
  1262. || (fnstart <= lr && lr < fnend))
  1263. printip = 0;
  1264. } else if (lr == nextip) {
  1265. printip = 0;
  1266. } else if (lr >= PAGE_OFFSET
  1267. && !(fnstart <= lr && lr < fnend)) {
  1268. printf("[link register ] ");
  1269. xmon_print_symbol(lr, " ", "\n");
  1270. }
  1271. if (printip) {
  1272. printf("["REG"] ", sp);
  1273. xmon_print_symbol(ip, " ", " (unreliable)\n");
  1274. }
  1275. pc = lr = 0;
  1276. } else {
  1277. printf("["REG"] ", sp);
  1278. xmon_print_symbol(ip, " ", "\n");
  1279. }
  1280. /* Look for "regshere" marker to see if this is
  1281. an exception frame. */
  1282. if (mread(sp + MARKER_OFFSET, &marker, sizeof(unsigned long))
  1283. && marker == STACK_FRAME_REGS_MARKER) {
  1284. if (mread(sp + STACK_FRAME_OVERHEAD, &regs, sizeof(regs))
  1285. != sizeof(regs)) {
  1286. printf("Couldn't read registers at %lx\n",
  1287. sp + STACK_FRAME_OVERHEAD);
  1288. break;
  1289. }
  1290. printf("--- Exception: %lx %s at ", regs.trap,
  1291. getvecname(TRAP(&regs)));
  1292. pc = regs.nip;
  1293. lr = regs.link;
  1294. xmon_print_symbol(pc, " ", "\n");
  1295. }
  1296. if (newsp == 0)
  1297. break;
  1298. sp = newsp;
  1299. }
  1300. }
  1301. static void backtrace(struct pt_regs *excp)
  1302. {
  1303. unsigned long sp;
  1304. if (scanhex(&sp))
  1305. xmon_show_stack(sp, 0, 0);
  1306. else
  1307. xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
  1308. scannl();
  1309. }
  1310. static void print_bug_trap(struct pt_regs *regs)
  1311. {
  1312. #ifdef CONFIG_BUG
  1313. const struct bug_entry *bug;
  1314. unsigned long addr;
  1315. if (regs->msr & MSR_PR)
  1316. return; /* not in kernel */
  1317. addr = regs->nip; /* address of trap instruction */
  1318. if (addr < PAGE_OFFSET)
  1319. return;
  1320. bug = find_bug(regs->nip);
  1321. if (bug == NULL)
  1322. return;
  1323. if (is_warning_bug(bug))
  1324. return;
  1325. #ifdef CONFIG_DEBUG_BUGVERBOSE
  1326. printf("kernel BUG at %s:%u!\n",
  1327. bug->file, bug->line);
  1328. #else
  1329. printf("kernel BUG at %p!\n", (void *)bug->bug_addr);
  1330. #endif
  1331. #endif /* CONFIG_BUG */
  1332. }
  1333. static void excprint(struct pt_regs *fp)
  1334. {
  1335. unsigned long trap;
  1336. #ifdef CONFIG_SMP
  1337. printf("cpu 0x%x: ", smp_processor_id());
  1338. #endif /* CONFIG_SMP */
  1339. trap = TRAP(fp);
  1340. printf("Vector: %lx %s at [%lx]\n", fp->trap, getvecname(trap), fp);
  1341. printf(" pc: ");
  1342. xmon_print_symbol(fp->nip, ": ", "\n");
  1343. printf(" lr: ", fp->link);
  1344. xmon_print_symbol(fp->link, ": ", "\n");
  1345. printf(" sp: %lx\n", fp->gpr[1]);
  1346. printf(" msr: %lx\n", fp->msr);
  1347. if (trap == 0x300 || trap == 0x380 || trap == 0x600 || trap == 0x200) {
  1348. printf(" dar: %lx\n", fp->dar);
  1349. if (trap != 0x380)
  1350. printf(" dsisr: %lx\n", fp->dsisr);
  1351. }
  1352. printf(" current = 0x%lx\n", current);
  1353. #ifdef CONFIG_PPC64
  1354. printf(" paca = 0x%lx\t softe: %d\t irq_happened: 0x%02x\n",
  1355. local_paca, local_paca->soft_enabled, local_paca->irq_happened);
  1356. #endif
  1357. if (current) {
  1358. printf(" pid = %ld, comm = %s\n",
  1359. current->pid, current->comm);
  1360. }
  1361. if (trap == 0x700)
  1362. print_bug_trap(fp);
  1363. }
  1364. static void prregs(struct pt_regs *fp)
  1365. {
  1366. int n, trap;
  1367. unsigned long base;
  1368. struct pt_regs regs;
  1369. if (scanhex(&base)) {
  1370. if (setjmp(bus_error_jmp) == 0) {
  1371. catch_memory_errors = 1;
  1372. sync();
  1373. regs = *(struct pt_regs *)base;
  1374. sync();
  1375. __delay(200);
  1376. } else {
  1377. catch_memory_errors = 0;
  1378. printf("*** Error reading registers from "REG"\n",
  1379. base);
  1380. return;
  1381. }
  1382. catch_memory_errors = 0;
  1383. fp = &regs;
  1384. }
  1385. #ifdef CONFIG_PPC64
  1386. if (FULL_REGS(fp)) {
  1387. for (n = 0; n < 16; ++n)
  1388. printf("R%.2ld = "REG" R%.2ld = "REG"\n",
  1389. n, fp->gpr[n], n+16, fp->gpr[n+16]);
  1390. } else {
  1391. for (n = 0; n < 7; ++n)
  1392. printf("R%.2ld = "REG" R%.2ld = "REG"\n",
  1393. n, fp->gpr[n], n+7, fp->gpr[n+7]);
  1394. }
  1395. #else
  1396. for (n = 0; n < 32; ++n) {
  1397. printf("R%.2d = %.8x%s", n, fp->gpr[n],
  1398. (n & 3) == 3? "\n": " ");
  1399. if (n == 12 && !FULL_REGS(fp)) {
  1400. printf("\n");
  1401. break;
  1402. }
  1403. }
  1404. #endif
  1405. printf("pc = ");
  1406. xmon_print_symbol(fp->nip, " ", "\n");
  1407. if (TRAP(fp) != 0xc00 && cpu_has_feature(CPU_FTR_CFAR)) {
  1408. printf("cfar= ");
  1409. xmon_print_symbol(fp->orig_gpr3, " ", "\n");
  1410. }
  1411. printf("lr = ");
  1412. xmon_print_symbol(fp->link, " ", "\n");
  1413. printf("msr = "REG" cr = %.8lx\n", fp->msr, fp->ccr);
  1414. printf("ctr = "REG" xer = "REG" trap = %4lx\n",
  1415. fp->ctr, fp->xer, fp->trap);
  1416. trap = TRAP(fp);
  1417. if (trap == 0x300 || trap == 0x380 || trap == 0x600)
  1418. printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr);
  1419. }
  1420. static void cacheflush(void)
  1421. {
  1422. int cmd;
  1423. unsigned long nflush;
  1424. cmd = inchar();
  1425. if (cmd != 'i')
  1426. termch = cmd;
  1427. scanhex((void *)&adrs);
  1428. if (termch != '\n')
  1429. termch = 0;
  1430. nflush = 1;
  1431. scanhex(&nflush);
  1432. nflush = (nflush + L1_CACHE_BYTES - 1) / L1_CACHE_BYTES;
  1433. if (setjmp(bus_error_jmp) == 0) {
  1434. catch_memory_errors = 1;
  1435. sync();
  1436. if (cmd != 'i') {
  1437. for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
  1438. cflush((void *) adrs);
  1439. } else {
  1440. for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
  1441. cinval((void *) adrs);
  1442. }
  1443. sync();
  1444. /* wait a little while to see if we get a machine check */
  1445. __delay(200);
  1446. }
  1447. catch_memory_errors = 0;
  1448. }
  1449. static unsigned long
  1450. read_spr(int n)
  1451. {
  1452. unsigned int instrs[2];
  1453. unsigned long (*code)(void);
  1454. unsigned long ret = -1UL;
  1455. #ifdef CONFIG_PPC64
  1456. unsigned long opd[3];
  1457. opd[0] = (unsigned long)instrs;
  1458. opd[1] = 0;
  1459. opd[2] = 0;
  1460. code = (unsigned long (*)(void)) opd;
  1461. #else
  1462. code = (unsigned long (*)(void)) instrs;
  1463. #endif
  1464. /* mfspr r3,n; blr */
  1465. instrs[0] = 0x7c6002a6 + ((n & 0x1F) << 16) + ((n & 0x3e0) << 6);
  1466. instrs[1] = 0x4e800020;
  1467. store_inst(instrs);
  1468. store_inst(instrs+1);
  1469. if (setjmp(bus_error_jmp) == 0) {
  1470. catch_memory_errors = 1;
  1471. sync();
  1472. ret = code();
  1473. sync();
  1474. /* wait a little while to see if we get a machine check */
  1475. __delay(200);
  1476. n = size;
  1477. }
  1478. return ret;
  1479. }
  1480. static void
  1481. write_spr(int n, unsigned long val)
  1482. {
  1483. unsigned int instrs[2];
  1484. unsigned long (*code)(unsigned long);
  1485. #ifdef CONFIG_PPC64
  1486. unsigned long opd[3];
  1487. opd[0] = (unsigned long)instrs;
  1488. opd[1] = 0;
  1489. opd[2] = 0;
  1490. code = (unsigned long (*)(unsigned long)) opd;
  1491. #else
  1492. code = (unsigned long (*)(unsigned long)) instrs;
  1493. #endif
  1494. instrs[0] = 0x7c6003a6 + ((n & 0x1F) << 16) + ((n & 0x3e0) << 6);
  1495. instrs[1] = 0x4e800020;
  1496. store_inst(instrs);
  1497. store_inst(instrs+1);
  1498. if (setjmp(bus_error_jmp) == 0) {
  1499. catch_memory_errors = 1;
  1500. sync();
  1501. code(val);
  1502. sync();
  1503. /* wait a little while to see if we get a machine check */
  1504. __delay(200);
  1505. n = size;
  1506. }
  1507. }
  1508. static unsigned long regno;
  1509. extern char exc_prolog;
  1510. extern char dec_exc;
  1511. static void super_regs(void)
  1512. {
  1513. int cmd;
  1514. unsigned long val;
  1515. cmd = skipbl();
  1516. if (cmd == '\n') {
  1517. unsigned long sp, toc;
  1518. asm("mr %0,1" : "=r" (sp) :);
  1519. asm("mr %0,2" : "=r" (toc) :);
  1520. printf("msr = "REG" sprg0= "REG"\n",
  1521. mfmsr(), mfspr(SPRN_SPRG0));
  1522. printf("pvr = "REG" sprg1= "REG"\n",
  1523. mfspr(SPRN_PVR), mfspr(SPRN_SPRG1));
  1524. printf("dec = "REG" sprg2= "REG"\n",
  1525. mfspr(SPRN_DEC), mfspr(SPRN_SPRG2));
  1526. printf("sp = "REG" sprg3= "REG"\n", sp, mfspr(SPRN_SPRG3));
  1527. printf("toc = "REG" dar = "REG"\n", toc, mfspr(SPRN_DAR));
  1528. return;
  1529. }
  1530. scanhex(&regno);
  1531. switch (cmd) {
  1532. case 'w':
  1533. val = read_spr(regno);
  1534. scanhex(&val);
  1535. write_spr(regno, val);
  1536. /* fall through */
  1537. case 'r':
  1538. printf("spr %lx = %lx\n", regno, read_spr(regno));
  1539. break;
  1540. }
  1541. scannl();
  1542. }
  1543. /*
  1544. * Stuff for reading and writing memory safely
  1545. */
  1546. static int
  1547. mread(unsigned long adrs, void *buf, int size)
  1548. {
  1549. volatile int n;
  1550. char *p, *q;
  1551. n = 0;
  1552. if (setjmp(bus_error_jmp) == 0) {
  1553. catch_memory_errors = 1;
  1554. sync();
  1555. p = (char *)adrs;
  1556. q = (char *)buf;
  1557. switch (size) {
  1558. case 2:
  1559. *(u16 *)q = *(u16 *)p;
  1560. break;
  1561. case 4:
  1562. *(u32 *)q = *(u32 *)p;
  1563. break;
  1564. case 8:
  1565. *(u64 *)q = *(u64 *)p;
  1566. break;
  1567. default:
  1568. for( ; n < size; ++n) {
  1569. *q++ = *p++;
  1570. sync();
  1571. }
  1572. }
  1573. sync();
  1574. /* wait a little while to see if we get a machine check */
  1575. __delay(200);
  1576. n = size;
  1577. }
  1578. catch_memory_errors = 0;
  1579. return n;
  1580. }
  1581. static int
  1582. mwrite(unsigned long adrs, void *buf, int size)
  1583. {
  1584. volatile int n;
  1585. char *p, *q;
  1586. n = 0;
  1587. if (setjmp(bus_error_jmp) == 0) {
  1588. catch_memory_errors = 1;
  1589. sync();
  1590. p = (char *) adrs;
  1591. q = (char *) buf;
  1592. switch (size) {
  1593. case 2:
  1594. *(u16 *)p = *(u16 *)q;
  1595. break;
  1596. case 4:
  1597. *(u32 *)p = *(u32 *)q;
  1598. break;
  1599. case 8:
  1600. *(u64 *)p = *(u64 *)q;
  1601. break;
  1602. default:
  1603. for ( ; n < size; ++n) {
  1604. *p++ = *q++;
  1605. sync();
  1606. }
  1607. }
  1608. sync();
  1609. /* wait a little while to see if we get a machine check */
  1610. __delay(200);
  1611. n = size;
  1612. } else {
  1613. printf("*** Error writing address "REG"\n", adrs + n);
  1614. }
  1615. catch_memory_errors = 0;
  1616. return n;
  1617. }
  1618. static int fault_type;
  1619. static int fault_except;
  1620. static char *fault_chars[] = { "--", "**", "##" };
  1621. static int handle_fault(struct pt_regs *regs)
  1622. {
  1623. fault_except = TRAP(regs);
  1624. switch (TRAP(regs)) {
  1625. case 0x200:
  1626. fault_type = 0;
  1627. break;
  1628. case 0x300:
  1629. case 0x380:
  1630. fault_type = 1;
  1631. break;
  1632. default:
  1633. fault_type = 2;
  1634. }
  1635. longjmp(bus_error_jmp, 1);
  1636. return 0;
  1637. }
  1638. #define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t))
  1639. static void
  1640. byterev(unsigned char *val, int size)
  1641. {
  1642. int t;
  1643. switch (size) {
  1644. case 2:
  1645. SWAP(val[0], val[1], t);
  1646. break;
  1647. case 4:
  1648. SWAP(val[0], val[3], t);
  1649. SWAP(val[1], val[2], t);
  1650. break;
  1651. case 8: /* is there really any use for this? */
  1652. SWAP(val[0], val[7], t);
  1653. SWAP(val[1], val[6], t);
  1654. SWAP(val[2], val[5], t);
  1655. SWAP(val[3], val[4], t);
  1656. break;
  1657. }
  1658. }
  1659. static int brev;
  1660. static int mnoread;
  1661. static char *memex_help_string =
  1662. "Memory examine command usage:\n"
  1663. "m [addr] [flags] examine/change memory\n"
  1664. " addr is optional. will start where left off.\n"
  1665. " flags may include chars from this set:\n"
  1666. " b modify by bytes (default)\n"
  1667. " w modify by words (2 byte)\n"
  1668. " l modify by longs (4 byte)\n"
  1669. " d modify by doubleword (8 byte)\n"
  1670. " r toggle reverse byte order mode\n"
  1671. " n do not read memory (for i/o spaces)\n"
  1672. " . ok to read (default)\n"
  1673. "NOTE: flags are saved as defaults\n"
  1674. "";
  1675. static char *memex_subcmd_help_string =
  1676. "Memory examine subcommands:\n"
  1677. " hexval write this val to current location\n"
  1678. " 'string' write chars from string to this location\n"
  1679. " ' increment address\n"
  1680. " ^ decrement address\n"
  1681. " / increment addr by 0x10. //=0x100, ///=0x1000, etc\n"
  1682. " \\ decrement addr by 0x10. \\\\=0x100, \\\\\\=0x1000, etc\n"
  1683. " ` clear no-read flag\n"
  1684. " ; stay at this addr\n"
  1685. " v change to byte mode\n"
  1686. " w change to word (2 byte) mode\n"
  1687. " l change to long (4 byte) mode\n"
  1688. " u change to doubleword (8 byte) mode\n"
  1689. " m addr change current addr\n"
  1690. " n toggle no-read flag\n"
  1691. " r toggle byte reverse flag\n"
  1692. " < count back up count bytes\n"
  1693. " > count skip forward count bytes\n"
  1694. " x exit this mode\n"
  1695. "";
  1696. static void
  1697. memex(void)
  1698. {
  1699. int cmd, inc, i, nslash;
  1700. unsigned long n;
  1701. unsigned char val[16];
  1702. scanhex((void *)&adrs);
  1703. cmd = skipbl();
  1704. if (cmd == '?') {
  1705. printf(memex_help_string);
  1706. return;
  1707. } else {
  1708. termch = cmd;
  1709. }
  1710. last_cmd = "m\n";
  1711. while ((cmd = skipbl()) != '\n') {
  1712. switch( cmd ){
  1713. case 'b': size = 1; break;
  1714. case 'w': size = 2; break;
  1715. case 'l': size = 4; break;
  1716. case 'd': size = 8; break;
  1717. case 'r': brev = !brev; break;
  1718. case 'n': mnoread = 1; break;
  1719. case '.': mnoread = 0; break;
  1720. }
  1721. }
  1722. if( size <= 0 )
  1723. size = 1;
  1724. else if( size > 8 )
  1725. size = 8;
  1726. for(;;){
  1727. if (!mnoread)
  1728. n = mread(adrs, val, size);
  1729. printf(REG"%c", adrs, brev? 'r': ' ');
  1730. if (!mnoread) {
  1731. if (brev)
  1732. byterev(val, size);
  1733. putchar(' ');
  1734. for (i = 0; i < n; ++i)
  1735. printf("%.2x", val[i]);
  1736. for (; i < size; ++i)
  1737. printf("%s", fault_chars[fault_type]);
  1738. }
  1739. putchar(' ');
  1740. inc = size;
  1741. nslash = 0;
  1742. for(;;){
  1743. if( scanhex(&n) ){
  1744. for (i = 0; i < size; ++i)
  1745. val[i] = n >> (i * 8);
  1746. if (!brev)
  1747. byterev(val, size);
  1748. mwrite(adrs, val, size);
  1749. inc = size;
  1750. }
  1751. cmd = skipbl();
  1752. if (cmd == '\n')
  1753. break;
  1754. inc = 0;
  1755. switch (cmd) {
  1756. case '\'':
  1757. for(;;){
  1758. n = inchar();
  1759. if( n == '\\' )
  1760. n = bsesc();
  1761. else if( n == '\'' )
  1762. break;
  1763. for (i = 0; i < size; ++i)
  1764. val[i] = n >> (i * 8);
  1765. if (!brev)
  1766. byterev(val, size);
  1767. mwrite(adrs, val, size);
  1768. adrs += size;
  1769. }
  1770. adrs -= size;
  1771. inc = size;
  1772. break;
  1773. case ',':
  1774. adrs += size;
  1775. break;
  1776. case '.':
  1777. mnoread = 0;
  1778. break;
  1779. case ';':
  1780. break;
  1781. case 'x':
  1782. case EOF:
  1783. scannl();
  1784. return;
  1785. case 'b':
  1786. case 'v':
  1787. size = 1;
  1788. break;
  1789. case 'w':
  1790. size = 2;
  1791. break;
  1792. case 'l':
  1793. size = 4;
  1794. break;
  1795. case 'u':
  1796. size = 8;
  1797. break;
  1798. case '^':
  1799. adrs -= size;
  1800. break;
  1801. case '/':
  1802. if (nslash > 0)
  1803. adrs -= 1 << nslash;
  1804. else
  1805. nslash = 0;
  1806. nslash += 4;
  1807. adrs += 1 << nslash;
  1808. break;
  1809. case '\\':
  1810. if (nslash < 0)
  1811. adrs += 1 << -nslash;
  1812. else
  1813. nslash = 0;
  1814. nslash -= 4;
  1815. adrs -= 1 << -nslash;
  1816. break;
  1817. case 'm':
  1818. scanhex((void *)&adrs);
  1819. break;
  1820. case 'n':
  1821. mnoread = 1;
  1822. break;
  1823. case 'r':
  1824. brev = !brev;
  1825. break;
  1826. case '<':
  1827. n = size;
  1828. scanhex(&n);
  1829. adrs -= n;
  1830. break;
  1831. case '>':
  1832. n = size;
  1833. scanhex(&n);
  1834. adrs += n;
  1835. break;
  1836. case '?':
  1837. printf(memex_subcmd_help_string);
  1838. break;
  1839. }
  1840. }
  1841. adrs += inc;
  1842. }
  1843. }
  1844. static int
  1845. bsesc(void)
  1846. {
  1847. int c;
  1848. c = inchar();
  1849. switch( c ){
  1850. case 'n': c = '\n'; break;
  1851. case 'r': c = '\r'; break;
  1852. case 'b': c = '\b'; break;
  1853. case 't': c = '\t'; break;
  1854. }
  1855. return c;
  1856. }
  1857. static void xmon_rawdump (unsigned long adrs, long ndump)
  1858. {
  1859. long n, m, r, nr;
  1860. unsigned char temp[16];
  1861. for (n = ndump; n > 0;) {
  1862. r = n < 16? n: 16;
  1863. nr = mread(adrs, temp, r);
  1864. adrs += nr;
  1865. for (m = 0; m < r; ++m) {
  1866. if (m < nr)
  1867. printf("%.2x", temp[m]);
  1868. else
  1869. printf("%s", fault_chars[fault_type]);
  1870. }
  1871. n -= r;
  1872. if (nr < r)
  1873. break;
  1874. }
  1875. printf("\n");
  1876. }
  1877. #ifdef CONFIG_PPC64
  1878. static void dump_one_paca(int cpu)
  1879. {
  1880. struct paca_struct *p;
  1881. if (setjmp(bus_error_jmp) != 0) {
  1882. printf("*** Error dumping paca for cpu 0x%x!\n", cpu);
  1883. return;
  1884. }
  1885. catch_memory_errors = 1;
  1886. sync();
  1887. p = &paca[cpu];
  1888. printf("paca for cpu 0x%x @ %p:\n", cpu, p);
  1889. printf(" %-*s = %s\n", 16, "possible", cpu_possible(cpu) ? "yes" : "no");
  1890. printf(" %-*s = %s\n", 16, "present", cpu_present(cpu) ? "yes" : "no");
  1891. printf(" %-*s = %s\n", 16, "online", cpu_online(cpu) ? "yes" : "no");
  1892. #define DUMP(paca, name, format) \
  1893. printf(" %-*s = %#-*"format"\t(0x%lx)\n", 16, #name, 18, paca->name, \
  1894. offsetof(struct paca_struct, name));
  1895. DUMP(p, lock_token, "x");
  1896. DUMP(p, paca_index, "x");
  1897. DUMP(p, kernel_toc, "lx");
  1898. DUMP(p, kernelbase, "lx");
  1899. DUMP(p, kernel_msr, "lx");
  1900. DUMP(p, emergency_sp, "p");
  1901. #ifdef CONFIG_PPC_BOOK3S_64
  1902. DUMP(p, mc_emergency_sp, "p");
  1903. DUMP(p, in_mce, "x");
  1904. #endif
  1905. DUMP(p, data_offset, "lx");
  1906. DUMP(p, hw_cpu_id, "x");
  1907. DUMP(p, cpu_start, "x");
  1908. DUMP(p, kexec_state, "x");
  1909. DUMP(p, __current, "p");
  1910. DUMP(p, kstack, "lx");
  1911. DUMP(p, stab_rr, "lx");
  1912. DUMP(p, saved_r1, "lx");
  1913. DUMP(p, trap_save, "x");
  1914. DUMP(p, soft_enabled, "x");
  1915. DUMP(p, irq_happened, "x");
  1916. DUMP(p, io_sync, "x");
  1917. DUMP(p, irq_work_pending, "x");
  1918. DUMP(p, nap_state_lost, "x");
  1919. #undef DUMP
  1920. catch_memory_errors = 0;
  1921. sync();
  1922. }
  1923. static void dump_all_pacas(void)
  1924. {
  1925. int cpu;
  1926. if (num_possible_cpus() == 0) {
  1927. printf("No possible cpus, use 'dp #' to dump individual cpus\n");
  1928. return;
  1929. }
  1930. for_each_possible_cpu(cpu)
  1931. dump_one_paca(cpu);
  1932. }
  1933. static void dump_pacas(void)
  1934. {
  1935. unsigned long num;
  1936. int c;
  1937. c = inchar();
  1938. if (c == 'a') {
  1939. dump_all_pacas();
  1940. return;
  1941. }
  1942. termch = c; /* Put c back, it wasn't 'a' */
  1943. if (scanhex(&num))
  1944. dump_one_paca(num);
  1945. else
  1946. dump_one_paca(xmon_owner);
  1947. }
  1948. #endif
  1949. static void
  1950. dump(void)
  1951. {
  1952. int c;
  1953. c = inchar();
  1954. #ifdef CONFIG_PPC64
  1955. if (c == 'p') {
  1956. dump_pacas();
  1957. return;
  1958. }
  1959. #endif
  1960. if ((isxdigit(c) && c != 'f' && c != 'd') || c == '\n')
  1961. termch = c;
  1962. scanhex((void *)&adrs);
  1963. if (termch != '\n')
  1964. termch = 0;
  1965. if (c == 'i') {
  1966. scanhex(&nidump);
  1967. if (nidump == 0)
  1968. nidump = 16;
  1969. else if (nidump > MAX_DUMP)
  1970. nidump = MAX_DUMP;
  1971. adrs += ppc_inst_dump(adrs, nidump, 1);
  1972. last_cmd = "di\n";
  1973. } else if (c == 'l') {
  1974. dump_log_buf();
  1975. } else if (c == 'r') {
  1976. scanhex(&ndump);
  1977. if (ndump == 0)
  1978. ndump = 64;
  1979. xmon_rawdump(adrs, ndump);
  1980. adrs += ndump;
  1981. last_cmd = "dr\n";
  1982. } else {
  1983. scanhex(&ndump);
  1984. if (ndump == 0)
  1985. ndump = 64;
  1986. else if (ndump > MAX_DUMP)
  1987. ndump = MAX_DUMP;
  1988. prdump(adrs, ndump);
  1989. adrs += ndump;
  1990. last_cmd = "d\n";
  1991. }
  1992. }
  1993. static void
  1994. prdump(unsigned long adrs, long ndump)
  1995. {
  1996. long n, m, c, r, nr;
  1997. unsigned char temp[16];
  1998. for (n = ndump; n > 0;) {
  1999. printf(REG, adrs);
  2000. putchar(' ');
  2001. r = n < 16? n: 16;
  2002. nr = mread(adrs, temp, r);
  2003. adrs += nr;
  2004. for (m = 0; m < r; ++m) {
  2005. if ((m & (sizeof(long) - 1)) == 0 && m > 0)
  2006. putchar(' ');
  2007. if (m < nr)
  2008. printf("%.2x", temp[m]);
  2009. else
  2010. printf("%s", fault_chars[fault_type]);
  2011. }
  2012. for (; m < 16; ++m) {
  2013. if ((m & (sizeof(long) - 1)) == 0)
  2014. putchar(' ');
  2015. printf(" ");
  2016. }
  2017. printf(" |");
  2018. for (m = 0; m < r; ++m) {
  2019. if (m < nr) {
  2020. c = temp[m];
  2021. putchar(' ' <= c && c <= '~'? c: '.');
  2022. } else
  2023. putchar(' ');
  2024. }
  2025. n -= r;
  2026. for (; m < 16; ++m)
  2027. putchar(' ');
  2028. printf("|\n");
  2029. if (nr < r)
  2030. break;
  2031. }
  2032. }
  2033. typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr);
  2034. static int
  2035. generic_inst_dump(unsigned long adr, long count, int praddr,
  2036. instruction_dump_func dump_func)
  2037. {
  2038. int nr, dotted;
  2039. unsigned long first_adr;
  2040. unsigned long inst, last_inst = 0;
  2041. unsigned char val[4];
  2042. dotted = 0;
  2043. for (first_adr = adr; count > 0; --count, adr += 4) {
  2044. nr = mread(adr, val, 4);
  2045. if (nr == 0) {
  2046. if (praddr) {
  2047. const char *x = fault_chars[fault_type];
  2048. printf(REG" %s%s%s%s\n", adr, x, x, x, x);
  2049. }
  2050. break;
  2051. }
  2052. inst = GETWORD(val);
  2053. if (adr > first_adr && inst == last_inst) {
  2054. if (!dotted) {
  2055. printf(" ...\n");
  2056. dotted = 1;
  2057. }
  2058. continue;
  2059. }
  2060. dotted = 0;
  2061. last_inst = inst;
  2062. if (praddr)
  2063. printf(REG" %.8x", adr, inst);
  2064. printf("\t");
  2065. dump_func(inst, adr);
  2066. printf("\n");
  2067. }
  2068. return adr - first_adr;
  2069. }
  2070. static int
  2071. ppc_inst_dump(unsigned long adr, long count, int praddr)
  2072. {
  2073. return generic_inst_dump(adr, count, praddr, print_insn_powerpc);
  2074. }
  2075. void
  2076. print_address(unsigned long addr)
  2077. {
  2078. xmon_print_symbol(addr, "\t# ", "");
  2079. }
  2080. void
  2081. dump_log_buf(void)
  2082. {
  2083. struct kmsg_dumper dumper = { .active = 1 };
  2084. unsigned char buf[128];
  2085. size_t len;
  2086. if (setjmp(bus_error_jmp) != 0) {
  2087. printf("Error dumping printk buffer!\n");
  2088. return;
  2089. }
  2090. catch_memory_errors = 1;
  2091. sync();
  2092. kmsg_dump_rewind_nolock(&dumper);
  2093. while (kmsg_dump_get_line_nolock(&dumper, false, buf, sizeof(buf), &len)) {
  2094. buf[len] = '\0';
  2095. printf("%s", buf);
  2096. }
  2097. sync();
  2098. /* wait a little while to see if we get a machine check */
  2099. __delay(200);
  2100. catch_memory_errors = 0;
  2101. }
  2102. /*
  2103. * Memory operations - move, set, print differences
  2104. */
  2105. static unsigned long mdest; /* destination address */
  2106. static unsigned long msrc; /* source address */
  2107. static unsigned long mval; /* byte value to set memory to */
  2108. static unsigned long mcount; /* # bytes to affect */
  2109. static unsigned long mdiffs; /* max # differences to print */
  2110. static void
  2111. memops(int cmd)
  2112. {
  2113. scanhex((void *)&mdest);
  2114. if( termch != '\n' )
  2115. termch = 0;
  2116. scanhex((void *)(cmd == 's'? &mval: &msrc));
  2117. if( termch != '\n' )
  2118. termch = 0;
  2119. scanhex((void *)&mcount);
  2120. switch( cmd ){
  2121. case 'm':
  2122. memmove((void *)mdest, (void *)msrc, mcount);
  2123. break;
  2124. case 's':
  2125. memset((void *)mdest, mval, mcount);
  2126. break;
  2127. case 'd':
  2128. if( termch != '\n' )
  2129. termch = 0;
  2130. scanhex((void *)&mdiffs);
  2131. memdiffs((unsigned char *)mdest, (unsigned char *)msrc, mcount, mdiffs);
  2132. break;
  2133. }
  2134. }
  2135. static void
  2136. memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr)
  2137. {
  2138. unsigned n, prt;
  2139. prt = 0;
  2140. for( n = nb; n > 0; --n )
  2141. if( *p1++ != *p2++ )
  2142. if( ++prt <= maxpr )
  2143. printf("%.16x %.2x # %.16x %.2x\n", p1 - 1,
  2144. p1[-1], p2 - 1, p2[-1]);
  2145. if( prt > maxpr )
  2146. printf("Total of %d differences\n", prt);
  2147. }
  2148. static unsigned mend;
  2149. static unsigned mask;
  2150. static void
  2151. memlocate(void)
  2152. {
  2153. unsigned a, n;
  2154. unsigned char val[4];
  2155. last_cmd = "ml";
  2156. scanhex((void *)&mdest);
  2157. if (termch != '\n') {
  2158. termch = 0;
  2159. scanhex((void *)&mend);
  2160. if (termch != '\n') {
  2161. termch = 0;
  2162. scanhex((void *)&mval);
  2163. mask = ~0;
  2164. if (termch != '\n') termch = 0;
  2165. scanhex((void *)&mask);
  2166. }
  2167. }
  2168. n = 0;
  2169. for (a = mdest; a < mend; a += 4) {
  2170. if (mread(a, val, 4) == 4
  2171. && ((GETWORD(val) ^ mval) & mask) == 0) {
  2172. printf("%.16x: %.16x\n", a, GETWORD(val));
  2173. if (++n >= 10)
  2174. break;
  2175. }
  2176. }
  2177. }
  2178. static unsigned long mskip = 0x1000;
  2179. static unsigned long mlim = 0xffffffff;
  2180. static void
  2181. memzcan(void)
  2182. {
  2183. unsigned char v;
  2184. unsigned a;
  2185. int ok, ook;
  2186. scanhex(&mdest);
  2187. if (termch != '\n') termch = 0;
  2188. scanhex(&mskip);
  2189. if (termch != '\n') termch = 0;
  2190. scanhex(&mlim);
  2191. ook = 0;
  2192. for (a = mdest; a < mlim; a += mskip) {
  2193. ok = mread(a, &v, 1);
  2194. if (ok && !ook) {
  2195. printf("%.8x .. ", a);
  2196. } else if (!ok && ook)
  2197. printf("%.8x\n", a - mskip);
  2198. ook = ok;
  2199. if (a + mskip < a)
  2200. break;
  2201. }
  2202. if (ook)
  2203. printf("%.8x\n", a - mskip);
  2204. }
  2205. static void proccall(void)
  2206. {
  2207. unsigned long args[8];
  2208. unsigned long ret;
  2209. int i;
  2210. typedef unsigned long (*callfunc_t)(unsigned long, unsigned long,
  2211. unsigned long, unsigned long, unsigned long,
  2212. unsigned long, unsigned long, unsigned long);
  2213. callfunc_t func;
  2214. if (!scanhex(&adrs))
  2215. return;
  2216. if (termch != '\n')
  2217. termch = 0;
  2218. for (i = 0; i < 8; ++i)
  2219. args[i] = 0;
  2220. for (i = 0; i < 8; ++i) {
  2221. if (!scanhex(&args[i]) || termch == '\n')
  2222. break;
  2223. termch = 0;
  2224. }
  2225. func = (callfunc_t) adrs;
  2226. ret = 0;
  2227. if (setjmp(bus_error_jmp) == 0) {
  2228. catch_memory_errors = 1;
  2229. sync();
  2230. ret = func(args[0], args[1], args[2], args[3],
  2231. args[4], args[5], args[6], args[7]);
  2232. sync();
  2233. printf("return value is 0x%lx\n", ret);
  2234. } else {
  2235. printf("*** %x exception occurred\n", fault_except);
  2236. }
  2237. catch_memory_errors = 0;
  2238. }
  2239. /* Input scanning routines */
  2240. int
  2241. skipbl(void)
  2242. {
  2243. int c;
  2244. if( termch != 0 ){
  2245. c = termch;
  2246. termch = 0;
  2247. } else
  2248. c = inchar();
  2249. while( c == ' ' || c == '\t' )
  2250. c = inchar();
  2251. return c;
  2252. }
  2253. #define N_PTREGS 44
  2254. static char *regnames[N_PTREGS] = {
  2255. "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
  2256. "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
  2257. "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
  2258. "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
  2259. "pc", "msr", "or3", "ctr", "lr", "xer", "ccr",
  2260. #ifdef CONFIG_PPC64
  2261. "softe",
  2262. #else
  2263. "mq",
  2264. #endif
  2265. "trap", "dar", "dsisr", "res"
  2266. };
  2267. int
  2268. scanhex(unsigned long *vp)
  2269. {
  2270. int c, d;
  2271. unsigned long v;
  2272. c = skipbl();
  2273. if (c == '%') {
  2274. /* parse register name */
  2275. char regname[8];
  2276. int i;
  2277. for (i = 0; i < sizeof(regname) - 1; ++i) {
  2278. c = inchar();
  2279. if (!isalnum(c)) {
  2280. termch = c;
  2281. break;
  2282. }
  2283. regname[i] = c;
  2284. }
  2285. regname[i] = 0;
  2286. for (i = 0; i < N_PTREGS; ++i) {
  2287. if (strcmp(regnames[i], regname) == 0) {
  2288. if (xmon_regs == NULL) {
  2289. printf("regs not available\n");
  2290. return 0;
  2291. }
  2292. *vp = ((unsigned long *)xmon_regs)[i];
  2293. return 1;
  2294. }
  2295. }
  2296. printf("invalid register name '%%%s'\n", regname);
  2297. return 0;
  2298. }
  2299. /* skip leading "0x" if any */
  2300. if (c == '0') {
  2301. c = inchar();
  2302. if (c == 'x') {
  2303. c = inchar();
  2304. } else {
  2305. d = hexdigit(c);
  2306. if (d == EOF) {
  2307. termch = c;
  2308. *vp = 0;
  2309. return 1;
  2310. }
  2311. }
  2312. } else if (c == '$') {
  2313. int i;
  2314. for (i=0; i<63; i++) {
  2315. c = inchar();
  2316. if (isspace(c) || c == '\0') {
  2317. termch = c;
  2318. break;
  2319. }
  2320. tmpstr[i] = c;
  2321. }
  2322. tmpstr[i++] = 0;
  2323. *vp = 0;
  2324. if (setjmp(bus_error_jmp) == 0) {
  2325. catch_memory_errors = 1;
  2326. sync();
  2327. *vp = kallsyms_lookup_name(tmpstr);
  2328. sync();
  2329. }
  2330. catch_memory_errors = 0;
  2331. if (!(*vp)) {
  2332. printf("unknown symbol '%s'\n", tmpstr);
  2333. return 0;
  2334. }
  2335. return 1;
  2336. }
  2337. d = hexdigit(c);
  2338. if (d == EOF) {
  2339. termch = c;
  2340. return 0;
  2341. }
  2342. v = 0;
  2343. do {
  2344. v = (v << 4) + d;
  2345. c = inchar();
  2346. d = hexdigit(c);
  2347. } while (d != EOF);
  2348. termch = c;
  2349. *vp = v;
  2350. return 1;
  2351. }
  2352. static void
  2353. scannl(void)
  2354. {
  2355. int c;
  2356. c = termch;
  2357. termch = 0;
  2358. while( c != '\n' )
  2359. c = inchar();
  2360. }
  2361. static int hexdigit(int c)
  2362. {
  2363. if( '0' <= c && c <= '9' )
  2364. return c - '0';
  2365. if( 'A' <= c && c <= 'F' )
  2366. return c - ('A' - 10);
  2367. if( 'a' <= c && c <= 'f' )
  2368. return c - ('a' - 10);
  2369. return EOF;
  2370. }
  2371. void
  2372. getstring(char *s, int size)
  2373. {
  2374. int c;
  2375. c = skipbl();
  2376. do {
  2377. if( size > 1 ){
  2378. *s++ = c;
  2379. --size;
  2380. }
  2381. c = inchar();
  2382. } while( c != ' ' && c != '\t' && c != '\n' );
  2383. termch = c;
  2384. *s = 0;
  2385. }
  2386. static char line[256];
  2387. static char *lineptr;
  2388. static void
  2389. flush_input(void)
  2390. {
  2391. lineptr = NULL;
  2392. }
  2393. static int
  2394. inchar(void)
  2395. {
  2396. if (lineptr == NULL || *lineptr == 0) {
  2397. if (xmon_gets(line, sizeof(line)) == NULL) {
  2398. lineptr = NULL;
  2399. return EOF;
  2400. }
  2401. lineptr = line;
  2402. }
  2403. return *lineptr++;
  2404. }
  2405. static void
  2406. take_input(char *str)
  2407. {
  2408. lineptr = str;
  2409. }
  2410. static void
  2411. symbol_lookup(void)
  2412. {
  2413. int type = inchar();
  2414. unsigned long addr;
  2415. static char tmp[64];
  2416. switch (type) {
  2417. case 'a':
  2418. if (scanhex(&addr))
  2419. xmon_print_symbol(addr, ": ", "\n");
  2420. termch = 0;
  2421. break;
  2422. case 's':
  2423. getstring(tmp, 64);
  2424. if (setjmp(bus_error_jmp) == 0) {
  2425. catch_memory_errors = 1;
  2426. sync();
  2427. addr = kallsyms_lookup_name(tmp);
  2428. if (addr)
  2429. printf("%s: %lx\n", tmp, addr);
  2430. else
  2431. printf("Symbol '%s' not found.\n", tmp);
  2432. sync();
  2433. }
  2434. catch_memory_errors = 0;
  2435. termch = 0;
  2436. break;
  2437. }
  2438. }
  2439. /* Print an address in numeric and symbolic form (if possible) */
  2440. static void xmon_print_symbol(unsigned long address, const char *mid,
  2441. const char *after)
  2442. {
  2443. char *modname;
  2444. const char *name = NULL;
  2445. unsigned long offset, size;
  2446. printf(REG, address);
  2447. if (setjmp(bus_error_jmp) == 0) {
  2448. catch_memory_errors = 1;
  2449. sync();
  2450. name = kallsyms_lookup(address, &size, &offset, &modname,
  2451. tmpstr);
  2452. sync();
  2453. /* wait a little while to see if we get a machine check */
  2454. __delay(200);
  2455. }
  2456. catch_memory_errors = 0;
  2457. if (name) {
  2458. printf("%s%s+%#lx/%#lx", mid, name, offset, size);
  2459. if (modname)
  2460. printf(" [%s]", modname);
  2461. }
  2462. printf("%s", after);
  2463. }
  2464. #ifdef CONFIG_PPC_BOOK3S_64
  2465. void dump_segments(void)
  2466. {
  2467. int i;
  2468. unsigned long esid,vsid;
  2469. unsigned long llp;
  2470. printf("SLB contents of cpu 0x%x\n", smp_processor_id());
  2471. for (i = 0; i < mmu_slb_size; i++) {
  2472. asm volatile("slbmfee %0,%1" : "=r" (esid) : "r" (i));
  2473. asm volatile("slbmfev %0,%1" : "=r" (vsid) : "r" (i));
  2474. if (esid || vsid) {
  2475. printf("%02d %016lx %016lx", i, esid, vsid);
  2476. if (esid & SLB_ESID_V) {
  2477. llp = vsid & SLB_VSID_LLP;
  2478. if (vsid & SLB_VSID_B_1T) {
  2479. printf(" 1T ESID=%9lx VSID=%13lx LLP:%3lx \n",
  2480. GET_ESID_1T(esid),
  2481. (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T,
  2482. llp);
  2483. } else {
  2484. printf(" 256M ESID=%9lx VSID=%13lx LLP:%3lx \n",
  2485. GET_ESID(esid),
  2486. (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT,
  2487. llp);
  2488. }
  2489. } else
  2490. printf("\n");
  2491. }
  2492. }
  2493. }
  2494. #endif
  2495. #ifdef CONFIG_PPC_STD_MMU_32
  2496. void dump_segments(void)
  2497. {
  2498. int i;
  2499. printf("sr0-15 =");
  2500. for (i = 0; i < 16; ++i)
  2501. printf(" %x", mfsrin(i));
  2502. printf("\n");
  2503. }
  2504. #endif
  2505. #ifdef CONFIG_44x
  2506. static void dump_tlb_44x(void)
  2507. {
  2508. int i;
  2509. for (i = 0; i < PPC44x_TLB_SIZE; i++) {
  2510. unsigned long w0,w1,w2;
  2511. asm volatile("tlbre %0,%1,0" : "=r" (w0) : "r" (i));
  2512. asm volatile("tlbre %0,%1,1" : "=r" (w1) : "r" (i));
  2513. asm volatile("tlbre %0,%1,2" : "=r" (w2) : "r" (i));
  2514. printf("[%02x] %08x %08x %08x ", i, w0, w1, w2);
  2515. if (w0 & PPC44x_TLB_VALID) {
  2516. printf("V %08x -> %01x%08x %c%c%c%c%c",
  2517. w0 & PPC44x_TLB_EPN_MASK,
  2518. w1 & PPC44x_TLB_ERPN_MASK,
  2519. w1 & PPC44x_TLB_RPN_MASK,
  2520. (w2 & PPC44x_TLB_W) ? 'W' : 'w',
  2521. (w2 & PPC44x_TLB_I) ? 'I' : 'i',
  2522. (w2 & PPC44x_TLB_M) ? 'M' : 'm',
  2523. (w2 & PPC44x_TLB_G) ? 'G' : 'g',
  2524. (w2 & PPC44x_TLB_E) ? 'E' : 'e');
  2525. }
  2526. printf("\n");
  2527. }
  2528. }
  2529. #endif /* CONFIG_44x */
  2530. #ifdef CONFIG_PPC_BOOK3E
  2531. static void dump_tlb_book3e(void)
  2532. {
  2533. u32 mmucfg, pidmask, lpidmask;
  2534. u64 ramask;
  2535. int i, tlb, ntlbs, pidsz, lpidsz, rasz, lrat = 0;
  2536. int mmu_version;
  2537. static const char *pgsz_names[] = {
  2538. " 1K",
  2539. " 2K",
  2540. " 4K",
  2541. " 8K",
  2542. " 16K",
  2543. " 32K",
  2544. " 64K",
  2545. "128K",
  2546. "256K",
  2547. "512K",
  2548. " 1M",
  2549. " 2M",
  2550. " 4M",
  2551. " 8M",
  2552. " 16M",
  2553. " 32M",
  2554. " 64M",
  2555. "128M",
  2556. "256M",
  2557. "512M",
  2558. " 1G",
  2559. " 2G",
  2560. " 4G",
  2561. " 8G",
  2562. " 16G",
  2563. " 32G",
  2564. " 64G",
  2565. "128G",
  2566. "256G",
  2567. "512G",
  2568. " 1T",
  2569. " 2T",
  2570. };
  2571. /* Gather some infos about the MMU */
  2572. mmucfg = mfspr(SPRN_MMUCFG);
  2573. mmu_version = (mmucfg & 3) + 1;
  2574. ntlbs = ((mmucfg >> 2) & 3) + 1;
  2575. pidsz = ((mmucfg >> 6) & 0x1f) + 1;
  2576. lpidsz = (mmucfg >> 24) & 0xf;
  2577. rasz = (mmucfg >> 16) & 0x7f;
  2578. if ((mmu_version > 1) && (mmucfg & 0x10000))
  2579. lrat = 1;
  2580. printf("Book3E MMU MAV=%d.0,%d TLBs,%d-bit PID,%d-bit LPID,%d-bit RA\n",
  2581. mmu_version, ntlbs, pidsz, lpidsz, rasz);
  2582. pidmask = (1ul << pidsz) - 1;
  2583. lpidmask = (1ul << lpidsz) - 1;
  2584. ramask = (1ull << rasz) - 1;
  2585. for (tlb = 0; tlb < ntlbs; tlb++) {
  2586. u32 tlbcfg;
  2587. int nent, assoc, new_cc = 1;
  2588. printf("TLB %d:\n------\n", tlb);
  2589. switch(tlb) {
  2590. case 0:
  2591. tlbcfg = mfspr(SPRN_TLB0CFG);
  2592. break;
  2593. case 1:
  2594. tlbcfg = mfspr(SPRN_TLB1CFG);
  2595. break;
  2596. case 2:
  2597. tlbcfg = mfspr(SPRN_TLB2CFG);
  2598. break;
  2599. case 3:
  2600. tlbcfg = mfspr(SPRN_TLB3CFG);
  2601. break;
  2602. default:
  2603. printf("Unsupported TLB number !\n");
  2604. continue;
  2605. }
  2606. nent = tlbcfg & 0xfff;
  2607. assoc = (tlbcfg >> 24) & 0xff;
  2608. for (i = 0; i < nent; i++) {
  2609. u32 mas0 = MAS0_TLBSEL(tlb);
  2610. u32 mas1 = MAS1_TSIZE(BOOK3E_PAGESZ_4K);
  2611. u64 mas2 = 0;
  2612. u64 mas7_mas3;
  2613. int esel = i, cc = i;
  2614. if (assoc != 0) {
  2615. cc = i / assoc;
  2616. esel = i % assoc;
  2617. mas2 = cc * 0x1000;
  2618. }
  2619. mas0 |= MAS0_ESEL(esel);
  2620. mtspr(SPRN_MAS0, mas0);
  2621. mtspr(SPRN_MAS1, mas1);
  2622. mtspr(SPRN_MAS2, mas2);
  2623. asm volatile("tlbre 0,0,0" : : : "memory");
  2624. mas1 = mfspr(SPRN_MAS1);
  2625. mas2 = mfspr(SPRN_MAS2);
  2626. mas7_mas3 = mfspr(SPRN_MAS7_MAS3);
  2627. if (assoc && (i % assoc) == 0)
  2628. new_cc = 1;
  2629. if (!(mas1 & MAS1_VALID))
  2630. continue;
  2631. if (assoc == 0)
  2632. printf("%04x- ", i);
  2633. else if (new_cc)
  2634. printf("%04x-%c", cc, 'A' + esel);
  2635. else
  2636. printf(" |%c", 'A' + esel);
  2637. new_cc = 0;
  2638. printf(" %016llx %04x %s %c%c AS%c",
  2639. mas2 & ~0x3ffull,
  2640. (mas1 >> 16) & 0x3fff,
  2641. pgsz_names[(mas1 >> 7) & 0x1f],
  2642. mas1 & MAS1_IND ? 'I' : ' ',
  2643. mas1 & MAS1_IPROT ? 'P' : ' ',
  2644. mas1 & MAS1_TS ? '1' : '0');
  2645. printf(" %c%c%c%c%c%c%c",
  2646. mas2 & MAS2_X0 ? 'a' : ' ',
  2647. mas2 & MAS2_X1 ? 'v' : ' ',
  2648. mas2 & MAS2_W ? 'w' : ' ',
  2649. mas2 & MAS2_I ? 'i' : ' ',
  2650. mas2 & MAS2_M ? 'm' : ' ',
  2651. mas2 & MAS2_G ? 'g' : ' ',
  2652. mas2 & MAS2_E ? 'e' : ' ');
  2653. printf(" %016llx", mas7_mas3 & ramask & ~0x7ffull);
  2654. if (mas1 & MAS1_IND)
  2655. printf(" %s\n",
  2656. pgsz_names[(mas7_mas3 >> 1) & 0x1f]);
  2657. else
  2658. printf(" U%c%c%c S%c%c%c\n",
  2659. mas7_mas3 & MAS3_UX ? 'x' : ' ',
  2660. mas7_mas3 & MAS3_UW ? 'w' : ' ',
  2661. mas7_mas3 & MAS3_UR ? 'r' : ' ',
  2662. mas7_mas3 & MAS3_SX ? 'x' : ' ',
  2663. mas7_mas3 & MAS3_SW ? 'w' : ' ',
  2664. mas7_mas3 & MAS3_SR ? 'r' : ' ');
  2665. }
  2666. }
  2667. }
  2668. #endif /* CONFIG_PPC_BOOK3E */
  2669. static void xmon_init(int enable)
  2670. {
  2671. if (enable) {
  2672. __debugger = xmon;
  2673. __debugger_ipi = xmon_ipi;
  2674. __debugger_bpt = xmon_bpt;
  2675. __debugger_sstep = xmon_sstep;
  2676. __debugger_iabr_match = xmon_iabr_match;
  2677. __debugger_break_match = xmon_break_match;
  2678. __debugger_fault_handler = xmon_fault_handler;
  2679. } else {
  2680. __debugger = NULL;
  2681. __debugger_ipi = NULL;
  2682. __debugger_bpt = NULL;
  2683. __debugger_sstep = NULL;
  2684. __debugger_iabr_match = NULL;
  2685. __debugger_break_match = NULL;
  2686. __debugger_fault_handler = NULL;
  2687. }
  2688. }
  2689. #ifdef CONFIG_MAGIC_SYSRQ
  2690. static void sysrq_handle_xmon(int key)
  2691. {
  2692. /* ensure xmon is enabled */
  2693. xmon_init(1);
  2694. debugger(get_irq_regs());
  2695. }
  2696. static struct sysrq_key_op sysrq_xmon_op = {
  2697. .handler = sysrq_handle_xmon,
  2698. .help_msg = "xmon(x)",
  2699. .action_msg = "Entering xmon",
  2700. };
  2701. static int __init setup_xmon_sysrq(void)
  2702. {
  2703. register_sysrq_key('x', &sysrq_xmon_op);
  2704. return 0;
  2705. }
  2706. __initcall(setup_xmon_sysrq);
  2707. #endif /* CONFIG_MAGIC_SYSRQ */
  2708. static int __initdata xmon_early, xmon_off;
  2709. static int __init early_parse_xmon(char *p)
  2710. {
  2711. if (!p || strncmp(p, "early", 5) == 0) {
  2712. /* just "xmon" is equivalent to "xmon=early" */
  2713. xmon_init(1);
  2714. xmon_early = 1;
  2715. } else if (strncmp(p, "on", 2) == 0)
  2716. xmon_init(1);
  2717. else if (strncmp(p, "off", 3) == 0)
  2718. xmon_off = 1;
  2719. else if (strncmp(p, "nobt", 4) == 0)
  2720. xmon_no_auto_backtrace = 1;
  2721. else
  2722. return 1;
  2723. return 0;
  2724. }
  2725. early_param("xmon", early_parse_xmon);
  2726. void __init xmon_setup(void)
  2727. {
  2728. #ifdef CONFIG_XMON_DEFAULT
  2729. if (!xmon_off)
  2730. xmon_init(1);
  2731. #endif
  2732. if (xmon_early)
  2733. debugger(NULL);
  2734. }
  2735. #ifdef CONFIG_SPU_BASE
  2736. struct spu_info {
  2737. struct spu *spu;
  2738. u64 saved_mfc_sr1_RW;
  2739. u32 saved_spu_runcntl_RW;
  2740. unsigned long dump_addr;
  2741. u8 stopped_ok;
  2742. };
  2743. #define XMON_NUM_SPUS 16 /* Enough for current hardware */
  2744. static struct spu_info spu_info[XMON_NUM_SPUS];
  2745. void xmon_register_spus(struct list_head *list)
  2746. {
  2747. struct spu *spu;
  2748. list_for_each_entry(spu, list, full_list) {
  2749. if (spu->number >= XMON_NUM_SPUS) {
  2750. WARN_ON(1);
  2751. continue;
  2752. }
  2753. spu_info[spu->number].spu = spu;
  2754. spu_info[spu->number].stopped_ok = 0;
  2755. spu_info[spu->number].dump_addr = (unsigned long)
  2756. spu_info[spu->number].spu->local_store;
  2757. }
  2758. }
  2759. static void stop_spus(void)
  2760. {
  2761. struct spu *spu;
  2762. int i;
  2763. u64 tmp;
  2764. for (i = 0; i < XMON_NUM_SPUS; i++) {
  2765. if (!spu_info[i].spu)
  2766. continue;
  2767. if (setjmp(bus_error_jmp) == 0) {
  2768. catch_memory_errors = 1;
  2769. sync();
  2770. spu = spu_info[i].spu;
  2771. spu_info[i].saved_spu_runcntl_RW =
  2772. in_be32(&spu->problem->spu_runcntl_RW);
  2773. tmp = spu_mfc_sr1_get(spu);
  2774. spu_info[i].saved_mfc_sr1_RW = tmp;
  2775. tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
  2776. spu_mfc_sr1_set(spu, tmp);
  2777. sync();
  2778. __delay(200);
  2779. spu_info[i].stopped_ok = 1;
  2780. printf("Stopped spu %.2d (was %s)\n", i,
  2781. spu_info[i].saved_spu_runcntl_RW ?
  2782. "running" : "stopped");
  2783. } else {
  2784. catch_memory_errors = 0;
  2785. printf("*** Error stopping spu %.2d\n", i);
  2786. }
  2787. catch_memory_errors = 0;
  2788. }
  2789. }
  2790. static void restart_spus(void)
  2791. {
  2792. struct spu *spu;
  2793. int i;
  2794. for (i = 0; i < XMON_NUM_SPUS; i++) {
  2795. if (!spu_info[i].spu)
  2796. continue;
  2797. if (!spu_info[i].stopped_ok) {
  2798. printf("*** Error, spu %d was not successfully stopped"
  2799. ", not restarting\n", i);
  2800. continue;
  2801. }
  2802. if (setjmp(bus_error_jmp) == 0) {
  2803. catch_memory_errors = 1;
  2804. sync();
  2805. spu = spu_info[i].spu;
  2806. spu_mfc_sr1_set(spu, spu_info[i].saved_mfc_sr1_RW);
  2807. out_be32(&spu->problem->spu_runcntl_RW,
  2808. spu_info[i].saved_spu_runcntl_RW);
  2809. sync();
  2810. __delay(200);
  2811. printf("Restarted spu %.2d\n", i);
  2812. } else {
  2813. catch_memory_errors = 0;
  2814. printf("*** Error restarting spu %.2d\n", i);
  2815. }
  2816. catch_memory_errors = 0;
  2817. }
  2818. }
  2819. #define DUMP_WIDTH 23
  2820. #define DUMP_VALUE(format, field, value) \
  2821. do { \
  2822. if (setjmp(bus_error_jmp) == 0) { \
  2823. catch_memory_errors = 1; \
  2824. sync(); \
  2825. printf(" %-*s = "format"\n", DUMP_WIDTH, \
  2826. #field, value); \
  2827. sync(); \
  2828. __delay(200); \
  2829. } else { \
  2830. catch_memory_errors = 0; \
  2831. printf(" %-*s = *** Error reading field.\n", \
  2832. DUMP_WIDTH, #field); \
  2833. } \
  2834. catch_memory_errors = 0; \
  2835. } while (0)
  2836. #define DUMP_FIELD(obj, format, field) \
  2837. DUMP_VALUE(format, field, obj->field)
  2838. static void dump_spu_fields(struct spu *spu)
  2839. {
  2840. printf("Dumping spu fields at address %p:\n", spu);
  2841. DUMP_FIELD(spu, "0x%x", number);
  2842. DUMP_FIELD(spu, "%s", name);
  2843. DUMP_FIELD(spu, "0x%lx", local_store_phys);
  2844. DUMP_FIELD(spu, "0x%p", local_store);
  2845. DUMP_FIELD(spu, "0x%lx", ls_size);
  2846. DUMP_FIELD(spu, "0x%x", node);
  2847. DUMP_FIELD(spu, "0x%lx", flags);
  2848. DUMP_FIELD(spu, "%d", class_0_pending);
  2849. DUMP_FIELD(spu, "0x%lx", class_0_dar);
  2850. DUMP_FIELD(spu, "0x%lx", class_1_dar);
  2851. DUMP_FIELD(spu, "0x%lx", class_1_dsisr);
  2852. DUMP_FIELD(spu, "0x%lx", irqs[0]);
  2853. DUMP_FIELD(spu, "0x%lx", irqs[1]);
  2854. DUMP_FIELD(spu, "0x%lx", irqs[2]);
  2855. DUMP_FIELD(spu, "0x%x", slb_replace);
  2856. DUMP_FIELD(spu, "%d", pid);
  2857. DUMP_FIELD(spu, "0x%p", mm);
  2858. DUMP_FIELD(spu, "0x%p", ctx);
  2859. DUMP_FIELD(spu, "0x%p", rq);
  2860. DUMP_FIELD(spu, "0x%p", timestamp);
  2861. DUMP_FIELD(spu, "0x%lx", problem_phys);
  2862. DUMP_FIELD(spu, "0x%p", problem);
  2863. DUMP_VALUE("0x%x", problem->spu_runcntl_RW,
  2864. in_be32(&spu->problem->spu_runcntl_RW));
  2865. DUMP_VALUE("0x%x", problem->spu_status_R,
  2866. in_be32(&spu->problem->spu_status_R));
  2867. DUMP_VALUE("0x%x", problem->spu_npc_RW,
  2868. in_be32(&spu->problem->spu_npc_RW));
  2869. DUMP_FIELD(spu, "0x%p", priv2);
  2870. DUMP_FIELD(spu, "0x%p", pdata);
  2871. }
  2872. int
  2873. spu_inst_dump(unsigned long adr, long count, int praddr)
  2874. {
  2875. return generic_inst_dump(adr, count, praddr, print_insn_spu);
  2876. }
  2877. static void dump_spu_ls(unsigned long num, int subcmd)
  2878. {
  2879. unsigned long offset, addr, ls_addr;
  2880. if (setjmp(bus_error_jmp) == 0) {
  2881. catch_memory_errors = 1;
  2882. sync();
  2883. ls_addr = (unsigned long)spu_info[num].spu->local_store;
  2884. sync();
  2885. __delay(200);
  2886. } else {
  2887. catch_memory_errors = 0;
  2888. printf("*** Error: accessing spu info for spu %d\n", num);
  2889. return;
  2890. }
  2891. catch_memory_errors = 0;
  2892. if (scanhex(&offset))
  2893. addr = ls_addr + offset;
  2894. else
  2895. addr = spu_info[num].dump_addr;
  2896. if (addr >= ls_addr + LS_SIZE) {
  2897. printf("*** Error: address outside of local store\n");
  2898. return;
  2899. }
  2900. switch (subcmd) {
  2901. case 'i':
  2902. addr += spu_inst_dump(addr, 16, 1);
  2903. last_cmd = "sdi\n";
  2904. break;
  2905. default:
  2906. prdump(addr, 64);
  2907. addr += 64;
  2908. last_cmd = "sd\n";
  2909. break;
  2910. }
  2911. spu_info[num].dump_addr = addr;
  2912. }
  2913. static int do_spu_cmd(void)
  2914. {
  2915. static unsigned long num = 0;
  2916. int cmd, subcmd = 0;
  2917. cmd = inchar();
  2918. switch (cmd) {
  2919. case 's':
  2920. stop_spus();
  2921. break;
  2922. case 'r':
  2923. restart_spus();
  2924. break;
  2925. case 'd':
  2926. subcmd = inchar();
  2927. if (isxdigit(subcmd) || subcmd == '\n')
  2928. termch = subcmd;
  2929. case 'f':
  2930. scanhex(&num);
  2931. if (num >= XMON_NUM_SPUS || !spu_info[num].spu) {
  2932. printf("*** Error: invalid spu number\n");
  2933. return 0;
  2934. }
  2935. switch (cmd) {
  2936. case 'f':
  2937. dump_spu_fields(spu_info[num].spu);
  2938. break;
  2939. default:
  2940. dump_spu_ls(num, subcmd);
  2941. break;
  2942. }
  2943. break;
  2944. default:
  2945. return -1;
  2946. }
  2947. return 0;
  2948. }
  2949. #else /* ! CONFIG_SPU_BASE */
  2950. static int do_spu_cmd(void)
  2951. {
  2952. return -1;
  2953. }
  2954. #endif