memcpy.S 4.7 KB

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  1. /*
  2. * Copyright (C) 2013 ARM Ltd.
  3. * Copyright (C) 2013 Linaro.
  4. *
  5. * This code is based on glibc cortex strings work originally authored by Linaro
  6. * and re-licensed under GPLv2 for the Linux kernel. The original code can
  7. * be found @
  8. *
  9. * http://bazaar.launchpad.net/~linaro-toolchain-dev/cortex-strings/trunk/
  10. * files/head:/src/aarch64/
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  23. */
  24. #include <linux/linkage.h>
  25. #include <asm/assembler.h>
  26. #include <asm/cache.h>
  27. /*
  28. * Copy a buffer from src to dest (alignment handled by the hardware)
  29. *
  30. * Parameters:
  31. * x0 - dest
  32. * x1 - src
  33. * x2 - n
  34. * Returns:
  35. * x0 - dest
  36. */
  37. dstin .req x0
  38. src .req x1
  39. count .req x2
  40. tmp1 .req x3
  41. tmp1w .req w3
  42. tmp2 .req x4
  43. tmp2w .req w4
  44. tmp3 .req x5
  45. tmp3w .req w5
  46. dst .req x6
  47. A_l .req x7
  48. A_h .req x8
  49. B_l .req x9
  50. B_h .req x10
  51. C_l .req x11
  52. C_h .req x12
  53. D_l .req x13
  54. D_h .req x14
  55. ENTRY(memcpy)
  56. mov dst, dstin
  57. cmp count, #16
  58. /*When memory length is less than 16, the accessed are not aligned.*/
  59. b.lo .Ltiny15
  60. neg tmp2, src
  61. ands tmp2, tmp2, #15/* Bytes to reach alignment. */
  62. b.eq .LSrcAligned
  63. sub count, count, tmp2
  64. /*
  65. * Copy the leading memory data from src to dst in an increasing
  66. * address order.By this way,the risk of overwritting the source
  67. * memory data is eliminated when the distance between src and
  68. * dst is less than 16. The memory accesses here are alignment.
  69. */
  70. tbz tmp2, #0, 1f
  71. ldrb tmp1w, [src], #1
  72. strb tmp1w, [dst], #1
  73. 1:
  74. tbz tmp2, #1, 2f
  75. ldrh tmp1w, [src], #2
  76. strh tmp1w, [dst], #2
  77. 2:
  78. tbz tmp2, #2, 3f
  79. ldr tmp1w, [src], #4
  80. str tmp1w, [dst], #4
  81. 3:
  82. tbz tmp2, #3, .LSrcAligned
  83. ldr tmp1, [src],#8
  84. str tmp1, [dst],#8
  85. .LSrcAligned:
  86. cmp count, #64
  87. b.ge .Lcpy_over64
  88. /*
  89. * Deal with small copies quickly by dropping straight into the
  90. * exit block.
  91. */
  92. .Ltail63:
  93. /*
  94. * Copy up to 48 bytes of data. At this point we only need the
  95. * bottom 6 bits of count to be accurate.
  96. */
  97. ands tmp1, count, #0x30
  98. b.eq .Ltiny15
  99. cmp tmp1w, #0x20
  100. b.eq 1f
  101. b.lt 2f
  102. ldp A_l, A_h, [src], #16
  103. stp A_l, A_h, [dst], #16
  104. 1:
  105. ldp A_l, A_h, [src], #16
  106. stp A_l, A_h, [dst], #16
  107. 2:
  108. ldp A_l, A_h, [src], #16
  109. stp A_l, A_h, [dst], #16
  110. .Ltiny15:
  111. /*
  112. * Prefer to break one ldp/stp into several load/store to access
  113. * memory in an increasing address order,rather than to load/store 16
  114. * bytes from (src-16) to (dst-16) and to backward the src to aligned
  115. * address,which way is used in original cortex memcpy. If keeping
  116. * the original memcpy process here, memmove need to satisfy the
  117. * precondition that src address is at least 16 bytes bigger than dst
  118. * address,otherwise some source data will be overwritten when memove
  119. * call memcpy directly. To make memmove simpler and decouple the
  120. * memcpy's dependency on memmove, withdrew the original process.
  121. */
  122. tbz count, #3, 1f
  123. ldr tmp1, [src], #8
  124. str tmp1, [dst], #8
  125. 1:
  126. tbz count, #2, 2f
  127. ldr tmp1w, [src], #4
  128. str tmp1w, [dst], #4
  129. 2:
  130. tbz count, #1, 3f
  131. ldrh tmp1w, [src], #2
  132. strh tmp1w, [dst], #2
  133. 3:
  134. tbz count, #0, .Lexitfunc
  135. ldrb tmp1w, [src]
  136. strb tmp1w, [dst]
  137. .Lexitfunc:
  138. ret
  139. .Lcpy_over64:
  140. subs count, count, #128
  141. b.ge .Lcpy_body_large
  142. /*
  143. * Less than 128 bytes to copy, so handle 64 here and then jump
  144. * to the tail.
  145. */
  146. ldp A_l, A_h, [src],#16
  147. stp A_l, A_h, [dst],#16
  148. ldp B_l, B_h, [src],#16
  149. ldp C_l, C_h, [src],#16
  150. stp B_l, B_h, [dst],#16
  151. stp C_l, C_h, [dst],#16
  152. ldp D_l, D_h, [src],#16
  153. stp D_l, D_h, [dst],#16
  154. tst count, #0x3f
  155. b.ne .Ltail63
  156. ret
  157. /*
  158. * Critical loop. Start at a new cache line boundary. Assuming
  159. * 64 bytes per line this ensures the entire loop is in one line.
  160. */
  161. .p2align L1_CACHE_SHIFT
  162. .Lcpy_body_large:
  163. /* pre-get 64 bytes data. */
  164. ldp A_l, A_h, [src],#16
  165. ldp B_l, B_h, [src],#16
  166. ldp C_l, C_h, [src],#16
  167. ldp D_l, D_h, [src],#16
  168. 1:
  169. /*
  170. * interlace the load of next 64 bytes data block with store of the last
  171. * loaded 64 bytes data.
  172. */
  173. stp A_l, A_h, [dst],#16
  174. ldp A_l, A_h, [src],#16
  175. stp B_l, B_h, [dst],#16
  176. ldp B_l, B_h, [src],#16
  177. stp C_l, C_h, [dst],#16
  178. ldp C_l, C_h, [src],#16
  179. stp D_l, D_h, [dst],#16
  180. ldp D_l, D_h, [src],#16
  181. subs count, count, #64
  182. b.ge 1b
  183. stp A_l, A_h, [dst],#16
  184. stp B_l, B_h, [dst],#16
  185. stp C_l, C_h, [dst],#16
  186. stp D_l, D_h, [dst],#16
  187. tst count, #0x3f
  188. b.ne .Ltail63
  189. ret
  190. ENDPROC(memcpy)