ptrace.c 29 KB

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  1. /*
  2. * Based on arch/arm/kernel/ptrace.c
  3. *
  4. * By Ross Biro 1/23/92
  5. * edited by Linus Torvalds
  6. * ARM modifications Copyright (C) 2000 Russell King
  7. * Copyright (C) 2012 ARM Ltd.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  20. */
  21. #include <linux/audit.h>
  22. #include <linux/compat.h>
  23. #include <linux/kernel.h>
  24. #include <linux/sched.h>
  25. #include <linux/mm.h>
  26. #include <linux/smp.h>
  27. #include <linux/ptrace.h>
  28. #include <linux/user.h>
  29. #include <linux/seccomp.h>
  30. #include <linux/security.h>
  31. #include <linux/init.h>
  32. #include <linux/signal.h>
  33. #include <linux/uaccess.h>
  34. #include <linux/perf_event.h>
  35. #include <linux/hw_breakpoint.h>
  36. #include <linux/regset.h>
  37. #include <linux/tracehook.h>
  38. #include <linux/elf.h>
  39. #include <asm/compat.h>
  40. #include <asm/debug-monitors.h>
  41. #include <asm/pgtable.h>
  42. #include <asm/syscall.h>
  43. #include <asm/traps.h>
  44. #include <asm/system_misc.h>
  45. #define CREATE_TRACE_POINTS
  46. #include <trace/events/syscalls.h>
  47. /*
  48. * TODO: does not yet catch signals sent when the child dies.
  49. * in exit.c or in signal.c.
  50. */
  51. /*
  52. * Called by kernel/ptrace.c when detaching..
  53. */
  54. void ptrace_disable(struct task_struct *child)
  55. {
  56. }
  57. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  58. /*
  59. * Handle hitting a HW-breakpoint.
  60. */
  61. static void ptrace_hbptriggered(struct perf_event *bp,
  62. struct perf_sample_data *data,
  63. struct pt_regs *regs)
  64. {
  65. struct arch_hw_breakpoint *bkpt = counter_arch_bp(bp);
  66. siginfo_t info = {
  67. .si_signo = SIGTRAP,
  68. .si_errno = 0,
  69. .si_code = TRAP_HWBKPT,
  70. .si_addr = (void __user *)(bkpt->trigger),
  71. };
  72. #ifdef CONFIG_COMPAT
  73. int i;
  74. if (!is_compat_task())
  75. goto send_sig;
  76. for (i = 0; i < ARM_MAX_BRP; ++i) {
  77. if (current->thread.debug.hbp_break[i] == bp) {
  78. info.si_errno = (i << 1) + 1;
  79. break;
  80. }
  81. }
  82. for (i = 0; i < ARM_MAX_WRP; ++i) {
  83. if (current->thread.debug.hbp_watch[i] == bp) {
  84. info.si_errno = -((i << 1) + 1);
  85. break;
  86. }
  87. }
  88. send_sig:
  89. #endif
  90. force_sig_info(SIGTRAP, &info, current);
  91. }
  92. /*
  93. * Unregister breakpoints from this task and reset the pointers in
  94. * the thread_struct.
  95. */
  96. void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
  97. {
  98. int i;
  99. struct thread_struct *t = &tsk->thread;
  100. for (i = 0; i < ARM_MAX_BRP; i++) {
  101. if (t->debug.hbp_break[i]) {
  102. unregister_hw_breakpoint(t->debug.hbp_break[i]);
  103. t->debug.hbp_break[i] = NULL;
  104. }
  105. }
  106. for (i = 0; i < ARM_MAX_WRP; i++) {
  107. if (t->debug.hbp_watch[i]) {
  108. unregister_hw_breakpoint(t->debug.hbp_watch[i]);
  109. t->debug.hbp_watch[i] = NULL;
  110. }
  111. }
  112. }
  113. void ptrace_hw_copy_thread(struct task_struct *tsk)
  114. {
  115. memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
  116. }
  117. static struct perf_event *ptrace_hbp_get_event(unsigned int note_type,
  118. struct task_struct *tsk,
  119. unsigned long idx)
  120. {
  121. struct perf_event *bp = ERR_PTR(-EINVAL);
  122. switch (note_type) {
  123. case NT_ARM_HW_BREAK:
  124. if (idx < ARM_MAX_BRP)
  125. bp = tsk->thread.debug.hbp_break[idx];
  126. break;
  127. case NT_ARM_HW_WATCH:
  128. if (idx < ARM_MAX_WRP)
  129. bp = tsk->thread.debug.hbp_watch[idx];
  130. break;
  131. }
  132. return bp;
  133. }
  134. static int ptrace_hbp_set_event(unsigned int note_type,
  135. struct task_struct *tsk,
  136. unsigned long idx,
  137. struct perf_event *bp)
  138. {
  139. int err = -EINVAL;
  140. switch (note_type) {
  141. case NT_ARM_HW_BREAK:
  142. if (idx < ARM_MAX_BRP) {
  143. tsk->thread.debug.hbp_break[idx] = bp;
  144. err = 0;
  145. }
  146. break;
  147. case NT_ARM_HW_WATCH:
  148. if (idx < ARM_MAX_WRP) {
  149. tsk->thread.debug.hbp_watch[idx] = bp;
  150. err = 0;
  151. }
  152. break;
  153. }
  154. return err;
  155. }
  156. static struct perf_event *ptrace_hbp_create(unsigned int note_type,
  157. struct task_struct *tsk,
  158. unsigned long idx)
  159. {
  160. struct perf_event *bp;
  161. struct perf_event_attr attr;
  162. int err, type;
  163. switch (note_type) {
  164. case NT_ARM_HW_BREAK:
  165. type = HW_BREAKPOINT_X;
  166. break;
  167. case NT_ARM_HW_WATCH:
  168. type = HW_BREAKPOINT_RW;
  169. break;
  170. default:
  171. return ERR_PTR(-EINVAL);
  172. }
  173. ptrace_breakpoint_init(&attr);
  174. /*
  175. * Initialise fields to sane defaults
  176. * (i.e. values that will pass validation).
  177. */
  178. attr.bp_addr = 0;
  179. attr.bp_len = HW_BREAKPOINT_LEN_4;
  180. attr.bp_type = type;
  181. attr.disabled = 1;
  182. bp = register_user_hw_breakpoint(&attr, ptrace_hbptriggered, NULL, tsk);
  183. if (IS_ERR(bp))
  184. return bp;
  185. err = ptrace_hbp_set_event(note_type, tsk, idx, bp);
  186. if (err)
  187. return ERR_PTR(err);
  188. return bp;
  189. }
  190. static int ptrace_hbp_fill_attr_ctrl(unsigned int note_type,
  191. struct arch_hw_breakpoint_ctrl ctrl,
  192. struct perf_event_attr *attr)
  193. {
  194. int err, len, type, disabled = !ctrl.enabled;
  195. attr->disabled = disabled;
  196. if (disabled)
  197. return 0;
  198. err = arch_bp_generic_fields(ctrl, &len, &type);
  199. if (err)
  200. return err;
  201. switch (note_type) {
  202. case NT_ARM_HW_BREAK:
  203. if ((type & HW_BREAKPOINT_X) != type)
  204. return -EINVAL;
  205. break;
  206. case NT_ARM_HW_WATCH:
  207. if ((type & HW_BREAKPOINT_RW) != type)
  208. return -EINVAL;
  209. break;
  210. default:
  211. return -EINVAL;
  212. }
  213. attr->bp_len = len;
  214. attr->bp_type = type;
  215. return 0;
  216. }
  217. static int ptrace_hbp_get_resource_info(unsigned int note_type, u32 *info)
  218. {
  219. u8 num;
  220. u32 reg = 0;
  221. switch (note_type) {
  222. case NT_ARM_HW_BREAK:
  223. num = hw_breakpoint_slots(TYPE_INST);
  224. break;
  225. case NT_ARM_HW_WATCH:
  226. num = hw_breakpoint_slots(TYPE_DATA);
  227. break;
  228. default:
  229. return -EINVAL;
  230. }
  231. reg |= debug_monitors_arch();
  232. reg <<= 8;
  233. reg |= num;
  234. *info = reg;
  235. return 0;
  236. }
  237. static int ptrace_hbp_get_ctrl(unsigned int note_type,
  238. struct task_struct *tsk,
  239. unsigned long idx,
  240. u32 *ctrl)
  241. {
  242. struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
  243. if (IS_ERR(bp))
  244. return PTR_ERR(bp);
  245. *ctrl = bp ? encode_ctrl_reg(counter_arch_bp(bp)->ctrl) : 0;
  246. return 0;
  247. }
  248. static int ptrace_hbp_get_addr(unsigned int note_type,
  249. struct task_struct *tsk,
  250. unsigned long idx,
  251. u64 *addr)
  252. {
  253. struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
  254. if (IS_ERR(bp))
  255. return PTR_ERR(bp);
  256. *addr = bp ? bp->attr.bp_addr : 0;
  257. return 0;
  258. }
  259. static struct perf_event *ptrace_hbp_get_initialised_bp(unsigned int note_type,
  260. struct task_struct *tsk,
  261. unsigned long idx)
  262. {
  263. struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
  264. if (!bp)
  265. bp = ptrace_hbp_create(note_type, tsk, idx);
  266. return bp;
  267. }
  268. static int ptrace_hbp_set_ctrl(unsigned int note_type,
  269. struct task_struct *tsk,
  270. unsigned long idx,
  271. u32 uctrl)
  272. {
  273. int err;
  274. struct perf_event *bp;
  275. struct perf_event_attr attr;
  276. struct arch_hw_breakpoint_ctrl ctrl;
  277. bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
  278. if (IS_ERR(bp)) {
  279. err = PTR_ERR(bp);
  280. return err;
  281. }
  282. attr = bp->attr;
  283. decode_ctrl_reg(uctrl, &ctrl);
  284. err = ptrace_hbp_fill_attr_ctrl(note_type, ctrl, &attr);
  285. if (err)
  286. return err;
  287. return modify_user_hw_breakpoint(bp, &attr);
  288. }
  289. static int ptrace_hbp_set_addr(unsigned int note_type,
  290. struct task_struct *tsk,
  291. unsigned long idx,
  292. u64 addr)
  293. {
  294. int err;
  295. struct perf_event *bp;
  296. struct perf_event_attr attr;
  297. bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
  298. if (IS_ERR(bp)) {
  299. err = PTR_ERR(bp);
  300. return err;
  301. }
  302. attr = bp->attr;
  303. attr.bp_addr = addr;
  304. err = modify_user_hw_breakpoint(bp, &attr);
  305. return err;
  306. }
  307. #define PTRACE_HBP_ADDR_SZ sizeof(u64)
  308. #define PTRACE_HBP_CTRL_SZ sizeof(u32)
  309. #define PTRACE_HBP_PAD_SZ sizeof(u32)
  310. static int hw_break_get(struct task_struct *target,
  311. const struct user_regset *regset,
  312. unsigned int pos, unsigned int count,
  313. void *kbuf, void __user *ubuf)
  314. {
  315. unsigned int note_type = regset->core_note_type;
  316. int ret, idx = 0, offset, limit;
  317. u32 info, ctrl;
  318. u64 addr;
  319. /* Resource info */
  320. ret = ptrace_hbp_get_resource_info(note_type, &info);
  321. if (ret)
  322. return ret;
  323. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &info, 0,
  324. sizeof(info));
  325. if (ret)
  326. return ret;
  327. /* Pad */
  328. offset = offsetof(struct user_hwdebug_state, pad);
  329. ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, offset,
  330. offset + PTRACE_HBP_PAD_SZ);
  331. if (ret)
  332. return ret;
  333. /* (address, ctrl) registers */
  334. offset = offsetof(struct user_hwdebug_state, dbg_regs);
  335. limit = regset->n * regset->size;
  336. while (count && offset < limit) {
  337. ret = ptrace_hbp_get_addr(note_type, target, idx, &addr);
  338. if (ret)
  339. return ret;
  340. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &addr,
  341. offset, offset + PTRACE_HBP_ADDR_SZ);
  342. if (ret)
  343. return ret;
  344. offset += PTRACE_HBP_ADDR_SZ;
  345. ret = ptrace_hbp_get_ctrl(note_type, target, idx, &ctrl);
  346. if (ret)
  347. return ret;
  348. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &ctrl,
  349. offset, offset + PTRACE_HBP_CTRL_SZ);
  350. if (ret)
  351. return ret;
  352. offset += PTRACE_HBP_CTRL_SZ;
  353. ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
  354. offset,
  355. offset + PTRACE_HBP_PAD_SZ);
  356. if (ret)
  357. return ret;
  358. offset += PTRACE_HBP_PAD_SZ;
  359. idx++;
  360. }
  361. return 0;
  362. }
  363. static int hw_break_set(struct task_struct *target,
  364. const struct user_regset *regset,
  365. unsigned int pos, unsigned int count,
  366. const void *kbuf, const void __user *ubuf)
  367. {
  368. unsigned int note_type = regset->core_note_type;
  369. int ret, idx = 0, offset, limit;
  370. u32 ctrl;
  371. u64 addr;
  372. /* Resource info and pad */
  373. offset = offsetof(struct user_hwdebug_state, dbg_regs);
  374. ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 0, offset);
  375. if (ret)
  376. return ret;
  377. /* (address, ctrl) registers */
  378. limit = regset->n * regset->size;
  379. while (count && offset < limit) {
  380. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &addr,
  381. offset, offset + PTRACE_HBP_ADDR_SZ);
  382. if (ret)
  383. return ret;
  384. ret = ptrace_hbp_set_addr(note_type, target, idx, addr);
  385. if (ret)
  386. return ret;
  387. offset += PTRACE_HBP_ADDR_SZ;
  388. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl,
  389. offset, offset + PTRACE_HBP_CTRL_SZ);
  390. if (ret)
  391. return ret;
  392. ret = ptrace_hbp_set_ctrl(note_type, target, idx, ctrl);
  393. if (ret)
  394. return ret;
  395. offset += PTRACE_HBP_CTRL_SZ;
  396. ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
  397. offset,
  398. offset + PTRACE_HBP_PAD_SZ);
  399. if (ret)
  400. return ret;
  401. offset += PTRACE_HBP_PAD_SZ;
  402. idx++;
  403. }
  404. return 0;
  405. }
  406. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  407. static int gpr_get(struct task_struct *target,
  408. const struct user_regset *regset,
  409. unsigned int pos, unsigned int count,
  410. void *kbuf, void __user *ubuf)
  411. {
  412. struct user_pt_regs *uregs = &task_pt_regs(target)->user_regs;
  413. return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1);
  414. }
  415. static int gpr_set(struct task_struct *target, const struct user_regset *regset,
  416. unsigned int pos, unsigned int count,
  417. const void *kbuf, const void __user *ubuf)
  418. {
  419. int ret;
  420. struct user_pt_regs newregs;
  421. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newregs, 0, -1);
  422. if (ret)
  423. return ret;
  424. if (!valid_user_regs(&newregs))
  425. return -EINVAL;
  426. task_pt_regs(target)->user_regs = newregs;
  427. return 0;
  428. }
  429. /*
  430. * TODO: update fp accessors for lazy context switching (sync/flush hwstate)
  431. */
  432. static int fpr_get(struct task_struct *target, const struct user_regset *regset,
  433. unsigned int pos, unsigned int count,
  434. void *kbuf, void __user *ubuf)
  435. {
  436. struct user_fpsimd_state *uregs;
  437. uregs = &target->thread.fpsimd_state.user_fpsimd;
  438. return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1);
  439. }
  440. static int fpr_set(struct task_struct *target, const struct user_regset *regset,
  441. unsigned int pos, unsigned int count,
  442. const void *kbuf, const void __user *ubuf)
  443. {
  444. int ret;
  445. struct user_fpsimd_state newstate;
  446. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newstate, 0, -1);
  447. if (ret)
  448. return ret;
  449. target->thread.fpsimd_state.user_fpsimd = newstate;
  450. fpsimd_flush_task_state(target);
  451. return ret;
  452. }
  453. static int tls_get(struct task_struct *target, const struct user_regset *regset,
  454. unsigned int pos, unsigned int count,
  455. void *kbuf, void __user *ubuf)
  456. {
  457. unsigned long *tls = &target->thread.tp_value;
  458. return user_regset_copyout(&pos, &count, &kbuf, &ubuf, tls, 0, -1);
  459. }
  460. static int tls_set(struct task_struct *target, const struct user_regset *regset,
  461. unsigned int pos, unsigned int count,
  462. const void *kbuf, const void __user *ubuf)
  463. {
  464. int ret;
  465. unsigned long tls;
  466. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
  467. if (ret)
  468. return ret;
  469. target->thread.tp_value = tls;
  470. return ret;
  471. }
  472. static int system_call_get(struct task_struct *target,
  473. const struct user_regset *regset,
  474. unsigned int pos, unsigned int count,
  475. void *kbuf, void __user *ubuf)
  476. {
  477. int syscallno = task_pt_regs(target)->syscallno;
  478. return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  479. &syscallno, 0, -1);
  480. }
  481. static int system_call_set(struct task_struct *target,
  482. const struct user_regset *regset,
  483. unsigned int pos, unsigned int count,
  484. const void *kbuf, const void __user *ubuf)
  485. {
  486. int syscallno, ret;
  487. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &syscallno, 0, -1);
  488. if (ret)
  489. return ret;
  490. task_pt_regs(target)->syscallno = syscallno;
  491. return ret;
  492. }
  493. enum aarch64_regset {
  494. REGSET_GPR,
  495. REGSET_FPR,
  496. REGSET_TLS,
  497. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  498. REGSET_HW_BREAK,
  499. REGSET_HW_WATCH,
  500. #endif
  501. REGSET_SYSTEM_CALL,
  502. };
  503. static const struct user_regset aarch64_regsets[] = {
  504. [REGSET_GPR] = {
  505. .core_note_type = NT_PRSTATUS,
  506. .n = sizeof(struct user_pt_regs) / sizeof(u64),
  507. .size = sizeof(u64),
  508. .align = sizeof(u64),
  509. .get = gpr_get,
  510. .set = gpr_set
  511. },
  512. [REGSET_FPR] = {
  513. .core_note_type = NT_PRFPREG,
  514. .n = sizeof(struct user_fpsimd_state) / sizeof(u32),
  515. /*
  516. * We pretend we have 32-bit registers because the fpsr and
  517. * fpcr are 32-bits wide.
  518. */
  519. .size = sizeof(u32),
  520. .align = sizeof(u32),
  521. .get = fpr_get,
  522. .set = fpr_set
  523. },
  524. [REGSET_TLS] = {
  525. .core_note_type = NT_ARM_TLS,
  526. .n = 1,
  527. .size = sizeof(void *),
  528. .align = sizeof(void *),
  529. .get = tls_get,
  530. .set = tls_set,
  531. },
  532. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  533. [REGSET_HW_BREAK] = {
  534. .core_note_type = NT_ARM_HW_BREAK,
  535. .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
  536. .size = sizeof(u32),
  537. .align = sizeof(u32),
  538. .get = hw_break_get,
  539. .set = hw_break_set,
  540. },
  541. [REGSET_HW_WATCH] = {
  542. .core_note_type = NT_ARM_HW_WATCH,
  543. .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
  544. .size = sizeof(u32),
  545. .align = sizeof(u32),
  546. .get = hw_break_get,
  547. .set = hw_break_set,
  548. },
  549. #endif
  550. [REGSET_SYSTEM_CALL] = {
  551. .core_note_type = NT_ARM_SYSTEM_CALL,
  552. .n = 1,
  553. .size = sizeof(int),
  554. .align = sizeof(int),
  555. .get = system_call_get,
  556. .set = system_call_set,
  557. },
  558. };
  559. static const struct user_regset_view user_aarch64_view = {
  560. .name = "aarch64", .e_machine = EM_AARCH64,
  561. .regsets = aarch64_regsets, .n = ARRAY_SIZE(aarch64_regsets)
  562. };
  563. #ifdef CONFIG_COMPAT
  564. #include <linux/compat.h>
  565. enum compat_regset {
  566. REGSET_COMPAT_GPR,
  567. REGSET_COMPAT_VFP,
  568. };
  569. static int compat_gpr_get(struct task_struct *target,
  570. const struct user_regset *regset,
  571. unsigned int pos, unsigned int count,
  572. void *kbuf, void __user *ubuf)
  573. {
  574. int ret = 0;
  575. unsigned int i, start, num_regs;
  576. /* Calculate the number of AArch32 registers contained in count */
  577. num_regs = count / regset->size;
  578. /* Convert pos into an register number */
  579. start = pos / regset->size;
  580. if (start + num_regs > regset->n)
  581. return -EIO;
  582. for (i = 0; i < num_regs; ++i) {
  583. unsigned int idx = start + i;
  584. compat_ulong_t reg;
  585. switch (idx) {
  586. case 15:
  587. reg = task_pt_regs(target)->pc;
  588. break;
  589. case 16:
  590. reg = task_pt_regs(target)->pstate;
  591. break;
  592. case 17:
  593. reg = task_pt_regs(target)->orig_x0;
  594. break;
  595. default:
  596. reg = task_pt_regs(target)->regs[idx];
  597. }
  598. if (kbuf) {
  599. memcpy(kbuf, &reg, sizeof(reg));
  600. kbuf += sizeof(reg);
  601. } else {
  602. ret = copy_to_user(ubuf, &reg, sizeof(reg));
  603. if (ret) {
  604. ret = -EFAULT;
  605. break;
  606. }
  607. ubuf += sizeof(reg);
  608. }
  609. }
  610. return ret;
  611. }
  612. static int compat_gpr_set(struct task_struct *target,
  613. const struct user_regset *regset,
  614. unsigned int pos, unsigned int count,
  615. const void *kbuf, const void __user *ubuf)
  616. {
  617. struct pt_regs newregs;
  618. int ret = 0;
  619. unsigned int i, start, num_regs;
  620. /* Calculate the number of AArch32 registers contained in count */
  621. num_regs = count / regset->size;
  622. /* Convert pos into an register number */
  623. start = pos / regset->size;
  624. if (start + num_regs > regset->n)
  625. return -EIO;
  626. newregs = *task_pt_regs(target);
  627. for (i = 0; i < num_regs; ++i) {
  628. unsigned int idx = start + i;
  629. compat_ulong_t reg;
  630. if (kbuf) {
  631. memcpy(&reg, kbuf, sizeof(reg));
  632. kbuf += sizeof(reg);
  633. } else {
  634. ret = copy_from_user(&reg, ubuf, sizeof(reg));
  635. if (ret) {
  636. ret = -EFAULT;
  637. break;
  638. }
  639. ubuf += sizeof(reg);
  640. }
  641. switch (idx) {
  642. case 15:
  643. newregs.pc = reg;
  644. break;
  645. case 16:
  646. newregs.pstate = reg;
  647. break;
  648. case 17:
  649. newregs.orig_x0 = reg;
  650. break;
  651. default:
  652. newregs.regs[idx] = reg;
  653. }
  654. }
  655. if (valid_user_regs(&newregs.user_regs))
  656. *task_pt_regs(target) = newregs;
  657. else
  658. ret = -EINVAL;
  659. return ret;
  660. }
  661. static int compat_vfp_get(struct task_struct *target,
  662. const struct user_regset *regset,
  663. unsigned int pos, unsigned int count,
  664. void *kbuf, void __user *ubuf)
  665. {
  666. struct user_fpsimd_state *uregs;
  667. compat_ulong_t fpscr;
  668. int ret;
  669. uregs = &target->thread.fpsimd_state.user_fpsimd;
  670. /*
  671. * The VFP registers are packed into the fpsimd_state, so they all sit
  672. * nicely together for us. We just need to create the fpscr separately.
  673. */
  674. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
  675. VFP_STATE_SIZE - sizeof(compat_ulong_t));
  676. if (count && !ret) {
  677. fpscr = (uregs->fpsr & VFP_FPSCR_STAT_MASK) |
  678. (uregs->fpcr & VFP_FPSCR_CTRL_MASK);
  679. ret = put_user(fpscr, (compat_ulong_t *)ubuf);
  680. }
  681. return ret;
  682. }
  683. static int compat_vfp_set(struct task_struct *target,
  684. const struct user_regset *regset,
  685. unsigned int pos, unsigned int count,
  686. const void *kbuf, const void __user *ubuf)
  687. {
  688. struct user_fpsimd_state *uregs;
  689. compat_ulong_t fpscr;
  690. int ret;
  691. if (pos + count > VFP_STATE_SIZE)
  692. return -EIO;
  693. uregs = &target->thread.fpsimd_state.user_fpsimd;
  694. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
  695. VFP_STATE_SIZE - sizeof(compat_ulong_t));
  696. if (count && !ret) {
  697. ret = get_user(fpscr, (compat_ulong_t *)ubuf);
  698. uregs->fpsr = fpscr & VFP_FPSCR_STAT_MASK;
  699. uregs->fpcr = fpscr & VFP_FPSCR_CTRL_MASK;
  700. }
  701. fpsimd_flush_task_state(target);
  702. return ret;
  703. }
  704. static int compat_tls_get(struct task_struct *target,
  705. const struct user_regset *regset, unsigned int pos,
  706. unsigned int count, void *kbuf, void __user *ubuf)
  707. {
  708. compat_ulong_t tls = (compat_ulong_t)target->thread.tp_value;
  709. return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
  710. }
  711. static int compat_tls_set(struct task_struct *target,
  712. const struct user_regset *regset, unsigned int pos,
  713. unsigned int count, const void *kbuf,
  714. const void __user *ubuf)
  715. {
  716. int ret;
  717. compat_ulong_t tls;
  718. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
  719. if (ret)
  720. return ret;
  721. target->thread.tp_value = tls;
  722. return ret;
  723. }
  724. static const struct user_regset aarch32_regsets[] = {
  725. [REGSET_COMPAT_GPR] = {
  726. .core_note_type = NT_PRSTATUS,
  727. .n = COMPAT_ELF_NGREG,
  728. .size = sizeof(compat_elf_greg_t),
  729. .align = sizeof(compat_elf_greg_t),
  730. .get = compat_gpr_get,
  731. .set = compat_gpr_set
  732. },
  733. [REGSET_COMPAT_VFP] = {
  734. .core_note_type = NT_ARM_VFP,
  735. .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
  736. .size = sizeof(compat_ulong_t),
  737. .align = sizeof(compat_ulong_t),
  738. .get = compat_vfp_get,
  739. .set = compat_vfp_set
  740. },
  741. };
  742. static const struct user_regset_view user_aarch32_view = {
  743. .name = "aarch32", .e_machine = EM_ARM,
  744. .regsets = aarch32_regsets, .n = ARRAY_SIZE(aarch32_regsets)
  745. };
  746. static const struct user_regset aarch32_ptrace_regsets[] = {
  747. [REGSET_GPR] = {
  748. .core_note_type = NT_PRSTATUS,
  749. .n = COMPAT_ELF_NGREG,
  750. .size = sizeof(compat_elf_greg_t),
  751. .align = sizeof(compat_elf_greg_t),
  752. .get = compat_gpr_get,
  753. .set = compat_gpr_set
  754. },
  755. [REGSET_FPR] = {
  756. .core_note_type = NT_ARM_VFP,
  757. .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
  758. .size = sizeof(compat_ulong_t),
  759. .align = sizeof(compat_ulong_t),
  760. .get = compat_vfp_get,
  761. .set = compat_vfp_set
  762. },
  763. [REGSET_TLS] = {
  764. .core_note_type = NT_ARM_TLS,
  765. .n = 1,
  766. .size = sizeof(compat_ulong_t),
  767. .align = sizeof(compat_ulong_t),
  768. .get = compat_tls_get,
  769. .set = compat_tls_set,
  770. },
  771. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  772. [REGSET_HW_BREAK] = {
  773. .core_note_type = NT_ARM_HW_BREAK,
  774. .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
  775. .size = sizeof(u32),
  776. .align = sizeof(u32),
  777. .get = hw_break_get,
  778. .set = hw_break_set,
  779. },
  780. [REGSET_HW_WATCH] = {
  781. .core_note_type = NT_ARM_HW_WATCH,
  782. .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
  783. .size = sizeof(u32),
  784. .align = sizeof(u32),
  785. .get = hw_break_get,
  786. .set = hw_break_set,
  787. },
  788. #endif
  789. [REGSET_SYSTEM_CALL] = {
  790. .core_note_type = NT_ARM_SYSTEM_CALL,
  791. .n = 1,
  792. .size = sizeof(int),
  793. .align = sizeof(int),
  794. .get = system_call_get,
  795. .set = system_call_set,
  796. },
  797. };
  798. static const struct user_regset_view user_aarch32_ptrace_view = {
  799. .name = "aarch32", .e_machine = EM_ARM,
  800. .regsets = aarch32_ptrace_regsets, .n = ARRAY_SIZE(aarch32_ptrace_regsets)
  801. };
  802. static int compat_ptrace_read_user(struct task_struct *tsk, compat_ulong_t off,
  803. compat_ulong_t __user *ret)
  804. {
  805. compat_ulong_t tmp;
  806. if (off & 3)
  807. return -EIO;
  808. if (off == COMPAT_PT_TEXT_ADDR)
  809. tmp = tsk->mm->start_code;
  810. else if (off == COMPAT_PT_DATA_ADDR)
  811. tmp = tsk->mm->start_data;
  812. else if (off == COMPAT_PT_TEXT_END_ADDR)
  813. tmp = tsk->mm->end_code;
  814. else if (off < sizeof(compat_elf_gregset_t))
  815. return copy_regset_to_user(tsk, &user_aarch32_view,
  816. REGSET_COMPAT_GPR, off,
  817. sizeof(compat_ulong_t), ret);
  818. else if (off >= COMPAT_USER_SZ)
  819. return -EIO;
  820. else
  821. tmp = 0;
  822. return put_user(tmp, ret);
  823. }
  824. static int compat_ptrace_write_user(struct task_struct *tsk, compat_ulong_t off,
  825. compat_ulong_t val)
  826. {
  827. int ret;
  828. mm_segment_t old_fs = get_fs();
  829. if (off & 3 || off >= COMPAT_USER_SZ)
  830. return -EIO;
  831. if (off >= sizeof(compat_elf_gregset_t))
  832. return 0;
  833. set_fs(KERNEL_DS);
  834. ret = copy_regset_from_user(tsk, &user_aarch32_view,
  835. REGSET_COMPAT_GPR, off,
  836. sizeof(compat_ulong_t),
  837. &val);
  838. set_fs(old_fs);
  839. return ret;
  840. }
  841. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  842. /*
  843. * Convert a virtual register number into an index for a thread_info
  844. * breakpoint array. Breakpoints are identified using positive numbers
  845. * whilst watchpoints are negative. The registers are laid out as pairs
  846. * of (address, control), each pair mapping to a unique hw_breakpoint struct.
  847. * Register 0 is reserved for describing resource information.
  848. */
  849. static int compat_ptrace_hbp_num_to_idx(compat_long_t num)
  850. {
  851. return (abs(num) - 1) >> 1;
  852. }
  853. static int compat_ptrace_hbp_get_resource_info(u32 *kdata)
  854. {
  855. u8 num_brps, num_wrps, debug_arch, wp_len;
  856. u32 reg = 0;
  857. num_brps = hw_breakpoint_slots(TYPE_INST);
  858. num_wrps = hw_breakpoint_slots(TYPE_DATA);
  859. debug_arch = debug_monitors_arch();
  860. wp_len = 8;
  861. reg |= debug_arch;
  862. reg <<= 8;
  863. reg |= wp_len;
  864. reg <<= 8;
  865. reg |= num_wrps;
  866. reg <<= 8;
  867. reg |= num_brps;
  868. *kdata = reg;
  869. return 0;
  870. }
  871. static int compat_ptrace_hbp_get(unsigned int note_type,
  872. struct task_struct *tsk,
  873. compat_long_t num,
  874. u32 *kdata)
  875. {
  876. u64 addr = 0;
  877. u32 ctrl = 0;
  878. int err, idx = compat_ptrace_hbp_num_to_idx(num);;
  879. if (num & 1) {
  880. err = ptrace_hbp_get_addr(note_type, tsk, idx, &addr);
  881. *kdata = (u32)addr;
  882. } else {
  883. err = ptrace_hbp_get_ctrl(note_type, tsk, idx, &ctrl);
  884. *kdata = ctrl;
  885. }
  886. return err;
  887. }
  888. static int compat_ptrace_hbp_set(unsigned int note_type,
  889. struct task_struct *tsk,
  890. compat_long_t num,
  891. u32 *kdata)
  892. {
  893. u64 addr;
  894. u32 ctrl;
  895. int err, idx = compat_ptrace_hbp_num_to_idx(num);
  896. if (num & 1) {
  897. addr = *kdata;
  898. err = ptrace_hbp_set_addr(note_type, tsk, idx, addr);
  899. } else {
  900. ctrl = *kdata;
  901. err = ptrace_hbp_set_ctrl(note_type, tsk, idx, ctrl);
  902. }
  903. return err;
  904. }
  905. static int compat_ptrace_gethbpregs(struct task_struct *tsk, compat_long_t num,
  906. compat_ulong_t __user *data)
  907. {
  908. int ret;
  909. u32 kdata;
  910. mm_segment_t old_fs = get_fs();
  911. set_fs(KERNEL_DS);
  912. /* Watchpoint */
  913. if (num < 0) {
  914. ret = compat_ptrace_hbp_get(NT_ARM_HW_WATCH, tsk, num, &kdata);
  915. /* Resource info */
  916. } else if (num == 0) {
  917. ret = compat_ptrace_hbp_get_resource_info(&kdata);
  918. /* Breakpoint */
  919. } else {
  920. ret = compat_ptrace_hbp_get(NT_ARM_HW_BREAK, tsk, num, &kdata);
  921. }
  922. set_fs(old_fs);
  923. if (!ret)
  924. ret = put_user(kdata, data);
  925. return ret;
  926. }
  927. static int compat_ptrace_sethbpregs(struct task_struct *tsk, compat_long_t num,
  928. compat_ulong_t __user *data)
  929. {
  930. int ret;
  931. u32 kdata = 0;
  932. mm_segment_t old_fs = get_fs();
  933. if (num == 0)
  934. return 0;
  935. ret = get_user(kdata, data);
  936. if (ret)
  937. return ret;
  938. set_fs(KERNEL_DS);
  939. if (num < 0)
  940. ret = compat_ptrace_hbp_set(NT_ARM_HW_WATCH, tsk, num, &kdata);
  941. else
  942. ret = compat_ptrace_hbp_set(NT_ARM_HW_BREAK, tsk, num, &kdata);
  943. set_fs(old_fs);
  944. return ret;
  945. }
  946. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  947. long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
  948. compat_ulong_t caddr, compat_ulong_t cdata)
  949. {
  950. unsigned long addr = caddr;
  951. unsigned long data = cdata;
  952. void __user *datap = compat_ptr(data);
  953. int ret;
  954. switch (request) {
  955. case PTRACE_PEEKUSR:
  956. ret = compat_ptrace_read_user(child, addr, datap);
  957. break;
  958. case PTRACE_POKEUSR:
  959. ret = compat_ptrace_write_user(child, addr, data);
  960. break;
  961. case COMPAT_PTRACE_GETREGS:
  962. ret = copy_regset_to_user(child,
  963. &user_aarch32_view,
  964. REGSET_COMPAT_GPR,
  965. 0, sizeof(compat_elf_gregset_t),
  966. datap);
  967. break;
  968. case COMPAT_PTRACE_SETREGS:
  969. ret = copy_regset_from_user(child,
  970. &user_aarch32_view,
  971. REGSET_COMPAT_GPR,
  972. 0, sizeof(compat_elf_gregset_t),
  973. datap);
  974. break;
  975. case COMPAT_PTRACE_GET_THREAD_AREA:
  976. ret = put_user((compat_ulong_t)child->thread.tp_value,
  977. (compat_ulong_t __user *)datap);
  978. break;
  979. case COMPAT_PTRACE_SET_SYSCALL:
  980. task_pt_regs(child)->syscallno = data;
  981. ret = 0;
  982. break;
  983. case COMPAT_PTRACE_GETVFPREGS:
  984. ret = copy_regset_to_user(child,
  985. &user_aarch32_view,
  986. REGSET_COMPAT_VFP,
  987. 0, VFP_STATE_SIZE,
  988. datap);
  989. break;
  990. case COMPAT_PTRACE_SETVFPREGS:
  991. ret = copy_regset_from_user(child,
  992. &user_aarch32_view,
  993. REGSET_COMPAT_VFP,
  994. 0, VFP_STATE_SIZE,
  995. datap);
  996. break;
  997. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  998. case COMPAT_PTRACE_GETHBPREGS:
  999. ret = compat_ptrace_gethbpregs(child, addr, datap);
  1000. break;
  1001. case COMPAT_PTRACE_SETHBPREGS:
  1002. ret = compat_ptrace_sethbpregs(child, addr, datap);
  1003. break;
  1004. #endif
  1005. default:
  1006. ret = compat_ptrace_request(child, request, addr,
  1007. data);
  1008. break;
  1009. }
  1010. return ret;
  1011. }
  1012. #endif /* CONFIG_COMPAT */
  1013. const struct user_regset_view *task_user_regset_view(struct task_struct *task)
  1014. {
  1015. #ifdef CONFIG_COMPAT
  1016. /*
  1017. * Core dumping of 32-bit tasks or compat ptrace requests must use the
  1018. * user_aarch32_view compatible with arm32. Native ptrace requests on
  1019. * 32-bit children use an extended user_aarch32_ptrace_view to allow
  1020. * access to the TLS register.
  1021. */
  1022. if (is_compat_task())
  1023. return &user_aarch32_view;
  1024. else if (is_compat_thread(task_thread_info(task)))
  1025. return &user_aarch32_ptrace_view;
  1026. #endif
  1027. return &user_aarch64_view;
  1028. }
  1029. long arch_ptrace(struct task_struct *child, long request,
  1030. unsigned long addr, unsigned long data)
  1031. {
  1032. return ptrace_request(child, request, addr, data);
  1033. }
  1034. enum ptrace_syscall_dir {
  1035. PTRACE_SYSCALL_ENTER = 0,
  1036. PTRACE_SYSCALL_EXIT,
  1037. };
  1038. static void tracehook_report_syscall(struct pt_regs *regs,
  1039. enum ptrace_syscall_dir dir)
  1040. {
  1041. int regno;
  1042. unsigned long saved_reg;
  1043. /*
  1044. * A scratch register (ip(r12) on AArch32, x7 on AArch64) is
  1045. * used to denote syscall entry/exit:
  1046. */
  1047. regno = (is_compat_task() ? 12 : 7);
  1048. saved_reg = regs->regs[regno];
  1049. regs->regs[regno] = dir;
  1050. if (dir == PTRACE_SYSCALL_EXIT)
  1051. tracehook_report_syscall_exit(regs, 0);
  1052. else if (tracehook_report_syscall_entry(regs))
  1053. regs->syscallno = ~0UL;
  1054. regs->regs[regno] = saved_reg;
  1055. }
  1056. asmlinkage int syscall_trace_enter(struct pt_regs *regs)
  1057. {
  1058. /* Do the secure computing check first; failures should be fast. */
  1059. if (secure_computing() == -1)
  1060. return -1;
  1061. if (test_thread_flag(TIF_SYSCALL_TRACE))
  1062. tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER);
  1063. if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
  1064. trace_sys_enter(regs, regs->syscallno);
  1065. audit_syscall_entry(regs->syscallno, regs->orig_x0, regs->regs[1],
  1066. regs->regs[2], regs->regs[3]);
  1067. return regs->syscallno;
  1068. }
  1069. asmlinkage void syscall_trace_exit(struct pt_regs *regs)
  1070. {
  1071. audit_syscall_exit(regs);
  1072. if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
  1073. trace_sys_exit(regs, regs_return_value(regs));
  1074. if (test_thread_flag(TIF_SYSCALL_TRACE))
  1075. tracehook_report_syscall(regs, PTRACE_SYSCALL_EXIT);
  1076. }