mainstone.c 16 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/mainstone.c
  3. *
  4. * Support for the Intel HCDDBBVA0 Development Platform.
  5. * (go figure how they came up with such name...)
  6. *
  7. * Author: Nicolas Pitre
  8. * Created: Nov 05, 2002
  9. * Copyright: MontaVista Software Inc.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/gpio.h>
  16. #include <linux/gpio/machine.h>
  17. #include <linux/init.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/syscore_ops.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/sched.h>
  22. #include <linux/bitops.h>
  23. #include <linux/fb.h>
  24. #include <linux/ioport.h>
  25. #include <linux/mtd/mtd.h>
  26. #include <linux/mtd/partitions.h>
  27. #include <linux/input.h>
  28. #include <linux/gpio_keys.h>
  29. #include <linux/pwm_backlight.h>
  30. #include <linux/smc91x.h>
  31. #include <linux/i2c/pxa-i2c.h>
  32. #include <linux/slab.h>
  33. #include <linux/leds.h>
  34. #include <asm/types.h>
  35. #include <asm/setup.h>
  36. #include <asm/memory.h>
  37. #include <asm/mach-types.h>
  38. #include <mach/hardware.h>
  39. #include <asm/irq.h>
  40. #include <asm/sizes.h>
  41. #include <asm/mach/arch.h>
  42. #include <asm/mach/map.h>
  43. #include <asm/mach/irq.h>
  44. #include <asm/mach/flash.h>
  45. #include <mach/pxa27x.h>
  46. #include <mach/mainstone.h>
  47. #include <mach/audio.h>
  48. #include <linux/platform_data/video-pxafb.h>
  49. #include <linux/platform_data/mmc-pxamci.h>
  50. #include <linux/platform_data/irda-pxaficp.h>
  51. #include <linux/platform_data/usb-ohci-pxa27x.h>
  52. #include <linux/platform_data/keypad-pxa27x.h>
  53. #include <mach/smemc.h>
  54. #include "generic.h"
  55. #include "devices.h"
  56. static unsigned long mainstone_pin_config[] = {
  57. /* Chip Select */
  58. GPIO15_nCS_1,
  59. /* LCD - 16bpp Active TFT */
  60. GPIOxx_LCD_TFT_16BPP,
  61. GPIO16_PWM0_OUT, /* Backlight */
  62. /* MMC */
  63. GPIO32_MMC_CLK,
  64. GPIO112_MMC_CMD,
  65. GPIO92_MMC_DAT_0,
  66. GPIO109_MMC_DAT_1,
  67. GPIO110_MMC_DAT_2,
  68. GPIO111_MMC_DAT_3,
  69. /* USB Host Port 1 */
  70. GPIO88_USBH1_PWR,
  71. GPIO89_USBH1_PEN,
  72. /* PC Card */
  73. GPIO48_nPOE,
  74. GPIO49_nPWE,
  75. GPIO50_nPIOR,
  76. GPIO51_nPIOW,
  77. GPIO85_nPCE_1,
  78. GPIO54_nPCE_2,
  79. GPIO79_PSKTSEL,
  80. GPIO55_nPREG,
  81. GPIO56_nPWAIT,
  82. GPIO57_nIOIS16,
  83. /* AC97 */
  84. GPIO28_AC97_BITCLK,
  85. GPIO29_AC97_SDATA_IN_0,
  86. GPIO30_AC97_SDATA_OUT,
  87. GPIO31_AC97_SYNC,
  88. GPIO45_AC97_SYSCLK,
  89. /* Keypad */
  90. GPIO93_KP_DKIN_0,
  91. GPIO94_KP_DKIN_1,
  92. GPIO95_KP_DKIN_2,
  93. GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
  94. GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
  95. GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
  96. GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
  97. GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH,
  98. GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH,
  99. GPIO103_KP_MKOUT_0,
  100. GPIO104_KP_MKOUT_1,
  101. GPIO105_KP_MKOUT_2,
  102. GPIO106_KP_MKOUT_3,
  103. GPIO107_KP_MKOUT_4,
  104. GPIO108_KP_MKOUT_5,
  105. GPIO96_KP_MKOUT_6,
  106. /* I2C */
  107. GPIO117_I2C_SCL,
  108. GPIO118_I2C_SDA,
  109. /* GPIO */
  110. GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
  111. };
  112. static struct resource smc91x_resources[] = {
  113. [0] = {
  114. .start = (MST_ETH_PHYS + 0x300),
  115. .end = (MST_ETH_PHYS + 0xfffff),
  116. .flags = IORESOURCE_MEM,
  117. },
  118. [1] = {
  119. .start = MAINSTONE_IRQ(3),
  120. .end = MAINSTONE_IRQ(3),
  121. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  122. }
  123. };
  124. static struct smc91x_platdata mainstone_smc91x_info = {
  125. .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
  126. SMC91X_NOWAIT | SMC91X_USE_DMA,
  127. };
  128. static struct platform_device smc91x_device = {
  129. .name = "smc91x",
  130. .id = 0,
  131. .num_resources = ARRAY_SIZE(smc91x_resources),
  132. .resource = smc91x_resources,
  133. .dev = {
  134. .platform_data = &mainstone_smc91x_info,
  135. },
  136. };
  137. static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv)
  138. {
  139. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  140. MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
  141. return 0;
  142. }
  143. static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv)
  144. {
  145. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  146. MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
  147. }
  148. static long mst_audio_suspend_mask;
  149. static void mst_audio_suspend(void *priv)
  150. {
  151. mst_audio_suspend_mask = MST_MSCWR2;
  152. MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
  153. }
  154. static void mst_audio_resume(void *priv)
  155. {
  156. MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
  157. }
  158. static pxa2xx_audio_ops_t mst_audio_ops = {
  159. .startup = mst_audio_startup,
  160. .shutdown = mst_audio_shutdown,
  161. .suspend = mst_audio_suspend,
  162. .resume = mst_audio_resume,
  163. };
  164. static struct resource flash_resources[] = {
  165. [0] = {
  166. .start = PXA_CS0_PHYS,
  167. .end = PXA_CS0_PHYS + SZ_64M - 1,
  168. .flags = IORESOURCE_MEM,
  169. },
  170. [1] = {
  171. .start = PXA_CS1_PHYS,
  172. .end = PXA_CS1_PHYS + SZ_64M - 1,
  173. .flags = IORESOURCE_MEM,
  174. },
  175. };
  176. static struct mtd_partition mainstoneflash0_partitions[] = {
  177. {
  178. .name = "Bootloader",
  179. .size = 0x00040000,
  180. .offset = 0,
  181. .mask_flags = MTD_WRITEABLE /* force read-only */
  182. },{
  183. .name = "Kernel",
  184. .size = 0x00400000,
  185. .offset = 0x00040000,
  186. },{
  187. .name = "Filesystem",
  188. .size = MTDPART_SIZ_FULL,
  189. .offset = 0x00440000
  190. }
  191. };
  192. static struct flash_platform_data mst_flash_data[2] = {
  193. {
  194. .map_name = "cfi_probe",
  195. .parts = mainstoneflash0_partitions,
  196. .nr_parts = ARRAY_SIZE(mainstoneflash0_partitions),
  197. }, {
  198. .map_name = "cfi_probe",
  199. .parts = NULL,
  200. .nr_parts = 0,
  201. }
  202. };
  203. static struct platform_device mst_flash_device[2] = {
  204. {
  205. .name = "pxa2xx-flash",
  206. .id = 0,
  207. .dev = {
  208. .platform_data = &mst_flash_data[0],
  209. },
  210. .resource = &flash_resources[0],
  211. .num_resources = 1,
  212. },
  213. {
  214. .name = "pxa2xx-flash",
  215. .id = 1,
  216. .dev = {
  217. .platform_data = &mst_flash_data[1],
  218. },
  219. .resource = &flash_resources[1],
  220. .num_resources = 1,
  221. },
  222. };
  223. #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
  224. static struct platform_pwm_backlight_data mainstone_backlight_data = {
  225. .pwm_id = 0,
  226. .max_brightness = 1023,
  227. .dft_brightness = 1023,
  228. .pwm_period_ns = 78770,
  229. .enable_gpio = -1,
  230. };
  231. static struct platform_device mainstone_backlight_device = {
  232. .name = "pwm-backlight",
  233. .dev = {
  234. .parent = &pxa27x_device_pwm0.dev,
  235. .platform_data = &mainstone_backlight_data,
  236. },
  237. };
  238. static void __init mainstone_backlight_register(void)
  239. {
  240. int ret = platform_device_register(&mainstone_backlight_device);
  241. if (ret)
  242. printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret);
  243. }
  244. #else
  245. #define mainstone_backlight_register() do { } while (0)
  246. #endif
  247. static struct pxafb_mode_info toshiba_ltm04c380k_mode = {
  248. .pixclock = 50000,
  249. .xres = 640,
  250. .yres = 480,
  251. .bpp = 16,
  252. .hsync_len = 1,
  253. .left_margin = 0x9f,
  254. .right_margin = 1,
  255. .vsync_len = 44,
  256. .upper_margin = 0,
  257. .lower_margin = 0,
  258. .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
  259. };
  260. static struct pxafb_mode_info toshiba_ltm035a776c_mode = {
  261. .pixclock = 110000,
  262. .xres = 240,
  263. .yres = 320,
  264. .bpp = 16,
  265. .hsync_len = 4,
  266. .left_margin = 8,
  267. .right_margin = 20,
  268. .vsync_len = 3,
  269. .upper_margin = 1,
  270. .lower_margin = 10,
  271. .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
  272. };
  273. static struct pxafb_mach_info mainstone_pxafb_info = {
  274. .num_modes = 1,
  275. .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
  276. };
  277. static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data)
  278. {
  279. int err;
  280. /* make sure SD/Memory Stick multiplexer's signals
  281. * are routed to MMC controller
  282. */
  283. MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
  284. err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, 0,
  285. "MMC card detect", data);
  286. if (err)
  287. printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
  288. return err;
  289. }
  290. static int mainstone_mci_setpower(struct device *dev, unsigned int vdd)
  291. {
  292. struct pxamci_platform_data* p_d = dev->platform_data;
  293. if (( 1 << vdd) & p_d->ocr_mask) {
  294. printk(KERN_DEBUG "%s: on\n", __func__);
  295. MST_MSCWR1 |= MST_MSCWR1_MMC_ON;
  296. MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
  297. } else {
  298. printk(KERN_DEBUG "%s: off\n", __func__);
  299. MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
  300. }
  301. return 0;
  302. }
  303. static void mainstone_mci_exit(struct device *dev, void *data)
  304. {
  305. free_irq(MAINSTONE_MMC_IRQ, data);
  306. }
  307. static struct pxamci_platform_data mainstone_mci_platform_data = {
  308. .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
  309. .init = mainstone_mci_init,
  310. .setpower = mainstone_mci_setpower,
  311. .exit = mainstone_mci_exit,
  312. .gpio_card_detect = -1,
  313. .gpio_card_ro = -1,
  314. .gpio_power = -1,
  315. };
  316. static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
  317. {
  318. unsigned long flags;
  319. local_irq_save(flags);
  320. if (mode & IR_SIRMODE) {
  321. MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
  322. } else if (mode & IR_FIRMODE) {
  323. MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
  324. }
  325. pxa2xx_transceiver_mode(dev, mode);
  326. if (mode & IR_OFF) {
  327. MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
  328. } else {
  329. MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
  330. }
  331. local_irq_restore(flags);
  332. }
  333. static struct pxaficp_platform_data mainstone_ficp_platform_data = {
  334. .gpio_pwdown = -1,
  335. .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
  336. .transceiver_mode = mainstone_irda_transceiver_mode,
  337. };
  338. static struct gpio_keys_button gpio_keys_button[] = {
  339. [0] = {
  340. .desc = "wakeup",
  341. .code = KEY_SUSPEND,
  342. .type = EV_KEY,
  343. .gpio = 1,
  344. .wakeup = 1,
  345. },
  346. };
  347. static struct gpio_keys_platform_data mainstone_gpio_keys = {
  348. .buttons = gpio_keys_button,
  349. .nbuttons = 1,
  350. };
  351. static struct platform_device mst_gpio_keys_device = {
  352. .name = "gpio-keys",
  353. .id = -1,
  354. .dev = {
  355. .platform_data = &mainstone_gpio_keys,
  356. },
  357. };
  358. static struct resource mst_cplds_resources[] = {
  359. [0] = {
  360. .start = MST_FPGA_PHYS + 0xc0,
  361. .end = MST_FPGA_PHYS + 0xe0 - 1,
  362. .flags = IORESOURCE_MEM,
  363. },
  364. [1] = {
  365. .start = PXA_GPIO_TO_IRQ(0),
  366. .end = PXA_GPIO_TO_IRQ(0),
  367. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  368. },
  369. [2] = {
  370. .start = MAINSTONE_IRQ(0),
  371. .end = MAINSTONE_IRQ(15),
  372. .flags = IORESOURCE_IRQ,
  373. },
  374. };
  375. static struct platform_device mst_cplds_device = {
  376. .name = "pxa_cplds_irqs",
  377. .id = -1,
  378. .resource = &mst_cplds_resources[0],
  379. .num_resources = 3,
  380. };
  381. static struct platform_device *platform_devices[] __initdata = {
  382. &smc91x_device,
  383. &mst_flash_device[0],
  384. &mst_flash_device[1],
  385. &mst_gpio_keys_device,
  386. &mst_cplds_device,
  387. };
  388. static struct pxaohci_platform_data mainstone_ohci_platform_data = {
  389. .port_mode = PMM_PERPORT_MODE,
  390. .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
  391. };
  392. #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
  393. static const unsigned int mainstone_matrix_keys[] = {
  394. KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C),
  395. KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F),
  396. KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I),
  397. KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L),
  398. KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O),
  399. KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R),
  400. KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U),
  401. KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X),
  402. KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z),
  403. KEY(0, 4, KEY_DOT), /* . */
  404. KEY(1, 4, KEY_CLOSE), /* @ */
  405. KEY(4, 4, KEY_SLASH),
  406. KEY(5, 4, KEY_BACKSLASH),
  407. KEY(0, 5, KEY_HOME),
  408. KEY(1, 5, KEY_LEFTSHIFT),
  409. KEY(2, 5, KEY_SPACE),
  410. KEY(3, 5, KEY_SPACE),
  411. KEY(4, 5, KEY_ENTER),
  412. KEY(5, 5, KEY_BACKSPACE),
  413. KEY(0, 6, KEY_UP),
  414. KEY(1, 6, KEY_DOWN),
  415. KEY(2, 6, KEY_LEFT),
  416. KEY(3, 6, KEY_RIGHT),
  417. KEY(4, 6, KEY_SELECT),
  418. };
  419. static struct matrix_keymap_data mainstone_matrix_keymap_data = {
  420. .keymap = mainstone_matrix_keys,
  421. .keymap_size = ARRAY_SIZE(mainstone_matrix_keys),
  422. };
  423. struct pxa27x_keypad_platform_data mainstone_keypad_info = {
  424. .matrix_key_rows = 6,
  425. .matrix_key_cols = 7,
  426. .matrix_keymap_data = &mainstone_matrix_keymap_data,
  427. .enable_rotary0 = 1,
  428. .rotary0_up_key = KEY_UP,
  429. .rotary0_down_key = KEY_DOWN,
  430. .debounce_interval = 30,
  431. };
  432. static void __init mainstone_init_keypad(void)
  433. {
  434. pxa_set_keypad_info(&mainstone_keypad_info);
  435. }
  436. #else
  437. static inline void mainstone_init_keypad(void) {}
  438. #endif
  439. static void __init mainstone_init(void)
  440. {
  441. int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */
  442. pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config));
  443. pxa_set_ffuart_info(NULL);
  444. pxa_set_btuart_info(NULL);
  445. pxa_set_stuart_info(NULL);
  446. mst_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
  447. mst_flash_data[1].width = 4;
  448. /* Compensate for SW7 which swaps the flash banks */
  449. mst_flash_data[SW7].name = "processor-flash";
  450. mst_flash_data[SW7 ^ 1].name = "mainboard-flash";
  451. printk(KERN_NOTICE "Mainstone configured to boot from %s\n",
  452. mst_flash_data[0].name);
  453. /* system bus arbiter setting
  454. * - Core_Park
  455. * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
  456. */
  457. ARB_CNTRL = ARB_CORE_PARK | 0x234;
  458. platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
  459. /* reading Mainstone's "Virtual Configuration Register"
  460. might be handy to select LCD type here */
  461. if (0)
  462. mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode;
  463. else
  464. mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
  465. pxa_set_fb_info(NULL, &mainstone_pxafb_info);
  466. mainstone_backlight_register();
  467. pxa_set_mci_info(&mainstone_mci_platform_data);
  468. pxa_set_ficp_info(&mainstone_ficp_platform_data);
  469. pxa_set_ohci_info(&mainstone_ohci_platform_data);
  470. pxa_set_i2c_info(NULL);
  471. pxa_set_ac97_info(&mst_audio_ops);
  472. mainstone_init_keypad();
  473. }
  474. static struct map_desc mainstone_io_desc[] __initdata = {
  475. { /* CPLD */
  476. .virtual = MST_FPGA_VIRT,
  477. .pfn = __phys_to_pfn(MST_FPGA_PHYS),
  478. .length = 0x00100000,
  479. .type = MT_DEVICE
  480. }
  481. };
  482. static void __init mainstone_map_io(void)
  483. {
  484. pxa27x_map_io();
  485. iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
  486. /* for use I SRAM as framebuffer. */
  487. PSLR |= 0xF04;
  488. PCFR = 0x66;
  489. }
  490. /*
  491. * Driver for the 8 discrete LEDs available for general use:
  492. * Note: bits [15-8] are used to enable/blank the 8 7 segment hex displays
  493. * so be sure to not monkey with them here.
  494. */
  495. #if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
  496. struct mainstone_led {
  497. struct led_classdev cdev;
  498. u8 mask;
  499. };
  500. /*
  501. * The triggers lines up below will only be used if the
  502. * LED triggers are compiled in.
  503. */
  504. static const struct {
  505. const char *name;
  506. const char *trigger;
  507. } mainstone_leds[] = {
  508. { "mainstone:D28", "default-on", },
  509. { "mainstone:D27", "cpu0", },
  510. { "mainstone:D26", "heartbeat" },
  511. { "mainstone:D25", },
  512. { "mainstone:D24", },
  513. { "mainstone:D23", },
  514. { "mainstone:D22", },
  515. { "mainstone:D21", },
  516. };
  517. static void mainstone_led_set(struct led_classdev *cdev,
  518. enum led_brightness b)
  519. {
  520. struct mainstone_led *led = container_of(cdev,
  521. struct mainstone_led, cdev);
  522. u32 reg = MST_LEDCTRL;
  523. if (b != LED_OFF)
  524. reg |= led->mask;
  525. else
  526. reg &= ~led->mask;
  527. MST_LEDCTRL = reg;
  528. }
  529. static enum led_brightness mainstone_led_get(struct led_classdev *cdev)
  530. {
  531. struct mainstone_led *led = container_of(cdev,
  532. struct mainstone_led, cdev);
  533. u32 reg = MST_LEDCTRL;
  534. return (reg & led->mask) ? LED_FULL : LED_OFF;
  535. }
  536. static int __init mainstone_leds_init(void)
  537. {
  538. int i;
  539. if (!machine_is_mainstone())
  540. return -ENODEV;
  541. /* All ON */
  542. MST_LEDCTRL |= 0xff;
  543. for (i = 0; i < ARRAY_SIZE(mainstone_leds); i++) {
  544. struct mainstone_led *led;
  545. led = kzalloc(sizeof(*led), GFP_KERNEL);
  546. if (!led)
  547. break;
  548. led->cdev.name = mainstone_leds[i].name;
  549. led->cdev.brightness_set = mainstone_led_set;
  550. led->cdev.brightness_get = mainstone_led_get;
  551. led->cdev.default_trigger = mainstone_leds[i].trigger;
  552. led->mask = BIT(i);
  553. if (led_classdev_register(NULL, &led->cdev) < 0) {
  554. kfree(led);
  555. break;
  556. }
  557. }
  558. return 0;
  559. }
  560. /*
  561. * Since we may have triggers on any subsystem, defer registration
  562. * until after subsystem_init.
  563. */
  564. fs_initcall(mainstone_leds_init);
  565. #endif
  566. MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
  567. /* Maintainer: MontaVista Software Inc. */
  568. .atag_offset = 0x100, /* BLOB boot parameter setting */
  569. .map_io = mainstone_map_io,
  570. .nr_irqs = MAINSTONE_NR_IRQS,
  571. .init_irq = pxa27x_init_irq,
  572. .handle_irq = pxa27x_handle_irq,
  573. .init_time = pxa_timer_init,
  574. .init_machine = mainstone_init,
  575. .restart = pxa_restart,
  576. MACHINE_END