setup.c 14 KB

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  1. /*
  2. * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. #include <linux/seq_file.h>
  9. #include <linux/fs.h>
  10. #include <linux/delay.h>
  11. #include <linux/root_dev.h>
  12. #include <linux/console.h>
  13. #include <linux/module.h>
  14. #include <linux/cpu.h>
  15. #include <linux/clk-provider.h>
  16. #include <linux/of_fdt.h>
  17. #include <linux/of_platform.h>
  18. #include <linux/cache.h>
  19. #include <asm/sections.h>
  20. #include <asm/arcregs.h>
  21. #include <asm/tlb.h>
  22. #include <asm/setup.h>
  23. #include <asm/page.h>
  24. #include <asm/irq.h>
  25. #include <asm/unwind.h>
  26. #include <asm/clk.h>
  27. #include <asm/mach_desc.h>
  28. #include <asm/smp.h>
  29. #define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
  30. unsigned int intr_to_DE_cnt;
  31. /* Part of U-boot ABI: see head.S */
  32. int __initdata uboot_tag;
  33. char __initdata *uboot_arg;
  34. const struct machine_desc *machine_desc;
  35. struct task_struct *_current_task[NR_CPUS]; /* For stack switching */
  36. struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
  37. static void read_arc_build_cfg_regs(void)
  38. {
  39. struct bcr_perip uncached_space;
  40. struct bcr_generic bcr;
  41. struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
  42. unsigned long perip_space;
  43. FIX_PTR(cpu);
  44. READ_BCR(AUX_IDENTITY, cpu->core);
  45. READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa);
  46. READ_BCR(ARC_REG_TIMERS_BCR, cpu->timers);
  47. cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
  48. READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
  49. if (uncached_space.ver < 3)
  50. perip_space = uncached_space.start << 24;
  51. else
  52. perip_space = read_aux_reg(AUX_NON_VOL) & 0xF0000000;
  53. BUG_ON(perip_space != ARC_UNCACHED_ADDR_SPACE);
  54. READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
  55. cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
  56. cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
  57. cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0; /* 1,3 */
  58. cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
  59. cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
  60. /* Note that we read the CCM BCRs independent of kernel config
  61. * This is to catch the cases where user doesn't know that
  62. * CCMs are present in hardware build
  63. */
  64. {
  65. struct bcr_iccm iccm;
  66. struct bcr_dccm dccm;
  67. struct bcr_dccm_base dccm_base;
  68. unsigned int bcr_32bit_val;
  69. bcr_32bit_val = read_aux_reg(ARC_REG_ICCM_BCR);
  70. if (bcr_32bit_val) {
  71. iccm = *((struct bcr_iccm *)&bcr_32bit_val);
  72. cpu->iccm.base_addr = iccm.base << 16;
  73. cpu->iccm.sz = 0x2000 << (iccm.sz - 1);
  74. }
  75. bcr_32bit_val = read_aux_reg(ARC_REG_DCCM_BCR);
  76. if (bcr_32bit_val) {
  77. dccm = *((struct bcr_dccm *)&bcr_32bit_val);
  78. cpu->dccm.sz = 0x800 << (dccm.sz);
  79. READ_BCR(ARC_REG_DCCMBASE_BCR, dccm_base);
  80. cpu->dccm.base_addr = dccm_base.addr << 8;
  81. }
  82. }
  83. READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
  84. read_decode_mmu_bcr();
  85. read_decode_cache_bcr();
  86. if (is_isa_arcompact()) {
  87. struct bcr_fp_arcompact sp, dp;
  88. struct bcr_bpu_arcompact bpu;
  89. READ_BCR(ARC_REG_FP_BCR, sp);
  90. READ_BCR(ARC_REG_DPFP_BCR, dp);
  91. cpu->extn.fpu_sp = sp.ver ? 1 : 0;
  92. cpu->extn.fpu_dp = dp.ver ? 1 : 0;
  93. READ_BCR(ARC_REG_BPU_BCR, bpu);
  94. cpu->bpu.ver = bpu.ver;
  95. cpu->bpu.full = bpu.fam ? 1 : 0;
  96. if (bpu.ent) {
  97. cpu->bpu.num_cache = 256 << (bpu.ent - 1);
  98. cpu->bpu.num_pred = 256 << (bpu.ent - 1);
  99. }
  100. } else {
  101. struct bcr_fp_arcv2 spdp;
  102. struct bcr_bpu_arcv2 bpu;
  103. READ_BCR(ARC_REG_FP_V2_BCR, spdp);
  104. cpu->extn.fpu_sp = spdp.sp ? 1 : 0;
  105. cpu->extn.fpu_dp = spdp.dp ? 1 : 0;
  106. READ_BCR(ARC_REG_BPU_BCR, bpu);
  107. cpu->bpu.ver = bpu.ver;
  108. cpu->bpu.full = bpu.ft;
  109. cpu->bpu.num_cache = 256 << bpu.bce;
  110. cpu->bpu.num_pred = 2048 << bpu.pte;
  111. }
  112. READ_BCR(ARC_REG_AP_BCR, bcr);
  113. cpu->extn.ap = bcr.ver ? 1 : 0;
  114. READ_BCR(ARC_REG_SMART_BCR, bcr);
  115. cpu->extn.smart = bcr.ver ? 1 : 0;
  116. READ_BCR(ARC_REG_RTT_BCR, bcr);
  117. cpu->extn.rtt = bcr.ver ? 1 : 0;
  118. cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt;
  119. }
  120. static const struct cpuinfo_data arc_cpu_tbl[] = {
  121. #ifdef CONFIG_ISA_ARCOMPACT
  122. { {0x20, "ARC 600" }, 0x2F},
  123. { {0x30, "ARC 700" }, 0x33},
  124. { {0x34, "ARC 700 R4.10"}, 0x34},
  125. { {0x35, "ARC 700 R4.11"}, 0x35},
  126. #else
  127. { {0x50, "ARC HS38 R2.0"}, 0x51},
  128. { {0x52, "ARC HS38 R2.1"}, 0x52},
  129. #endif
  130. { {0x00, NULL } }
  131. };
  132. #define IS_AVAIL1(v, s) ((v) ? s : "")
  133. #define IS_USED_RUN(v) ((v) ? "" : "(not used) ")
  134. #define IS_USED_CFG(cfg) IS_USED_RUN(IS_ENABLED(cfg))
  135. #define IS_AVAIL2(v, s, cfg) IS_AVAIL1(v, s), IS_AVAIL1(v, IS_USED_CFG(cfg))
  136. static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
  137. {
  138. struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
  139. struct bcr_identity *core = &cpu->core;
  140. const struct cpuinfo_data *tbl;
  141. char *isa_nm;
  142. int i, be, atomic;
  143. int n = 0;
  144. FIX_PTR(cpu);
  145. if (is_isa_arcompact()) {
  146. isa_nm = "ARCompact";
  147. be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
  148. atomic = cpu->isa.atomic1;
  149. if (!cpu->isa.ver) /* ISA BCR absent, use Kconfig info */
  150. atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
  151. } else {
  152. isa_nm = "ARCv2";
  153. be = cpu->isa.be;
  154. atomic = cpu->isa.atomic;
  155. }
  156. n += scnprintf(buf + n, len - n,
  157. "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
  158. core->family, core->cpu_id, core->chip_id);
  159. for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
  160. if ((core->family >= tbl->info.id) &&
  161. (core->family <= tbl->up_range)) {
  162. n += scnprintf(buf + n, len - n,
  163. "processor [%d]\t: %s (%s ISA) %s\n",
  164. cpu_id, tbl->info.str, isa_nm,
  165. IS_AVAIL1(be, "[Big-Endian]"));
  166. break;
  167. }
  168. }
  169. if (tbl->info.id == 0)
  170. n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n");
  171. n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n",
  172. (unsigned int)(arc_get_core_freq() / 1000000),
  173. (unsigned int)(arc_get_core_freq() / 10000) % 100);
  174. n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
  175. IS_AVAIL1(cpu->timers.t0, "Timer0 "),
  176. IS_AVAIL1(cpu->timers.t1, "Timer1 "),
  177. IS_AVAIL2(cpu->timers.rtc, "64-bit RTC ",
  178. CONFIG_ARC_HAS_RTC));
  179. n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
  180. IS_AVAIL2(atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
  181. IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
  182. IS_AVAIL1(cpu->isa.unalign, "unalign (not used)"));
  183. if (i)
  184. n += scnprintf(buf + n, len - n, "\n\t\t: ");
  185. if (cpu->extn_mpy.ver) {
  186. if (cpu->extn_mpy.ver <= 0x2) { /* ARCompact */
  187. n += scnprintf(buf + n, len - n, "mpy ");
  188. } else {
  189. int opt = 2; /* stock MPY/MPYH */
  190. if (cpu->extn_mpy.dsp) /* OPT 7-9 */
  191. opt = cpu->extn_mpy.dsp + 6;
  192. n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);
  193. }
  194. n += scnprintf(buf + n, len - n, "%s",
  195. IS_USED_CFG(CONFIG_ARC_HAS_HW_MPY));
  196. }
  197. n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
  198. IS_AVAIL1(cpu->isa.div_rem, "div_rem "),
  199. IS_AVAIL1(cpu->extn.norm, "norm "),
  200. IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
  201. IS_AVAIL1(cpu->extn.swap, "swap "),
  202. IS_AVAIL1(cpu->extn.minmax, "minmax "),
  203. IS_AVAIL1(cpu->extn.crc, "crc "),
  204. IS_AVAIL2(1, "swape", CONFIG_ARC_HAS_SWAPE));
  205. if (cpu->bpu.ver)
  206. n += scnprintf(buf + n, len - n,
  207. "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
  208. IS_AVAIL1(cpu->bpu.full, "full"),
  209. IS_AVAIL1(!cpu->bpu.full, "partial"),
  210. cpu->bpu.num_cache, cpu->bpu.num_pred);
  211. return buf;
  212. }
  213. static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
  214. {
  215. int n = 0;
  216. struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
  217. FIX_PTR(cpu);
  218. n += scnprintf(buf + n, len - n,
  219. "Vector Table\t: %#x\nUncached Base\t: %#x\n",
  220. cpu->vec_base, ARC_UNCACHED_ADDR_SPACE);
  221. if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
  222. n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
  223. IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
  224. IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
  225. if (cpu->extn.debug)
  226. n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n",
  227. IS_AVAIL1(cpu->extn.ap, "ActionPoint "),
  228. IS_AVAIL1(cpu->extn.smart, "smaRT "),
  229. IS_AVAIL1(cpu->extn.rtt, "RTT "));
  230. if (cpu->dccm.sz || cpu->iccm.sz)
  231. n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
  232. cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
  233. cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
  234. n += scnprintf(buf + n, len - n,
  235. "OS ABI [v3]\t: no-legacy-syscalls\n");
  236. return buf;
  237. }
  238. static void arc_chk_core_config(void)
  239. {
  240. struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
  241. int fpu_enabled;
  242. if (!cpu->timers.t0)
  243. panic("Timer0 is not present!\n");
  244. if (!cpu->timers.t1)
  245. panic("Timer1 is not present!\n");
  246. if (IS_ENABLED(CONFIG_ARC_HAS_RTC) && !cpu->timers.rtc)
  247. panic("RTC is not present\n");
  248. #ifdef CONFIG_ARC_HAS_DCCM
  249. /*
  250. * DCCM can be arbit placed in hardware.
  251. * Make sure it's placement/sz matches what Linux is built with
  252. */
  253. if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
  254. panic("Linux built with incorrect DCCM Base address\n");
  255. if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
  256. panic("Linux built with incorrect DCCM Size\n");
  257. #endif
  258. #ifdef CONFIG_ARC_HAS_ICCM
  259. if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
  260. panic("Linux built with incorrect ICCM Size\n");
  261. #endif
  262. /*
  263. * FP hardware/software config sanity
  264. * -If hardware contains DPFP, kernel needs to save/restore FPU state
  265. * -If not, it will crash trying to save/restore the non-existant regs
  266. *
  267. * (only DPDP checked since SP has no arch visible regs)
  268. */
  269. fpu_enabled = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
  270. if (cpu->extn.fpu_dp && !fpu_enabled)
  271. pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
  272. else if (!cpu->extn.fpu_dp && fpu_enabled)
  273. panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
  274. if (is_isa_arcv2() && IS_ENABLED(CONFIG_SMP) && cpu->isa.atomic &&
  275. !IS_ENABLED(CONFIG_ARC_STAR_9000923308))
  276. panic("llock/scond livelock workaround missing\n");
  277. }
  278. /*
  279. * Initialize and setup the processor core
  280. * This is called by all the CPUs thus should not do special case stuff
  281. * such as only for boot CPU etc
  282. */
  283. void setup_processor(void)
  284. {
  285. char str[512];
  286. int cpu_id = smp_processor_id();
  287. read_arc_build_cfg_regs();
  288. arc_init_IRQ();
  289. printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
  290. arc_mmu_init();
  291. arc_cache_init();
  292. printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
  293. printk(arc_platform_smp_cpuinfo());
  294. arc_chk_core_config();
  295. }
  296. static inline int is_kernel(unsigned long addr)
  297. {
  298. if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end)
  299. return 1;
  300. return 0;
  301. }
  302. void __init setup_arch(char **cmdline_p)
  303. {
  304. #ifdef CONFIG_ARC_UBOOT_SUPPORT
  305. /* make sure that uboot passed pointer to cmdline/dtb is valid */
  306. if (uboot_tag && is_kernel((unsigned long)uboot_arg))
  307. panic("Invalid uboot arg\n");
  308. /* See if u-boot passed an external Device Tree blob */
  309. machine_desc = setup_machine_fdt(uboot_arg); /* uboot_tag == 2 */
  310. if (!machine_desc)
  311. #endif
  312. {
  313. /* No, so try the embedded one */
  314. machine_desc = setup_machine_fdt(__dtb_start);
  315. if (!machine_desc)
  316. panic("Embedded DT invalid\n");
  317. /*
  318. * If we are here, it is established that @uboot_arg didn't
  319. * point to DT blob. Instead if u-boot says it is cmdline,
  320. * Appent to embedded DT cmdline.
  321. * setup_machine_fdt() would have populated @boot_command_line
  322. */
  323. if (uboot_tag == 1) {
  324. /* Ensure a whitespace between the 2 cmdlines */
  325. strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
  326. strlcat(boot_command_line, uboot_arg,
  327. COMMAND_LINE_SIZE);
  328. }
  329. }
  330. /* Save unparsed command line copy for /proc/cmdline */
  331. *cmdline_p = boot_command_line;
  332. /* To force early parsing of things like mem=xxx */
  333. parse_early_param();
  334. /* Platform/board specific: e.g. early console registration */
  335. if (machine_desc->init_early)
  336. machine_desc->init_early();
  337. setup_processor();
  338. smp_init_cpus();
  339. setup_arch_memory();
  340. /* copy flat DT out of .init and then unflatten it */
  341. unflatten_and_copy_device_tree();
  342. /* Can be issue if someone passes cmd line arg "ro"
  343. * But that is unlikely so keeping it as it is
  344. */
  345. root_mountflags &= ~MS_RDONLY;
  346. #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
  347. conswitchp = &dummy_con;
  348. #endif
  349. arc_unwind_init();
  350. arc_unwind_setup();
  351. }
  352. static int __init customize_machine(void)
  353. {
  354. of_clk_init(NULL);
  355. /*
  356. * Traverses flattened DeviceTree - registering platform devices
  357. * (if any) complete with their resources
  358. */
  359. of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  360. if (machine_desc->init_machine)
  361. machine_desc->init_machine();
  362. return 0;
  363. }
  364. arch_initcall(customize_machine);
  365. static int __init init_late_machine(void)
  366. {
  367. if (machine_desc->init_late)
  368. machine_desc->init_late();
  369. return 0;
  370. }
  371. late_initcall(init_late_machine);
  372. /*
  373. * Get CPU information for use by the procfs.
  374. */
  375. #define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c)))
  376. #define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p))
  377. static int show_cpuinfo(struct seq_file *m, void *v)
  378. {
  379. char *str;
  380. int cpu_id = ptr_to_cpu(v);
  381. if (!cpu_online(cpu_id)) {
  382. seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
  383. goto done;
  384. }
  385. str = (char *)__get_free_page(GFP_TEMPORARY);
  386. if (!str)
  387. goto done;
  388. seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
  389. seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
  390. loops_per_jiffy / (500000 / HZ),
  391. (loops_per_jiffy / (5000 / HZ)) % 100);
  392. seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
  393. seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
  394. seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
  395. seq_printf(m, arc_platform_smp_cpuinfo());
  396. free_page((unsigned long)str);
  397. done:
  398. seq_printf(m, "\n");
  399. return 0;
  400. }
  401. static void *c_start(struct seq_file *m, loff_t *pos)
  402. {
  403. /*
  404. * Callback returns cpu-id to iterator for show routine, NULL to stop.
  405. * However since NULL is also a valid cpu-id (0), we use a round-about
  406. * way to pass it w/o having to kmalloc/free a 2 byte string.
  407. * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
  408. */
  409. return *pos < num_possible_cpus() ? cpu_to_ptr(*pos) : NULL;
  410. }
  411. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  412. {
  413. ++*pos;
  414. return c_start(m, pos);
  415. }
  416. static void c_stop(struct seq_file *m, void *v)
  417. {
  418. }
  419. const struct seq_operations cpuinfo_op = {
  420. .start = c_start,
  421. .next = c_next,
  422. .stop = c_stop,
  423. .show = show_cpuinfo
  424. };
  425. static DEFINE_PER_CPU(struct cpu, cpu_topology);
  426. static int __init topology_init(void)
  427. {
  428. int cpu;
  429. for_each_present_cpu(cpu)
  430. register_cpu(&per_cpu(cpu_topology, cpu), cpu);
  431. return 0;
  432. }
  433. subsys_initcall(topology_init);