rsi_91x_sdio.c 35 KB

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  1. /**
  2. * Copyright (c) 2014 Redpine Signals Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. *
  16. */
  17. #include <linux/module.h>
  18. #include "rsi_sdio.h"
  19. #include "rsi_common.h"
  20. #include "rsi_hal.h"
  21. /**
  22. * rsi_sdio_set_cmd52_arg() - This function prepares cmd 52 read/write arg.
  23. * @rw: Read/write
  24. * @func: function number
  25. * @raw: indicates whether to perform read after write
  26. * @address: address to which to read/write
  27. * @writedata: data to write
  28. *
  29. * Return: argument
  30. */
  31. static u32 rsi_sdio_set_cmd52_arg(bool rw,
  32. u8 func,
  33. u8 raw,
  34. u32 address,
  35. u8 writedata)
  36. {
  37. return ((rw & 1) << 31) | ((func & 0x7) << 28) |
  38. ((raw & 1) << 27) | (1 << 26) |
  39. ((address & 0x1FFFF) << 9) | (1 << 8) |
  40. (writedata & 0xFF);
  41. }
  42. /**
  43. * rsi_cmd52writebyte() - This function issues cmd52 byte write onto the card.
  44. * @card: Pointer to the mmc_card.
  45. * @address: Address to write.
  46. * @byte: Data to write.
  47. *
  48. * Return: Write status.
  49. */
  50. static int rsi_cmd52writebyte(struct mmc_card *card,
  51. u32 address,
  52. u8 byte)
  53. {
  54. struct mmc_command io_cmd;
  55. u32 arg;
  56. memset(&io_cmd, 0, sizeof(io_cmd));
  57. arg = rsi_sdio_set_cmd52_arg(1, 0, 0, address, byte);
  58. io_cmd.opcode = SD_IO_RW_DIRECT;
  59. io_cmd.arg = arg;
  60. io_cmd.flags = MMC_RSP_R5 | MMC_CMD_AC;
  61. return mmc_wait_for_cmd(card->host, &io_cmd, 0);
  62. }
  63. /**
  64. * rsi_cmd52readbyte() - This function issues cmd52 byte read onto the card.
  65. * @card: Pointer to the mmc_card.
  66. * @address: Address to read from.
  67. * @byte: Variable to store read value.
  68. *
  69. * Return: Read status.
  70. */
  71. static int rsi_cmd52readbyte(struct mmc_card *card,
  72. u32 address,
  73. u8 *byte)
  74. {
  75. struct mmc_command io_cmd;
  76. u32 arg;
  77. int err;
  78. memset(&io_cmd, 0, sizeof(io_cmd));
  79. arg = rsi_sdio_set_cmd52_arg(0, 0, 0, address, 0);
  80. io_cmd.opcode = SD_IO_RW_DIRECT;
  81. io_cmd.arg = arg;
  82. io_cmd.flags = MMC_RSP_R5 | MMC_CMD_AC;
  83. err = mmc_wait_for_cmd(card->host, &io_cmd, 0);
  84. if ((!err) && (byte))
  85. *byte = io_cmd.resp[0] & 0xFF;
  86. return err;
  87. }
  88. /**
  89. * rsi_issue_sdiocommand() - This function issues sdio commands.
  90. * @func: Pointer to the sdio_func structure.
  91. * @opcode: Opcode value.
  92. * @arg: Arguments to pass.
  93. * @flags: Flags which are set.
  94. * @resp: Pointer to store response.
  95. *
  96. * Return: err: command status as 0 or -1.
  97. */
  98. static int rsi_issue_sdiocommand(struct sdio_func *func,
  99. u32 opcode,
  100. u32 arg,
  101. u32 flags,
  102. u32 *resp)
  103. {
  104. struct mmc_command cmd;
  105. struct mmc_host *host;
  106. int err;
  107. host = func->card->host;
  108. memset(&cmd, 0, sizeof(struct mmc_command));
  109. cmd.opcode = opcode;
  110. cmd.arg = arg;
  111. cmd.flags = flags;
  112. err = mmc_wait_for_cmd(host, &cmd, 3);
  113. if ((!err) && (resp))
  114. *resp = cmd.resp[0];
  115. return err;
  116. }
  117. /**
  118. * rsi_handle_interrupt() - This function is called upon the occurence
  119. * of an interrupt.
  120. * @function: Pointer to the sdio_func structure.
  121. *
  122. * Return: None.
  123. */
  124. static void rsi_handle_interrupt(struct sdio_func *function)
  125. {
  126. struct rsi_hw *adapter = sdio_get_drvdata(function);
  127. struct rsi_91x_sdiodev *dev =
  128. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  129. if (adapter->priv->fsm_state == FSM_FW_NOT_LOADED)
  130. return;
  131. dev->sdio_irq_task = current;
  132. rsi_interrupt_handler(adapter);
  133. dev->sdio_irq_task = NULL;
  134. }
  135. /**
  136. * rsi_reset_card() - This function resets and re-initializes the card.
  137. * @pfunction: Pointer to the sdio_func structure.
  138. *
  139. * Return: None.
  140. */
  141. static void rsi_reset_card(struct sdio_func *pfunction)
  142. {
  143. int ret = 0;
  144. int err;
  145. struct mmc_card *card = pfunction->card;
  146. struct mmc_host *host = card->host;
  147. s32 bit = (fls(host->ocr_avail) - 1);
  148. u8 cmd52_resp;
  149. u32 clock, resp, i;
  150. u16 rca;
  151. /* Reset 9110 chip */
  152. ret = rsi_cmd52writebyte(pfunction->card,
  153. SDIO_CCCR_ABORT,
  154. (1 << 3));
  155. /* Card will not send any response as it is getting reset immediately
  156. * Hence expect a timeout status from host controller
  157. */
  158. if (ret != -ETIMEDOUT)
  159. rsi_dbg(ERR_ZONE, "%s: Reset failed : %d\n", __func__, ret);
  160. /* Wait for few milli seconds to get rid of residue charges if any */
  161. msleep(20);
  162. /* Initialize the SDIO card */
  163. host->ios.vdd = bit;
  164. host->ios.chip_select = MMC_CS_DONTCARE;
  165. host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN;
  166. host->ios.power_mode = MMC_POWER_UP;
  167. host->ios.bus_width = MMC_BUS_WIDTH_1;
  168. host->ios.timing = MMC_TIMING_LEGACY;
  169. host->ops->set_ios(host, &host->ios);
  170. /*
  171. * This delay should be sufficient to allow the power supply
  172. * to reach the minimum voltage.
  173. */
  174. msleep(20);
  175. host->ios.clock = host->f_min;
  176. host->ios.power_mode = MMC_POWER_ON;
  177. host->ops->set_ios(host, &host->ios);
  178. /*
  179. * This delay must be at least 74 clock sizes, or 1 ms, or the
  180. * time required to reach a stable voltage.
  181. */
  182. msleep(20);
  183. /* Issue CMD0. Goto idle state */
  184. host->ios.chip_select = MMC_CS_HIGH;
  185. host->ops->set_ios(host, &host->ios);
  186. msleep(20);
  187. err = rsi_issue_sdiocommand(pfunction,
  188. MMC_GO_IDLE_STATE,
  189. 0,
  190. (MMC_RSP_NONE | MMC_CMD_BC),
  191. NULL);
  192. host->ios.chip_select = MMC_CS_DONTCARE;
  193. host->ops->set_ios(host, &host->ios);
  194. msleep(20);
  195. host->use_spi_crc = 0;
  196. if (err)
  197. rsi_dbg(ERR_ZONE, "%s: CMD0 failed : %d\n", __func__, err);
  198. /* Issue CMD5, arg = 0 */
  199. err = rsi_issue_sdiocommand(pfunction, SD_IO_SEND_OP_COND, 0,
  200. (MMC_RSP_R4 | MMC_CMD_BCR), &resp);
  201. if (err)
  202. rsi_dbg(ERR_ZONE, "%s: CMD5 failed : %d\n", __func__, err);
  203. card->ocr = resp;
  204. /* Issue CMD5, arg = ocr. Wait till card is ready */
  205. for (i = 0; i < 100; i++) {
  206. err = rsi_issue_sdiocommand(pfunction, SD_IO_SEND_OP_COND,
  207. card->ocr,
  208. (MMC_RSP_R4 | MMC_CMD_BCR), &resp);
  209. if (err) {
  210. rsi_dbg(ERR_ZONE, "%s: CMD5 failed : %d\n",
  211. __func__, err);
  212. break;
  213. }
  214. if (resp & MMC_CARD_BUSY)
  215. break;
  216. msleep(20);
  217. }
  218. if ((i == 100) || (err)) {
  219. rsi_dbg(ERR_ZONE, "%s: card in not ready : %d %d\n",
  220. __func__, i, err);
  221. return;
  222. }
  223. /* Issue CMD3, get RCA */
  224. err = rsi_issue_sdiocommand(pfunction,
  225. SD_SEND_RELATIVE_ADDR,
  226. 0,
  227. (MMC_RSP_R6 | MMC_CMD_BCR),
  228. &resp);
  229. if (err) {
  230. rsi_dbg(ERR_ZONE, "%s: CMD3 failed : %d\n", __func__, err);
  231. return;
  232. }
  233. rca = resp >> 16;
  234. host->ios.bus_mode = MMC_BUSMODE_PUSHPULL;
  235. host->ops->set_ios(host, &host->ios);
  236. /* Issue CMD7, select card */
  237. err = rsi_issue_sdiocommand(pfunction,
  238. MMC_SELECT_CARD,
  239. (rca << 16),
  240. (MMC_RSP_R1 | MMC_CMD_AC),
  241. NULL);
  242. if (err) {
  243. rsi_dbg(ERR_ZONE, "%s: CMD7 failed : %d\n", __func__, err);
  244. return;
  245. }
  246. /* Enable high speed */
  247. if (card->host->caps & MMC_CAP_SD_HIGHSPEED) {
  248. rsi_dbg(ERR_ZONE, "%s: Set high speed mode\n", __func__);
  249. err = rsi_cmd52readbyte(card, SDIO_CCCR_SPEED, &cmd52_resp);
  250. if (err) {
  251. rsi_dbg(ERR_ZONE, "%s: CCCR speed reg read failed: %d\n",
  252. __func__, err);
  253. } else {
  254. err = rsi_cmd52writebyte(card,
  255. SDIO_CCCR_SPEED,
  256. (cmd52_resp | SDIO_SPEED_EHS));
  257. if (err) {
  258. rsi_dbg(ERR_ZONE,
  259. "%s: CCR speed regwrite failed %d\n",
  260. __func__, err);
  261. return;
  262. }
  263. host->ios.timing = MMC_TIMING_SD_HS;
  264. host->ops->set_ios(host, &host->ios);
  265. }
  266. }
  267. /* Set clock */
  268. if (mmc_card_hs(card))
  269. clock = 50000000;
  270. else
  271. clock = card->cis.max_dtr;
  272. if (clock > host->f_max)
  273. clock = host->f_max;
  274. host->ios.clock = clock;
  275. host->ops->set_ios(host, &host->ios);
  276. if (card->host->caps & MMC_CAP_4_BIT_DATA) {
  277. /* CMD52: Set bus width & disable card detect resistor */
  278. err = rsi_cmd52writebyte(card,
  279. SDIO_CCCR_IF,
  280. (SDIO_BUS_CD_DISABLE |
  281. SDIO_BUS_WIDTH_4BIT));
  282. if (err) {
  283. rsi_dbg(ERR_ZONE, "%s: Set bus mode failed : %d\n",
  284. __func__, err);
  285. return;
  286. }
  287. host->ios.bus_width = MMC_BUS_WIDTH_4;
  288. host->ops->set_ios(host, &host->ios);
  289. }
  290. }
  291. /**
  292. * rsi_setclock() - This function sets the clock frequency.
  293. * @adapter: Pointer to the adapter structure.
  294. * @freq: Clock frequency.
  295. *
  296. * Return: None.
  297. */
  298. static void rsi_setclock(struct rsi_hw *adapter, u32 freq)
  299. {
  300. struct rsi_91x_sdiodev *dev =
  301. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  302. struct mmc_host *host = dev->pfunction->card->host;
  303. u32 clock;
  304. clock = freq * 1000;
  305. if (clock > host->f_max)
  306. clock = host->f_max;
  307. host->ios.clock = clock;
  308. host->ops->set_ios(host, &host->ios);
  309. }
  310. /**
  311. * rsi_setblocklength() - This function sets the host block length.
  312. * @adapter: Pointer to the adapter structure.
  313. * @length: Block length to be set.
  314. *
  315. * Return: status: 0 on success, -1 on failure.
  316. */
  317. static int rsi_setblocklength(struct rsi_hw *adapter, u32 length)
  318. {
  319. struct rsi_91x_sdiodev *dev =
  320. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  321. int status;
  322. rsi_dbg(INIT_ZONE, "%s: Setting the block length\n", __func__);
  323. status = sdio_set_block_size(dev->pfunction, length);
  324. dev->pfunction->max_blksize = 256;
  325. adapter->block_size = dev->pfunction->max_blksize;
  326. rsi_dbg(INFO_ZONE,
  327. "%s: Operational blk length is %d\n", __func__, length);
  328. return status;
  329. }
  330. /**
  331. * rsi_setupcard() - This function queries and sets the card's features.
  332. * @adapter: Pointer to the adapter structure.
  333. *
  334. * Return: status: 0 on success, -1 on failure.
  335. */
  336. static int rsi_setupcard(struct rsi_hw *adapter)
  337. {
  338. struct rsi_91x_sdiodev *dev =
  339. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  340. int status = 0;
  341. rsi_setclock(adapter, 50000);
  342. dev->tx_blk_size = 256;
  343. status = rsi_setblocklength(adapter, dev->tx_blk_size);
  344. if (status)
  345. rsi_dbg(ERR_ZONE,
  346. "%s: Unable to set block length\n", __func__);
  347. return status;
  348. }
  349. /**
  350. * rsi_sdio_read_register() - This function reads one byte of information
  351. * from a register.
  352. * @adapter: Pointer to the adapter structure.
  353. * @addr: Address of the register.
  354. * @data: Pointer to the data that stores the data read.
  355. *
  356. * Return: 0 on success, -1 on failure.
  357. */
  358. int rsi_sdio_read_register(struct rsi_hw *adapter,
  359. u32 addr,
  360. u8 *data)
  361. {
  362. struct rsi_91x_sdiodev *dev =
  363. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  364. u8 fun_num = 0;
  365. int status;
  366. if (likely(dev->sdio_irq_task != current))
  367. sdio_claim_host(dev->pfunction);
  368. if (fun_num == 0)
  369. *data = sdio_f0_readb(dev->pfunction, addr, &status);
  370. else
  371. *data = sdio_readb(dev->pfunction, addr, &status);
  372. if (likely(dev->sdio_irq_task != current))
  373. sdio_release_host(dev->pfunction);
  374. return status;
  375. }
  376. /**
  377. * rsi_sdio_write_register() - This function writes one byte of information
  378. * into a register.
  379. * @adapter: Pointer to the adapter structure.
  380. * @function: Function Number.
  381. * @addr: Address of the register.
  382. * @data: Pointer to the data tha has to be written.
  383. *
  384. * Return: 0 on success, -1 on failure.
  385. */
  386. int rsi_sdio_write_register(struct rsi_hw *adapter,
  387. u8 function,
  388. u32 addr,
  389. u8 *data)
  390. {
  391. struct rsi_91x_sdiodev *dev =
  392. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  393. int status = 0;
  394. if (likely(dev->sdio_irq_task != current))
  395. sdio_claim_host(dev->pfunction);
  396. if (function == 0)
  397. sdio_f0_writeb(dev->pfunction, *data, addr, &status);
  398. else
  399. sdio_writeb(dev->pfunction, *data, addr, &status);
  400. if (likely(dev->sdio_irq_task != current))
  401. sdio_release_host(dev->pfunction);
  402. return status;
  403. }
  404. /**
  405. * rsi_sdio_ack_intr() - This function acks the interrupt received.
  406. * @adapter: Pointer to the adapter structure.
  407. * @int_bit: Interrupt bit to write into register.
  408. *
  409. * Return: None.
  410. */
  411. void rsi_sdio_ack_intr(struct rsi_hw *adapter, u8 int_bit)
  412. {
  413. int status;
  414. status = rsi_sdio_write_register(adapter,
  415. 1,
  416. (SDIO_FUN1_INTR_CLR_REG |
  417. RSI_SD_REQUEST_MASTER),
  418. &int_bit);
  419. if (status)
  420. rsi_dbg(ERR_ZONE, "%s: unable to send ack\n", __func__);
  421. }
  422. /**
  423. * rsi_sdio_read_register_multiple() - This function read multiple bytes of
  424. * information from the SD card.
  425. * @adapter: Pointer to the adapter structure.
  426. * @addr: Address of the register.
  427. * @count: Number of multiple bytes to be read.
  428. * @data: Pointer to the read data.
  429. *
  430. * Return: 0 on success, -1 on failure.
  431. */
  432. static int rsi_sdio_read_register_multiple(struct rsi_hw *adapter,
  433. u32 addr,
  434. u8 *data,
  435. u16 count)
  436. {
  437. struct rsi_91x_sdiodev *dev =
  438. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  439. u32 status;
  440. if (likely(dev->sdio_irq_task != current))
  441. sdio_claim_host(dev->pfunction);
  442. status = sdio_readsb(dev->pfunction, data, addr, count);
  443. if (likely(dev->sdio_irq_task != current))
  444. sdio_release_host(dev->pfunction);
  445. if (status != 0)
  446. rsi_dbg(ERR_ZONE, "%s: Synch Cmd53 read failed\n", __func__);
  447. return status;
  448. }
  449. /**
  450. * rsi_sdio_write_register_multiple() - This function writes multiple bytes of
  451. * information to the SD card.
  452. * @adapter: Pointer to the adapter structure.
  453. * @addr: Address of the register.
  454. * @data: Pointer to the data that has to be written.
  455. * @count: Number of multiple bytes to be written.
  456. *
  457. * Return: 0 on success, -1 on failure.
  458. */
  459. int rsi_sdio_write_register_multiple(struct rsi_hw *adapter,
  460. u32 addr,
  461. u8 *data,
  462. u16 count)
  463. {
  464. struct rsi_91x_sdiodev *dev =
  465. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  466. int status;
  467. if (dev->write_fail > 1) {
  468. rsi_dbg(ERR_ZONE, "%s: Stopping card writes\n", __func__);
  469. return 0;
  470. } else if (dev->write_fail == 1) {
  471. /**
  472. * Assuming it is a CRC failure, we want to allow another
  473. * card write
  474. */
  475. rsi_dbg(ERR_ZONE, "%s: Continue card writes\n", __func__);
  476. dev->write_fail++;
  477. }
  478. if (likely(dev->sdio_irq_task != current))
  479. sdio_claim_host(dev->pfunction);
  480. status = sdio_writesb(dev->pfunction, addr, data, count);
  481. if (likely(dev->sdio_irq_task != current))
  482. sdio_release_host(dev->pfunction);
  483. if (status) {
  484. rsi_dbg(ERR_ZONE, "%s: Synch Cmd53 write failed %d\n",
  485. __func__, status);
  486. dev->write_fail = 2;
  487. } else {
  488. memcpy(dev->prev_desc, data, FRAME_DESC_SZ);
  489. }
  490. return status;
  491. }
  492. static int rsi_sdio_load_data_master_write(struct rsi_hw *adapter,
  493. u32 base_address,
  494. u32 instructions_sz,
  495. u16 block_size,
  496. u8 *ta_firmware)
  497. {
  498. u32 num_blocks, offset, i;
  499. u16 msb_address, lsb_address;
  500. u8 temp_buf[block_size];
  501. int status;
  502. num_blocks = instructions_sz / block_size;
  503. msb_address = base_address >> 16;
  504. rsi_dbg(INFO_ZONE, "ins_size: %d, num_blocks: %d\n",
  505. instructions_sz, num_blocks);
  506. /* Loading DM ms word in the sdio slave */
  507. status = rsi_sdio_master_access_msword(adapter, msb_address);
  508. if (status < 0) {
  509. rsi_dbg(ERR_ZONE, "%s: Unable to set ms word reg\n", __func__);
  510. return status;
  511. }
  512. for (offset = 0, i = 0; i < num_blocks; i++, offset += block_size) {
  513. memcpy(temp_buf, ta_firmware + offset, block_size);
  514. lsb_address = (u16)base_address;
  515. status = rsi_sdio_write_register_multiple
  516. (adapter,
  517. lsb_address | RSI_SD_REQUEST_MASTER,
  518. temp_buf, block_size);
  519. if (status < 0) {
  520. rsi_dbg(ERR_ZONE, "%s: failed to write\n", __func__);
  521. return status;
  522. }
  523. rsi_dbg(INFO_ZONE, "%s: loading block: %d\n", __func__, i);
  524. base_address += block_size;
  525. if ((base_address >> 16) != msb_address) {
  526. msb_address += 1;
  527. /* Loading DM ms word in the sdio slave */
  528. status = rsi_sdio_master_access_msword(adapter,
  529. msb_address);
  530. if (status < 0) {
  531. rsi_dbg(ERR_ZONE,
  532. "%s: Unable to set ms word reg\n",
  533. __func__);
  534. return status;
  535. }
  536. }
  537. }
  538. if (instructions_sz % block_size) {
  539. memset(temp_buf, 0, block_size);
  540. memcpy(temp_buf, ta_firmware + offset,
  541. instructions_sz % block_size);
  542. lsb_address = (u16)base_address;
  543. status = rsi_sdio_write_register_multiple
  544. (adapter,
  545. lsb_address | RSI_SD_REQUEST_MASTER,
  546. temp_buf,
  547. instructions_sz % block_size);
  548. if (status < 0)
  549. return status;
  550. rsi_dbg(INFO_ZONE,
  551. "Written Last Block in Address 0x%x Successfully\n",
  552. offset | RSI_SD_REQUEST_MASTER);
  553. }
  554. return 0;
  555. }
  556. #define FLASH_SIZE_ADDR 0x04000016
  557. static int rsi_sdio_master_reg_read(struct rsi_hw *adapter, u32 addr,
  558. u32 *read_buf, u16 size)
  559. {
  560. u32 addr_on_bus, *data;
  561. u32 align[2] = {};
  562. u16 ms_addr;
  563. int status;
  564. data = PTR_ALIGN(&align[0], 8);
  565. ms_addr = (addr >> 16);
  566. status = rsi_sdio_master_access_msword(adapter, ms_addr);
  567. if (status < 0) {
  568. rsi_dbg(ERR_ZONE,
  569. "%s: Unable to set ms word to common reg\n",
  570. __func__);
  571. return status;
  572. }
  573. addr &= 0xFFFF;
  574. addr_on_bus = (addr & 0xFF000000);
  575. if ((addr_on_bus == (FLASH_SIZE_ADDR & 0xFF000000)) ||
  576. (addr_on_bus == 0x0))
  577. addr_on_bus = (addr & ~(0x3));
  578. else
  579. addr_on_bus = addr;
  580. /* Bring TA out of reset */
  581. status = rsi_sdio_read_register_multiple
  582. (adapter,
  583. (addr_on_bus | RSI_SD_REQUEST_MASTER),
  584. (u8 *)data, 4);
  585. if (status < 0) {
  586. rsi_dbg(ERR_ZONE, "%s: AHB register read failed\n", __func__);
  587. return status;
  588. }
  589. if (size == 2) {
  590. if ((addr & 0x3) == 0)
  591. *read_buf = *data;
  592. else
  593. *read_buf = (*data >> 16);
  594. *read_buf = (*read_buf & 0xFFFF);
  595. } else if (size == 1) {
  596. if ((addr & 0x3) == 0)
  597. *read_buf = *data;
  598. else if ((addr & 0x3) == 1)
  599. *read_buf = (*data >> 8);
  600. else if ((addr & 0x3) == 2)
  601. *read_buf = (*data >> 16);
  602. else
  603. *read_buf = (*data >> 24);
  604. *read_buf = (*read_buf & 0xFF);
  605. } else {
  606. *read_buf = *data;
  607. }
  608. return 0;
  609. }
  610. static int rsi_sdio_master_reg_write(struct rsi_hw *adapter,
  611. unsigned long addr,
  612. unsigned long data, u16 size)
  613. {
  614. unsigned long data1[2], *data_aligned;
  615. int status;
  616. data_aligned = PTR_ALIGN(&data1[0], 8);
  617. if (size == 2) {
  618. *data_aligned = ((data << 16) | (data & 0xFFFF));
  619. } else if (size == 1) {
  620. u32 temp_data = data & 0xFF;
  621. *data_aligned = ((temp_data << 24) | (temp_data << 16) |
  622. (temp_data << 8) | temp_data);
  623. } else {
  624. *data_aligned = data;
  625. }
  626. size = 4;
  627. status = rsi_sdio_master_access_msword(adapter, (addr >> 16));
  628. if (status < 0) {
  629. rsi_dbg(ERR_ZONE,
  630. "%s: Unable to set ms word to common reg\n",
  631. __func__);
  632. return -EIO;
  633. }
  634. addr = addr & 0xFFFF;
  635. /* Bring TA out of reset */
  636. status = rsi_sdio_write_register_multiple
  637. (adapter,
  638. (addr | RSI_SD_REQUEST_MASTER),
  639. (u8 *)data_aligned, size);
  640. if (status < 0) {
  641. rsi_dbg(ERR_ZONE,
  642. "%s: Unable to do AHB reg write\n", __func__);
  643. return status;
  644. }
  645. return 0;
  646. }
  647. /**
  648. * rsi_sdio_host_intf_write_pkt() - This function writes the packet to device.
  649. * @adapter: Pointer to the adapter structure.
  650. * @pkt: Pointer to the data to be written on to the device.
  651. * @len: length of the data to be written on to the device.
  652. *
  653. * Return: 0 on success, -1 on failure.
  654. */
  655. static int rsi_sdio_host_intf_write_pkt(struct rsi_hw *adapter,
  656. u8 *pkt,
  657. u32 len)
  658. {
  659. struct rsi_91x_sdiodev *dev =
  660. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  661. u32 block_size = dev->tx_blk_size;
  662. u32 num_blocks, address, length;
  663. u32 queueno;
  664. int status;
  665. queueno = ((pkt[1] >> 4) & 0xf);
  666. num_blocks = len / block_size;
  667. if (len % block_size)
  668. num_blocks++;
  669. address = (num_blocks * block_size | (queueno << 12));
  670. length = num_blocks * block_size;
  671. status = rsi_sdio_write_register_multiple(adapter,
  672. address,
  673. (u8 *)pkt,
  674. length);
  675. if (status)
  676. rsi_dbg(ERR_ZONE, "%s: Unable to write onto the card: %d\n",
  677. __func__, status);
  678. rsi_dbg(DATA_TX_ZONE, "%s: Successfully written onto card\n", __func__);
  679. return status;
  680. }
  681. /**
  682. * rsi_sdio_host_intf_read_pkt() - This function reads the packet
  683. from the device.
  684. * @adapter: Pointer to the adapter data structure.
  685. * @pkt: Pointer to the packet data to be read from the the device.
  686. * @length: Length of the data to be read from the device.
  687. *
  688. * Return: 0 on success, -1 on failure.
  689. */
  690. int rsi_sdio_host_intf_read_pkt(struct rsi_hw *adapter,
  691. u8 *pkt,
  692. u32 length)
  693. {
  694. int status = -EINVAL;
  695. if (!length) {
  696. rsi_dbg(ERR_ZONE, "%s: Pkt size is zero\n", __func__);
  697. return status;
  698. }
  699. status = rsi_sdio_read_register_multiple(adapter,
  700. length,
  701. (u8 *)pkt,
  702. length); /*num of bytes*/
  703. if (status)
  704. rsi_dbg(ERR_ZONE, "%s: Failed to read frame: %d\n", __func__,
  705. status);
  706. return status;
  707. }
  708. /**
  709. * rsi_init_sdio_interface() - This function does init specific to SDIO.
  710. *
  711. * @adapter: Pointer to the adapter data structure.
  712. * @pkt: Pointer to the packet data to be read from the the device.
  713. *
  714. * Return: 0 on success, -1 on failure.
  715. */
  716. static int rsi_init_sdio_interface(struct rsi_hw *adapter,
  717. struct sdio_func *pfunction)
  718. {
  719. struct rsi_91x_sdiodev *rsi_91x_dev;
  720. int status = -ENOMEM;
  721. rsi_91x_dev = kzalloc(sizeof(*rsi_91x_dev), GFP_KERNEL);
  722. if (!rsi_91x_dev)
  723. return status;
  724. adapter->rsi_dev = rsi_91x_dev;
  725. sdio_claim_host(pfunction);
  726. pfunction->enable_timeout = 100;
  727. status = sdio_enable_func(pfunction);
  728. if (status) {
  729. rsi_dbg(ERR_ZONE, "%s: Failed to enable interface\n", __func__);
  730. sdio_release_host(pfunction);
  731. return status;
  732. }
  733. rsi_dbg(INIT_ZONE, "%s: Enabled the interface\n", __func__);
  734. rsi_91x_dev->pfunction = pfunction;
  735. adapter->device = &pfunction->dev;
  736. sdio_set_drvdata(pfunction, adapter);
  737. status = rsi_setupcard(adapter);
  738. if (status) {
  739. rsi_dbg(ERR_ZONE, "%s: Failed to setup card\n", __func__);
  740. goto fail;
  741. }
  742. rsi_dbg(INIT_ZONE, "%s: Setup card succesfully\n", __func__);
  743. status = rsi_init_sdio_slave_regs(adapter);
  744. if (status) {
  745. rsi_dbg(ERR_ZONE, "%s: Failed to init slave regs\n", __func__);
  746. goto fail;
  747. }
  748. sdio_release_host(pfunction);
  749. adapter->determine_event_timeout = rsi_sdio_determine_event_timeout;
  750. adapter->check_hw_queue_status = rsi_sdio_check_buffer_status;
  751. #ifdef CONFIG_RSI_DEBUGFS
  752. adapter->num_debugfs_entries = MAX_DEBUGFS_ENTRIES;
  753. #endif
  754. return status;
  755. fail:
  756. sdio_disable_func(pfunction);
  757. sdio_release_host(pfunction);
  758. return status;
  759. }
  760. static int rsi_sdio_reinit_device(struct rsi_hw *adapter)
  761. {
  762. struct rsi_91x_sdiodev *sdev = adapter->rsi_dev;
  763. struct sdio_func *pfunction = sdev->pfunction;
  764. int ii;
  765. for (ii = 0; ii < NUM_SOFT_QUEUES; ii++)
  766. skb_queue_purge(&adapter->priv->tx_queue[ii]);
  767. /* Initialize device again */
  768. sdio_claim_host(pfunction);
  769. sdio_release_irq(pfunction);
  770. rsi_reset_card(pfunction);
  771. sdio_enable_func(pfunction);
  772. rsi_setupcard(adapter);
  773. rsi_init_sdio_slave_regs(adapter);
  774. sdio_claim_irq(pfunction, rsi_handle_interrupt);
  775. rsi_hal_device_init(adapter);
  776. sdio_release_host(pfunction);
  777. return 0;
  778. }
  779. static struct rsi_host_intf_ops sdio_host_intf_ops = {
  780. .write_pkt = rsi_sdio_host_intf_write_pkt,
  781. .read_pkt = rsi_sdio_host_intf_read_pkt,
  782. .master_access_msword = rsi_sdio_master_access_msword,
  783. .read_reg_multiple = rsi_sdio_read_register_multiple,
  784. .write_reg_multiple = rsi_sdio_write_register_multiple,
  785. .master_reg_read = rsi_sdio_master_reg_read,
  786. .master_reg_write = rsi_sdio_master_reg_write,
  787. .load_data_master_write = rsi_sdio_load_data_master_write,
  788. .reinit_device = rsi_sdio_reinit_device,
  789. };
  790. /**
  791. * rsi_probe() - This function is called by kernel when the driver provided
  792. * Vendor and device IDs are matched. All the initialization
  793. * work is done here.
  794. * @pfunction: Pointer to the sdio_func structure.
  795. * @id: Pointer to sdio_device_id structure.
  796. *
  797. * Return: 0 on success, 1 on failure.
  798. */
  799. static int rsi_probe(struct sdio_func *pfunction,
  800. const struct sdio_device_id *id)
  801. {
  802. struct rsi_hw *adapter;
  803. rsi_dbg(INIT_ZONE, "%s: Init function called\n", __func__);
  804. adapter = rsi_91x_init();
  805. if (!adapter) {
  806. rsi_dbg(ERR_ZONE, "%s: Failed to init os intf ops\n",
  807. __func__);
  808. return 1;
  809. }
  810. adapter->rsi_host_intf = RSI_HOST_INTF_SDIO;
  811. adapter->host_intf_ops = &sdio_host_intf_ops;
  812. if (rsi_init_sdio_interface(adapter, pfunction)) {
  813. rsi_dbg(ERR_ZONE, "%s: Failed to init sdio interface\n",
  814. __func__);
  815. goto fail;
  816. }
  817. sdio_claim_host(pfunction);
  818. if (sdio_claim_irq(pfunction, rsi_handle_interrupt)) {
  819. rsi_dbg(ERR_ZONE, "%s: Failed to request IRQ\n", __func__);
  820. sdio_release_host(pfunction);
  821. goto fail;
  822. }
  823. sdio_release_host(pfunction);
  824. rsi_dbg(INIT_ZONE, "%s: Registered Interrupt handler\n", __func__);
  825. if (rsi_hal_device_init(adapter)) {
  826. rsi_dbg(ERR_ZONE, "%s: Failed in device init\n", __func__);
  827. sdio_claim_host(pfunction);
  828. sdio_release_irq(pfunction);
  829. sdio_disable_func(pfunction);
  830. sdio_release_host(pfunction);
  831. goto fail;
  832. }
  833. rsi_dbg(INFO_ZONE, "===> RSI Device Init Done <===\n");
  834. if (rsi_sdio_master_access_msword(adapter, MISC_CFG_BASE_ADDR)) {
  835. rsi_dbg(ERR_ZONE, "%s: Unable to set ms word reg\n", __func__);
  836. return -EIO;
  837. }
  838. adapter->priv->hibernate_resume = false;
  839. adapter->priv->reinit_hw = false;
  840. return 0;
  841. fail:
  842. rsi_91x_deinit(adapter);
  843. rsi_dbg(ERR_ZONE, "%s: Failed in probe...Exiting\n", __func__);
  844. return 1;
  845. }
  846. static void ulp_read_write(struct rsi_hw *adapter, u16 addr, u32 data,
  847. u16 len_in_bits)
  848. {
  849. rsi_sdio_master_reg_write(adapter, RSI_GSPI_DATA_REG1,
  850. ((addr << 6) | ((data >> 16) & 0xffff)), 2);
  851. rsi_sdio_master_reg_write(adapter, RSI_GSPI_DATA_REG0,
  852. (data & 0xffff), 2);
  853. rsi_sdio_master_reg_write(adapter, RSI_GSPI_CTRL_REG0,
  854. RSI_GSPI_CTRL_REG0_VALUE, 2);
  855. rsi_sdio_master_reg_write(adapter, RSI_GSPI_CTRL_REG1,
  856. ((len_in_bits - 1) | RSI_GSPI_TRIG), 2);
  857. msleep(20);
  858. }
  859. /*This function resets and re-initializes the chip.*/
  860. static void rsi_reset_chip(struct rsi_hw *adapter)
  861. {
  862. __le32 data;
  863. u8 sdio_interrupt_status = 0;
  864. u8 request = 1;
  865. int ret;
  866. rsi_dbg(INFO_ZONE, "Writing disable to wakeup register\n");
  867. ret = rsi_sdio_write_register(adapter, 0, SDIO_WAKEUP_REG, &request);
  868. if (ret < 0) {
  869. rsi_dbg(ERR_ZONE,
  870. "%s: Failed to write SDIO wakeup register\n", __func__);
  871. return;
  872. }
  873. msleep(20);
  874. ret = rsi_sdio_read_register(adapter, RSI_FN1_INT_REGISTER,
  875. &sdio_interrupt_status);
  876. if (ret < 0) {
  877. rsi_dbg(ERR_ZONE, "%s: Failed to Read Intr Status Register\n",
  878. __func__);
  879. return;
  880. }
  881. rsi_dbg(INFO_ZONE, "%s: Intr Status Register value = %d\n",
  882. __func__, sdio_interrupt_status);
  883. /* Put Thread-Arch processor on hold */
  884. if (rsi_sdio_master_access_msword(adapter, TA_BASE_ADDR)) {
  885. rsi_dbg(ERR_ZONE,
  886. "%s: Unable to set ms word to common reg\n",
  887. __func__);
  888. return;
  889. }
  890. data = TA_HOLD_THREAD_VALUE;
  891. if (rsi_sdio_write_register_multiple(adapter, TA_HOLD_THREAD_REG |
  892. RSI_SD_REQUEST_MASTER,
  893. (u8 *)&data, 4)) {
  894. rsi_dbg(ERR_ZONE,
  895. "%s: Unable to hold Thread-Arch processor threads\n",
  896. __func__);
  897. return;
  898. }
  899. /* This msleep will ensure Thread-Arch processor to go to hold
  900. * and any pending dma transfers to rf spi in device to finish.
  901. */
  902. msleep(100);
  903. ulp_read_write(adapter, RSI_ULP_RESET_REG, RSI_ULP_WRITE_0, 32);
  904. ulp_read_write(adapter, RSI_WATCH_DOG_TIMER_1, RSI_ULP_WRITE_2, 32);
  905. ulp_read_write(adapter, RSI_WATCH_DOG_TIMER_2, RSI_ULP_WRITE_0, 32);
  906. ulp_read_write(adapter, RSI_WATCH_DOG_DELAY_TIMER_1, RSI_ULP_WRITE_50,
  907. 32);
  908. ulp_read_write(adapter, RSI_WATCH_DOG_DELAY_TIMER_2, RSI_ULP_WRITE_0,
  909. 32);
  910. ulp_read_write(adapter, RSI_WATCH_DOG_TIMER_ENABLE,
  911. RSI_ULP_TIMER_ENABLE, 32);
  912. /* This msleep will be sufficient for the ulp
  913. * read write operations to complete for chip reset.
  914. */
  915. msleep(500);
  916. }
  917. /**
  918. * rsi_disconnect() - This function performs the reverse of the probe function.
  919. * @pfunction: Pointer to the sdio_func structure.
  920. *
  921. * Return: void.
  922. */
  923. static void rsi_disconnect(struct sdio_func *pfunction)
  924. {
  925. struct rsi_hw *adapter = sdio_get_drvdata(pfunction);
  926. struct rsi_91x_sdiodev *dev;
  927. if (!adapter)
  928. return;
  929. dev = (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  930. sdio_claim_host(pfunction);
  931. sdio_release_irq(pfunction);
  932. sdio_release_host(pfunction);
  933. mdelay(10);
  934. rsi_mac80211_detach(adapter);
  935. mdelay(10);
  936. /* Reset Chip */
  937. rsi_reset_chip(adapter);
  938. /* Resetting to take care of the case, where-in driver is re-loaded */
  939. sdio_claim_host(pfunction);
  940. rsi_reset_card(pfunction);
  941. sdio_disable_func(pfunction);
  942. sdio_release_host(pfunction);
  943. dev->write_fail = 2;
  944. rsi_91x_deinit(adapter);
  945. rsi_dbg(ERR_ZONE, "##### RSI SDIO device disconnected #####\n");
  946. }
  947. #ifdef CONFIG_PM
  948. static int rsi_set_sdio_pm_caps(struct rsi_hw *adapter)
  949. {
  950. struct rsi_91x_sdiodev *dev =
  951. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  952. struct sdio_func *func = dev->pfunction;
  953. int ret;
  954. ret = sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER);
  955. if (ret)
  956. rsi_dbg(ERR_ZONE, "Set sdio keep pwr flag failed: %d\n", ret);
  957. return ret;
  958. }
  959. static int rsi_sdio_disable_interrupts(struct sdio_func *pfunc)
  960. {
  961. struct rsi_hw *adapter = sdio_get_drvdata(pfunc);
  962. u8 isr_status = 0, data = 0;
  963. int ret;
  964. unsigned long t1;
  965. rsi_dbg(INFO_ZONE, "Waiting for interrupts to be cleared..");
  966. t1 = jiffies;
  967. do {
  968. rsi_sdio_read_register(adapter, RSI_FN1_INT_REGISTER,
  969. &isr_status);
  970. rsi_dbg(INFO_ZONE, ".");
  971. } while ((isr_status) && (jiffies_to_msecs(jiffies - t1) < 20));
  972. rsi_dbg(INFO_ZONE, "Interrupts cleared\n");
  973. sdio_claim_host(pfunc);
  974. ret = rsi_cmd52readbyte(pfunc->card, RSI_INT_ENABLE_REGISTER, &data);
  975. if (ret < 0) {
  976. rsi_dbg(ERR_ZONE,
  977. "%s: Failed to read int enable register\n",
  978. __func__);
  979. goto done;
  980. }
  981. data &= RSI_INT_ENABLE_MASK;
  982. ret = rsi_cmd52writebyte(pfunc->card, RSI_INT_ENABLE_REGISTER, data);
  983. if (ret < 0) {
  984. rsi_dbg(ERR_ZONE,
  985. "%s: Failed to write to int enable register\n",
  986. __func__);
  987. goto done;
  988. }
  989. ret = rsi_cmd52readbyte(pfunc->card, RSI_INT_ENABLE_REGISTER, &data);
  990. if (ret < 0) {
  991. rsi_dbg(ERR_ZONE,
  992. "%s: Failed to read int enable register\n",
  993. __func__);
  994. goto done;
  995. }
  996. rsi_dbg(INFO_ZONE, "int enable reg content = %x\n", data);
  997. done:
  998. sdio_release_host(pfunc);
  999. return ret;
  1000. }
  1001. static int rsi_sdio_enable_interrupts(struct sdio_func *pfunc)
  1002. {
  1003. u8 data;
  1004. int ret;
  1005. struct rsi_hw *adapter = sdio_get_drvdata(pfunc);
  1006. struct rsi_common *common = adapter->priv;
  1007. sdio_claim_host(pfunc);
  1008. ret = rsi_cmd52readbyte(pfunc->card, RSI_INT_ENABLE_REGISTER, &data);
  1009. if (ret < 0) {
  1010. rsi_dbg(ERR_ZONE,
  1011. "%s: Failed to read int enable register\n", __func__);
  1012. goto done;
  1013. }
  1014. data |= ~RSI_INT_ENABLE_MASK & 0xff;
  1015. ret = rsi_cmd52writebyte(pfunc->card, RSI_INT_ENABLE_REGISTER, data);
  1016. if (ret < 0) {
  1017. rsi_dbg(ERR_ZONE,
  1018. "%s: Failed to write to int enable register\n",
  1019. __func__);
  1020. goto done;
  1021. }
  1022. if ((common->wow_flags & RSI_WOW_ENABLED) &&
  1023. (common->wow_flags & RSI_WOW_NO_CONNECTION))
  1024. rsi_dbg(ERR_ZONE,
  1025. "##### Device can not wake up through WLAN\n");
  1026. ret = rsi_cmd52readbyte(pfunc->card, RSI_INT_ENABLE_REGISTER, &data);
  1027. if (ret < 0) {
  1028. rsi_dbg(ERR_ZONE,
  1029. "%s: Failed to read int enable register\n", __func__);
  1030. goto done;
  1031. }
  1032. rsi_dbg(INFO_ZONE, "int enable reg content = %x\n", data);
  1033. done:
  1034. sdio_release_host(pfunc);
  1035. return ret;
  1036. }
  1037. static int rsi_suspend(struct device *dev)
  1038. {
  1039. int ret;
  1040. struct sdio_func *pfunction = dev_to_sdio_func(dev);
  1041. struct rsi_hw *adapter = sdio_get_drvdata(pfunction);
  1042. struct rsi_common *common;
  1043. if (!adapter) {
  1044. rsi_dbg(ERR_ZONE, "Device is not ready\n");
  1045. return -ENODEV;
  1046. }
  1047. common = adapter->priv;
  1048. rsi_sdio_disable_interrupts(pfunction);
  1049. ret = rsi_set_sdio_pm_caps(adapter);
  1050. if (ret)
  1051. rsi_dbg(INFO_ZONE,
  1052. "Setting power management caps failed\n");
  1053. common->fsm_state = FSM_CARD_NOT_READY;
  1054. return 0;
  1055. }
  1056. static int rsi_resume(struct device *dev)
  1057. {
  1058. struct sdio_func *pfunction = dev_to_sdio_func(dev);
  1059. struct rsi_hw *adapter = sdio_get_drvdata(pfunction);
  1060. struct rsi_common *common = adapter->priv;
  1061. common->fsm_state = FSM_MAC_INIT_DONE;
  1062. rsi_sdio_enable_interrupts(pfunction);
  1063. return 0;
  1064. }
  1065. static int rsi_freeze(struct device *dev)
  1066. {
  1067. int ret;
  1068. struct sdio_func *pfunction = dev_to_sdio_func(dev);
  1069. struct rsi_hw *adapter = sdio_get_drvdata(pfunction);
  1070. struct rsi_common *common;
  1071. struct rsi_91x_sdiodev *sdev;
  1072. rsi_dbg(INFO_ZONE, "SDIO Bus freeze ===>\n");
  1073. if (!adapter) {
  1074. rsi_dbg(ERR_ZONE, "Device is not ready\n");
  1075. return -ENODEV;
  1076. }
  1077. common = adapter->priv;
  1078. sdev = (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  1079. if ((common->wow_flags & RSI_WOW_ENABLED) &&
  1080. (common->wow_flags & RSI_WOW_NO_CONNECTION))
  1081. rsi_dbg(ERR_ZONE,
  1082. "##### Device can not wake up through WLAN\n");
  1083. ret = rsi_sdio_disable_interrupts(pfunction);
  1084. if (sdev->write_fail)
  1085. rsi_dbg(INFO_ZONE, "###### Device is not ready #######\n");
  1086. ret = rsi_set_sdio_pm_caps(adapter);
  1087. if (ret)
  1088. rsi_dbg(INFO_ZONE, "Setting power management caps failed\n");
  1089. rsi_dbg(INFO_ZONE, "***** RSI module freezed *****\n");
  1090. return 0;
  1091. }
  1092. static int rsi_thaw(struct device *dev)
  1093. {
  1094. struct sdio_func *pfunction = dev_to_sdio_func(dev);
  1095. struct rsi_hw *adapter = sdio_get_drvdata(pfunction);
  1096. struct rsi_common *common = adapter->priv;
  1097. rsi_dbg(ERR_ZONE, "SDIO Bus thaw =====>\n");
  1098. common->hibernate_resume = true;
  1099. common->fsm_state = FSM_CARD_NOT_READY;
  1100. common->iface_down = true;
  1101. rsi_sdio_enable_interrupts(pfunction);
  1102. rsi_dbg(INFO_ZONE, "***** RSI module thaw done *****\n");
  1103. return 0;
  1104. }
  1105. static void rsi_shutdown(struct device *dev)
  1106. {
  1107. struct sdio_func *pfunction = dev_to_sdio_func(dev);
  1108. struct rsi_hw *adapter = sdio_get_drvdata(pfunction);
  1109. struct rsi_91x_sdiodev *sdev =
  1110. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  1111. struct ieee80211_hw *hw = adapter->hw;
  1112. struct cfg80211_wowlan *wowlan = hw->wiphy->wowlan_config;
  1113. rsi_dbg(ERR_ZONE, "SDIO Bus shutdown =====>\n");
  1114. if (rsi_config_wowlan(adapter, wowlan))
  1115. rsi_dbg(ERR_ZONE, "Failed to configure WoWLAN\n");
  1116. rsi_sdio_disable_interrupts(sdev->pfunction);
  1117. if (sdev->write_fail)
  1118. rsi_dbg(INFO_ZONE, "###### Device is not ready #######\n");
  1119. if (rsi_set_sdio_pm_caps(adapter))
  1120. rsi_dbg(INFO_ZONE, "Setting power management caps failed\n");
  1121. rsi_dbg(INFO_ZONE, "***** RSI module shut down *****\n");
  1122. }
  1123. static int rsi_restore(struct device *dev)
  1124. {
  1125. struct sdio_func *pfunction = dev_to_sdio_func(dev);
  1126. struct rsi_hw *adapter = sdio_get_drvdata(pfunction);
  1127. struct rsi_common *common = adapter->priv;
  1128. rsi_dbg(INFO_ZONE, "SDIO Bus restore ======>\n");
  1129. common->hibernate_resume = true;
  1130. common->fsm_state = FSM_FW_NOT_LOADED;
  1131. common->iface_down = true;
  1132. adapter->sc_nvifs = 0;
  1133. ieee80211_restart_hw(adapter->hw);
  1134. common->wow_flags = 0;
  1135. common->iface_down = false;
  1136. rsi_dbg(INFO_ZONE, "RSI module restored\n");
  1137. return 0;
  1138. }
  1139. static const struct dev_pm_ops rsi_pm_ops = {
  1140. .suspend = rsi_suspend,
  1141. .resume = rsi_resume,
  1142. .freeze = rsi_freeze,
  1143. .thaw = rsi_thaw,
  1144. .restore = rsi_restore,
  1145. };
  1146. #endif
  1147. static const struct sdio_device_id rsi_dev_table[] = {
  1148. { SDIO_DEVICE(0x303, 0x100) },
  1149. { SDIO_DEVICE(0x041B, 0x0301) },
  1150. { SDIO_DEVICE(0x041B, 0x0201) },
  1151. { SDIO_DEVICE(0x041B, 0x9330) },
  1152. { /* Blank */},
  1153. };
  1154. static struct sdio_driver rsi_driver = {
  1155. .name = "RSI-SDIO WLAN",
  1156. .probe = rsi_probe,
  1157. .remove = rsi_disconnect,
  1158. .id_table = rsi_dev_table,
  1159. #ifdef CONFIG_PM
  1160. .drv = {
  1161. .pm = &rsi_pm_ops,
  1162. .shutdown = rsi_shutdown,
  1163. }
  1164. #endif
  1165. };
  1166. /**
  1167. * rsi_module_init() - This function registers the sdio module.
  1168. * @void: Void.
  1169. *
  1170. * Return: 0 on success.
  1171. */
  1172. static int rsi_module_init(void)
  1173. {
  1174. int ret;
  1175. ret = sdio_register_driver(&rsi_driver);
  1176. rsi_dbg(INIT_ZONE, "%s: Registering driver\n", __func__);
  1177. return ret;
  1178. }
  1179. /**
  1180. * rsi_module_exit() - This function unregisters the sdio module.
  1181. * @void: Void.
  1182. *
  1183. * Return: None.
  1184. */
  1185. static void rsi_module_exit(void)
  1186. {
  1187. sdio_unregister_driver(&rsi_driver);
  1188. rsi_dbg(INFO_ZONE, "%s: Unregistering driver\n", __func__);
  1189. }
  1190. module_init(rsi_module_init);
  1191. module_exit(rsi_module_exit);
  1192. MODULE_AUTHOR("Redpine Signals Inc");
  1193. MODULE_DESCRIPTION("Common SDIO layer for RSI drivers");
  1194. MODULE_SUPPORTED_DEVICE("RSI-91x");
  1195. MODULE_DEVICE_TABLE(sdio, rsi_dev_table);
  1196. MODULE_FIRMWARE(FIRMWARE_RSI9113);
  1197. MODULE_VERSION("0.1");
  1198. MODULE_LICENSE("Dual BSD/GPL");