fw.c 32 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  9. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  10. * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of version 2 of the GNU General Public License as
  14. * published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  24. * USA
  25. *
  26. * The full GNU General Public License is included in this distribution
  27. * in the file called COPYING.
  28. *
  29. * Contact Information:
  30. * Intel Linux Wireless <linuxwifi@intel.com>
  31. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  32. *
  33. * BSD LICENSE
  34. *
  35. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  36. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  37. * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
  38. * All rights reserved.
  39. *
  40. * Redistribution and use in source and binary forms, with or without
  41. * modification, are permitted provided that the following conditions
  42. * are met:
  43. *
  44. * * Redistributions of source code must retain the above copyright
  45. * notice, this list of conditions and the following disclaimer.
  46. * * Redistributions in binary form must reproduce the above copyright
  47. * notice, this list of conditions and the following disclaimer in
  48. * the documentation and/or other materials provided with the
  49. * distribution.
  50. * * Neither the name Intel Corporation nor the names of its
  51. * contributors may be used to endorse or promote products derived
  52. * from this software without specific prior written permission.
  53. *
  54. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  55. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  56. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  57. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  58. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  59. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  60. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  61. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  62. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  63. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  64. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  65. *
  66. *****************************************************************************/
  67. #include <net/mac80211.h>
  68. #include <linux/netdevice.h>
  69. #include "iwl-trans.h"
  70. #include "iwl-op-mode.h"
  71. #include "fw/img.h"
  72. #include "iwl-debug.h"
  73. #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
  74. #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
  75. #include "iwl-prph.h"
  76. #include "fw/acpi.h"
  77. #include "mvm.h"
  78. #include "fw/dbg.h"
  79. #include "iwl-phy-db.h"
  80. #define MVM_UCODE_ALIVE_TIMEOUT HZ
  81. #define MVM_UCODE_CALIB_TIMEOUT (2*HZ)
  82. #define UCODE_VALID_OK cpu_to_le32(0x1)
  83. struct iwl_mvm_alive_data {
  84. bool valid;
  85. u32 scd_base_addr;
  86. };
  87. static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
  88. {
  89. struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
  90. .valid = cpu_to_le32(valid_tx_ant),
  91. };
  92. IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
  93. return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
  94. sizeof(tx_ant_cmd), &tx_ant_cmd);
  95. }
  96. static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
  97. {
  98. int i;
  99. struct iwl_rss_config_cmd cmd = {
  100. .flags = cpu_to_le32(IWL_RSS_ENABLE),
  101. .hash_mask = IWL_RSS_HASH_TYPE_IPV4_TCP |
  102. IWL_RSS_HASH_TYPE_IPV4_UDP |
  103. IWL_RSS_HASH_TYPE_IPV4_PAYLOAD |
  104. IWL_RSS_HASH_TYPE_IPV6_TCP |
  105. IWL_RSS_HASH_TYPE_IPV6_UDP |
  106. IWL_RSS_HASH_TYPE_IPV6_PAYLOAD,
  107. };
  108. if (mvm->trans->num_rx_queues == 1)
  109. return 0;
  110. /* Do not direct RSS traffic to Q 0 which is our fallback queue */
  111. for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
  112. cmd.indirection_table[i] =
  113. 1 + (i % (mvm->trans->num_rx_queues - 1));
  114. netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
  115. return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
  116. }
  117. static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
  118. {
  119. struct iwl_dqa_enable_cmd dqa_cmd = {
  120. .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
  121. };
  122. u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0);
  123. int ret;
  124. ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
  125. if (ret)
  126. IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
  127. else
  128. IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
  129. return ret;
  130. }
  131. void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
  132. struct iwl_rx_cmd_buffer *rxb)
  133. {
  134. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  135. struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
  136. __le32 *dump_data = mfu_dump_notif->data;
  137. int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32);
  138. int i;
  139. if (mfu_dump_notif->index_num == 0)
  140. IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
  141. le32_to_cpu(mfu_dump_notif->assert_id));
  142. for (i = 0; i < n_words; i++)
  143. IWL_DEBUG_INFO(mvm,
  144. "MFUART assert dump, dword %u: 0x%08x\n",
  145. le16_to_cpu(mfu_dump_notif->index_num) *
  146. n_words + i,
  147. le32_to_cpu(dump_data[i]));
  148. }
  149. static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
  150. struct iwl_rx_packet *pkt, void *data)
  151. {
  152. struct iwl_mvm *mvm =
  153. container_of(notif_wait, struct iwl_mvm, notif_wait);
  154. struct iwl_mvm_alive_data *alive_data = data;
  155. struct mvm_alive_resp_v3 *palive3;
  156. struct mvm_alive_resp *palive;
  157. struct iwl_umac_alive *umac;
  158. struct iwl_lmac_alive *lmac1;
  159. struct iwl_lmac_alive *lmac2 = NULL;
  160. u16 status;
  161. u32 umac_error_event_table;
  162. if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) {
  163. palive = (void *)pkt->data;
  164. umac = &palive->umac_data;
  165. lmac1 = &palive->lmac_data[0];
  166. lmac2 = &palive->lmac_data[1];
  167. status = le16_to_cpu(palive->status);
  168. } else {
  169. palive3 = (void *)pkt->data;
  170. umac = &palive3->umac_data;
  171. lmac1 = &palive3->lmac_data;
  172. status = le16_to_cpu(palive3->status);
  173. }
  174. mvm->error_event_table[0] = le32_to_cpu(lmac1->error_event_table_ptr);
  175. if (lmac2)
  176. mvm->error_event_table[1] =
  177. le32_to_cpu(lmac2->error_event_table_ptr);
  178. mvm->log_event_table = le32_to_cpu(lmac1->log_event_table_ptr);
  179. umac_error_event_table = le32_to_cpu(umac->error_info_addr);
  180. if (!umac_error_event_table) {
  181. mvm->support_umac_log = false;
  182. } else if (umac_error_event_table >=
  183. mvm->trans->cfg->min_umac_error_event_table) {
  184. mvm->support_umac_log = true;
  185. mvm->umac_error_event_table = umac_error_event_table;
  186. } else {
  187. IWL_ERR(mvm,
  188. "Not valid error log pointer 0x%08X for %s uCode\n",
  189. mvm->umac_error_event_table,
  190. (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ?
  191. "Init" : "RT");
  192. mvm->support_umac_log = false;
  193. }
  194. alive_data->scd_base_addr = le32_to_cpu(lmac1->scd_base_ptr);
  195. alive_data->valid = status == IWL_ALIVE_STATUS_OK;
  196. IWL_DEBUG_FW(mvm,
  197. "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
  198. status, lmac1->ver_type, lmac1->ver_subtype);
  199. if (lmac2)
  200. IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
  201. IWL_DEBUG_FW(mvm,
  202. "UMAC version: Major - 0x%x, Minor - 0x%x\n",
  203. le32_to_cpu(umac->umac_major),
  204. le32_to_cpu(umac->umac_minor));
  205. return true;
  206. }
  207. static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
  208. struct iwl_rx_packet *pkt, void *data)
  209. {
  210. WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
  211. return true;
  212. }
  213. static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
  214. struct iwl_rx_packet *pkt, void *data)
  215. {
  216. struct iwl_phy_db *phy_db = data;
  217. if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
  218. WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
  219. return true;
  220. }
  221. WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
  222. return false;
  223. }
  224. static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
  225. enum iwl_ucode_type ucode_type)
  226. {
  227. struct iwl_notification_wait alive_wait;
  228. struct iwl_mvm_alive_data alive_data;
  229. const struct fw_img *fw;
  230. int ret, i;
  231. enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
  232. static const u16 alive_cmd[] = { MVM_ALIVE };
  233. if (ucode_type == IWL_UCODE_REGULAR &&
  234. iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
  235. !(fw_has_capa(&mvm->fw->ucode_capa,
  236. IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
  237. fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
  238. else
  239. fw = iwl_get_ucode_image(mvm->fw, ucode_type);
  240. if (WARN_ON(!fw))
  241. return -EINVAL;
  242. iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
  243. clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
  244. iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
  245. alive_cmd, ARRAY_SIZE(alive_cmd),
  246. iwl_alive_fn, &alive_data);
  247. ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT);
  248. if (ret) {
  249. iwl_fw_set_current_image(&mvm->fwrt, old_type);
  250. iwl_remove_notification(&mvm->notif_wait, &alive_wait);
  251. return ret;
  252. }
  253. /*
  254. * Some things may run in the background now, but we
  255. * just wait for the ALIVE notification here.
  256. */
  257. ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
  258. MVM_UCODE_ALIVE_TIMEOUT);
  259. if (ret) {
  260. struct iwl_trans *trans = mvm->trans;
  261. if (trans->cfg->device_family == IWL_DEVICE_FAMILY_A000)
  262. IWL_ERR(mvm,
  263. "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
  264. iwl_read_prph(trans, UMAG_SB_CPU_1_STATUS),
  265. iwl_read_prph(trans, UMAG_SB_CPU_2_STATUS));
  266. else if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_8000)
  267. IWL_ERR(mvm,
  268. "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
  269. iwl_read_prph(trans, SB_CPU_1_STATUS),
  270. iwl_read_prph(trans, SB_CPU_2_STATUS));
  271. iwl_fw_set_current_image(&mvm->fwrt, old_type);
  272. return ret;
  273. }
  274. if (!alive_data.valid) {
  275. IWL_ERR(mvm, "Loaded ucode is not valid!\n");
  276. iwl_fw_set_current_image(&mvm->fwrt, old_type);
  277. return -EIO;
  278. }
  279. iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
  280. /*
  281. * Note: all the queues are enabled as part of the interface
  282. * initialization, but in firmware restart scenarios they
  283. * could be stopped, so wake them up. In firmware restart,
  284. * mac80211 will have the queues stopped as well until the
  285. * reconfiguration completes. During normal startup, they
  286. * will be empty.
  287. */
  288. memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
  289. mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].hw_queue_refcount = 1;
  290. for (i = 0; i < IEEE80211_MAX_QUEUES; i++)
  291. atomic_set(&mvm->mac80211_queue_stop_count[i], 0);
  292. set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
  293. return 0;
  294. }
  295. static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
  296. {
  297. struct iwl_notification_wait init_wait;
  298. struct iwl_nvm_access_complete_cmd nvm_complete = {};
  299. struct iwl_init_extended_cfg_cmd init_cfg = {
  300. .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
  301. };
  302. static const u16 init_complete[] = {
  303. INIT_COMPLETE_NOTIF,
  304. };
  305. int ret;
  306. lockdep_assert_held(&mvm->mutex);
  307. iwl_init_notification_wait(&mvm->notif_wait,
  308. &init_wait,
  309. init_complete,
  310. ARRAY_SIZE(init_complete),
  311. iwl_wait_init_complete,
  312. NULL);
  313. /* Will also start the device */
  314. ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
  315. if (ret) {
  316. IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
  317. goto error;
  318. }
  319. /* Send init config command to mark that we are sending NVM access
  320. * commands
  321. */
  322. ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
  323. INIT_EXTENDED_CFG_CMD), 0,
  324. sizeof(init_cfg), &init_cfg);
  325. if (ret) {
  326. IWL_ERR(mvm, "Failed to run init config command: %d\n",
  327. ret);
  328. goto error;
  329. }
  330. /* Load NVM to NIC if needed */
  331. if (mvm->nvm_file_name) {
  332. iwl_mvm_read_external_nvm(mvm);
  333. iwl_mvm_load_nvm_to_nic(mvm);
  334. }
  335. if (IWL_MVM_PARSE_NVM && read_nvm) {
  336. ret = iwl_nvm_init(mvm);
  337. if (ret) {
  338. IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
  339. goto error;
  340. }
  341. }
  342. ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
  343. NVM_ACCESS_COMPLETE), 0,
  344. sizeof(nvm_complete), &nvm_complete);
  345. if (ret) {
  346. IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
  347. ret);
  348. goto error;
  349. }
  350. /* We wait for the INIT complete notification */
  351. ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
  352. MVM_UCODE_ALIVE_TIMEOUT);
  353. if (ret)
  354. return ret;
  355. /* Read the NVM only at driver load time, no need to do this twice */
  356. if (!IWL_MVM_PARSE_NVM && read_nvm) {
  357. mvm->nvm_data = iwl_fw_get_nvm(&mvm->fwrt);
  358. if (IS_ERR(mvm->nvm_data)) {
  359. ret = PTR_ERR(mvm->nvm_data);
  360. mvm->nvm_data = NULL;
  361. IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
  362. return ret;
  363. }
  364. }
  365. return 0;
  366. error:
  367. iwl_remove_notification(&mvm->notif_wait, &init_wait);
  368. return ret;
  369. }
  370. static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
  371. {
  372. struct iwl_phy_cfg_cmd phy_cfg_cmd;
  373. enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
  374. /* Set parameters */
  375. phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
  376. phy_cfg_cmd.calib_control.event_trigger =
  377. mvm->fw->default_calib[ucode_type].event_trigger;
  378. phy_cfg_cmd.calib_control.flow_trigger =
  379. mvm->fw->default_calib[ucode_type].flow_trigger;
  380. IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
  381. phy_cfg_cmd.phy_cfg);
  382. return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
  383. sizeof(phy_cfg_cmd), &phy_cfg_cmd);
  384. }
  385. int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
  386. {
  387. struct iwl_notification_wait calib_wait;
  388. static const u16 init_complete[] = {
  389. INIT_COMPLETE_NOTIF,
  390. CALIB_RES_NOTIF_PHY_DB
  391. };
  392. int ret;
  393. if (iwl_mvm_has_unified_ucode(mvm))
  394. return iwl_run_unified_mvm_ucode(mvm, true);
  395. lockdep_assert_held(&mvm->mutex);
  396. if (WARN_ON_ONCE(mvm->calibrating))
  397. return 0;
  398. iwl_init_notification_wait(&mvm->notif_wait,
  399. &calib_wait,
  400. init_complete,
  401. ARRAY_SIZE(init_complete),
  402. iwl_wait_phy_db_entry,
  403. mvm->phy_db);
  404. /* Will also start the device */
  405. ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
  406. if (ret) {
  407. IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
  408. goto remove_notif;
  409. }
  410. if (mvm->cfg->device_family < IWL_DEVICE_FAMILY_8000) {
  411. ret = iwl_mvm_send_bt_init_conf(mvm);
  412. if (ret)
  413. goto remove_notif;
  414. }
  415. /* Read the NVM only at driver load time, no need to do this twice */
  416. if (read_nvm) {
  417. ret = iwl_nvm_init(mvm);
  418. if (ret) {
  419. IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
  420. goto remove_notif;
  421. }
  422. }
  423. /* In case we read the NVM from external file, load it to the NIC */
  424. if (mvm->nvm_file_name)
  425. iwl_mvm_load_nvm_to_nic(mvm);
  426. WARN_ON(iwl_nvm_check_version(mvm->nvm_data, mvm->trans));
  427. /*
  428. * abort after reading the nvm in case RF Kill is on, we will complete
  429. * the init seq later when RF kill will switch to off
  430. */
  431. if (iwl_mvm_is_radio_hw_killed(mvm)) {
  432. IWL_DEBUG_RF_KILL(mvm,
  433. "jump over all phy activities due to RF kill\n");
  434. goto remove_notif;
  435. }
  436. mvm->calibrating = true;
  437. /* Send TX valid antennas before triggering calibrations */
  438. ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
  439. if (ret)
  440. goto remove_notif;
  441. ret = iwl_send_phy_cfg_cmd(mvm);
  442. if (ret) {
  443. IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
  444. ret);
  445. goto remove_notif;
  446. }
  447. /*
  448. * Some things may run in the background now, but we
  449. * just wait for the calibration complete notification.
  450. */
  451. ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
  452. MVM_UCODE_CALIB_TIMEOUT);
  453. if (!ret)
  454. goto out;
  455. if (iwl_mvm_is_radio_hw_killed(mvm)) {
  456. IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
  457. ret = 0;
  458. } else {
  459. IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
  460. ret);
  461. }
  462. goto out;
  463. remove_notif:
  464. iwl_remove_notification(&mvm->notif_wait, &calib_wait);
  465. out:
  466. mvm->calibrating = false;
  467. if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
  468. /* we want to debug INIT and we have no NVM - fake */
  469. mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
  470. sizeof(struct ieee80211_channel) +
  471. sizeof(struct ieee80211_rate),
  472. GFP_KERNEL);
  473. if (!mvm->nvm_data)
  474. return -ENOMEM;
  475. mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
  476. mvm->nvm_data->bands[0].n_channels = 1;
  477. mvm->nvm_data->bands[0].n_bitrates = 1;
  478. mvm->nvm_data->bands[0].bitrates =
  479. (void *)mvm->nvm_data->channels + 1;
  480. mvm->nvm_data->bands[0].bitrates->hw_value = 10;
  481. }
  482. return ret;
  483. }
  484. static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
  485. {
  486. struct iwl_ltr_config_cmd cmd = {
  487. .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
  488. };
  489. if (!mvm->trans->ltr_enabled)
  490. return 0;
  491. return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
  492. sizeof(cmd), &cmd);
  493. }
  494. #ifdef CONFIG_ACPI
  495. static int iwl_mvm_sar_set_profile(struct iwl_mvm *mvm,
  496. union acpi_object *table,
  497. struct iwl_mvm_sar_profile *profile,
  498. bool enabled)
  499. {
  500. int i;
  501. profile->enabled = enabled;
  502. for (i = 0; i < ACPI_SAR_TABLE_SIZE; i++) {
  503. if ((table[i].type != ACPI_TYPE_INTEGER) ||
  504. (table[i].integer.value > U8_MAX))
  505. return -EINVAL;
  506. profile->table[i] = table[i].integer.value;
  507. }
  508. return 0;
  509. }
  510. static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm)
  511. {
  512. union acpi_object *wifi_pkg, *table, *data;
  513. bool enabled;
  514. int ret;
  515. data = iwl_acpi_get_object(mvm->dev, ACPI_WRDS_METHOD);
  516. if (IS_ERR(data))
  517. return PTR_ERR(data);
  518. wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
  519. ACPI_WRDS_WIFI_DATA_SIZE);
  520. if (IS_ERR(wifi_pkg)) {
  521. ret = PTR_ERR(wifi_pkg);
  522. goto out_free;
  523. }
  524. if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) {
  525. ret = -EINVAL;
  526. goto out_free;
  527. }
  528. enabled = !!(wifi_pkg->package.elements[1].integer.value);
  529. /* position of the actual table */
  530. table = &wifi_pkg->package.elements[2];
  531. /* The profile from WRDS is officially profile 1, but goes
  532. * into sar_profiles[0] (because we don't have a profile 0).
  533. */
  534. ret = iwl_mvm_sar_set_profile(mvm, table, &mvm->sar_profiles[0],
  535. enabled);
  536. out_free:
  537. kfree(data);
  538. return ret;
  539. }
  540. static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm)
  541. {
  542. union acpi_object *wifi_pkg, *data;
  543. bool enabled;
  544. int i, n_profiles, ret;
  545. data = iwl_acpi_get_object(mvm->dev, ACPI_EWRD_METHOD);
  546. if (IS_ERR(data))
  547. return PTR_ERR(data);
  548. wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
  549. ACPI_EWRD_WIFI_DATA_SIZE);
  550. if (IS_ERR(wifi_pkg)) {
  551. ret = PTR_ERR(wifi_pkg);
  552. goto out_free;
  553. }
  554. if ((wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) ||
  555. (wifi_pkg->package.elements[2].type != ACPI_TYPE_INTEGER)) {
  556. ret = -EINVAL;
  557. goto out_free;
  558. }
  559. enabled = !!(wifi_pkg->package.elements[1].integer.value);
  560. n_profiles = wifi_pkg->package.elements[2].integer.value;
  561. /* in case of BIOS bug */
  562. if (n_profiles <= 0) {
  563. ret = -EINVAL;
  564. goto out_free;
  565. }
  566. for (i = 0; i < n_profiles; i++) {
  567. /* the tables start at element 3 */
  568. static int pos = 3;
  569. /* The EWRD profiles officially go from 2 to 4, but we
  570. * save them in sar_profiles[1-3] (because we don't
  571. * have profile 0). So in the array we start from 1.
  572. */
  573. ret = iwl_mvm_sar_set_profile(mvm,
  574. &wifi_pkg->package.elements[pos],
  575. &mvm->sar_profiles[i + 1],
  576. enabled);
  577. if (ret < 0)
  578. break;
  579. /* go to the next table */
  580. pos += ACPI_SAR_TABLE_SIZE;
  581. }
  582. out_free:
  583. kfree(data);
  584. return ret;
  585. }
  586. static int iwl_mvm_sar_get_wgds_table(struct iwl_mvm *mvm)
  587. {
  588. union acpi_object *wifi_pkg, *data;
  589. int i, j, ret;
  590. int idx = 1;
  591. data = iwl_acpi_get_object(mvm->dev, ACPI_WGDS_METHOD);
  592. if (IS_ERR(data))
  593. return PTR_ERR(data);
  594. wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
  595. ACPI_WGDS_WIFI_DATA_SIZE);
  596. if (IS_ERR(wifi_pkg)) {
  597. ret = PTR_ERR(wifi_pkg);
  598. goto out_free;
  599. }
  600. for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) {
  601. for (j = 0; j < ACPI_GEO_TABLE_SIZE; j++) {
  602. union acpi_object *entry;
  603. entry = &wifi_pkg->package.elements[idx++];
  604. if ((entry->type != ACPI_TYPE_INTEGER) ||
  605. (entry->integer.value > U8_MAX)) {
  606. ret = -EINVAL;
  607. goto out_free;
  608. }
  609. mvm->geo_profiles[i].values[j] = entry->integer.value;
  610. }
  611. }
  612. ret = 0;
  613. out_free:
  614. kfree(data);
  615. return ret;
  616. }
  617. int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
  618. {
  619. struct iwl_dev_tx_power_cmd cmd = {
  620. .v3.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
  621. };
  622. int i, j, idx;
  623. int profs[ACPI_SAR_NUM_CHAIN_LIMITS] = { prof_a, prof_b };
  624. int len = sizeof(cmd);
  625. BUILD_BUG_ON(ACPI_SAR_NUM_CHAIN_LIMITS < 2);
  626. BUILD_BUG_ON(ACPI_SAR_NUM_CHAIN_LIMITS * ACPI_SAR_NUM_SUB_BANDS !=
  627. ACPI_SAR_TABLE_SIZE);
  628. if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TX_POWER_ACK))
  629. len = sizeof(cmd.v3);
  630. for (i = 0; i < ACPI_SAR_NUM_CHAIN_LIMITS; i++) {
  631. struct iwl_mvm_sar_profile *prof;
  632. /* don't allow SAR to be disabled (profile 0 means disable) */
  633. if (profs[i] == 0)
  634. return -EPERM;
  635. /* we are off by one, so allow up to ACPI_SAR_PROFILE_NUM */
  636. if (profs[i] > ACPI_SAR_PROFILE_NUM)
  637. return -EINVAL;
  638. /* profiles go from 1 to 4, so decrement to access the array */
  639. prof = &mvm->sar_profiles[profs[i] - 1];
  640. /* if the profile is disabled, do nothing */
  641. if (!prof->enabled) {
  642. IWL_DEBUG_RADIO(mvm, "SAR profile %d is disabled.\n",
  643. profs[i]);
  644. /* if one of the profiles is disabled, we fail all */
  645. return -ENOENT;
  646. }
  647. IWL_DEBUG_RADIO(mvm, " Chain[%d]:\n", i);
  648. for (j = 0; j < ACPI_SAR_NUM_SUB_BANDS; j++) {
  649. idx = (i * ACPI_SAR_NUM_SUB_BANDS) + j;
  650. cmd.v3.per_chain_restriction[i][j] =
  651. cpu_to_le16(prof->table[idx]);
  652. IWL_DEBUG_RADIO(mvm, " Band[%d] = %d * .125dBm\n",
  653. j, prof->table[idx]);
  654. }
  655. }
  656. IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
  657. return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd);
  658. }
  659. int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
  660. {
  661. struct iwl_geo_tx_power_profiles_resp *resp;
  662. int ret;
  663. struct iwl_geo_tx_power_profiles_cmd geo_cmd = {
  664. .ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE),
  665. };
  666. struct iwl_host_cmd cmd = {
  667. .id = WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT),
  668. .len = { sizeof(geo_cmd), },
  669. .flags = CMD_WANT_SKB,
  670. .data = { &geo_cmd },
  671. };
  672. ret = iwl_mvm_send_cmd(mvm, &cmd);
  673. if (ret) {
  674. IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
  675. return ret;
  676. }
  677. resp = (void *)cmd.resp_pkt->data;
  678. ret = le32_to_cpu(resp->profile_idx);
  679. if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES)) {
  680. ret = -EIO;
  681. IWL_WARN(mvm, "Invalid geographic profile idx (%d)\n", ret);
  682. }
  683. iwl_free_resp(&cmd);
  684. return ret;
  685. }
  686. static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
  687. {
  688. struct iwl_geo_tx_power_profiles_cmd cmd = {
  689. .ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES),
  690. };
  691. int ret, i, j;
  692. u16 cmd_wide_id = WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT);
  693. ret = iwl_mvm_sar_get_wgds_table(mvm);
  694. if (ret < 0) {
  695. IWL_DEBUG_RADIO(mvm,
  696. "Geo SAR BIOS table invalid or unavailable. (%d)\n",
  697. ret);
  698. /* we don't fail if the table is not available */
  699. return 0;
  700. }
  701. IWL_DEBUG_RADIO(mvm, "Sending GEO_TX_POWER_LIMIT\n");
  702. BUILD_BUG_ON(ACPI_NUM_GEO_PROFILES * ACPI_WGDS_NUM_BANDS *
  703. ACPI_WGDS_TABLE_SIZE != ACPI_WGDS_WIFI_DATA_SIZE);
  704. BUILD_BUG_ON(ACPI_NUM_GEO_PROFILES > IWL_NUM_GEO_PROFILES);
  705. for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) {
  706. struct iwl_per_chain_offset *chain =
  707. (struct iwl_per_chain_offset *)&cmd.table[i];
  708. for (j = 0; j < ACPI_WGDS_NUM_BANDS; j++) {
  709. u8 *value;
  710. value = &mvm->geo_profiles[i].values[j *
  711. ACPI_GEO_PER_CHAIN_SIZE];
  712. chain[j].max_tx_power = cpu_to_le16(value[0]);
  713. chain[j].chain_a = value[1];
  714. chain[j].chain_b = value[2];
  715. IWL_DEBUG_RADIO(mvm,
  716. "SAR geographic profile[%d] Band[%d]: chain A = %d chain B = %d max_tx_power = %d\n",
  717. i, j, value[1], value[2], value[0]);
  718. }
  719. }
  720. return iwl_mvm_send_cmd_pdu(mvm, cmd_wide_id, 0, sizeof(cmd), &cmd);
  721. }
  722. #else /* CONFIG_ACPI */
  723. static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm)
  724. {
  725. return -ENOENT;
  726. }
  727. static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm)
  728. {
  729. return -ENOENT;
  730. }
  731. static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
  732. {
  733. return 0;
  734. }
  735. int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a,
  736. int prof_b)
  737. {
  738. return -ENOENT;
  739. }
  740. int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
  741. {
  742. return -ENOENT;
  743. }
  744. #endif /* CONFIG_ACPI */
  745. static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
  746. {
  747. int ret;
  748. ret = iwl_mvm_sar_get_wrds_table(mvm);
  749. if (ret < 0) {
  750. IWL_DEBUG_RADIO(mvm,
  751. "WRDS SAR BIOS table invalid or unavailable. (%d)\n",
  752. ret);
  753. /* if not available, don't fail and don't bother with EWRD */
  754. return 0;
  755. }
  756. ret = iwl_mvm_sar_get_ewrd_table(mvm);
  757. /* if EWRD is not available, we can still use WRDS, so don't fail */
  758. if (ret < 0)
  759. IWL_DEBUG_RADIO(mvm,
  760. "EWRD SAR BIOS table invalid or unavailable. (%d)\n",
  761. ret);
  762. /* choose profile 1 (WRDS) as default for both chains */
  763. ret = iwl_mvm_sar_select_profile(mvm, 1, 1);
  764. /* if we don't have profile 0 from BIOS, just skip it */
  765. if (ret == -ENOENT)
  766. return 0;
  767. return ret;
  768. }
  769. static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
  770. {
  771. int ret;
  772. if (iwl_mvm_has_unified_ucode(mvm))
  773. return iwl_run_unified_mvm_ucode(mvm, false);
  774. ret = iwl_run_init_mvm_ucode(mvm, false);
  775. if (iwlmvm_mod_params.init_dbg)
  776. return 0;
  777. if (ret) {
  778. IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
  779. return ret;
  780. }
  781. /*
  782. * Stop and start the transport without entering low power
  783. * mode. This will save the state of other components on the
  784. * device that are triggered by the INIT firwmare (MFUART).
  785. */
  786. _iwl_trans_stop_device(mvm->trans, false);
  787. ret = _iwl_trans_start_hw(mvm->trans, false);
  788. if (ret)
  789. return ret;
  790. ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
  791. if (ret)
  792. return ret;
  793. return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
  794. }
  795. int iwl_mvm_up(struct iwl_mvm *mvm)
  796. {
  797. int ret, i;
  798. struct ieee80211_channel *chan;
  799. struct cfg80211_chan_def chandef;
  800. lockdep_assert_held(&mvm->mutex);
  801. ret = iwl_trans_start_hw(mvm->trans);
  802. if (ret)
  803. return ret;
  804. ret = iwl_mvm_load_rt_fw(mvm);
  805. if (ret) {
  806. IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
  807. goto error;
  808. }
  809. iwl_get_shared_mem_conf(&mvm->fwrt);
  810. ret = iwl_mvm_sf_update(mvm, NULL, false);
  811. if (ret)
  812. IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
  813. mvm->fwrt.dump.conf = FW_DBG_INVALID;
  814. /* if we have a destination, assume EARLY START */
  815. if (mvm->fw->dbg_dest_tlv)
  816. mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
  817. iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
  818. ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
  819. if (ret)
  820. goto error;
  821. if (!iwl_mvm_has_unified_ucode(mvm)) {
  822. /* Send phy db control command and then phy db calibration */
  823. ret = iwl_send_phy_db_data(mvm->phy_db);
  824. if (ret)
  825. goto error;
  826. ret = iwl_send_phy_cfg_cmd(mvm);
  827. if (ret)
  828. goto error;
  829. }
  830. ret = iwl_mvm_send_bt_init_conf(mvm);
  831. if (ret)
  832. goto error;
  833. /* Init RSS configuration */
  834. /* TODO - remove a000 disablement when we have RXQ config API */
  835. if (iwl_mvm_has_new_rx_api(mvm) &&
  836. mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_A000) {
  837. ret = iwl_send_rss_cfg_cmd(mvm);
  838. if (ret) {
  839. IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
  840. ret);
  841. goto error;
  842. }
  843. }
  844. /* init the fw <-> mac80211 STA mapping */
  845. for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++)
  846. RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
  847. mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA;
  848. /* reset quota debouncing buffer - 0xff will yield invalid data */
  849. memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
  850. ret = iwl_mvm_send_dqa_cmd(mvm);
  851. if (ret)
  852. goto error;
  853. /* Add auxiliary station for scanning */
  854. ret = iwl_mvm_add_aux_sta(mvm);
  855. if (ret)
  856. goto error;
  857. /* Add all the PHY contexts */
  858. chan = &mvm->hw->wiphy->bands[NL80211_BAND_2GHZ]->channels[0];
  859. cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
  860. for (i = 0; i < NUM_PHY_CTX; i++) {
  861. /*
  862. * The channel used here isn't relevant as it's
  863. * going to be overwritten in the other flows.
  864. * For now use the first channel we have.
  865. */
  866. ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
  867. &chandef, 1, 1);
  868. if (ret)
  869. goto error;
  870. }
  871. #ifdef CONFIG_THERMAL
  872. if (iwl_mvm_is_tt_in_fw(mvm)) {
  873. /* in order to give the responsibility of ct-kill and
  874. * TX backoff to FW we need to send empty temperature reporting
  875. * cmd during init time
  876. */
  877. iwl_mvm_send_temp_report_ths_cmd(mvm);
  878. } else {
  879. /* Initialize tx backoffs to the minimal possible */
  880. iwl_mvm_tt_tx_backoff(mvm, 0);
  881. }
  882. /* TODO: read the budget from BIOS / Platform NVM */
  883. /*
  884. * In case there is no budget from BIOS / Platform NVM the default
  885. * budget should be 2000mW (cooling state 0).
  886. */
  887. if (iwl_mvm_is_ctdp_supported(mvm)) {
  888. ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
  889. mvm->cooling_dev.cur_state);
  890. if (ret)
  891. goto error;
  892. }
  893. #else
  894. /* Initialize tx backoffs to the minimal possible */
  895. iwl_mvm_tt_tx_backoff(mvm, 0);
  896. #endif
  897. WARN_ON(iwl_mvm_config_ltr(mvm));
  898. ret = iwl_mvm_power_update_device(mvm);
  899. if (ret)
  900. goto error;
  901. /*
  902. * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
  903. * anyway, so don't init MCC.
  904. */
  905. if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
  906. ret = iwl_mvm_init_mcc(mvm);
  907. if (ret)
  908. goto error;
  909. }
  910. if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
  911. mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
  912. ret = iwl_mvm_config_scan(mvm);
  913. if (ret)
  914. goto error;
  915. }
  916. /* allow FW/transport low power modes if not during restart */
  917. if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
  918. iwl_mvm_unref(mvm, IWL_MVM_REF_UCODE_DOWN);
  919. ret = iwl_mvm_sar_init(mvm);
  920. if (ret)
  921. goto error;
  922. ret = iwl_mvm_sar_geo_init(mvm);
  923. if (ret)
  924. goto error;
  925. iwl_mvm_leds_sync(mvm);
  926. IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
  927. return 0;
  928. error:
  929. if (!iwlmvm_mod_params.init_dbg)
  930. iwl_mvm_stop_device(mvm);
  931. return ret;
  932. }
  933. int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
  934. {
  935. int ret, i;
  936. lockdep_assert_held(&mvm->mutex);
  937. ret = iwl_trans_start_hw(mvm->trans);
  938. if (ret)
  939. return ret;
  940. ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
  941. if (ret) {
  942. IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
  943. goto error;
  944. }
  945. ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
  946. if (ret)
  947. goto error;
  948. /* Send phy db control command and then phy db calibration*/
  949. ret = iwl_send_phy_db_data(mvm->phy_db);
  950. if (ret)
  951. goto error;
  952. ret = iwl_send_phy_cfg_cmd(mvm);
  953. if (ret)
  954. goto error;
  955. /* init the fw <-> mac80211 STA mapping */
  956. for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++)
  957. RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
  958. /* Add auxiliary station for scanning */
  959. ret = iwl_mvm_add_aux_sta(mvm);
  960. if (ret)
  961. goto error;
  962. return 0;
  963. error:
  964. iwl_mvm_stop_device(mvm);
  965. return ret;
  966. }
  967. void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
  968. struct iwl_rx_cmd_buffer *rxb)
  969. {
  970. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  971. struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
  972. u32 flags = le32_to_cpu(card_state_notif->flags);
  973. IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
  974. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  975. (flags & SW_CARD_DISABLED) ? "Kill" : "On",
  976. (flags & CT_KILL_CARD_DISABLED) ?
  977. "Reached" : "Not reached");
  978. }
  979. void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
  980. struct iwl_rx_cmd_buffer *rxb)
  981. {
  982. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  983. struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
  984. IWL_DEBUG_INFO(mvm,
  985. "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
  986. le32_to_cpu(mfuart_notif->installed_ver),
  987. le32_to_cpu(mfuart_notif->external_ver),
  988. le32_to_cpu(mfuart_notif->status),
  989. le32_to_cpu(mfuart_notif->duration));
  990. if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
  991. IWL_DEBUG_INFO(mvm,
  992. "MFUART: image size: 0x%08x\n",
  993. le32_to_cpu(mfuart_notif->image_size));
  994. }