marvell.c 53 KB

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  1. /*
  2. * drivers/net/phy/marvell.c
  3. *
  4. * Driver for Marvell PHYs
  5. *
  6. * Author: Andy Fleming
  7. *
  8. * Copyright (c) 2004 Freescale Semiconductor, Inc.
  9. *
  10. * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms of the GNU General Public License as published by the
  14. * Free Software Foundation; either version 2 of the License, or (at your
  15. * option) any later version.
  16. *
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/string.h>
  20. #include <linux/ctype.h>
  21. #include <linux/errno.h>
  22. #include <linux/unistd.h>
  23. #include <linux/hwmon.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/init.h>
  26. #include <linux/delay.h>
  27. #include <linux/netdevice.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/skbuff.h>
  30. #include <linux/spinlock.h>
  31. #include <linux/mm.h>
  32. #include <linux/module.h>
  33. #include <linux/mii.h>
  34. #include <linux/ethtool.h>
  35. #include <linux/phy.h>
  36. #include <linux/marvell_phy.h>
  37. #include <linux/of.h>
  38. #include <linux/io.h>
  39. #include <asm/irq.h>
  40. #include <linux/uaccess.h>
  41. #define MII_MARVELL_PHY_PAGE 22
  42. #define MII_MARVELL_COPPER_PAGE 0x00
  43. #define MII_MARVELL_FIBER_PAGE 0x01
  44. #define MII_MARVELL_MSCR_PAGE 0x02
  45. #define MII_MARVELL_LED_PAGE 0x03
  46. #define MII_MARVELL_MISC_TEST_PAGE 0x06
  47. #define MII_MARVELL_WOL_PAGE 0x11
  48. #define MII_M1011_IEVENT 0x13
  49. #define MII_M1011_IEVENT_CLEAR 0x0000
  50. #define MII_M1011_IMASK 0x12
  51. #define MII_M1011_IMASK_INIT 0x6400
  52. #define MII_M1011_IMASK_CLEAR 0x0000
  53. #define MII_M1011_PHY_SCR 0x10
  54. #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
  55. #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12
  56. #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800
  57. #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
  58. #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
  59. #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
  60. #define MII_M1111_PHY_LED_CONTROL 0x18
  61. #define MII_M1111_PHY_LED_DIRECT 0x4100
  62. #define MII_M1111_PHY_LED_COMBINE 0x411c
  63. #define MII_M1111_PHY_EXT_CR 0x14
  64. #define MII_M1111_RGMII_RX_DELAY BIT(7)
  65. #define MII_M1111_RGMII_TX_DELAY BIT(1)
  66. #define MII_M1111_PHY_EXT_SR 0x1b
  67. #define MII_M1111_HWCFG_MODE_MASK 0xf
  68. #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
  69. #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
  70. #define MII_M1111_HWCFG_MODE_RTBI 0x7
  71. #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
  72. #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
  73. #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
  74. #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
  75. #define MII_88E1121_PHY_MSCR_REG 21
  76. #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
  77. #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
  78. #define MII_88E1121_PHY_MSCR_DELAY_MASK (~(BIT(5) | BIT(4)))
  79. #define MII_88E1121_MISC_TEST 0x1a
  80. #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
  81. #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
  82. #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
  83. #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
  84. #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
  85. #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
  86. #define MII_88E1510_TEMP_SENSOR 0x1b
  87. #define MII_88E1510_TEMP_SENSOR_MASK 0xff
  88. #define MII_88E1318S_PHY_MSCR1_REG 16
  89. #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
  90. /* Copper Specific Interrupt Enable Register */
  91. #define MII_88E1318S_PHY_CSIER 0x12
  92. /* WOL Event Interrupt Enable */
  93. #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
  94. /* LED Timer Control Register */
  95. #define MII_88E1318S_PHY_LED_TCR 0x12
  96. #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
  97. #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
  98. #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
  99. /* Magic Packet MAC address registers */
  100. #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
  101. #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
  102. #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
  103. #define MII_88E1318S_PHY_WOL_CTRL 0x10
  104. #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
  105. #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
  106. #define MII_88E1121_PHY_LED_CTRL 16
  107. #define MII_88E1121_PHY_LED_DEF 0x0030
  108. #define MII_M1011_PHY_STATUS 0x11
  109. #define MII_M1011_PHY_STATUS_1000 0x8000
  110. #define MII_M1011_PHY_STATUS_100 0x4000
  111. #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
  112. #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
  113. #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
  114. #define MII_M1011_PHY_STATUS_LINK 0x0400
  115. #define MII_88E3016_PHY_SPEC_CTRL 0x10
  116. #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
  117. #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
  118. #define MII_88E1510_GEN_CTRL_REG_1 0x14
  119. #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
  120. #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
  121. #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
  122. #define LPA_FIBER_1000HALF 0x40
  123. #define LPA_FIBER_1000FULL 0x20
  124. #define LPA_PAUSE_FIBER 0x180
  125. #define LPA_PAUSE_ASYM_FIBER 0x100
  126. #define ADVERTISE_FIBER_1000HALF 0x40
  127. #define ADVERTISE_FIBER_1000FULL 0x20
  128. #define ADVERTISE_PAUSE_FIBER 0x180
  129. #define ADVERTISE_PAUSE_ASYM_FIBER 0x100
  130. #define REGISTER_LINK_STATUS 0x400
  131. #define NB_FIBER_STATS 1
  132. MODULE_DESCRIPTION("Marvell PHY driver");
  133. MODULE_AUTHOR("Andy Fleming");
  134. MODULE_LICENSE("GPL");
  135. struct marvell_hw_stat {
  136. const char *string;
  137. u8 page;
  138. u8 reg;
  139. u8 bits;
  140. };
  141. static struct marvell_hw_stat marvell_hw_stats[] = {
  142. { "phy_receive_errors_copper", 0, 21, 16},
  143. { "phy_idle_errors", 0, 10, 8 },
  144. { "phy_receive_errors_fiber", 1, 21, 16},
  145. };
  146. struct marvell_priv {
  147. u64 stats[ARRAY_SIZE(marvell_hw_stats)];
  148. char *hwmon_name;
  149. struct device *hwmon_dev;
  150. };
  151. static int marvell_get_page(struct phy_device *phydev)
  152. {
  153. return phy_read(phydev, MII_MARVELL_PHY_PAGE);
  154. }
  155. static int marvell_set_page(struct phy_device *phydev, int page)
  156. {
  157. return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
  158. }
  159. static int marvell_get_set_page(struct phy_device *phydev, int page)
  160. {
  161. int oldpage = marvell_get_page(phydev);
  162. if (oldpage < 0)
  163. return oldpage;
  164. if (page != oldpage)
  165. return marvell_set_page(phydev, page);
  166. return 0;
  167. }
  168. static int marvell_ack_interrupt(struct phy_device *phydev)
  169. {
  170. int err;
  171. /* Clear the interrupts by reading the reg */
  172. err = phy_read(phydev, MII_M1011_IEVENT);
  173. if (err < 0)
  174. return err;
  175. return 0;
  176. }
  177. static int marvell_config_intr(struct phy_device *phydev)
  178. {
  179. int err;
  180. if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
  181. err = phy_write(phydev, MII_M1011_IMASK,
  182. MII_M1011_IMASK_INIT);
  183. else
  184. err = phy_write(phydev, MII_M1011_IMASK,
  185. MII_M1011_IMASK_CLEAR);
  186. return err;
  187. }
  188. static int marvell_set_polarity(struct phy_device *phydev, int polarity)
  189. {
  190. int reg;
  191. int err;
  192. int val;
  193. /* get the current settings */
  194. reg = phy_read(phydev, MII_M1011_PHY_SCR);
  195. if (reg < 0)
  196. return reg;
  197. val = reg;
  198. val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
  199. switch (polarity) {
  200. case ETH_TP_MDI:
  201. val |= MII_M1011_PHY_SCR_MDI;
  202. break;
  203. case ETH_TP_MDI_X:
  204. val |= MII_M1011_PHY_SCR_MDI_X;
  205. break;
  206. case ETH_TP_MDI_AUTO:
  207. case ETH_TP_MDI_INVALID:
  208. default:
  209. val |= MII_M1011_PHY_SCR_AUTO_CROSS;
  210. break;
  211. }
  212. if (val != reg) {
  213. /* Set the new polarity value in the register */
  214. err = phy_write(phydev, MII_M1011_PHY_SCR, val);
  215. if (err)
  216. return err;
  217. }
  218. return 0;
  219. }
  220. static int marvell_set_downshift(struct phy_device *phydev, bool enable,
  221. u8 retries)
  222. {
  223. int reg;
  224. reg = phy_read(phydev, MII_M1011_PHY_SCR);
  225. if (reg < 0)
  226. return reg;
  227. reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
  228. reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
  229. if (enable)
  230. reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
  231. return phy_write(phydev, MII_M1011_PHY_SCR, reg);
  232. }
  233. static int marvell_config_aneg(struct phy_device *phydev)
  234. {
  235. int err;
  236. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  237. if (err < 0)
  238. return err;
  239. err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
  240. MII_M1111_PHY_LED_DIRECT);
  241. if (err < 0)
  242. return err;
  243. err = genphy_config_aneg(phydev);
  244. if (err < 0)
  245. return err;
  246. if (phydev->autoneg != AUTONEG_ENABLE) {
  247. /* A write to speed/duplex bits (that is performed by
  248. * genphy_config_aneg() call above) must be followed by
  249. * a software reset. Otherwise, the write has no effect.
  250. */
  251. err = genphy_soft_reset(phydev);
  252. if (err < 0)
  253. return err;
  254. }
  255. return 0;
  256. }
  257. static int m88e1101_config_aneg(struct phy_device *phydev)
  258. {
  259. int err;
  260. /* This Marvell PHY has an errata which requires
  261. * that certain registers get written in order
  262. * to restart autonegotiation
  263. */
  264. err = genphy_soft_reset(phydev);
  265. if (err < 0)
  266. return err;
  267. err = phy_write(phydev, 0x1d, 0x1f);
  268. if (err < 0)
  269. return err;
  270. err = phy_write(phydev, 0x1e, 0x200c);
  271. if (err < 0)
  272. return err;
  273. err = phy_write(phydev, 0x1d, 0x5);
  274. if (err < 0)
  275. return err;
  276. err = phy_write(phydev, 0x1e, 0);
  277. if (err < 0)
  278. return err;
  279. err = phy_write(phydev, 0x1e, 0x100);
  280. if (err < 0)
  281. return err;
  282. return marvell_config_aneg(phydev);
  283. }
  284. static int m88e1111_config_aneg(struct phy_device *phydev)
  285. {
  286. int err;
  287. /* The Marvell PHY has an errata which requires
  288. * that certain registers get written in order
  289. * to restart autonegotiation
  290. */
  291. err = genphy_soft_reset(phydev);
  292. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  293. if (err < 0)
  294. return err;
  295. err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
  296. MII_M1111_PHY_LED_DIRECT);
  297. if (err < 0)
  298. return err;
  299. err = genphy_config_aneg(phydev);
  300. if (err < 0)
  301. return err;
  302. if (phydev->autoneg != AUTONEG_ENABLE) {
  303. /* A write to speed/duplex bits (that is performed by
  304. * genphy_config_aneg() call above) must be followed by
  305. * a software reset. Otherwise, the write has no effect.
  306. */
  307. err = genphy_soft_reset(phydev);
  308. if (err < 0)
  309. return err;
  310. }
  311. return 0;
  312. }
  313. #ifdef CONFIG_OF_MDIO
  314. /* Set and/or override some configuration registers based on the
  315. * marvell,reg-init property stored in the of_node for the phydev.
  316. *
  317. * marvell,reg-init = <reg-page reg mask value>,...;
  318. *
  319. * There may be one or more sets of <reg-page reg mask value>:
  320. *
  321. * reg-page: which register bank to use.
  322. * reg: the register.
  323. * mask: if non-zero, ANDed with existing register value.
  324. * value: ORed with the masked value and written to the regiser.
  325. *
  326. */
  327. static int marvell_of_reg_init(struct phy_device *phydev)
  328. {
  329. const __be32 *paddr;
  330. int len, i, saved_page, current_page, ret;
  331. if (!phydev->mdio.dev.of_node)
  332. return 0;
  333. paddr = of_get_property(phydev->mdio.dev.of_node,
  334. "marvell,reg-init", &len);
  335. if (!paddr || len < (4 * sizeof(*paddr)))
  336. return 0;
  337. saved_page = marvell_get_page(phydev);
  338. if (saved_page < 0)
  339. return saved_page;
  340. current_page = saved_page;
  341. ret = 0;
  342. len /= sizeof(*paddr);
  343. for (i = 0; i < len - 3; i += 4) {
  344. u16 page = be32_to_cpup(paddr + i);
  345. u16 reg = be32_to_cpup(paddr + i + 1);
  346. u16 mask = be32_to_cpup(paddr + i + 2);
  347. u16 val_bits = be32_to_cpup(paddr + i + 3);
  348. int val;
  349. if (page != current_page) {
  350. current_page = page;
  351. ret = marvell_set_page(phydev, page);
  352. if (ret < 0)
  353. goto err;
  354. }
  355. val = 0;
  356. if (mask) {
  357. val = phy_read(phydev, reg);
  358. if (val < 0) {
  359. ret = val;
  360. goto err;
  361. }
  362. val &= mask;
  363. }
  364. val |= val_bits;
  365. ret = phy_write(phydev, reg, val);
  366. if (ret < 0)
  367. goto err;
  368. }
  369. err:
  370. if (current_page != saved_page) {
  371. i = marvell_set_page(phydev, saved_page);
  372. if (ret == 0)
  373. ret = i;
  374. }
  375. return ret;
  376. }
  377. #else
  378. static int marvell_of_reg_init(struct phy_device *phydev)
  379. {
  380. return 0;
  381. }
  382. #endif /* CONFIG_OF_MDIO */
  383. static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
  384. {
  385. int err, oldpage, mscr;
  386. oldpage = marvell_get_set_page(phydev, MII_MARVELL_MSCR_PAGE);
  387. if (oldpage < 0)
  388. return oldpage;
  389. mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG);
  390. if (mscr < 0) {
  391. err = mscr;
  392. goto out;
  393. }
  394. mscr &= MII_88E1121_PHY_MSCR_DELAY_MASK;
  395. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
  396. mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY |
  397. MII_88E1121_PHY_MSCR_TX_DELAY);
  398. else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
  399. mscr |= MII_88E1121_PHY_MSCR_RX_DELAY;
  400. else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
  401. mscr |= MII_88E1121_PHY_MSCR_TX_DELAY;
  402. err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr);
  403. out:
  404. marvell_set_page(phydev, oldpage);
  405. return err;
  406. }
  407. static int m88e1121_config_aneg(struct phy_device *phydev)
  408. {
  409. int err = 0;
  410. if (phy_interface_is_rgmii(phydev)) {
  411. err = m88e1121_config_aneg_rgmii_delays(phydev);
  412. if (err)
  413. return err;
  414. }
  415. err = genphy_soft_reset(phydev);
  416. if (err < 0)
  417. return err;
  418. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  419. if (err < 0)
  420. return err;
  421. return genphy_config_aneg(phydev);
  422. }
  423. static int m88e1318_config_aneg(struct phy_device *phydev)
  424. {
  425. int err, oldpage, mscr;
  426. oldpage = marvell_get_set_page(phydev, MII_MARVELL_MSCR_PAGE);
  427. if (oldpage < 0)
  428. return oldpage;
  429. mscr = phy_read(phydev, MII_88E1318S_PHY_MSCR1_REG);
  430. mscr |= MII_88E1318S_PHY_MSCR1_PAD_ODD;
  431. err = phy_write(phydev, MII_88E1318S_PHY_MSCR1_REG, mscr);
  432. if (err < 0)
  433. return err;
  434. err = marvell_set_page(phydev, oldpage);
  435. if (err < 0)
  436. return err;
  437. return m88e1121_config_aneg(phydev);
  438. }
  439. /**
  440. * ethtool_adv_to_fiber_adv_t
  441. * @ethadv: the ethtool advertisement settings
  442. *
  443. * A small helper function that translates ethtool advertisement
  444. * settings to phy autonegotiation advertisements for the
  445. * MII_ADV register for fiber link.
  446. */
  447. static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv)
  448. {
  449. u32 result = 0;
  450. if (ethadv & ADVERTISED_1000baseT_Half)
  451. result |= ADVERTISE_FIBER_1000HALF;
  452. if (ethadv & ADVERTISED_1000baseT_Full)
  453. result |= ADVERTISE_FIBER_1000FULL;
  454. if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP))
  455. result |= LPA_PAUSE_ASYM_FIBER;
  456. else if (ethadv & ADVERTISE_PAUSE_CAP)
  457. result |= (ADVERTISE_PAUSE_FIBER
  458. & (~ADVERTISE_PAUSE_ASYM_FIBER));
  459. return result;
  460. }
  461. /**
  462. * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
  463. * @phydev: target phy_device struct
  464. *
  465. * Description: If auto-negotiation is enabled, we configure the
  466. * advertising, and then restart auto-negotiation. If it is not
  467. * enabled, then we write the BMCR. Adapted for fiber link in
  468. * some Marvell's devices.
  469. */
  470. static int marvell_config_aneg_fiber(struct phy_device *phydev)
  471. {
  472. int changed = 0;
  473. int err;
  474. int adv, oldadv;
  475. u32 advertise;
  476. if (phydev->autoneg != AUTONEG_ENABLE)
  477. return genphy_setup_forced(phydev);
  478. /* Only allow advertising what this PHY supports */
  479. phydev->advertising &= phydev->supported;
  480. advertise = phydev->advertising;
  481. /* Setup fiber advertisement */
  482. adv = phy_read(phydev, MII_ADVERTISE);
  483. if (adv < 0)
  484. return adv;
  485. oldadv = adv;
  486. adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
  487. | LPA_PAUSE_FIBER);
  488. adv |= ethtool_adv_to_fiber_adv_t(advertise);
  489. if (adv != oldadv) {
  490. err = phy_write(phydev, MII_ADVERTISE, adv);
  491. if (err < 0)
  492. return err;
  493. changed = 1;
  494. }
  495. if (changed == 0) {
  496. /* Advertisement hasn't changed, but maybe aneg was never on to
  497. * begin with? Or maybe phy was isolated?
  498. */
  499. int ctl = phy_read(phydev, MII_BMCR);
  500. if (ctl < 0)
  501. return ctl;
  502. if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
  503. changed = 1; /* do restart aneg */
  504. }
  505. /* Only restart aneg if we are advertising something different
  506. * than we were before.
  507. */
  508. if (changed > 0)
  509. changed = genphy_restart_aneg(phydev);
  510. return changed;
  511. }
  512. static int m88e1510_config_aneg(struct phy_device *phydev)
  513. {
  514. int err;
  515. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  516. if (err < 0)
  517. goto error;
  518. /* Configure the copper link first */
  519. err = m88e1318_config_aneg(phydev);
  520. if (err < 0)
  521. goto error;
  522. /* Then the fiber link */
  523. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  524. if (err < 0)
  525. goto error;
  526. err = marvell_config_aneg_fiber(phydev);
  527. if (err < 0)
  528. goto error;
  529. return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  530. error:
  531. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  532. return err;
  533. }
  534. static int marvell_config_init(struct phy_device *phydev)
  535. {
  536. /* Set registers from marvell,reg-init DT property */
  537. return marvell_of_reg_init(phydev);
  538. }
  539. static int m88e1116r_config_init(struct phy_device *phydev)
  540. {
  541. int err;
  542. err = genphy_soft_reset(phydev);
  543. if (err < 0)
  544. return err;
  545. mdelay(500);
  546. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  547. if (err < 0)
  548. return err;
  549. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  550. if (err < 0)
  551. return err;
  552. err = marvell_set_downshift(phydev, true, 8);
  553. if (err < 0)
  554. return err;
  555. if (phy_interface_is_rgmii(phydev)) {
  556. err = m88e1121_config_aneg_rgmii_delays(phydev);
  557. if (err < 0)
  558. return err;
  559. }
  560. err = genphy_soft_reset(phydev);
  561. if (err < 0)
  562. return err;
  563. return marvell_config_init(phydev);
  564. }
  565. static int m88e3016_config_init(struct phy_device *phydev)
  566. {
  567. int reg;
  568. /* Enable Scrambler and Auto-Crossover */
  569. reg = phy_read(phydev, MII_88E3016_PHY_SPEC_CTRL);
  570. if (reg < 0)
  571. return reg;
  572. reg &= ~MII_88E3016_DISABLE_SCRAMBLER;
  573. reg |= MII_88E3016_AUTO_MDIX_CROSSOVER;
  574. reg = phy_write(phydev, MII_88E3016_PHY_SPEC_CTRL, reg);
  575. if (reg < 0)
  576. return reg;
  577. return marvell_config_init(phydev);
  578. }
  579. static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
  580. u16 mode,
  581. int fibre_copper_auto)
  582. {
  583. int temp;
  584. temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  585. if (temp < 0)
  586. return temp;
  587. temp &= ~(MII_M1111_HWCFG_MODE_MASK |
  588. MII_M1111_HWCFG_FIBER_COPPER_AUTO |
  589. MII_M1111_HWCFG_FIBER_COPPER_RES);
  590. temp |= mode;
  591. if (fibre_copper_auto)
  592. temp |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
  593. return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
  594. }
  595. static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
  596. {
  597. int temp;
  598. temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
  599. if (temp < 0)
  600. return temp;
  601. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
  602. temp |= (MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY);
  603. } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
  604. temp &= ~MII_M1111_RGMII_TX_DELAY;
  605. temp |= MII_M1111_RGMII_RX_DELAY;
  606. } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
  607. temp &= ~MII_M1111_RGMII_RX_DELAY;
  608. temp |= MII_M1111_RGMII_TX_DELAY;
  609. }
  610. return phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
  611. }
  612. static int m88e1111_config_init_rgmii(struct phy_device *phydev)
  613. {
  614. int temp;
  615. int err;
  616. err = m88e1111_config_init_rgmii_delays(phydev);
  617. if (err < 0)
  618. return err;
  619. temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  620. if (temp < 0)
  621. return temp;
  622. temp &= ~(MII_M1111_HWCFG_MODE_MASK);
  623. if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
  624. temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
  625. else
  626. temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
  627. return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
  628. }
  629. static int m88e1111_config_init_sgmii(struct phy_device *phydev)
  630. {
  631. int err;
  632. err = m88e1111_config_init_hwcfg_mode(
  633. phydev,
  634. MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
  635. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  636. if (err < 0)
  637. return err;
  638. /* make sure copper is selected */
  639. return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  640. }
  641. static int m88e1111_config_init_rtbi(struct phy_device *phydev)
  642. {
  643. int err;
  644. err = m88e1111_config_init_rgmii_delays(phydev);
  645. if (err)
  646. return err;
  647. err = m88e1111_config_init_hwcfg_mode(
  648. phydev,
  649. MII_M1111_HWCFG_MODE_RTBI,
  650. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  651. if (err < 0)
  652. return err;
  653. /* soft reset */
  654. err = genphy_soft_reset(phydev);
  655. if (err < 0)
  656. return err;
  657. return m88e1111_config_init_hwcfg_mode(
  658. phydev,
  659. MII_M1111_HWCFG_MODE_RTBI,
  660. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  661. }
  662. static int m88e1111_config_init(struct phy_device *phydev)
  663. {
  664. int err;
  665. if (phy_interface_is_rgmii(phydev)) {
  666. err = m88e1111_config_init_rgmii(phydev);
  667. if (err)
  668. return err;
  669. }
  670. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  671. err = m88e1111_config_init_sgmii(phydev);
  672. if (err < 0)
  673. return err;
  674. }
  675. if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
  676. err = m88e1111_config_init_rtbi(phydev);
  677. if (err < 0)
  678. return err;
  679. }
  680. err = marvell_of_reg_init(phydev);
  681. if (err < 0)
  682. return err;
  683. return genphy_soft_reset(phydev);
  684. }
  685. static int m88e1121_config_init(struct phy_device *phydev)
  686. {
  687. int err, oldpage;
  688. oldpage = marvell_get_set_page(phydev, MII_MARVELL_LED_PAGE);
  689. if (oldpage < 0)
  690. return oldpage;
  691. /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
  692. err = phy_write(phydev, MII_88E1121_PHY_LED_CTRL,
  693. MII_88E1121_PHY_LED_DEF);
  694. if (err < 0)
  695. return err;
  696. marvell_set_page(phydev, oldpage);
  697. /* Set marvell,reg-init configuration from device tree */
  698. return marvell_config_init(phydev);
  699. }
  700. static int m88e1510_config_init(struct phy_device *phydev)
  701. {
  702. int err;
  703. int temp;
  704. /* SGMII-to-Copper mode initialization */
  705. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  706. /* Select page 18 */
  707. err = marvell_set_page(phydev, 18);
  708. if (err < 0)
  709. return err;
  710. /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
  711. temp = phy_read(phydev, MII_88E1510_GEN_CTRL_REG_1);
  712. temp &= ~MII_88E1510_GEN_CTRL_REG_1_MODE_MASK;
  713. temp |= MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII;
  714. err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
  715. if (err < 0)
  716. return err;
  717. /* PHY reset is necessary after changing MODE[2:0] */
  718. temp |= MII_88E1510_GEN_CTRL_REG_1_RESET;
  719. err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
  720. if (err < 0)
  721. return err;
  722. /* Reset page selection */
  723. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  724. if (err < 0)
  725. return err;
  726. }
  727. return m88e1121_config_init(phydev);
  728. }
  729. static int m88e1118_config_aneg(struct phy_device *phydev)
  730. {
  731. int err;
  732. err = genphy_soft_reset(phydev);
  733. if (err < 0)
  734. return err;
  735. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  736. if (err < 0)
  737. return err;
  738. err = genphy_config_aneg(phydev);
  739. return 0;
  740. }
  741. static int m88e1118_config_init(struct phy_device *phydev)
  742. {
  743. int err;
  744. /* Change address */
  745. err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
  746. if (err < 0)
  747. return err;
  748. /* Enable 1000 Mbit */
  749. err = phy_write(phydev, 0x15, 0x1070);
  750. if (err < 0)
  751. return err;
  752. /* Change address */
  753. err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
  754. if (err < 0)
  755. return err;
  756. /* Adjust LED Control */
  757. if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
  758. err = phy_write(phydev, 0x10, 0x1100);
  759. else
  760. err = phy_write(phydev, 0x10, 0x021e);
  761. if (err < 0)
  762. return err;
  763. err = marvell_of_reg_init(phydev);
  764. if (err < 0)
  765. return err;
  766. /* Reset address */
  767. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  768. if (err < 0)
  769. return err;
  770. return genphy_soft_reset(phydev);
  771. }
  772. static int m88e1149_config_init(struct phy_device *phydev)
  773. {
  774. int err;
  775. /* Change address */
  776. err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
  777. if (err < 0)
  778. return err;
  779. /* Enable 1000 Mbit */
  780. err = phy_write(phydev, 0x15, 0x1048);
  781. if (err < 0)
  782. return err;
  783. err = marvell_of_reg_init(phydev);
  784. if (err < 0)
  785. return err;
  786. /* Reset address */
  787. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  788. if (err < 0)
  789. return err;
  790. return genphy_soft_reset(phydev);
  791. }
  792. static int m88e1145_config_init_rgmii(struct phy_device *phydev)
  793. {
  794. int temp;
  795. int err;
  796. err = m88e1111_config_init_rgmii_delays(phydev);
  797. if (err < 0)
  798. return err;
  799. if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
  800. err = phy_write(phydev, 0x1d, 0x0012);
  801. if (err < 0)
  802. return err;
  803. temp = phy_read(phydev, 0x1e);
  804. if (temp < 0)
  805. return temp;
  806. temp &= 0xf03f;
  807. temp |= 2 << 9; /* 36 ohm */
  808. temp |= 2 << 6; /* 39 ohm */
  809. err = phy_write(phydev, 0x1e, temp);
  810. if (err < 0)
  811. return err;
  812. err = phy_write(phydev, 0x1d, 0x3);
  813. if (err < 0)
  814. return err;
  815. err = phy_write(phydev, 0x1e, 0x8000);
  816. }
  817. return err;
  818. }
  819. static int m88e1145_config_init_sgmii(struct phy_device *phydev)
  820. {
  821. return m88e1111_config_init_hwcfg_mode(
  822. phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
  823. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  824. }
  825. static int m88e1145_config_init(struct phy_device *phydev)
  826. {
  827. int err;
  828. /* Take care of errata E0 & E1 */
  829. err = phy_write(phydev, 0x1d, 0x001b);
  830. if (err < 0)
  831. return err;
  832. err = phy_write(phydev, 0x1e, 0x418f);
  833. if (err < 0)
  834. return err;
  835. err = phy_write(phydev, 0x1d, 0x0016);
  836. if (err < 0)
  837. return err;
  838. err = phy_write(phydev, 0x1e, 0xa2da);
  839. if (err < 0)
  840. return err;
  841. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
  842. err = m88e1145_config_init_rgmii(phydev);
  843. if (err < 0)
  844. return err;
  845. }
  846. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  847. err = m88e1145_config_init_sgmii(phydev);
  848. if (err < 0)
  849. return err;
  850. }
  851. err = marvell_of_reg_init(phydev);
  852. if (err < 0)
  853. return err;
  854. return 0;
  855. }
  856. /**
  857. * fiber_lpa_to_ethtool_lpa_t
  858. * @lpa: value of the MII_LPA register for fiber link
  859. *
  860. * A small helper function that translates MII_LPA
  861. * bits to ethtool LP advertisement settings.
  862. */
  863. static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa)
  864. {
  865. u32 result = 0;
  866. if (lpa & LPA_FIBER_1000HALF)
  867. result |= ADVERTISED_1000baseT_Half;
  868. if (lpa & LPA_FIBER_1000FULL)
  869. result |= ADVERTISED_1000baseT_Full;
  870. return result;
  871. }
  872. /**
  873. * marvell_update_link - update link status in real time in @phydev
  874. * @phydev: target phy_device struct
  875. *
  876. * Description: Update the value in phydev->link to reflect the
  877. * current link value.
  878. */
  879. static int marvell_update_link(struct phy_device *phydev, int fiber)
  880. {
  881. int status;
  882. /* Use the generic register for copper link, or specific
  883. * register for fiber case
  884. */
  885. if (fiber) {
  886. status = phy_read(phydev, MII_M1011_PHY_STATUS);
  887. if (status < 0)
  888. return status;
  889. if ((status & REGISTER_LINK_STATUS) == 0)
  890. phydev->link = 0;
  891. else
  892. phydev->link = 1;
  893. } else {
  894. return genphy_update_link(phydev);
  895. }
  896. return 0;
  897. }
  898. static int marvell_read_status_page_an(struct phy_device *phydev,
  899. int fiber)
  900. {
  901. int status;
  902. int lpa;
  903. int lpagb;
  904. status = phy_read(phydev, MII_M1011_PHY_STATUS);
  905. if (status < 0)
  906. return status;
  907. lpa = phy_read(phydev, MII_LPA);
  908. if (lpa < 0)
  909. return lpa;
  910. lpagb = phy_read(phydev, MII_STAT1000);
  911. if (lpagb < 0)
  912. return lpagb;
  913. if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
  914. phydev->duplex = DUPLEX_FULL;
  915. else
  916. phydev->duplex = DUPLEX_HALF;
  917. status = status & MII_M1011_PHY_STATUS_SPD_MASK;
  918. phydev->pause = 0;
  919. phydev->asym_pause = 0;
  920. switch (status) {
  921. case MII_M1011_PHY_STATUS_1000:
  922. phydev->speed = SPEED_1000;
  923. break;
  924. case MII_M1011_PHY_STATUS_100:
  925. phydev->speed = SPEED_100;
  926. break;
  927. default:
  928. phydev->speed = SPEED_10;
  929. break;
  930. }
  931. if (!fiber) {
  932. phydev->lp_advertising =
  933. mii_stat1000_to_ethtool_lpa_t(lpagb) |
  934. mii_lpa_to_ethtool_lpa_t(lpa);
  935. if (phydev->duplex == DUPLEX_FULL) {
  936. phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
  937. phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
  938. }
  939. } else {
  940. /* The fiber link is only 1000M capable */
  941. phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa);
  942. if (phydev->duplex == DUPLEX_FULL) {
  943. if (!(lpa & LPA_PAUSE_FIBER)) {
  944. phydev->pause = 0;
  945. phydev->asym_pause = 0;
  946. } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
  947. phydev->pause = 1;
  948. phydev->asym_pause = 1;
  949. } else {
  950. phydev->pause = 1;
  951. phydev->asym_pause = 0;
  952. }
  953. }
  954. }
  955. return 0;
  956. }
  957. static int marvell_read_status_page_fixed(struct phy_device *phydev)
  958. {
  959. int bmcr = phy_read(phydev, MII_BMCR);
  960. if (bmcr < 0)
  961. return bmcr;
  962. if (bmcr & BMCR_FULLDPLX)
  963. phydev->duplex = DUPLEX_FULL;
  964. else
  965. phydev->duplex = DUPLEX_HALF;
  966. if (bmcr & BMCR_SPEED1000)
  967. phydev->speed = SPEED_1000;
  968. else if (bmcr & BMCR_SPEED100)
  969. phydev->speed = SPEED_100;
  970. else
  971. phydev->speed = SPEED_10;
  972. phydev->pause = 0;
  973. phydev->asym_pause = 0;
  974. phydev->lp_advertising = 0;
  975. return 0;
  976. }
  977. /* marvell_read_status_page
  978. *
  979. * Description:
  980. * Check the link, then figure out the current state
  981. * by comparing what we advertise with what the link partner
  982. * advertises. Start by checking the gigabit possibilities,
  983. * then move on to 10/100.
  984. */
  985. static int marvell_read_status_page(struct phy_device *phydev, int page)
  986. {
  987. int fiber;
  988. int err;
  989. /* Detect and update the link, but return if there
  990. * was an error
  991. */
  992. if (page == MII_MARVELL_FIBER_PAGE)
  993. fiber = 1;
  994. else
  995. fiber = 0;
  996. err = marvell_update_link(phydev, fiber);
  997. if (err)
  998. return err;
  999. if (phydev->autoneg == AUTONEG_ENABLE)
  1000. err = marvell_read_status_page_an(phydev, fiber);
  1001. else
  1002. err = marvell_read_status_page_fixed(phydev);
  1003. return err;
  1004. }
  1005. /* marvell_read_status
  1006. *
  1007. * Some Marvell's phys have two modes: fiber and copper.
  1008. * Both need status checked.
  1009. * Description:
  1010. * First, check the fiber link and status.
  1011. * If the fiber link is down, check the copper link and status which
  1012. * will be the default value if both link are down.
  1013. */
  1014. static int marvell_read_status(struct phy_device *phydev)
  1015. {
  1016. int err;
  1017. /* Check the fiber mode first */
  1018. if (phydev->supported & SUPPORTED_FIBRE &&
  1019. phydev->interface != PHY_INTERFACE_MODE_SGMII) {
  1020. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  1021. if (err < 0)
  1022. goto error;
  1023. err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
  1024. if (err < 0)
  1025. goto error;
  1026. /* If the fiber link is up, it is the selected and
  1027. * used link. In this case, we need to stay in the
  1028. * fiber page. Please to be careful about that, avoid
  1029. * to restore Copper page in other functions which
  1030. * could break the behaviour for some fiber phy like
  1031. * 88E1512.
  1032. */
  1033. if (phydev->link)
  1034. return 0;
  1035. /* If fiber link is down, check and save copper mode state */
  1036. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1037. if (err < 0)
  1038. goto error;
  1039. }
  1040. return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
  1041. error:
  1042. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1043. return err;
  1044. }
  1045. /* marvell_suspend
  1046. *
  1047. * Some Marvell's phys have two modes: fiber and copper.
  1048. * Both need to be suspended
  1049. */
  1050. static int marvell_suspend(struct phy_device *phydev)
  1051. {
  1052. int err;
  1053. /* Suspend the fiber mode first */
  1054. if (!(phydev->supported & SUPPORTED_FIBRE)) {
  1055. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  1056. if (err < 0)
  1057. goto error;
  1058. /* With the page set, use the generic suspend */
  1059. err = genphy_suspend(phydev);
  1060. if (err < 0)
  1061. goto error;
  1062. /* Then, the copper link */
  1063. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1064. if (err < 0)
  1065. goto error;
  1066. }
  1067. /* With the page set, use the generic suspend */
  1068. return genphy_suspend(phydev);
  1069. error:
  1070. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1071. return err;
  1072. }
  1073. /* marvell_resume
  1074. *
  1075. * Some Marvell's phys have two modes: fiber and copper.
  1076. * Both need to be resumed
  1077. */
  1078. static int marvell_resume(struct phy_device *phydev)
  1079. {
  1080. int err;
  1081. /* Resume the fiber mode first */
  1082. if (!(phydev->supported & SUPPORTED_FIBRE)) {
  1083. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  1084. if (err < 0)
  1085. goto error;
  1086. /* With the page set, use the generic resume */
  1087. err = genphy_resume(phydev);
  1088. if (err < 0)
  1089. goto error;
  1090. /* Then, the copper link */
  1091. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1092. if (err < 0)
  1093. goto error;
  1094. }
  1095. /* With the page set, use the generic resume */
  1096. return genphy_resume(phydev);
  1097. error:
  1098. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1099. return err;
  1100. }
  1101. static int marvell_aneg_done(struct phy_device *phydev)
  1102. {
  1103. int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
  1104. return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
  1105. }
  1106. static int m88e1121_did_interrupt(struct phy_device *phydev)
  1107. {
  1108. int imask;
  1109. imask = phy_read(phydev, MII_M1011_IEVENT);
  1110. if (imask & MII_M1011_IMASK_INIT)
  1111. return 1;
  1112. return 0;
  1113. }
  1114. static void m88e1318_get_wol(struct phy_device *phydev,
  1115. struct ethtool_wolinfo *wol)
  1116. {
  1117. wol->supported = WAKE_MAGIC;
  1118. wol->wolopts = 0;
  1119. if (marvell_set_page(phydev, MII_MARVELL_WOL_PAGE) < 0)
  1120. return;
  1121. if (phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL) &
  1122. MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
  1123. wol->wolopts |= WAKE_MAGIC;
  1124. if (marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE) < 0)
  1125. return;
  1126. }
  1127. static int m88e1318_set_wol(struct phy_device *phydev,
  1128. struct ethtool_wolinfo *wol)
  1129. {
  1130. int err, oldpage, temp;
  1131. oldpage = marvell_get_page(phydev);
  1132. if (wol->wolopts & WAKE_MAGIC) {
  1133. /* Explicitly switch to page 0x00, just to be sure */
  1134. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1135. if (err < 0)
  1136. return err;
  1137. /* Enable the WOL interrupt */
  1138. temp = phy_read(phydev, MII_88E1318S_PHY_CSIER);
  1139. temp |= MII_88E1318S_PHY_CSIER_WOL_EIE;
  1140. err = phy_write(phydev, MII_88E1318S_PHY_CSIER, temp);
  1141. if (err < 0)
  1142. return err;
  1143. err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
  1144. if (err < 0)
  1145. return err;
  1146. /* Setup LED[2] as interrupt pin (active low) */
  1147. temp = phy_read(phydev, MII_88E1318S_PHY_LED_TCR);
  1148. temp &= ~MII_88E1318S_PHY_LED_TCR_FORCE_INT;
  1149. temp |= MII_88E1318S_PHY_LED_TCR_INTn_ENABLE;
  1150. temp |= MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW;
  1151. err = phy_write(phydev, MII_88E1318S_PHY_LED_TCR, temp);
  1152. if (err < 0)
  1153. return err;
  1154. err = marvell_set_page(phydev, MII_MARVELL_WOL_PAGE);
  1155. if (err < 0)
  1156. return err;
  1157. /* Store the device address for the magic packet */
  1158. err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
  1159. ((phydev->attached_dev->dev_addr[5] << 8) |
  1160. phydev->attached_dev->dev_addr[4]));
  1161. if (err < 0)
  1162. return err;
  1163. err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
  1164. ((phydev->attached_dev->dev_addr[3] << 8) |
  1165. phydev->attached_dev->dev_addr[2]));
  1166. if (err < 0)
  1167. return err;
  1168. err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
  1169. ((phydev->attached_dev->dev_addr[1] << 8) |
  1170. phydev->attached_dev->dev_addr[0]));
  1171. if (err < 0)
  1172. return err;
  1173. /* Clear WOL status and enable magic packet matching */
  1174. temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
  1175. temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
  1176. temp |= MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
  1177. err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
  1178. if (err < 0)
  1179. return err;
  1180. } else {
  1181. err = marvell_set_page(phydev, MII_MARVELL_WOL_PAGE);
  1182. if (err < 0)
  1183. return err;
  1184. /* Clear WOL status and disable magic packet matching */
  1185. temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
  1186. temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
  1187. temp &= ~MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
  1188. err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
  1189. if (err < 0)
  1190. return err;
  1191. }
  1192. err = marvell_set_page(phydev, oldpage);
  1193. if (err < 0)
  1194. return err;
  1195. return 0;
  1196. }
  1197. static int marvell_get_sset_count(struct phy_device *phydev)
  1198. {
  1199. if (phydev->supported & SUPPORTED_FIBRE)
  1200. return ARRAY_SIZE(marvell_hw_stats);
  1201. else
  1202. return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
  1203. }
  1204. static void marvell_get_strings(struct phy_device *phydev, u8 *data)
  1205. {
  1206. int i;
  1207. for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) {
  1208. memcpy(data + i * ETH_GSTRING_LEN,
  1209. marvell_hw_stats[i].string, ETH_GSTRING_LEN);
  1210. }
  1211. }
  1212. #ifndef UINT64_MAX
  1213. #define UINT64_MAX (u64)(~((u64)0))
  1214. #endif
  1215. static u64 marvell_get_stat(struct phy_device *phydev, int i)
  1216. {
  1217. struct marvell_hw_stat stat = marvell_hw_stats[i];
  1218. struct marvell_priv *priv = phydev->priv;
  1219. int oldpage, val;
  1220. u64 ret;
  1221. oldpage = marvell_get_set_page(phydev, stat.page);
  1222. if (oldpage < 0)
  1223. return UINT64_MAX;
  1224. val = phy_read(phydev, stat.reg);
  1225. if (val < 0) {
  1226. ret = UINT64_MAX;
  1227. } else {
  1228. val = val & ((1 << stat.bits) - 1);
  1229. priv->stats[i] += val;
  1230. ret = priv->stats[i];
  1231. }
  1232. marvell_set_page(phydev, oldpage);
  1233. return ret;
  1234. }
  1235. static void marvell_get_stats(struct phy_device *phydev,
  1236. struct ethtool_stats *stats, u64 *data)
  1237. {
  1238. int i;
  1239. for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++)
  1240. data[i] = marvell_get_stat(phydev, i);
  1241. }
  1242. #ifdef CONFIG_HWMON
  1243. static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
  1244. {
  1245. int oldpage;
  1246. int ret;
  1247. int val;
  1248. *temp = 0;
  1249. mutex_lock(&phydev->lock);
  1250. oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
  1251. if (oldpage < 0) {
  1252. mutex_unlock(&phydev->lock);
  1253. return oldpage;
  1254. }
  1255. /* Enable temperature sensor */
  1256. ret = phy_read(phydev, MII_88E1121_MISC_TEST);
  1257. if (ret < 0)
  1258. goto error;
  1259. ret = phy_write(phydev, MII_88E1121_MISC_TEST,
  1260. ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
  1261. if (ret < 0)
  1262. goto error;
  1263. /* Wait for temperature to stabilize */
  1264. usleep_range(10000, 12000);
  1265. val = phy_read(phydev, MII_88E1121_MISC_TEST);
  1266. if (val < 0) {
  1267. ret = val;
  1268. goto error;
  1269. }
  1270. /* Disable temperature sensor */
  1271. ret = phy_write(phydev, MII_88E1121_MISC_TEST,
  1272. ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
  1273. if (ret < 0)
  1274. goto error;
  1275. *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
  1276. error:
  1277. marvell_set_page(phydev, oldpage);
  1278. mutex_unlock(&phydev->lock);
  1279. return ret;
  1280. }
  1281. static int m88e1121_hwmon_read(struct device *dev,
  1282. enum hwmon_sensor_types type,
  1283. u32 attr, int channel, long *temp)
  1284. {
  1285. struct phy_device *phydev = dev_get_drvdata(dev);
  1286. int err;
  1287. switch (attr) {
  1288. case hwmon_temp_input:
  1289. err = m88e1121_get_temp(phydev, temp);
  1290. break;
  1291. default:
  1292. return -EOPNOTSUPP;
  1293. }
  1294. return err;
  1295. }
  1296. static umode_t m88e1121_hwmon_is_visible(const void *data,
  1297. enum hwmon_sensor_types type,
  1298. u32 attr, int channel)
  1299. {
  1300. if (type != hwmon_temp)
  1301. return 0;
  1302. switch (attr) {
  1303. case hwmon_temp_input:
  1304. return 0444;
  1305. default:
  1306. return 0;
  1307. }
  1308. }
  1309. static u32 m88e1121_hwmon_chip_config[] = {
  1310. HWMON_C_REGISTER_TZ,
  1311. 0
  1312. };
  1313. static const struct hwmon_channel_info m88e1121_hwmon_chip = {
  1314. .type = hwmon_chip,
  1315. .config = m88e1121_hwmon_chip_config,
  1316. };
  1317. static u32 m88e1121_hwmon_temp_config[] = {
  1318. HWMON_T_INPUT,
  1319. 0
  1320. };
  1321. static const struct hwmon_channel_info m88e1121_hwmon_temp = {
  1322. .type = hwmon_temp,
  1323. .config = m88e1121_hwmon_temp_config,
  1324. };
  1325. static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
  1326. &m88e1121_hwmon_chip,
  1327. &m88e1121_hwmon_temp,
  1328. NULL
  1329. };
  1330. static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
  1331. .is_visible = m88e1121_hwmon_is_visible,
  1332. .read = m88e1121_hwmon_read,
  1333. };
  1334. static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
  1335. .ops = &m88e1121_hwmon_hwmon_ops,
  1336. .info = m88e1121_hwmon_info,
  1337. };
  1338. static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
  1339. {
  1340. int oldpage;
  1341. int ret;
  1342. *temp = 0;
  1343. mutex_lock(&phydev->lock);
  1344. oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
  1345. if (oldpage < 0) {
  1346. mutex_unlock(&phydev->lock);
  1347. return oldpage;
  1348. }
  1349. ret = phy_read(phydev, MII_88E1510_TEMP_SENSOR);
  1350. if (ret < 0)
  1351. goto error;
  1352. *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
  1353. error:
  1354. marvell_set_page(phydev, oldpage);
  1355. mutex_unlock(&phydev->lock);
  1356. return ret;
  1357. }
  1358. static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
  1359. {
  1360. int oldpage;
  1361. int ret;
  1362. *temp = 0;
  1363. mutex_lock(&phydev->lock);
  1364. oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
  1365. if (oldpage < 0) {
  1366. mutex_unlock(&phydev->lock);
  1367. return oldpage;
  1368. }
  1369. ret = phy_read(phydev, MII_88E1121_MISC_TEST);
  1370. if (ret < 0)
  1371. goto error;
  1372. *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
  1373. MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
  1374. /* convert to mC */
  1375. *temp *= 1000;
  1376. error:
  1377. marvell_set_page(phydev, oldpage);
  1378. mutex_unlock(&phydev->lock);
  1379. return ret;
  1380. }
  1381. static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
  1382. {
  1383. int oldpage;
  1384. int ret;
  1385. mutex_lock(&phydev->lock);
  1386. oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
  1387. if (oldpage < 0) {
  1388. mutex_unlock(&phydev->lock);
  1389. return oldpage;
  1390. }
  1391. ret = phy_read(phydev, MII_88E1121_MISC_TEST);
  1392. if (ret < 0)
  1393. goto error;
  1394. temp = temp / 1000;
  1395. temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
  1396. ret = phy_write(phydev, MII_88E1121_MISC_TEST,
  1397. (ret & ~MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) |
  1398. (temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT));
  1399. error:
  1400. marvell_set_page(phydev, oldpage);
  1401. mutex_unlock(&phydev->lock);
  1402. return ret;
  1403. }
  1404. static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
  1405. {
  1406. int oldpage;
  1407. int ret;
  1408. *alarm = false;
  1409. mutex_lock(&phydev->lock);
  1410. oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
  1411. if (oldpage < 0) {
  1412. mutex_unlock(&phydev->lock);
  1413. return oldpage;
  1414. }
  1415. ret = phy_read(phydev, MII_88E1121_MISC_TEST);
  1416. if (ret < 0)
  1417. goto error;
  1418. *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
  1419. error:
  1420. marvell_set_page(phydev, oldpage);
  1421. mutex_unlock(&phydev->lock);
  1422. return ret;
  1423. }
  1424. static int m88e1510_hwmon_read(struct device *dev,
  1425. enum hwmon_sensor_types type,
  1426. u32 attr, int channel, long *temp)
  1427. {
  1428. struct phy_device *phydev = dev_get_drvdata(dev);
  1429. int err;
  1430. switch (attr) {
  1431. case hwmon_temp_input:
  1432. err = m88e1510_get_temp(phydev, temp);
  1433. break;
  1434. case hwmon_temp_crit:
  1435. err = m88e1510_get_temp_critical(phydev, temp);
  1436. break;
  1437. case hwmon_temp_max_alarm:
  1438. err = m88e1510_get_temp_alarm(phydev, temp);
  1439. break;
  1440. default:
  1441. return -EOPNOTSUPP;
  1442. }
  1443. return err;
  1444. }
  1445. static int m88e1510_hwmon_write(struct device *dev,
  1446. enum hwmon_sensor_types type,
  1447. u32 attr, int channel, long temp)
  1448. {
  1449. struct phy_device *phydev = dev_get_drvdata(dev);
  1450. int err;
  1451. switch (attr) {
  1452. case hwmon_temp_crit:
  1453. err = m88e1510_set_temp_critical(phydev, temp);
  1454. break;
  1455. default:
  1456. return -EOPNOTSUPP;
  1457. }
  1458. return err;
  1459. }
  1460. static umode_t m88e1510_hwmon_is_visible(const void *data,
  1461. enum hwmon_sensor_types type,
  1462. u32 attr, int channel)
  1463. {
  1464. if (type != hwmon_temp)
  1465. return 0;
  1466. switch (attr) {
  1467. case hwmon_temp_input:
  1468. case hwmon_temp_max_alarm:
  1469. return 0444;
  1470. case hwmon_temp_crit:
  1471. return 0644;
  1472. default:
  1473. return 0;
  1474. }
  1475. }
  1476. static u32 m88e1510_hwmon_temp_config[] = {
  1477. HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
  1478. 0
  1479. };
  1480. static const struct hwmon_channel_info m88e1510_hwmon_temp = {
  1481. .type = hwmon_temp,
  1482. .config = m88e1510_hwmon_temp_config,
  1483. };
  1484. static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
  1485. &m88e1121_hwmon_chip,
  1486. &m88e1510_hwmon_temp,
  1487. NULL
  1488. };
  1489. static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
  1490. .is_visible = m88e1510_hwmon_is_visible,
  1491. .read = m88e1510_hwmon_read,
  1492. .write = m88e1510_hwmon_write,
  1493. };
  1494. static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
  1495. .ops = &m88e1510_hwmon_hwmon_ops,
  1496. .info = m88e1510_hwmon_info,
  1497. };
  1498. static int marvell_hwmon_name(struct phy_device *phydev)
  1499. {
  1500. struct marvell_priv *priv = phydev->priv;
  1501. struct device *dev = &phydev->mdio.dev;
  1502. const char *devname = dev_name(dev);
  1503. size_t len = strlen(devname);
  1504. int i, j;
  1505. priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
  1506. if (!priv->hwmon_name)
  1507. return -ENOMEM;
  1508. for (i = j = 0; i < len && devname[i]; i++) {
  1509. if (isalnum(devname[i]))
  1510. priv->hwmon_name[j++] = devname[i];
  1511. }
  1512. return 0;
  1513. }
  1514. static int marvell_hwmon_probe(struct phy_device *phydev,
  1515. const struct hwmon_chip_info *chip)
  1516. {
  1517. struct marvell_priv *priv = phydev->priv;
  1518. struct device *dev = &phydev->mdio.dev;
  1519. int err;
  1520. err = marvell_hwmon_name(phydev);
  1521. if (err)
  1522. return err;
  1523. priv->hwmon_dev = devm_hwmon_device_register_with_info(
  1524. dev, priv->hwmon_name, phydev, chip, NULL);
  1525. return PTR_ERR_OR_ZERO(priv->hwmon_dev);
  1526. }
  1527. static int m88e1121_hwmon_probe(struct phy_device *phydev)
  1528. {
  1529. return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
  1530. }
  1531. static int m88e1510_hwmon_probe(struct phy_device *phydev)
  1532. {
  1533. return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
  1534. }
  1535. #else
  1536. static int m88e1121_hwmon_probe(struct phy_device *phydev)
  1537. {
  1538. return 0;
  1539. }
  1540. static int m88e1510_hwmon_probe(struct phy_device *phydev)
  1541. {
  1542. return 0;
  1543. }
  1544. #endif
  1545. static int marvell_probe(struct phy_device *phydev)
  1546. {
  1547. struct marvell_priv *priv;
  1548. priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
  1549. if (!priv)
  1550. return -ENOMEM;
  1551. phydev->priv = priv;
  1552. return 0;
  1553. }
  1554. static int m88e1121_probe(struct phy_device *phydev)
  1555. {
  1556. int err;
  1557. err = marvell_probe(phydev);
  1558. if (err)
  1559. return err;
  1560. return m88e1121_hwmon_probe(phydev);
  1561. }
  1562. static int m88e1510_probe(struct phy_device *phydev)
  1563. {
  1564. int err;
  1565. err = marvell_probe(phydev);
  1566. if (err)
  1567. return err;
  1568. return m88e1510_hwmon_probe(phydev);
  1569. }
  1570. static struct phy_driver marvell_drivers[] = {
  1571. {
  1572. .phy_id = MARVELL_PHY_ID_88E1101,
  1573. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1574. .name = "Marvell 88E1101",
  1575. .features = PHY_GBIT_FEATURES,
  1576. .flags = PHY_HAS_INTERRUPT,
  1577. .probe = marvell_probe,
  1578. .config_init = &marvell_config_init,
  1579. .config_aneg = &m88e1101_config_aneg,
  1580. .read_status = &genphy_read_status,
  1581. .ack_interrupt = &marvell_ack_interrupt,
  1582. .config_intr = &marvell_config_intr,
  1583. .resume = &genphy_resume,
  1584. .suspend = &genphy_suspend,
  1585. .get_sset_count = marvell_get_sset_count,
  1586. .get_strings = marvell_get_strings,
  1587. .get_stats = marvell_get_stats,
  1588. },
  1589. {
  1590. .phy_id = MARVELL_PHY_ID_88E1112,
  1591. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1592. .name = "Marvell 88E1112",
  1593. .features = PHY_GBIT_FEATURES,
  1594. .flags = PHY_HAS_INTERRUPT,
  1595. .probe = marvell_probe,
  1596. .config_init = &m88e1111_config_init,
  1597. .config_aneg = &marvell_config_aneg,
  1598. .read_status = &genphy_read_status,
  1599. .ack_interrupt = &marvell_ack_interrupt,
  1600. .config_intr = &marvell_config_intr,
  1601. .resume = &genphy_resume,
  1602. .suspend = &genphy_suspend,
  1603. .get_sset_count = marvell_get_sset_count,
  1604. .get_strings = marvell_get_strings,
  1605. .get_stats = marvell_get_stats,
  1606. },
  1607. {
  1608. .phy_id = MARVELL_PHY_ID_88E1111,
  1609. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1610. .name = "Marvell 88E1111",
  1611. .features = PHY_GBIT_FEATURES,
  1612. .flags = PHY_HAS_INTERRUPT,
  1613. .probe = marvell_probe,
  1614. .config_init = &m88e1111_config_init,
  1615. .config_aneg = &m88e1111_config_aneg,
  1616. .read_status = &marvell_read_status,
  1617. .ack_interrupt = &marvell_ack_interrupt,
  1618. .config_intr = &marvell_config_intr,
  1619. .resume = &genphy_resume,
  1620. .suspend = &genphy_suspend,
  1621. .get_sset_count = marvell_get_sset_count,
  1622. .get_strings = marvell_get_strings,
  1623. .get_stats = marvell_get_stats,
  1624. },
  1625. {
  1626. .phy_id = MARVELL_PHY_ID_88E1118,
  1627. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1628. .name = "Marvell 88E1118",
  1629. .features = PHY_GBIT_FEATURES,
  1630. .flags = PHY_HAS_INTERRUPT,
  1631. .probe = marvell_probe,
  1632. .config_init = &m88e1118_config_init,
  1633. .config_aneg = &m88e1118_config_aneg,
  1634. .read_status = &genphy_read_status,
  1635. .ack_interrupt = &marvell_ack_interrupt,
  1636. .config_intr = &marvell_config_intr,
  1637. .resume = &genphy_resume,
  1638. .suspend = &genphy_suspend,
  1639. .get_sset_count = marvell_get_sset_count,
  1640. .get_strings = marvell_get_strings,
  1641. .get_stats = marvell_get_stats,
  1642. },
  1643. {
  1644. .phy_id = MARVELL_PHY_ID_88E1121R,
  1645. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1646. .name = "Marvell 88E1121R",
  1647. .features = PHY_GBIT_FEATURES,
  1648. .flags = PHY_HAS_INTERRUPT,
  1649. .probe = &m88e1121_probe,
  1650. .config_init = &m88e1121_config_init,
  1651. .config_aneg = &m88e1121_config_aneg,
  1652. .read_status = &marvell_read_status,
  1653. .ack_interrupt = &marvell_ack_interrupt,
  1654. .config_intr = &marvell_config_intr,
  1655. .did_interrupt = &m88e1121_did_interrupt,
  1656. .resume = &genphy_resume,
  1657. .suspend = &genphy_suspend,
  1658. .get_sset_count = marvell_get_sset_count,
  1659. .get_strings = marvell_get_strings,
  1660. .get_stats = marvell_get_stats,
  1661. },
  1662. {
  1663. .phy_id = MARVELL_PHY_ID_88E1318S,
  1664. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1665. .name = "Marvell 88E1318S",
  1666. .features = PHY_GBIT_FEATURES,
  1667. .flags = PHY_HAS_INTERRUPT,
  1668. .probe = marvell_probe,
  1669. .config_init = &m88e1121_config_init,
  1670. .config_aneg = &m88e1318_config_aneg,
  1671. .read_status = &marvell_read_status,
  1672. .ack_interrupt = &marvell_ack_interrupt,
  1673. .config_intr = &marvell_config_intr,
  1674. .did_interrupt = &m88e1121_did_interrupt,
  1675. .get_wol = &m88e1318_get_wol,
  1676. .set_wol = &m88e1318_set_wol,
  1677. .resume = &genphy_resume,
  1678. .suspend = &genphy_suspend,
  1679. .get_sset_count = marvell_get_sset_count,
  1680. .get_strings = marvell_get_strings,
  1681. .get_stats = marvell_get_stats,
  1682. },
  1683. {
  1684. .phy_id = MARVELL_PHY_ID_88E1145,
  1685. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1686. .name = "Marvell 88E1145",
  1687. .features = PHY_GBIT_FEATURES,
  1688. .flags = PHY_HAS_INTERRUPT,
  1689. .probe = marvell_probe,
  1690. .config_init = &m88e1145_config_init,
  1691. .config_aneg = &marvell_config_aneg,
  1692. .read_status = &genphy_read_status,
  1693. .ack_interrupt = &marvell_ack_interrupt,
  1694. .config_intr = &marvell_config_intr,
  1695. .resume = &genphy_resume,
  1696. .suspend = &genphy_suspend,
  1697. .get_sset_count = marvell_get_sset_count,
  1698. .get_strings = marvell_get_strings,
  1699. .get_stats = marvell_get_stats,
  1700. },
  1701. {
  1702. .phy_id = MARVELL_PHY_ID_88E1149R,
  1703. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1704. .name = "Marvell 88E1149R",
  1705. .features = PHY_GBIT_FEATURES,
  1706. .flags = PHY_HAS_INTERRUPT,
  1707. .probe = marvell_probe,
  1708. .config_init = &m88e1149_config_init,
  1709. .config_aneg = &m88e1118_config_aneg,
  1710. .read_status = &genphy_read_status,
  1711. .ack_interrupt = &marvell_ack_interrupt,
  1712. .config_intr = &marvell_config_intr,
  1713. .resume = &genphy_resume,
  1714. .suspend = &genphy_suspend,
  1715. .get_sset_count = marvell_get_sset_count,
  1716. .get_strings = marvell_get_strings,
  1717. .get_stats = marvell_get_stats,
  1718. },
  1719. {
  1720. .phy_id = MARVELL_PHY_ID_88E1240,
  1721. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1722. .name = "Marvell 88E1240",
  1723. .features = PHY_GBIT_FEATURES,
  1724. .flags = PHY_HAS_INTERRUPT,
  1725. .probe = marvell_probe,
  1726. .config_init = &m88e1111_config_init,
  1727. .config_aneg = &marvell_config_aneg,
  1728. .read_status = &genphy_read_status,
  1729. .ack_interrupt = &marvell_ack_interrupt,
  1730. .config_intr = &marvell_config_intr,
  1731. .resume = &genphy_resume,
  1732. .suspend = &genphy_suspend,
  1733. .get_sset_count = marvell_get_sset_count,
  1734. .get_strings = marvell_get_strings,
  1735. .get_stats = marvell_get_stats,
  1736. },
  1737. {
  1738. .phy_id = MARVELL_PHY_ID_88E1116R,
  1739. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1740. .name = "Marvell 88E1116R",
  1741. .features = PHY_GBIT_FEATURES,
  1742. .flags = PHY_HAS_INTERRUPT,
  1743. .probe = marvell_probe,
  1744. .config_init = &m88e1116r_config_init,
  1745. .config_aneg = &genphy_config_aneg,
  1746. .read_status = &genphy_read_status,
  1747. .ack_interrupt = &marvell_ack_interrupt,
  1748. .config_intr = &marvell_config_intr,
  1749. .resume = &genphy_resume,
  1750. .suspend = &genphy_suspend,
  1751. .get_sset_count = marvell_get_sset_count,
  1752. .get_strings = marvell_get_strings,
  1753. .get_stats = marvell_get_stats,
  1754. },
  1755. {
  1756. .phy_id = MARVELL_PHY_ID_88E1510,
  1757. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1758. .name = "Marvell 88E1510",
  1759. .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE,
  1760. .flags = PHY_HAS_INTERRUPT,
  1761. .probe = &m88e1510_probe,
  1762. .config_init = &m88e1510_config_init,
  1763. .config_aneg = &m88e1510_config_aneg,
  1764. .read_status = &marvell_read_status,
  1765. .ack_interrupt = &marvell_ack_interrupt,
  1766. .config_intr = &marvell_config_intr,
  1767. .did_interrupt = &m88e1121_did_interrupt,
  1768. .get_wol = &m88e1318_get_wol,
  1769. .set_wol = &m88e1318_set_wol,
  1770. .resume = &marvell_resume,
  1771. .suspend = &marvell_suspend,
  1772. .get_sset_count = marvell_get_sset_count,
  1773. .get_strings = marvell_get_strings,
  1774. .get_stats = marvell_get_stats,
  1775. .set_loopback = genphy_loopback,
  1776. },
  1777. {
  1778. .phy_id = MARVELL_PHY_ID_88E1540,
  1779. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1780. .name = "Marvell 88E1540",
  1781. .features = PHY_GBIT_FEATURES,
  1782. .flags = PHY_HAS_INTERRUPT,
  1783. .probe = m88e1510_probe,
  1784. .config_init = &marvell_config_init,
  1785. .config_aneg = &m88e1510_config_aneg,
  1786. .read_status = &marvell_read_status,
  1787. .ack_interrupt = &marvell_ack_interrupt,
  1788. .config_intr = &marvell_config_intr,
  1789. .did_interrupt = &m88e1121_did_interrupt,
  1790. .resume = &genphy_resume,
  1791. .suspend = &genphy_suspend,
  1792. .get_sset_count = marvell_get_sset_count,
  1793. .get_strings = marvell_get_strings,
  1794. .get_stats = marvell_get_stats,
  1795. },
  1796. {
  1797. .phy_id = MARVELL_PHY_ID_88E1545,
  1798. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1799. .name = "Marvell 88E1545",
  1800. .probe = m88e1510_probe,
  1801. .features = PHY_GBIT_FEATURES,
  1802. .flags = PHY_HAS_INTERRUPT,
  1803. .config_init = &marvell_config_init,
  1804. .config_aneg = &m88e1510_config_aneg,
  1805. .read_status = &marvell_read_status,
  1806. .ack_interrupt = &marvell_ack_interrupt,
  1807. .config_intr = &marvell_config_intr,
  1808. .did_interrupt = &m88e1121_did_interrupt,
  1809. .resume = &genphy_resume,
  1810. .suspend = &genphy_suspend,
  1811. .get_sset_count = marvell_get_sset_count,
  1812. .get_strings = marvell_get_strings,
  1813. .get_stats = marvell_get_stats,
  1814. },
  1815. {
  1816. .phy_id = MARVELL_PHY_ID_88E3016,
  1817. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1818. .name = "Marvell 88E3016",
  1819. .features = PHY_BASIC_FEATURES,
  1820. .flags = PHY_HAS_INTERRUPT,
  1821. .probe = marvell_probe,
  1822. .config_aneg = &genphy_config_aneg,
  1823. .config_init = &m88e3016_config_init,
  1824. .aneg_done = &marvell_aneg_done,
  1825. .read_status = &marvell_read_status,
  1826. .ack_interrupt = &marvell_ack_interrupt,
  1827. .config_intr = &marvell_config_intr,
  1828. .did_interrupt = &m88e1121_did_interrupt,
  1829. .resume = &genphy_resume,
  1830. .suspend = &genphy_suspend,
  1831. .get_sset_count = marvell_get_sset_count,
  1832. .get_strings = marvell_get_strings,
  1833. .get_stats = marvell_get_stats,
  1834. },
  1835. {
  1836. .phy_id = MARVELL_PHY_ID_88E6390,
  1837. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1838. .name = "Marvell 88E6390",
  1839. .features = PHY_GBIT_FEATURES,
  1840. .flags = PHY_HAS_INTERRUPT,
  1841. .probe = m88e1510_probe,
  1842. .config_init = &marvell_config_init,
  1843. .config_aneg = &m88e1510_config_aneg,
  1844. .read_status = &marvell_read_status,
  1845. .ack_interrupt = &marvell_ack_interrupt,
  1846. .config_intr = &marvell_config_intr,
  1847. .did_interrupt = &m88e1121_did_interrupt,
  1848. .resume = &genphy_resume,
  1849. .suspend = &genphy_suspend,
  1850. .get_sset_count = marvell_get_sset_count,
  1851. .get_strings = marvell_get_strings,
  1852. .get_stats = marvell_get_stats,
  1853. },
  1854. };
  1855. module_phy_driver(marvell_drivers);
  1856. static struct mdio_device_id __maybe_unused marvell_tbl[] = {
  1857. { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
  1858. { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
  1859. { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
  1860. { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
  1861. { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
  1862. { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
  1863. { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
  1864. { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
  1865. { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
  1866. { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
  1867. { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
  1868. { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
  1869. { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
  1870. { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
  1871. { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
  1872. { }
  1873. };
  1874. MODULE_DEVICE_TABLE(mdio, marvell_tbl);