qed_ll2.c 68 KB

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  1. /* QLogic qed NIC Driver
  2. * Copyright (c) 2015-2017 QLogic Corporation
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and /or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/types.h>
  33. #include <asm/byteorder.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/if_vlan.h>
  36. #include <linux/kernel.h>
  37. #include <linux/pci.h>
  38. #include <linux/slab.h>
  39. #include <linux/stddef.h>
  40. #include <linux/workqueue.h>
  41. #include <net/ipv6.h>
  42. #include <linux/bitops.h>
  43. #include <linux/delay.h>
  44. #include <linux/errno.h>
  45. #include <linux/etherdevice.h>
  46. #include <linux/io.h>
  47. #include <linux/list.h>
  48. #include <linux/mutex.h>
  49. #include <linux/spinlock.h>
  50. #include <linux/string.h>
  51. #include <linux/qed/qed_ll2_if.h>
  52. #include "qed.h"
  53. #include "qed_cxt.h"
  54. #include "qed_dev_api.h"
  55. #include "qed_hsi.h"
  56. #include "qed_hw.h"
  57. #include "qed_int.h"
  58. #include "qed_ll2.h"
  59. #include "qed_mcp.h"
  60. #include "qed_ooo.h"
  61. #include "qed_reg_addr.h"
  62. #include "qed_sp.h"
  63. #include "qed_rdma.h"
  64. #define QED_LL2_RX_REGISTERED(ll2) ((ll2)->rx_queue.b_cb_registred)
  65. #define QED_LL2_TX_REGISTERED(ll2) ((ll2)->tx_queue.b_cb_registred)
  66. #define QED_LL2_TX_SIZE (256)
  67. #define QED_LL2_RX_SIZE (4096)
  68. struct qed_cb_ll2_info {
  69. int rx_cnt;
  70. u32 rx_size;
  71. u8 handle;
  72. /* Lock protecting LL2 buffer lists in sleepless context */
  73. spinlock_t lock;
  74. struct list_head list;
  75. const struct qed_ll2_cb_ops *cbs;
  76. void *cb_cookie;
  77. };
  78. struct qed_ll2_buffer {
  79. struct list_head list;
  80. void *data;
  81. dma_addr_t phys_addr;
  82. };
  83. static void qed_ll2b_complete_tx_packet(void *cxt,
  84. u8 connection_handle,
  85. void *cookie,
  86. dma_addr_t first_frag_addr,
  87. bool b_last_fragment,
  88. bool b_last_packet)
  89. {
  90. struct qed_hwfn *p_hwfn = cxt;
  91. struct qed_dev *cdev = p_hwfn->cdev;
  92. struct sk_buff *skb = cookie;
  93. /* All we need to do is release the mapping */
  94. dma_unmap_single(&p_hwfn->cdev->pdev->dev, first_frag_addr,
  95. skb_headlen(skb), DMA_TO_DEVICE);
  96. if (cdev->ll2->cbs && cdev->ll2->cbs->tx_cb)
  97. cdev->ll2->cbs->tx_cb(cdev->ll2->cb_cookie, skb,
  98. b_last_fragment);
  99. dev_kfree_skb_any(skb);
  100. }
  101. static int qed_ll2_alloc_buffer(struct qed_dev *cdev,
  102. u8 **data, dma_addr_t *phys_addr)
  103. {
  104. *data = kmalloc(cdev->ll2->rx_size, GFP_ATOMIC);
  105. if (!(*data)) {
  106. DP_INFO(cdev, "Failed to allocate LL2 buffer data\n");
  107. return -ENOMEM;
  108. }
  109. *phys_addr = dma_map_single(&cdev->pdev->dev,
  110. ((*data) + NET_SKB_PAD),
  111. cdev->ll2->rx_size, DMA_FROM_DEVICE);
  112. if (dma_mapping_error(&cdev->pdev->dev, *phys_addr)) {
  113. DP_INFO(cdev, "Failed to map LL2 buffer data\n");
  114. kfree((*data));
  115. return -ENOMEM;
  116. }
  117. return 0;
  118. }
  119. static int qed_ll2_dealloc_buffer(struct qed_dev *cdev,
  120. struct qed_ll2_buffer *buffer)
  121. {
  122. spin_lock_bh(&cdev->ll2->lock);
  123. dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
  124. cdev->ll2->rx_size, DMA_FROM_DEVICE);
  125. kfree(buffer->data);
  126. list_del(&buffer->list);
  127. cdev->ll2->rx_cnt--;
  128. if (!cdev->ll2->rx_cnt)
  129. DP_INFO(cdev, "All LL2 entries were removed\n");
  130. spin_unlock_bh(&cdev->ll2->lock);
  131. return 0;
  132. }
  133. static void qed_ll2_kill_buffers(struct qed_dev *cdev)
  134. {
  135. struct qed_ll2_buffer *buffer, *tmp_buffer;
  136. list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list)
  137. qed_ll2_dealloc_buffer(cdev, buffer);
  138. }
  139. void qed_ll2b_complete_rx_packet(void *cxt, struct qed_ll2_comp_rx_data *data)
  140. {
  141. struct qed_hwfn *p_hwfn = cxt;
  142. struct qed_ll2_buffer *buffer = data->cookie;
  143. struct qed_dev *cdev = p_hwfn->cdev;
  144. dma_addr_t new_phys_addr;
  145. struct sk_buff *skb;
  146. bool reuse = false;
  147. int rc = -EINVAL;
  148. u8 *new_data;
  149. DP_VERBOSE(p_hwfn,
  150. (NETIF_MSG_RX_STATUS | QED_MSG_STORAGE | NETIF_MSG_PKTDATA),
  151. "Got an LL2 Rx completion: [Buffer at phys 0x%llx, offset 0x%02x] Length 0x%04x Parse_flags 0x%04x vlan 0x%04x Opaque data [0x%08x:0x%08x]\n",
  152. (u64)data->rx_buf_addr,
  153. data->u.placement_offset,
  154. data->length.packet_length,
  155. data->parse_flags,
  156. data->vlan, data->opaque_data_0, data->opaque_data_1);
  157. if ((cdev->dp_module & NETIF_MSG_PKTDATA) && buffer->data) {
  158. print_hex_dump(KERN_INFO, "",
  159. DUMP_PREFIX_OFFSET, 16, 1,
  160. buffer->data, data->length.packet_length, false);
  161. }
  162. /* Determine if data is valid */
  163. if (data->length.packet_length < ETH_HLEN)
  164. reuse = true;
  165. /* Allocate a replacement for buffer; Reuse upon failure */
  166. if (!reuse)
  167. rc = qed_ll2_alloc_buffer(p_hwfn->cdev, &new_data,
  168. &new_phys_addr);
  169. /* If need to reuse or there's no replacement buffer, repost this */
  170. if (rc)
  171. goto out_post;
  172. dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
  173. cdev->ll2->rx_size, DMA_FROM_DEVICE);
  174. skb = build_skb(buffer->data, 0);
  175. if (!skb) {
  176. rc = -ENOMEM;
  177. goto out_post;
  178. }
  179. data->u.placement_offset += NET_SKB_PAD;
  180. skb_reserve(skb, data->u.placement_offset);
  181. skb_put(skb, data->length.packet_length);
  182. skb_checksum_none_assert(skb);
  183. /* Get parital ethernet information instead of eth_type_trans(),
  184. * Since we don't have an associated net_device.
  185. */
  186. skb_reset_mac_header(skb);
  187. skb->protocol = eth_hdr(skb)->h_proto;
  188. /* Pass SKB onward */
  189. if (cdev->ll2->cbs && cdev->ll2->cbs->rx_cb) {
  190. if (data->vlan)
  191. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
  192. data->vlan);
  193. cdev->ll2->cbs->rx_cb(cdev->ll2->cb_cookie, skb,
  194. data->opaque_data_0,
  195. data->opaque_data_1);
  196. }
  197. /* Update Buffer information and update FW producer */
  198. buffer->data = new_data;
  199. buffer->phys_addr = new_phys_addr;
  200. out_post:
  201. rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev), cdev->ll2->handle,
  202. buffer->phys_addr, 0, buffer, 1);
  203. if (rc)
  204. qed_ll2_dealloc_buffer(cdev, buffer);
  205. }
  206. static struct qed_ll2_info *__qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
  207. u8 connection_handle,
  208. bool b_lock,
  209. bool b_only_active)
  210. {
  211. struct qed_ll2_info *p_ll2_conn, *p_ret = NULL;
  212. if (connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS)
  213. return NULL;
  214. if (!p_hwfn->p_ll2_info)
  215. return NULL;
  216. p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
  217. if (b_only_active) {
  218. if (b_lock)
  219. mutex_lock(&p_ll2_conn->mutex);
  220. if (p_ll2_conn->b_active)
  221. p_ret = p_ll2_conn;
  222. if (b_lock)
  223. mutex_unlock(&p_ll2_conn->mutex);
  224. } else {
  225. p_ret = p_ll2_conn;
  226. }
  227. return p_ret;
  228. }
  229. static struct qed_ll2_info *qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
  230. u8 connection_handle)
  231. {
  232. return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, true);
  233. }
  234. static struct qed_ll2_info *qed_ll2_handle_sanity_lock(struct qed_hwfn *p_hwfn,
  235. u8 connection_handle)
  236. {
  237. return __qed_ll2_handle_sanity(p_hwfn, connection_handle, true, true);
  238. }
  239. static struct qed_ll2_info *qed_ll2_handle_sanity_inactive(struct qed_hwfn
  240. *p_hwfn,
  241. u8 connection_handle)
  242. {
  243. return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, false);
  244. }
  245. static void qed_ll2_txq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
  246. {
  247. bool b_last_packet = false, b_last_frag = false;
  248. struct qed_ll2_tx_packet *p_pkt = NULL;
  249. struct qed_ll2_info *p_ll2_conn;
  250. struct qed_ll2_tx_queue *p_tx;
  251. dma_addr_t tx_frag;
  252. p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
  253. if (!p_ll2_conn)
  254. return;
  255. p_tx = &p_ll2_conn->tx_queue;
  256. while (!list_empty(&p_tx->active_descq)) {
  257. p_pkt = list_first_entry(&p_tx->active_descq,
  258. struct qed_ll2_tx_packet, list_entry);
  259. if (!p_pkt)
  260. break;
  261. list_del(&p_pkt->list_entry);
  262. b_last_packet = list_empty(&p_tx->active_descq);
  263. list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
  264. if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) {
  265. struct qed_ooo_buffer *p_buffer;
  266. p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
  267. qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
  268. p_buffer);
  269. } else {
  270. p_tx->cur_completing_packet = *p_pkt;
  271. p_tx->cur_completing_bd_idx = 1;
  272. b_last_frag =
  273. p_tx->cur_completing_bd_idx == p_pkt->bd_used;
  274. tx_frag = p_pkt->bds_set[0].tx_frag;
  275. p_ll2_conn->cbs.tx_release_cb(p_ll2_conn->cbs.cookie,
  276. p_ll2_conn->my_id,
  277. p_pkt->cookie,
  278. tx_frag,
  279. b_last_frag,
  280. b_last_packet);
  281. }
  282. }
  283. }
  284. static int qed_ll2_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
  285. {
  286. struct qed_ll2_info *p_ll2_conn = p_cookie;
  287. struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
  288. u16 new_idx = 0, num_bds = 0, num_bds_in_packet = 0;
  289. struct qed_ll2_tx_packet *p_pkt;
  290. bool b_last_frag = false;
  291. unsigned long flags;
  292. int rc = -EINVAL;
  293. spin_lock_irqsave(&p_tx->lock, flags);
  294. if (p_tx->b_completing_packet) {
  295. rc = -EBUSY;
  296. goto out;
  297. }
  298. new_idx = le16_to_cpu(*p_tx->p_fw_cons);
  299. num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
  300. while (num_bds) {
  301. if (list_empty(&p_tx->active_descq))
  302. goto out;
  303. p_pkt = list_first_entry(&p_tx->active_descq,
  304. struct qed_ll2_tx_packet, list_entry);
  305. if (!p_pkt)
  306. goto out;
  307. p_tx->b_completing_packet = true;
  308. p_tx->cur_completing_packet = *p_pkt;
  309. num_bds_in_packet = p_pkt->bd_used;
  310. list_del(&p_pkt->list_entry);
  311. if (num_bds < num_bds_in_packet) {
  312. DP_NOTICE(p_hwfn,
  313. "Rest of BDs does not cover whole packet\n");
  314. goto out;
  315. }
  316. num_bds -= num_bds_in_packet;
  317. p_tx->bds_idx += num_bds_in_packet;
  318. while (num_bds_in_packet--)
  319. qed_chain_consume(&p_tx->txq_chain);
  320. p_tx->cur_completing_bd_idx = 1;
  321. b_last_frag = p_tx->cur_completing_bd_idx == p_pkt->bd_used;
  322. list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
  323. spin_unlock_irqrestore(&p_tx->lock, flags);
  324. p_ll2_conn->cbs.tx_comp_cb(p_ll2_conn->cbs.cookie,
  325. p_ll2_conn->my_id,
  326. p_pkt->cookie,
  327. p_pkt->bds_set[0].tx_frag,
  328. b_last_frag, !num_bds);
  329. spin_lock_irqsave(&p_tx->lock, flags);
  330. }
  331. p_tx->b_completing_packet = false;
  332. rc = 0;
  333. out:
  334. spin_unlock_irqrestore(&p_tx->lock, flags);
  335. return rc;
  336. }
  337. static void qed_ll2_rxq_parse_gsi(struct qed_hwfn *p_hwfn,
  338. union core_rx_cqe_union *p_cqe,
  339. struct qed_ll2_comp_rx_data *data)
  340. {
  341. data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_gsi.parse_flags.flags);
  342. data->length.data_length = le16_to_cpu(p_cqe->rx_cqe_gsi.data_length);
  343. data->vlan = le16_to_cpu(p_cqe->rx_cqe_gsi.vlan);
  344. data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrhi);
  345. data->opaque_data_1 = le16_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrlo);
  346. data->u.data_length_error = p_cqe->rx_cqe_gsi.data_length_error;
  347. }
  348. static void qed_ll2_rxq_parse_reg(struct qed_hwfn *p_hwfn,
  349. union core_rx_cqe_union *p_cqe,
  350. struct qed_ll2_comp_rx_data *data)
  351. {
  352. data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_fp.parse_flags.flags);
  353. data->err_flags = le16_to_cpu(p_cqe->rx_cqe_fp.err_flags.flags);
  354. data->length.packet_length =
  355. le16_to_cpu(p_cqe->rx_cqe_fp.packet_length);
  356. data->vlan = le16_to_cpu(p_cqe->rx_cqe_fp.vlan);
  357. data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[0]);
  358. data->opaque_data_1 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[1]);
  359. data->u.placement_offset = p_cqe->rx_cqe_fp.placement_offset;
  360. }
  361. static int
  362. qed_ll2_handle_slowpath(struct qed_hwfn *p_hwfn,
  363. struct qed_ll2_info *p_ll2_conn,
  364. union core_rx_cqe_union *p_cqe,
  365. unsigned long *p_lock_flags)
  366. {
  367. struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
  368. struct core_rx_slow_path_cqe *sp_cqe;
  369. sp_cqe = &p_cqe->rx_cqe_sp;
  370. if (sp_cqe->ramrod_cmd_id != CORE_RAMROD_RX_QUEUE_FLUSH) {
  371. DP_NOTICE(p_hwfn,
  372. "LL2 - unexpected Rx CQE slowpath ramrod_cmd_id:%d\n",
  373. sp_cqe->ramrod_cmd_id);
  374. return -EINVAL;
  375. }
  376. if (!p_ll2_conn->cbs.slowpath_cb) {
  377. DP_NOTICE(p_hwfn,
  378. "LL2 - received RX_QUEUE_FLUSH but no callback was provided\n");
  379. return -EINVAL;
  380. }
  381. spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags);
  382. p_ll2_conn->cbs.slowpath_cb(p_ll2_conn->cbs.cookie,
  383. p_ll2_conn->my_id,
  384. le32_to_cpu(sp_cqe->opaque_data.data[0]),
  385. le32_to_cpu(sp_cqe->opaque_data.data[1]));
  386. spin_lock_irqsave(&p_rx->lock, *p_lock_flags);
  387. return 0;
  388. }
  389. static int
  390. qed_ll2_rxq_handle_completion(struct qed_hwfn *p_hwfn,
  391. struct qed_ll2_info *p_ll2_conn,
  392. union core_rx_cqe_union *p_cqe,
  393. unsigned long *p_lock_flags, bool b_last_cqe)
  394. {
  395. struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
  396. struct qed_ll2_rx_packet *p_pkt = NULL;
  397. struct qed_ll2_comp_rx_data data;
  398. if (!list_empty(&p_rx->active_descq))
  399. p_pkt = list_first_entry(&p_rx->active_descq,
  400. struct qed_ll2_rx_packet, list_entry);
  401. if (!p_pkt) {
  402. DP_NOTICE(p_hwfn,
  403. "[%d] LL2 Rx completion but active_descq is empty\n",
  404. p_ll2_conn->input.conn_type);
  405. return -EIO;
  406. }
  407. list_del(&p_pkt->list_entry);
  408. if (p_cqe->rx_cqe_sp.type == CORE_RX_CQE_TYPE_REGULAR)
  409. qed_ll2_rxq_parse_reg(p_hwfn, p_cqe, &data);
  410. else
  411. qed_ll2_rxq_parse_gsi(p_hwfn, p_cqe, &data);
  412. if (qed_chain_consume(&p_rx->rxq_chain) != p_pkt->rxq_bd)
  413. DP_NOTICE(p_hwfn,
  414. "Mismatch between active_descq and the LL2 Rx chain\n");
  415. list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
  416. data.connection_handle = p_ll2_conn->my_id;
  417. data.cookie = p_pkt->cookie;
  418. data.rx_buf_addr = p_pkt->rx_buf_addr;
  419. data.b_last_packet = b_last_cqe;
  420. spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags);
  421. p_ll2_conn->cbs.rx_comp_cb(p_ll2_conn->cbs.cookie, &data);
  422. spin_lock_irqsave(&p_rx->lock, *p_lock_flags);
  423. return 0;
  424. }
  425. static int qed_ll2_rxq_completion(struct qed_hwfn *p_hwfn, void *cookie)
  426. {
  427. struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)cookie;
  428. struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
  429. union core_rx_cqe_union *cqe = NULL;
  430. u16 cq_new_idx = 0, cq_old_idx = 0;
  431. unsigned long flags = 0;
  432. int rc = 0;
  433. spin_lock_irqsave(&p_rx->lock, flags);
  434. cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
  435. cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
  436. while (cq_new_idx != cq_old_idx) {
  437. bool b_last_cqe = (cq_new_idx == cq_old_idx);
  438. cqe =
  439. (union core_rx_cqe_union *)
  440. qed_chain_consume(&p_rx->rcq_chain);
  441. cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
  442. DP_VERBOSE(p_hwfn,
  443. QED_MSG_LL2,
  444. "LL2 [sw. cons %04x, fw. at %04x] - Got Packet of type %02x\n",
  445. cq_old_idx, cq_new_idx, cqe->rx_cqe_sp.type);
  446. switch (cqe->rx_cqe_sp.type) {
  447. case CORE_RX_CQE_TYPE_SLOW_PATH:
  448. rc = qed_ll2_handle_slowpath(p_hwfn, p_ll2_conn,
  449. cqe, &flags);
  450. break;
  451. case CORE_RX_CQE_TYPE_GSI_OFFLOAD:
  452. case CORE_RX_CQE_TYPE_REGULAR:
  453. rc = qed_ll2_rxq_handle_completion(p_hwfn, p_ll2_conn,
  454. cqe, &flags,
  455. b_last_cqe);
  456. break;
  457. default:
  458. rc = -EIO;
  459. }
  460. }
  461. spin_unlock_irqrestore(&p_rx->lock, flags);
  462. return rc;
  463. }
  464. static void qed_ll2_rxq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
  465. {
  466. struct qed_ll2_info *p_ll2_conn = NULL;
  467. struct qed_ll2_rx_packet *p_pkt = NULL;
  468. struct qed_ll2_rx_queue *p_rx;
  469. p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
  470. if (!p_ll2_conn)
  471. return;
  472. p_rx = &p_ll2_conn->rx_queue;
  473. while (!list_empty(&p_rx->active_descq)) {
  474. p_pkt = list_first_entry(&p_rx->active_descq,
  475. struct qed_ll2_rx_packet, list_entry);
  476. if (!p_pkt)
  477. break;
  478. list_move_tail(&p_pkt->list_entry, &p_rx->free_descq);
  479. if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) {
  480. struct qed_ooo_buffer *p_buffer;
  481. p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
  482. qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
  483. p_buffer);
  484. } else {
  485. dma_addr_t rx_buf_addr = p_pkt->rx_buf_addr;
  486. void *cookie = p_pkt->cookie;
  487. bool b_last;
  488. b_last = list_empty(&p_rx->active_descq);
  489. p_ll2_conn->cbs.rx_release_cb(p_ll2_conn->cbs.cookie,
  490. p_ll2_conn->my_id,
  491. cookie,
  492. rx_buf_addr, b_last);
  493. }
  494. }
  495. }
  496. static u8 qed_ll2_convert_rx_parse_to_tx_flags(u16 parse_flags)
  497. {
  498. u8 bd_flags = 0;
  499. if (GET_FIELD(parse_flags, PARSING_AND_ERR_FLAGS_TAG8021QEXIST))
  500. SET_FIELD(bd_flags, CORE_TX_BD_DATA_VLAN_INSERTION, 1);
  501. return bd_flags;
  502. }
  503. static int qed_ll2_lb_rxq_handler(struct qed_hwfn *p_hwfn,
  504. struct qed_ll2_info *p_ll2_conn)
  505. {
  506. struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
  507. u16 packet_length = 0, parse_flags = 0, vlan = 0;
  508. struct qed_ll2_rx_packet *p_pkt = NULL;
  509. u32 num_ooo_add_to_peninsula = 0, cid;
  510. union core_rx_cqe_union *cqe = NULL;
  511. u16 cq_new_idx = 0, cq_old_idx = 0;
  512. struct qed_ooo_buffer *p_buffer;
  513. struct ooo_opaque *iscsi_ooo;
  514. u8 placement_offset = 0;
  515. u8 cqe_type;
  516. cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
  517. cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
  518. if (cq_new_idx == cq_old_idx)
  519. return 0;
  520. while (cq_new_idx != cq_old_idx) {
  521. struct core_rx_fast_path_cqe *p_cqe_fp;
  522. cqe = qed_chain_consume(&p_rx->rcq_chain);
  523. cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
  524. cqe_type = cqe->rx_cqe_sp.type;
  525. if (cqe_type != CORE_RX_CQE_TYPE_REGULAR) {
  526. DP_NOTICE(p_hwfn,
  527. "Got a non-regular LB LL2 completion [type 0x%02x]\n",
  528. cqe_type);
  529. return -EINVAL;
  530. }
  531. p_cqe_fp = &cqe->rx_cqe_fp;
  532. placement_offset = p_cqe_fp->placement_offset;
  533. parse_flags = le16_to_cpu(p_cqe_fp->parse_flags.flags);
  534. packet_length = le16_to_cpu(p_cqe_fp->packet_length);
  535. vlan = le16_to_cpu(p_cqe_fp->vlan);
  536. iscsi_ooo = (struct ooo_opaque *)&p_cqe_fp->opaque_data;
  537. qed_ooo_save_history_entry(p_hwfn, p_hwfn->p_ooo_info,
  538. iscsi_ooo);
  539. cid = le32_to_cpu(iscsi_ooo->cid);
  540. /* Process delete isle first */
  541. if (iscsi_ooo->drop_size)
  542. qed_ooo_delete_isles(p_hwfn, p_hwfn->p_ooo_info, cid,
  543. iscsi_ooo->drop_isle,
  544. iscsi_ooo->drop_size);
  545. if (iscsi_ooo->ooo_opcode == TCP_EVENT_NOP)
  546. continue;
  547. /* Now process create/add/join isles */
  548. if (list_empty(&p_rx->active_descq)) {
  549. DP_NOTICE(p_hwfn,
  550. "LL2 OOO RX chain has no submitted buffers\n"
  551. );
  552. return -EIO;
  553. }
  554. p_pkt = list_first_entry(&p_rx->active_descq,
  555. struct qed_ll2_rx_packet, list_entry);
  556. if ((iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_NEW_ISLE) ||
  557. (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_RIGHT) ||
  558. (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_LEFT) ||
  559. (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_PEN) ||
  560. (iscsi_ooo->ooo_opcode == TCP_EVENT_JOIN)) {
  561. if (!p_pkt) {
  562. DP_NOTICE(p_hwfn,
  563. "LL2 OOO RX packet is not valid\n");
  564. return -EIO;
  565. }
  566. list_del(&p_pkt->list_entry);
  567. p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
  568. p_buffer->packet_length = packet_length;
  569. p_buffer->parse_flags = parse_flags;
  570. p_buffer->vlan = vlan;
  571. p_buffer->placement_offset = placement_offset;
  572. qed_chain_consume(&p_rx->rxq_chain);
  573. list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
  574. switch (iscsi_ooo->ooo_opcode) {
  575. case TCP_EVENT_ADD_NEW_ISLE:
  576. qed_ooo_add_new_isle(p_hwfn,
  577. p_hwfn->p_ooo_info,
  578. cid,
  579. iscsi_ooo->ooo_isle,
  580. p_buffer);
  581. break;
  582. case TCP_EVENT_ADD_ISLE_RIGHT:
  583. qed_ooo_add_new_buffer(p_hwfn,
  584. p_hwfn->p_ooo_info,
  585. cid,
  586. iscsi_ooo->ooo_isle,
  587. p_buffer,
  588. QED_OOO_RIGHT_BUF);
  589. break;
  590. case TCP_EVENT_ADD_ISLE_LEFT:
  591. qed_ooo_add_new_buffer(p_hwfn,
  592. p_hwfn->p_ooo_info,
  593. cid,
  594. iscsi_ooo->ooo_isle,
  595. p_buffer,
  596. QED_OOO_LEFT_BUF);
  597. break;
  598. case TCP_EVENT_JOIN:
  599. qed_ooo_add_new_buffer(p_hwfn,
  600. p_hwfn->p_ooo_info,
  601. cid,
  602. iscsi_ooo->ooo_isle +
  603. 1,
  604. p_buffer,
  605. QED_OOO_LEFT_BUF);
  606. qed_ooo_join_isles(p_hwfn,
  607. p_hwfn->p_ooo_info,
  608. cid, iscsi_ooo->ooo_isle);
  609. break;
  610. case TCP_EVENT_ADD_PEN:
  611. num_ooo_add_to_peninsula++;
  612. qed_ooo_put_ready_buffer(p_hwfn,
  613. p_hwfn->p_ooo_info,
  614. p_buffer, true);
  615. break;
  616. }
  617. } else {
  618. DP_NOTICE(p_hwfn,
  619. "Unexpected event (%d) TX OOO completion\n",
  620. iscsi_ooo->ooo_opcode);
  621. }
  622. }
  623. return 0;
  624. }
  625. static void
  626. qed_ooo_submit_tx_buffers(struct qed_hwfn *p_hwfn,
  627. struct qed_ll2_info *p_ll2_conn)
  628. {
  629. struct qed_ll2_tx_pkt_info tx_pkt;
  630. struct qed_ooo_buffer *p_buffer;
  631. u16 l4_hdr_offset_w;
  632. dma_addr_t first_frag;
  633. u16 parse_flags;
  634. u8 bd_flags;
  635. int rc;
  636. /* Submit Tx buffers here */
  637. while ((p_buffer = qed_ooo_get_ready_buffer(p_hwfn,
  638. p_hwfn->p_ooo_info))) {
  639. l4_hdr_offset_w = 0;
  640. bd_flags = 0;
  641. first_frag = p_buffer->rx_buffer_phys_addr +
  642. p_buffer->placement_offset;
  643. parse_flags = p_buffer->parse_flags;
  644. bd_flags = qed_ll2_convert_rx_parse_to_tx_flags(parse_flags);
  645. SET_FIELD(bd_flags, CORE_TX_BD_DATA_FORCE_VLAN_MODE, 1);
  646. SET_FIELD(bd_flags, CORE_TX_BD_DATA_L4_PROTOCOL, 1);
  647. memset(&tx_pkt, 0, sizeof(tx_pkt));
  648. tx_pkt.num_of_bds = 1;
  649. tx_pkt.vlan = p_buffer->vlan;
  650. tx_pkt.bd_flags = bd_flags;
  651. tx_pkt.l4_hdr_offset_w = l4_hdr_offset_w;
  652. tx_pkt.tx_dest = p_ll2_conn->tx_dest;
  653. tx_pkt.first_frag = first_frag;
  654. tx_pkt.first_frag_len = p_buffer->packet_length;
  655. tx_pkt.cookie = p_buffer;
  656. rc = qed_ll2_prepare_tx_packet(p_hwfn, p_ll2_conn->my_id,
  657. &tx_pkt, true);
  658. if (rc) {
  659. qed_ooo_put_ready_buffer(p_hwfn, p_hwfn->p_ooo_info,
  660. p_buffer, false);
  661. break;
  662. }
  663. }
  664. }
  665. static void
  666. qed_ooo_submit_rx_buffers(struct qed_hwfn *p_hwfn,
  667. struct qed_ll2_info *p_ll2_conn)
  668. {
  669. struct qed_ooo_buffer *p_buffer;
  670. int rc;
  671. while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
  672. p_hwfn->p_ooo_info))) {
  673. rc = qed_ll2_post_rx_buffer(p_hwfn,
  674. p_ll2_conn->my_id,
  675. p_buffer->rx_buffer_phys_addr,
  676. 0, p_buffer, true);
  677. if (rc) {
  678. qed_ooo_put_free_buffer(p_hwfn,
  679. p_hwfn->p_ooo_info, p_buffer);
  680. break;
  681. }
  682. }
  683. }
  684. static int qed_ll2_lb_rxq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
  685. {
  686. struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
  687. int rc;
  688. rc = qed_ll2_lb_rxq_handler(p_hwfn, p_ll2_conn);
  689. if (rc)
  690. return rc;
  691. qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
  692. qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
  693. return 0;
  694. }
  695. static int qed_ll2_lb_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
  696. {
  697. struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
  698. struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
  699. struct qed_ll2_tx_packet *p_pkt = NULL;
  700. struct qed_ooo_buffer *p_buffer;
  701. bool b_dont_submit_rx = false;
  702. u16 new_idx = 0, num_bds = 0;
  703. int rc;
  704. new_idx = le16_to_cpu(*p_tx->p_fw_cons);
  705. num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
  706. if (!num_bds)
  707. return 0;
  708. while (num_bds) {
  709. if (list_empty(&p_tx->active_descq))
  710. return -EINVAL;
  711. p_pkt = list_first_entry(&p_tx->active_descq,
  712. struct qed_ll2_tx_packet, list_entry);
  713. if (!p_pkt)
  714. return -EINVAL;
  715. if (p_pkt->bd_used != 1) {
  716. DP_NOTICE(p_hwfn,
  717. "Unexpectedly many BDs(%d) in TX OOO completion\n",
  718. p_pkt->bd_used);
  719. return -EINVAL;
  720. }
  721. list_del(&p_pkt->list_entry);
  722. num_bds--;
  723. p_tx->bds_idx++;
  724. qed_chain_consume(&p_tx->txq_chain);
  725. p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
  726. list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
  727. if (b_dont_submit_rx) {
  728. qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
  729. p_buffer);
  730. continue;
  731. }
  732. rc = qed_ll2_post_rx_buffer(p_hwfn, p_ll2_conn->my_id,
  733. p_buffer->rx_buffer_phys_addr, 0,
  734. p_buffer, true);
  735. if (rc != 0) {
  736. qed_ooo_put_free_buffer(p_hwfn,
  737. p_hwfn->p_ooo_info, p_buffer);
  738. b_dont_submit_rx = true;
  739. }
  740. }
  741. qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
  742. return 0;
  743. }
  744. static void qed_ll2_stop_ooo(struct qed_dev *cdev)
  745. {
  746. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  747. u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
  748. DP_VERBOSE(cdev, QED_MSG_STORAGE, "Stopping LL2 OOO queue [%02x]\n",
  749. *handle);
  750. qed_ll2_terminate_connection(hwfn, *handle);
  751. qed_ll2_release_connection(hwfn, *handle);
  752. *handle = QED_LL2_UNUSED_HANDLE;
  753. }
  754. static int qed_sp_ll2_rx_queue_start(struct qed_hwfn *p_hwfn,
  755. struct qed_ll2_info *p_ll2_conn,
  756. u8 action_on_error)
  757. {
  758. enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type;
  759. struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
  760. struct core_rx_start_ramrod_data *p_ramrod = NULL;
  761. struct qed_spq_entry *p_ent = NULL;
  762. struct qed_sp_init_data init_data;
  763. u16 cqe_pbl_size;
  764. int rc = 0;
  765. /* Get SPQ entry */
  766. memset(&init_data, 0, sizeof(init_data));
  767. init_data.cid = p_ll2_conn->cid;
  768. init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
  769. init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
  770. rc = qed_sp_init_request(p_hwfn, &p_ent,
  771. CORE_RAMROD_RX_QUEUE_START,
  772. PROTOCOLID_CORE, &init_data);
  773. if (rc)
  774. return rc;
  775. p_ramrod = &p_ent->ramrod.core_rx_queue_start;
  776. p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
  777. p_ramrod->sb_index = p_rx->rx_sb_index;
  778. p_ramrod->complete_event_flg = 1;
  779. p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu);
  780. DMA_REGPAIR_LE(p_ramrod->bd_base, p_rx->rxq_chain.p_phys_addr);
  781. cqe_pbl_size = (u16)qed_chain_get_page_cnt(&p_rx->rcq_chain);
  782. p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size);
  783. DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr,
  784. qed_chain_get_pbl_phys(&p_rx->rcq_chain));
  785. p_ramrod->drop_ttl0_flg = p_ll2_conn->input.rx_drop_ttl0_flg;
  786. p_ramrod->inner_vlan_removal_en = p_ll2_conn->input.rx_vlan_removal_en;
  787. p_ramrod->queue_id = p_ll2_conn->queue_id;
  788. p_ramrod->main_func_queue = p_ll2_conn->main_func_queue ? 1 : 0;
  789. if ((IS_MF_DEFAULT(p_hwfn) || IS_MF_SI(p_hwfn)) &&
  790. p_ramrod->main_func_queue && (conn_type != QED_LL2_TYPE_ROCE) &&
  791. (conn_type != QED_LL2_TYPE_IWARP)) {
  792. p_ramrod->mf_si_bcast_accept_all = 1;
  793. p_ramrod->mf_si_mcast_accept_all = 1;
  794. } else {
  795. p_ramrod->mf_si_bcast_accept_all = 0;
  796. p_ramrod->mf_si_mcast_accept_all = 0;
  797. }
  798. p_ramrod->action_on_error.error_type = action_on_error;
  799. p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable;
  800. return qed_spq_post(p_hwfn, p_ent, NULL);
  801. }
  802. static int qed_sp_ll2_tx_queue_start(struct qed_hwfn *p_hwfn,
  803. struct qed_ll2_info *p_ll2_conn)
  804. {
  805. enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type;
  806. struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
  807. struct core_tx_start_ramrod_data *p_ramrod = NULL;
  808. struct qed_spq_entry *p_ent = NULL;
  809. struct qed_sp_init_data init_data;
  810. u16 pq_id = 0, pbl_size;
  811. int rc = -EINVAL;
  812. if (!QED_LL2_TX_REGISTERED(p_ll2_conn))
  813. return 0;
  814. if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO)
  815. p_ll2_conn->tx_stats_en = 0;
  816. else
  817. p_ll2_conn->tx_stats_en = 1;
  818. /* Get SPQ entry */
  819. memset(&init_data, 0, sizeof(init_data));
  820. init_data.cid = p_ll2_conn->cid;
  821. init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
  822. init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
  823. rc = qed_sp_init_request(p_hwfn, &p_ent,
  824. CORE_RAMROD_TX_QUEUE_START,
  825. PROTOCOLID_CORE, &init_data);
  826. if (rc)
  827. return rc;
  828. p_ramrod = &p_ent->ramrod.core_tx_queue_start;
  829. p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
  830. p_ramrod->sb_index = p_tx->tx_sb_index;
  831. p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu);
  832. p_ramrod->stats_en = p_ll2_conn->tx_stats_en;
  833. p_ramrod->stats_id = p_ll2_conn->tx_stats_id;
  834. DMA_REGPAIR_LE(p_ramrod->pbl_base_addr,
  835. qed_chain_get_pbl_phys(&p_tx->txq_chain));
  836. pbl_size = qed_chain_get_page_cnt(&p_tx->txq_chain);
  837. p_ramrod->pbl_size = cpu_to_le16(pbl_size);
  838. switch (p_ll2_conn->input.tx_tc) {
  839. case PURE_LB_TC:
  840. pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB);
  841. break;
  842. case PKT_LB_TC:
  843. pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OOO);
  844. break;
  845. default:
  846. pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OFLD);
  847. break;
  848. }
  849. p_ramrod->qm_pq_id = cpu_to_le16(pq_id);
  850. switch (conn_type) {
  851. case QED_LL2_TYPE_FCOE:
  852. p_ramrod->conn_type = PROTOCOLID_FCOE;
  853. break;
  854. case QED_LL2_TYPE_ISCSI:
  855. p_ramrod->conn_type = PROTOCOLID_ISCSI;
  856. break;
  857. case QED_LL2_TYPE_ROCE:
  858. p_ramrod->conn_type = PROTOCOLID_ROCE;
  859. break;
  860. case QED_LL2_TYPE_IWARP:
  861. p_ramrod->conn_type = PROTOCOLID_IWARP;
  862. break;
  863. case QED_LL2_TYPE_OOO:
  864. if (p_hwfn->hw_info.personality == QED_PCI_ISCSI)
  865. p_ramrod->conn_type = PROTOCOLID_ISCSI;
  866. else
  867. p_ramrod->conn_type = PROTOCOLID_IWARP;
  868. break;
  869. default:
  870. p_ramrod->conn_type = PROTOCOLID_ETH;
  871. DP_NOTICE(p_hwfn, "Unknown connection type: %d\n", conn_type);
  872. }
  873. p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable;
  874. return qed_spq_post(p_hwfn, p_ent, NULL);
  875. }
  876. static int qed_sp_ll2_rx_queue_stop(struct qed_hwfn *p_hwfn,
  877. struct qed_ll2_info *p_ll2_conn)
  878. {
  879. struct core_rx_stop_ramrod_data *p_ramrod = NULL;
  880. struct qed_spq_entry *p_ent = NULL;
  881. struct qed_sp_init_data init_data;
  882. int rc = -EINVAL;
  883. /* Get SPQ entry */
  884. memset(&init_data, 0, sizeof(init_data));
  885. init_data.cid = p_ll2_conn->cid;
  886. init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
  887. init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
  888. rc = qed_sp_init_request(p_hwfn, &p_ent,
  889. CORE_RAMROD_RX_QUEUE_STOP,
  890. PROTOCOLID_CORE, &init_data);
  891. if (rc)
  892. return rc;
  893. p_ramrod = &p_ent->ramrod.core_rx_queue_stop;
  894. p_ramrod->complete_event_flg = 1;
  895. p_ramrod->queue_id = p_ll2_conn->queue_id;
  896. return qed_spq_post(p_hwfn, p_ent, NULL);
  897. }
  898. static int qed_sp_ll2_tx_queue_stop(struct qed_hwfn *p_hwfn,
  899. struct qed_ll2_info *p_ll2_conn)
  900. {
  901. struct qed_spq_entry *p_ent = NULL;
  902. struct qed_sp_init_data init_data;
  903. int rc = -EINVAL;
  904. /* Get SPQ entry */
  905. memset(&init_data, 0, sizeof(init_data));
  906. init_data.cid = p_ll2_conn->cid;
  907. init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
  908. init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
  909. rc = qed_sp_init_request(p_hwfn, &p_ent,
  910. CORE_RAMROD_TX_QUEUE_STOP,
  911. PROTOCOLID_CORE, &init_data);
  912. if (rc)
  913. return rc;
  914. return qed_spq_post(p_hwfn, p_ent, NULL);
  915. }
  916. static int
  917. qed_ll2_acquire_connection_rx(struct qed_hwfn *p_hwfn,
  918. struct qed_ll2_info *p_ll2_info)
  919. {
  920. struct qed_ll2_rx_packet *p_descq;
  921. u32 capacity;
  922. int rc = 0;
  923. if (!p_ll2_info->input.rx_num_desc)
  924. goto out;
  925. rc = qed_chain_alloc(p_hwfn->cdev,
  926. QED_CHAIN_USE_TO_CONSUME_PRODUCE,
  927. QED_CHAIN_MODE_NEXT_PTR,
  928. QED_CHAIN_CNT_TYPE_U16,
  929. p_ll2_info->input.rx_num_desc,
  930. sizeof(struct core_rx_bd),
  931. &p_ll2_info->rx_queue.rxq_chain, NULL);
  932. if (rc) {
  933. DP_NOTICE(p_hwfn, "Failed to allocate ll2 rxq chain\n");
  934. goto out;
  935. }
  936. capacity = qed_chain_get_capacity(&p_ll2_info->rx_queue.rxq_chain);
  937. p_descq = kcalloc(capacity, sizeof(struct qed_ll2_rx_packet),
  938. GFP_KERNEL);
  939. if (!p_descq) {
  940. rc = -ENOMEM;
  941. DP_NOTICE(p_hwfn, "Failed to allocate ll2 Rx desc\n");
  942. goto out;
  943. }
  944. p_ll2_info->rx_queue.descq_array = p_descq;
  945. rc = qed_chain_alloc(p_hwfn->cdev,
  946. QED_CHAIN_USE_TO_CONSUME_PRODUCE,
  947. QED_CHAIN_MODE_PBL,
  948. QED_CHAIN_CNT_TYPE_U16,
  949. p_ll2_info->input.rx_num_desc,
  950. sizeof(struct core_rx_fast_path_cqe),
  951. &p_ll2_info->rx_queue.rcq_chain, NULL);
  952. if (rc) {
  953. DP_NOTICE(p_hwfn, "Failed to allocate ll2 rcq chain\n");
  954. goto out;
  955. }
  956. DP_VERBOSE(p_hwfn, QED_MSG_LL2,
  957. "Allocated LL2 Rxq [Type %08x] with 0x%08x buffers\n",
  958. p_ll2_info->input.conn_type, p_ll2_info->input.rx_num_desc);
  959. out:
  960. return rc;
  961. }
  962. static int qed_ll2_acquire_connection_tx(struct qed_hwfn *p_hwfn,
  963. struct qed_ll2_info *p_ll2_info)
  964. {
  965. struct qed_ll2_tx_packet *p_descq;
  966. u32 desc_size;
  967. u32 capacity;
  968. int rc = 0;
  969. if (!p_ll2_info->input.tx_num_desc)
  970. goto out;
  971. rc = qed_chain_alloc(p_hwfn->cdev,
  972. QED_CHAIN_USE_TO_CONSUME_PRODUCE,
  973. QED_CHAIN_MODE_PBL,
  974. QED_CHAIN_CNT_TYPE_U16,
  975. p_ll2_info->input.tx_num_desc,
  976. sizeof(struct core_tx_bd),
  977. &p_ll2_info->tx_queue.txq_chain, NULL);
  978. if (rc)
  979. goto out;
  980. capacity = qed_chain_get_capacity(&p_ll2_info->tx_queue.txq_chain);
  981. /* First element is part of the packet, rest are flexibly added */
  982. desc_size = (sizeof(*p_descq) +
  983. (p_ll2_info->input.tx_max_bds_per_packet - 1) *
  984. sizeof(p_descq->bds_set));
  985. p_descq = kcalloc(capacity, desc_size, GFP_KERNEL);
  986. if (!p_descq) {
  987. rc = -ENOMEM;
  988. goto out;
  989. }
  990. p_ll2_info->tx_queue.descq_mem = p_descq;
  991. DP_VERBOSE(p_hwfn, QED_MSG_LL2,
  992. "Allocated LL2 Txq [Type %08x] with 0x%08x buffers\n",
  993. p_ll2_info->input.conn_type, p_ll2_info->input.tx_num_desc);
  994. out:
  995. if (rc)
  996. DP_NOTICE(p_hwfn,
  997. "Can't allocate memory for Tx LL2 with 0x%08x buffers\n",
  998. p_ll2_info->input.tx_num_desc);
  999. return rc;
  1000. }
  1001. static int
  1002. qed_ll2_acquire_connection_ooo(struct qed_hwfn *p_hwfn,
  1003. struct qed_ll2_info *p_ll2_info, u16 mtu)
  1004. {
  1005. struct qed_ooo_buffer *p_buf = NULL;
  1006. void *p_virt;
  1007. u16 buf_idx;
  1008. int rc = 0;
  1009. if (p_ll2_info->input.conn_type != QED_LL2_TYPE_OOO)
  1010. return rc;
  1011. /* Correct number of requested OOO buffers if needed */
  1012. if (!p_ll2_info->input.rx_num_ooo_buffers) {
  1013. u16 num_desc = p_ll2_info->input.rx_num_desc;
  1014. if (!num_desc)
  1015. return -EINVAL;
  1016. p_ll2_info->input.rx_num_ooo_buffers = num_desc * 2;
  1017. }
  1018. for (buf_idx = 0; buf_idx < p_ll2_info->input.rx_num_ooo_buffers;
  1019. buf_idx++) {
  1020. p_buf = kzalloc(sizeof(*p_buf), GFP_KERNEL);
  1021. if (!p_buf) {
  1022. rc = -ENOMEM;
  1023. goto out;
  1024. }
  1025. p_buf->rx_buffer_size = mtu + 26 + ETH_CACHE_LINE_SIZE;
  1026. p_buf->rx_buffer_size = (p_buf->rx_buffer_size +
  1027. ETH_CACHE_LINE_SIZE - 1) &
  1028. ~(ETH_CACHE_LINE_SIZE - 1);
  1029. p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
  1030. p_buf->rx_buffer_size,
  1031. &p_buf->rx_buffer_phys_addr,
  1032. GFP_KERNEL);
  1033. if (!p_virt) {
  1034. kfree(p_buf);
  1035. rc = -ENOMEM;
  1036. goto out;
  1037. }
  1038. p_buf->rx_buffer_virt_addr = p_virt;
  1039. qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, p_buf);
  1040. }
  1041. DP_VERBOSE(p_hwfn, QED_MSG_LL2,
  1042. "Allocated [%04x] LL2 OOO buffers [each of size 0x%08x]\n",
  1043. p_ll2_info->input.rx_num_ooo_buffers, p_buf->rx_buffer_size);
  1044. out:
  1045. return rc;
  1046. }
  1047. static int
  1048. qed_ll2_set_cbs(struct qed_ll2_info *p_ll2_info, const struct qed_ll2_cbs *cbs)
  1049. {
  1050. if (!cbs || (!cbs->rx_comp_cb ||
  1051. !cbs->rx_release_cb ||
  1052. !cbs->tx_comp_cb || !cbs->tx_release_cb || !cbs->cookie))
  1053. return -EINVAL;
  1054. p_ll2_info->cbs.rx_comp_cb = cbs->rx_comp_cb;
  1055. p_ll2_info->cbs.rx_release_cb = cbs->rx_release_cb;
  1056. p_ll2_info->cbs.tx_comp_cb = cbs->tx_comp_cb;
  1057. p_ll2_info->cbs.tx_release_cb = cbs->tx_release_cb;
  1058. p_ll2_info->cbs.slowpath_cb = cbs->slowpath_cb;
  1059. p_ll2_info->cbs.cookie = cbs->cookie;
  1060. return 0;
  1061. }
  1062. static enum core_error_handle
  1063. qed_ll2_get_error_choice(enum qed_ll2_error_handle err)
  1064. {
  1065. switch (err) {
  1066. case QED_LL2_DROP_PACKET:
  1067. return LL2_DROP_PACKET;
  1068. case QED_LL2_DO_NOTHING:
  1069. return LL2_DO_NOTHING;
  1070. case QED_LL2_ASSERT:
  1071. return LL2_ASSERT;
  1072. default:
  1073. return LL2_DO_NOTHING;
  1074. }
  1075. }
  1076. int qed_ll2_acquire_connection(void *cxt, struct qed_ll2_acquire_data *data)
  1077. {
  1078. struct qed_hwfn *p_hwfn = cxt;
  1079. qed_int_comp_cb_t comp_rx_cb, comp_tx_cb;
  1080. struct qed_ll2_info *p_ll2_info = NULL;
  1081. u8 i, *p_tx_max;
  1082. int rc;
  1083. if (!data->p_connection_handle || !p_hwfn->p_ll2_info)
  1084. return -EINVAL;
  1085. /* Find a free connection to be used */
  1086. for (i = 0; (i < QED_MAX_NUM_OF_LL2_CONNECTIONS); i++) {
  1087. mutex_lock(&p_hwfn->p_ll2_info[i].mutex);
  1088. if (p_hwfn->p_ll2_info[i].b_active) {
  1089. mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
  1090. continue;
  1091. }
  1092. p_hwfn->p_ll2_info[i].b_active = true;
  1093. p_ll2_info = &p_hwfn->p_ll2_info[i];
  1094. mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
  1095. break;
  1096. }
  1097. if (!p_ll2_info)
  1098. return -EBUSY;
  1099. memcpy(&p_ll2_info->input, &data->input, sizeof(p_ll2_info->input));
  1100. p_ll2_info->tx_dest = (data->input.tx_dest == QED_LL2_TX_DEST_NW) ?
  1101. CORE_TX_DEST_NW : CORE_TX_DEST_LB;
  1102. if (data->input.conn_type == QED_LL2_TYPE_OOO ||
  1103. data->input.secondary_queue)
  1104. p_ll2_info->main_func_queue = false;
  1105. else
  1106. p_ll2_info->main_func_queue = true;
  1107. /* Correct maximum number of Tx BDs */
  1108. p_tx_max = &p_ll2_info->input.tx_max_bds_per_packet;
  1109. if (*p_tx_max == 0)
  1110. *p_tx_max = CORE_LL2_TX_MAX_BDS_PER_PACKET;
  1111. else
  1112. *p_tx_max = min_t(u8, *p_tx_max,
  1113. CORE_LL2_TX_MAX_BDS_PER_PACKET);
  1114. rc = qed_ll2_set_cbs(p_ll2_info, data->cbs);
  1115. if (rc) {
  1116. DP_NOTICE(p_hwfn, "Invalid callback functions\n");
  1117. goto q_allocate_fail;
  1118. }
  1119. rc = qed_ll2_acquire_connection_rx(p_hwfn, p_ll2_info);
  1120. if (rc)
  1121. goto q_allocate_fail;
  1122. rc = qed_ll2_acquire_connection_tx(p_hwfn, p_ll2_info);
  1123. if (rc)
  1124. goto q_allocate_fail;
  1125. rc = qed_ll2_acquire_connection_ooo(p_hwfn, p_ll2_info,
  1126. data->input.mtu);
  1127. if (rc)
  1128. goto q_allocate_fail;
  1129. /* Register callbacks for the Rx/Tx queues */
  1130. if (data->input.conn_type == QED_LL2_TYPE_OOO) {
  1131. comp_rx_cb = qed_ll2_lb_rxq_completion;
  1132. comp_tx_cb = qed_ll2_lb_txq_completion;
  1133. } else {
  1134. comp_rx_cb = qed_ll2_rxq_completion;
  1135. comp_tx_cb = qed_ll2_txq_completion;
  1136. }
  1137. if (data->input.rx_num_desc) {
  1138. qed_int_register_cb(p_hwfn, comp_rx_cb,
  1139. &p_hwfn->p_ll2_info[i],
  1140. &p_ll2_info->rx_queue.rx_sb_index,
  1141. &p_ll2_info->rx_queue.p_fw_cons);
  1142. p_ll2_info->rx_queue.b_cb_registred = true;
  1143. }
  1144. if (data->input.tx_num_desc) {
  1145. qed_int_register_cb(p_hwfn,
  1146. comp_tx_cb,
  1147. &p_hwfn->p_ll2_info[i],
  1148. &p_ll2_info->tx_queue.tx_sb_index,
  1149. &p_ll2_info->tx_queue.p_fw_cons);
  1150. p_ll2_info->tx_queue.b_cb_registred = true;
  1151. }
  1152. *data->p_connection_handle = i;
  1153. return rc;
  1154. q_allocate_fail:
  1155. qed_ll2_release_connection(p_hwfn, i);
  1156. return -ENOMEM;
  1157. }
  1158. static int qed_ll2_establish_connection_rx(struct qed_hwfn *p_hwfn,
  1159. struct qed_ll2_info *p_ll2_conn)
  1160. {
  1161. enum qed_ll2_error_handle error_input;
  1162. enum core_error_handle error_mode;
  1163. u8 action_on_error = 0;
  1164. if (!QED_LL2_RX_REGISTERED(p_ll2_conn))
  1165. return 0;
  1166. DIRECT_REG_WR(p_ll2_conn->rx_queue.set_prod_addr, 0x0);
  1167. error_input = p_ll2_conn->input.ai_err_packet_too_big;
  1168. error_mode = qed_ll2_get_error_choice(error_input);
  1169. SET_FIELD(action_on_error,
  1170. CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG, error_mode);
  1171. error_input = p_ll2_conn->input.ai_err_no_buf;
  1172. error_mode = qed_ll2_get_error_choice(error_input);
  1173. SET_FIELD(action_on_error, CORE_RX_ACTION_ON_ERROR_NO_BUFF, error_mode);
  1174. return qed_sp_ll2_rx_queue_start(p_hwfn, p_ll2_conn, action_on_error);
  1175. }
  1176. static void
  1177. qed_ll2_establish_connection_ooo(struct qed_hwfn *p_hwfn,
  1178. struct qed_ll2_info *p_ll2_conn)
  1179. {
  1180. if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO)
  1181. return;
  1182. qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
  1183. qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
  1184. }
  1185. int qed_ll2_establish_connection(void *cxt, u8 connection_handle)
  1186. {
  1187. struct qed_hwfn *p_hwfn = cxt;
  1188. struct qed_ll2_info *p_ll2_conn;
  1189. struct qed_ll2_tx_packet *p_pkt;
  1190. struct qed_ll2_rx_queue *p_rx;
  1191. struct qed_ll2_tx_queue *p_tx;
  1192. struct qed_ptt *p_ptt;
  1193. int rc = -EINVAL;
  1194. u32 i, capacity;
  1195. u32 desc_size;
  1196. u8 qid;
  1197. p_ptt = qed_ptt_acquire(p_hwfn);
  1198. if (!p_ptt)
  1199. return -EAGAIN;
  1200. p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
  1201. if (!p_ll2_conn) {
  1202. rc = -EINVAL;
  1203. goto out;
  1204. }
  1205. p_rx = &p_ll2_conn->rx_queue;
  1206. p_tx = &p_ll2_conn->tx_queue;
  1207. qed_chain_reset(&p_rx->rxq_chain);
  1208. qed_chain_reset(&p_rx->rcq_chain);
  1209. INIT_LIST_HEAD(&p_rx->active_descq);
  1210. INIT_LIST_HEAD(&p_rx->free_descq);
  1211. INIT_LIST_HEAD(&p_rx->posting_descq);
  1212. spin_lock_init(&p_rx->lock);
  1213. capacity = qed_chain_get_capacity(&p_rx->rxq_chain);
  1214. for (i = 0; i < capacity; i++)
  1215. list_add_tail(&p_rx->descq_array[i].list_entry,
  1216. &p_rx->free_descq);
  1217. *p_rx->p_fw_cons = 0;
  1218. qed_chain_reset(&p_tx->txq_chain);
  1219. INIT_LIST_HEAD(&p_tx->active_descq);
  1220. INIT_LIST_HEAD(&p_tx->free_descq);
  1221. INIT_LIST_HEAD(&p_tx->sending_descq);
  1222. spin_lock_init(&p_tx->lock);
  1223. capacity = qed_chain_get_capacity(&p_tx->txq_chain);
  1224. /* First element is part of the packet, rest are flexibly added */
  1225. desc_size = (sizeof(*p_pkt) +
  1226. (p_ll2_conn->input.tx_max_bds_per_packet - 1) *
  1227. sizeof(p_pkt->bds_set));
  1228. for (i = 0; i < capacity; i++) {
  1229. p_pkt = p_tx->descq_mem + desc_size * i;
  1230. list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
  1231. }
  1232. p_tx->cur_completing_bd_idx = 0;
  1233. p_tx->bds_idx = 0;
  1234. p_tx->b_completing_packet = false;
  1235. p_tx->cur_send_packet = NULL;
  1236. p_tx->cur_send_frag_num = 0;
  1237. p_tx->cur_completing_frag_num = 0;
  1238. *p_tx->p_fw_cons = 0;
  1239. rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_CORE, &p_ll2_conn->cid);
  1240. if (rc)
  1241. goto out;
  1242. qid = p_hwfn->hw_info.resc_start[QED_LL2_QUEUE] + connection_handle;
  1243. p_ll2_conn->queue_id = qid;
  1244. p_ll2_conn->tx_stats_id = qid;
  1245. p_rx->set_prod_addr = (u8 __iomem *)p_hwfn->regview +
  1246. GTT_BAR0_MAP_REG_TSDM_RAM +
  1247. TSTORM_LL2_RX_PRODS_OFFSET(qid);
  1248. p_tx->doorbell_addr = (u8 __iomem *)p_hwfn->doorbells +
  1249. qed_db_addr(p_ll2_conn->cid,
  1250. DQ_DEMS_LEGACY);
  1251. rc = qed_ll2_establish_connection_rx(p_hwfn, p_ll2_conn);
  1252. if (rc)
  1253. goto out;
  1254. rc = qed_sp_ll2_tx_queue_start(p_hwfn, p_ll2_conn);
  1255. if (rc)
  1256. goto out;
  1257. if (!QED_IS_RDMA_PERSONALITY(p_hwfn))
  1258. qed_wr(p_hwfn, p_ptt, PRS_REG_USE_LIGHT_L2, 1);
  1259. qed_ll2_establish_connection_ooo(p_hwfn, p_ll2_conn);
  1260. if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
  1261. qed_llh_add_protocol_filter(p_hwfn, p_ptt,
  1262. 0x8906, 0,
  1263. QED_LLH_FILTER_ETHERTYPE);
  1264. qed_llh_add_protocol_filter(p_hwfn, p_ptt,
  1265. 0x8914, 0,
  1266. QED_LLH_FILTER_ETHERTYPE);
  1267. }
  1268. out:
  1269. qed_ptt_release(p_hwfn, p_ptt);
  1270. return rc;
  1271. }
  1272. static void qed_ll2_post_rx_buffer_notify_fw(struct qed_hwfn *p_hwfn,
  1273. struct qed_ll2_rx_queue *p_rx,
  1274. struct qed_ll2_rx_packet *p_curp)
  1275. {
  1276. struct qed_ll2_rx_packet *p_posting_packet = NULL;
  1277. struct core_ll2_rx_prod rx_prod = { 0, 0, 0 };
  1278. bool b_notify_fw = false;
  1279. u16 bd_prod, cq_prod;
  1280. /* This handles the flushing of already posted buffers */
  1281. while (!list_empty(&p_rx->posting_descq)) {
  1282. p_posting_packet = list_first_entry(&p_rx->posting_descq,
  1283. struct qed_ll2_rx_packet,
  1284. list_entry);
  1285. list_move_tail(&p_posting_packet->list_entry,
  1286. &p_rx->active_descq);
  1287. b_notify_fw = true;
  1288. }
  1289. /* This handles the supplied packet [if there is one] */
  1290. if (p_curp) {
  1291. list_add_tail(&p_curp->list_entry, &p_rx->active_descq);
  1292. b_notify_fw = true;
  1293. }
  1294. if (!b_notify_fw)
  1295. return;
  1296. bd_prod = qed_chain_get_prod_idx(&p_rx->rxq_chain);
  1297. cq_prod = qed_chain_get_prod_idx(&p_rx->rcq_chain);
  1298. rx_prod.bd_prod = cpu_to_le16(bd_prod);
  1299. rx_prod.cqe_prod = cpu_to_le16(cq_prod);
  1300. DIRECT_REG_WR(p_rx->set_prod_addr, *((u32 *)&rx_prod));
  1301. }
  1302. int qed_ll2_post_rx_buffer(void *cxt,
  1303. u8 connection_handle,
  1304. dma_addr_t addr,
  1305. u16 buf_len, void *cookie, u8 notify_fw)
  1306. {
  1307. struct qed_hwfn *p_hwfn = cxt;
  1308. struct core_rx_bd_with_buff_len *p_curb = NULL;
  1309. struct qed_ll2_rx_packet *p_curp = NULL;
  1310. struct qed_ll2_info *p_ll2_conn;
  1311. struct qed_ll2_rx_queue *p_rx;
  1312. unsigned long flags;
  1313. void *p_data;
  1314. int rc = 0;
  1315. p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
  1316. if (!p_ll2_conn)
  1317. return -EINVAL;
  1318. p_rx = &p_ll2_conn->rx_queue;
  1319. spin_lock_irqsave(&p_rx->lock, flags);
  1320. if (!list_empty(&p_rx->free_descq))
  1321. p_curp = list_first_entry(&p_rx->free_descq,
  1322. struct qed_ll2_rx_packet, list_entry);
  1323. if (p_curp) {
  1324. if (qed_chain_get_elem_left(&p_rx->rxq_chain) &&
  1325. qed_chain_get_elem_left(&p_rx->rcq_chain)) {
  1326. p_data = qed_chain_produce(&p_rx->rxq_chain);
  1327. p_curb = (struct core_rx_bd_with_buff_len *)p_data;
  1328. qed_chain_produce(&p_rx->rcq_chain);
  1329. }
  1330. }
  1331. /* If we're lacking entires, let's try to flush buffers to FW */
  1332. if (!p_curp || !p_curb) {
  1333. rc = -EBUSY;
  1334. p_curp = NULL;
  1335. goto out_notify;
  1336. }
  1337. /* We have an Rx packet we can fill */
  1338. DMA_REGPAIR_LE(p_curb->addr, addr);
  1339. p_curb->buff_length = cpu_to_le16(buf_len);
  1340. p_curp->rx_buf_addr = addr;
  1341. p_curp->cookie = cookie;
  1342. p_curp->rxq_bd = p_curb;
  1343. p_curp->buf_length = buf_len;
  1344. list_del(&p_curp->list_entry);
  1345. /* Check if we only want to enqueue this packet without informing FW */
  1346. if (!notify_fw) {
  1347. list_add_tail(&p_curp->list_entry, &p_rx->posting_descq);
  1348. goto out;
  1349. }
  1350. out_notify:
  1351. qed_ll2_post_rx_buffer_notify_fw(p_hwfn, p_rx, p_curp);
  1352. out:
  1353. spin_unlock_irqrestore(&p_rx->lock, flags);
  1354. return rc;
  1355. }
  1356. static void qed_ll2_prepare_tx_packet_set(struct qed_hwfn *p_hwfn,
  1357. struct qed_ll2_tx_queue *p_tx,
  1358. struct qed_ll2_tx_packet *p_curp,
  1359. struct qed_ll2_tx_pkt_info *pkt,
  1360. u8 notify_fw)
  1361. {
  1362. list_del(&p_curp->list_entry);
  1363. p_curp->cookie = pkt->cookie;
  1364. p_curp->bd_used = pkt->num_of_bds;
  1365. p_curp->notify_fw = notify_fw;
  1366. p_tx->cur_send_packet = p_curp;
  1367. p_tx->cur_send_frag_num = 0;
  1368. p_curp->bds_set[p_tx->cur_send_frag_num].tx_frag = pkt->first_frag;
  1369. p_curp->bds_set[p_tx->cur_send_frag_num].frag_len = pkt->first_frag_len;
  1370. p_tx->cur_send_frag_num++;
  1371. }
  1372. static void
  1373. qed_ll2_prepare_tx_packet_set_bd(struct qed_hwfn *p_hwfn,
  1374. struct qed_ll2_info *p_ll2,
  1375. struct qed_ll2_tx_packet *p_curp,
  1376. struct qed_ll2_tx_pkt_info *pkt)
  1377. {
  1378. struct qed_chain *p_tx_chain = &p_ll2->tx_queue.txq_chain;
  1379. u16 prod_idx = qed_chain_get_prod_idx(p_tx_chain);
  1380. struct core_tx_bd *start_bd = NULL;
  1381. enum core_roce_flavor_type roce_flavor;
  1382. enum core_tx_dest tx_dest;
  1383. u16 bd_data = 0, frag_idx;
  1384. roce_flavor = (pkt->qed_roce_flavor == QED_LL2_ROCE) ? CORE_ROCE
  1385. : CORE_RROCE;
  1386. switch (pkt->tx_dest) {
  1387. case QED_LL2_TX_DEST_NW:
  1388. tx_dest = CORE_TX_DEST_NW;
  1389. break;
  1390. case QED_LL2_TX_DEST_LB:
  1391. tx_dest = CORE_TX_DEST_LB;
  1392. break;
  1393. case QED_LL2_TX_DEST_DROP:
  1394. tx_dest = CORE_TX_DEST_DROP;
  1395. break;
  1396. default:
  1397. tx_dest = CORE_TX_DEST_LB;
  1398. break;
  1399. }
  1400. start_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
  1401. if (QED_IS_IWARP_PERSONALITY(p_hwfn) &&
  1402. p_ll2->input.conn_type == QED_LL2_TYPE_OOO)
  1403. start_bd->nw_vlan_or_lb_echo =
  1404. cpu_to_le16(IWARP_LL2_IN_ORDER_TX_QUEUE);
  1405. else
  1406. start_bd->nw_vlan_or_lb_echo = cpu_to_le16(pkt->vlan);
  1407. SET_FIELD(start_bd->bitfield1, CORE_TX_BD_L4_HDR_OFFSET_W,
  1408. cpu_to_le16(pkt->l4_hdr_offset_w));
  1409. SET_FIELD(start_bd->bitfield1, CORE_TX_BD_TX_DST, tx_dest);
  1410. bd_data |= pkt->bd_flags;
  1411. SET_FIELD(bd_data, CORE_TX_BD_DATA_START_BD, 0x1);
  1412. SET_FIELD(bd_data, CORE_TX_BD_DATA_NBDS, pkt->num_of_bds);
  1413. SET_FIELD(bd_data, CORE_TX_BD_DATA_ROCE_FLAV, roce_flavor);
  1414. SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_CSUM, !!(pkt->enable_ip_cksum));
  1415. SET_FIELD(bd_data, CORE_TX_BD_DATA_L4_CSUM, !!(pkt->enable_l4_cksum));
  1416. SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_LEN, !!(pkt->calc_ip_len));
  1417. start_bd->bd_data.as_bitfield = cpu_to_le16(bd_data);
  1418. DMA_REGPAIR_LE(start_bd->addr, pkt->first_frag);
  1419. start_bd->nbytes = cpu_to_le16(pkt->first_frag_len);
  1420. DP_VERBOSE(p_hwfn,
  1421. (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
  1422. "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Tx Producer at [0x%04x] - set with a %04x bytes %02x BDs buffer at %08x:%08x\n",
  1423. p_ll2->queue_id,
  1424. p_ll2->cid,
  1425. p_ll2->input.conn_type,
  1426. prod_idx,
  1427. pkt->first_frag_len,
  1428. pkt->num_of_bds,
  1429. le32_to_cpu(start_bd->addr.hi),
  1430. le32_to_cpu(start_bd->addr.lo));
  1431. if (p_ll2->tx_queue.cur_send_frag_num == pkt->num_of_bds)
  1432. return;
  1433. /* Need to provide the packet with additional BDs for frags */
  1434. for (frag_idx = p_ll2->tx_queue.cur_send_frag_num;
  1435. frag_idx < pkt->num_of_bds; frag_idx++) {
  1436. struct core_tx_bd **p_bd = &p_curp->bds_set[frag_idx].txq_bd;
  1437. *p_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
  1438. (*p_bd)->bd_data.as_bitfield = 0;
  1439. (*p_bd)->bitfield1 = 0;
  1440. p_curp->bds_set[frag_idx].tx_frag = 0;
  1441. p_curp->bds_set[frag_idx].frag_len = 0;
  1442. }
  1443. }
  1444. /* This should be called while the Txq spinlock is being held */
  1445. static void qed_ll2_tx_packet_notify(struct qed_hwfn *p_hwfn,
  1446. struct qed_ll2_info *p_ll2_conn)
  1447. {
  1448. bool b_notify = p_ll2_conn->tx_queue.cur_send_packet->notify_fw;
  1449. struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
  1450. struct qed_ll2_tx_packet *p_pkt = NULL;
  1451. struct core_db_data db_msg = { 0, 0, 0 };
  1452. u16 bd_prod;
  1453. /* If there are missing BDs, don't do anything now */
  1454. if (p_ll2_conn->tx_queue.cur_send_frag_num !=
  1455. p_ll2_conn->tx_queue.cur_send_packet->bd_used)
  1456. return;
  1457. /* Push the current packet to the list and clean after it */
  1458. list_add_tail(&p_ll2_conn->tx_queue.cur_send_packet->list_entry,
  1459. &p_ll2_conn->tx_queue.sending_descq);
  1460. p_ll2_conn->tx_queue.cur_send_packet = NULL;
  1461. p_ll2_conn->tx_queue.cur_send_frag_num = 0;
  1462. /* Notify FW of packet only if requested to */
  1463. if (!b_notify)
  1464. return;
  1465. bd_prod = qed_chain_get_prod_idx(&p_ll2_conn->tx_queue.txq_chain);
  1466. while (!list_empty(&p_tx->sending_descq)) {
  1467. p_pkt = list_first_entry(&p_tx->sending_descq,
  1468. struct qed_ll2_tx_packet, list_entry);
  1469. if (!p_pkt)
  1470. break;
  1471. list_move_tail(&p_pkt->list_entry, &p_tx->active_descq);
  1472. }
  1473. SET_FIELD(db_msg.params, CORE_DB_DATA_DEST, DB_DEST_XCM);
  1474. SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
  1475. SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_VAL_SEL,
  1476. DQ_XCM_CORE_TX_BD_PROD_CMD);
  1477. db_msg.agg_flags = DQ_XCM_CORE_DQ_CF_CMD;
  1478. db_msg.spq_prod = cpu_to_le16(bd_prod);
  1479. /* Make sure the BDs data is updated before ringing the doorbell */
  1480. wmb();
  1481. DIRECT_REG_WR(p_tx->doorbell_addr, *((u32 *)&db_msg));
  1482. DP_VERBOSE(p_hwfn,
  1483. (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
  1484. "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Doorbelled [producer 0x%04x]\n",
  1485. p_ll2_conn->queue_id,
  1486. p_ll2_conn->cid,
  1487. p_ll2_conn->input.conn_type, db_msg.spq_prod);
  1488. }
  1489. int qed_ll2_prepare_tx_packet(void *cxt,
  1490. u8 connection_handle,
  1491. struct qed_ll2_tx_pkt_info *pkt,
  1492. bool notify_fw)
  1493. {
  1494. struct qed_hwfn *p_hwfn = cxt;
  1495. struct qed_ll2_tx_packet *p_curp = NULL;
  1496. struct qed_ll2_info *p_ll2_conn = NULL;
  1497. struct qed_ll2_tx_queue *p_tx;
  1498. struct qed_chain *p_tx_chain;
  1499. unsigned long flags;
  1500. int rc = 0;
  1501. p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
  1502. if (!p_ll2_conn)
  1503. return -EINVAL;
  1504. p_tx = &p_ll2_conn->tx_queue;
  1505. p_tx_chain = &p_tx->txq_chain;
  1506. if (pkt->num_of_bds > p_ll2_conn->input.tx_max_bds_per_packet)
  1507. return -EIO;
  1508. spin_lock_irqsave(&p_tx->lock, flags);
  1509. if (p_tx->cur_send_packet) {
  1510. rc = -EEXIST;
  1511. goto out;
  1512. }
  1513. /* Get entry, but only if we have tx elements for it */
  1514. if (!list_empty(&p_tx->free_descq))
  1515. p_curp = list_first_entry(&p_tx->free_descq,
  1516. struct qed_ll2_tx_packet, list_entry);
  1517. if (p_curp && qed_chain_get_elem_left(p_tx_chain) < pkt->num_of_bds)
  1518. p_curp = NULL;
  1519. if (!p_curp) {
  1520. rc = -EBUSY;
  1521. goto out;
  1522. }
  1523. /* Prepare packet and BD, and perhaps send a doorbell to FW */
  1524. qed_ll2_prepare_tx_packet_set(p_hwfn, p_tx, p_curp, pkt, notify_fw);
  1525. qed_ll2_prepare_tx_packet_set_bd(p_hwfn, p_ll2_conn, p_curp, pkt);
  1526. qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
  1527. out:
  1528. spin_unlock_irqrestore(&p_tx->lock, flags);
  1529. return rc;
  1530. }
  1531. int qed_ll2_set_fragment_of_tx_packet(void *cxt,
  1532. u8 connection_handle,
  1533. dma_addr_t addr, u16 nbytes)
  1534. {
  1535. struct qed_ll2_tx_packet *p_cur_send_packet = NULL;
  1536. struct qed_hwfn *p_hwfn = cxt;
  1537. struct qed_ll2_info *p_ll2_conn = NULL;
  1538. u16 cur_send_frag_num = 0;
  1539. struct core_tx_bd *p_bd;
  1540. unsigned long flags;
  1541. p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
  1542. if (!p_ll2_conn)
  1543. return -EINVAL;
  1544. if (!p_ll2_conn->tx_queue.cur_send_packet)
  1545. return -EINVAL;
  1546. p_cur_send_packet = p_ll2_conn->tx_queue.cur_send_packet;
  1547. cur_send_frag_num = p_ll2_conn->tx_queue.cur_send_frag_num;
  1548. if (cur_send_frag_num >= p_cur_send_packet->bd_used)
  1549. return -EINVAL;
  1550. /* Fill the BD information, and possibly notify FW */
  1551. p_bd = p_cur_send_packet->bds_set[cur_send_frag_num].txq_bd;
  1552. DMA_REGPAIR_LE(p_bd->addr, addr);
  1553. p_bd->nbytes = cpu_to_le16(nbytes);
  1554. p_cur_send_packet->bds_set[cur_send_frag_num].tx_frag = addr;
  1555. p_cur_send_packet->bds_set[cur_send_frag_num].frag_len = nbytes;
  1556. p_ll2_conn->tx_queue.cur_send_frag_num++;
  1557. spin_lock_irqsave(&p_ll2_conn->tx_queue.lock, flags);
  1558. qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
  1559. spin_unlock_irqrestore(&p_ll2_conn->tx_queue.lock, flags);
  1560. return 0;
  1561. }
  1562. int qed_ll2_terminate_connection(void *cxt, u8 connection_handle)
  1563. {
  1564. struct qed_hwfn *p_hwfn = cxt;
  1565. struct qed_ll2_info *p_ll2_conn = NULL;
  1566. int rc = -EINVAL;
  1567. struct qed_ptt *p_ptt;
  1568. p_ptt = qed_ptt_acquire(p_hwfn);
  1569. if (!p_ptt)
  1570. return -EAGAIN;
  1571. p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
  1572. if (!p_ll2_conn) {
  1573. rc = -EINVAL;
  1574. goto out;
  1575. }
  1576. /* Stop Tx & Rx of connection, if needed */
  1577. if (QED_LL2_TX_REGISTERED(p_ll2_conn)) {
  1578. rc = qed_sp_ll2_tx_queue_stop(p_hwfn, p_ll2_conn);
  1579. if (rc)
  1580. goto out;
  1581. qed_ll2_txq_flush(p_hwfn, connection_handle);
  1582. }
  1583. if (QED_LL2_RX_REGISTERED(p_ll2_conn)) {
  1584. rc = qed_sp_ll2_rx_queue_stop(p_hwfn, p_ll2_conn);
  1585. if (rc)
  1586. goto out;
  1587. qed_ll2_rxq_flush(p_hwfn, connection_handle);
  1588. }
  1589. if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO)
  1590. qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
  1591. if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
  1592. qed_llh_remove_protocol_filter(p_hwfn, p_ptt,
  1593. 0x8906, 0,
  1594. QED_LLH_FILTER_ETHERTYPE);
  1595. qed_llh_remove_protocol_filter(p_hwfn, p_ptt,
  1596. 0x8914, 0,
  1597. QED_LLH_FILTER_ETHERTYPE);
  1598. }
  1599. out:
  1600. qed_ptt_release(p_hwfn, p_ptt);
  1601. return rc;
  1602. }
  1603. static void qed_ll2_release_connection_ooo(struct qed_hwfn *p_hwfn,
  1604. struct qed_ll2_info *p_ll2_conn)
  1605. {
  1606. struct qed_ooo_buffer *p_buffer;
  1607. if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO)
  1608. return;
  1609. qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
  1610. while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
  1611. p_hwfn->p_ooo_info))) {
  1612. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  1613. p_buffer->rx_buffer_size,
  1614. p_buffer->rx_buffer_virt_addr,
  1615. p_buffer->rx_buffer_phys_addr);
  1616. kfree(p_buffer);
  1617. }
  1618. }
  1619. void qed_ll2_release_connection(void *cxt, u8 connection_handle)
  1620. {
  1621. struct qed_hwfn *p_hwfn = cxt;
  1622. struct qed_ll2_info *p_ll2_conn = NULL;
  1623. p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
  1624. if (!p_ll2_conn)
  1625. return;
  1626. if (QED_LL2_RX_REGISTERED(p_ll2_conn)) {
  1627. p_ll2_conn->rx_queue.b_cb_registred = false;
  1628. qed_int_unregister_cb(p_hwfn, p_ll2_conn->rx_queue.rx_sb_index);
  1629. }
  1630. if (QED_LL2_TX_REGISTERED(p_ll2_conn)) {
  1631. p_ll2_conn->tx_queue.b_cb_registred = false;
  1632. qed_int_unregister_cb(p_hwfn, p_ll2_conn->tx_queue.tx_sb_index);
  1633. }
  1634. kfree(p_ll2_conn->tx_queue.descq_mem);
  1635. qed_chain_free(p_hwfn->cdev, &p_ll2_conn->tx_queue.txq_chain);
  1636. kfree(p_ll2_conn->rx_queue.descq_array);
  1637. qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rxq_chain);
  1638. qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rcq_chain);
  1639. qed_cxt_release_cid(p_hwfn, p_ll2_conn->cid);
  1640. qed_ll2_release_connection_ooo(p_hwfn, p_ll2_conn);
  1641. mutex_lock(&p_ll2_conn->mutex);
  1642. p_ll2_conn->b_active = false;
  1643. mutex_unlock(&p_ll2_conn->mutex);
  1644. }
  1645. int qed_ll2_alloc(struct qed_hwfn *p_hwfn)
  1646. {
  1647. struct qed_ll2_info *p_ll2_connections;
  1648. u8 i;
  1649. /* Allocate LL2's set struct */
  1650. p_ll2_connections = kcalloc(QED_MAX_NUM_OF_LL2_CONNECTIONS,
  1651. sizeof(struct qed_ll2_info), GFP_KERNEL);
  1652. if (!p_ll2_connections) {
  1653. DP_NOTICE(p_hwfn, "Failed to allocate `struct qed_ll2'\n");
  1654. return -ENOMEM;
  1655. }
  1656. for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
  1657. p_ll2_connections[i].my_id = i;
  1658. p_hwfn->p_ll2_info = p_ll2_connections;
  1659. return 0;
  1660. }
  1661. void qed_ll2_setup(struct qed_hwfn *p_hwfn)
  1662. {
  1663. int i;
  1664. for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
  1665. mutex_init(&p_hwfn->p_ll2_info[i].mutex);
  1666. }
  1667. void qed_ll2_free(struct qed_hwfn *p_hwfn)
  1668. {
  1669. if (!p_hwfn->p_ll2_info)
  1670. return;
  1671. kfree(p_hwfn->p_ll2_info);
  1672. p_hwfn->p_ll2_info = NULL;
  1673. }
  1674. static void _qed_ll2_get_port_stats(struct qed_hwfn *p_hwfn,
  1675. struct qed_ptt *p_ptt,
  1676. struct qed_ll2_stats *p_stats)
  1677. {
  1678. struct core_ll2_port_stats port_stats;
  1679. memset(&port_stats, 0, sizeof(port_stats));
  1680. qed_memcpy_from(p_hwfn, p_ptt, &port_stats,
  1681. BAR0_MAP_REG_TSDM_RAM +
  1682. TSTORM_LL2_PORT_STAT_OFFSET(MFW_PORT(p_hwfn)),
  1683. sizeof(port_stats));
  1684. p_stats->gsi_invalid_hdr = HILO_64_REGPAIR(port_stats.gsi_invalid_hdr);
  1685. p_stats->gsi_invalid_pkt_length =
  1686. HILO_64_REGPAIR(port_stats.gsi_invalid_pkt_length);
  1687. p_stats->gsi_unsupported_pkt_typ =
  1688. HILO_64_REGPAIR(port_stats.gsi_unsupported_pkt_typ);
  1689. p_stats->gsi_crcchksm_error =
  1690. HILO_64_REGPAIR(port_stats.gsi_crcchksm_error);
  1691. }
  1692. static void _qed_ll2_get_tstats(struct qed_hwfn *p_hwfn,
  1693. struct qed_ptt *p_ptt,
  1694. struct qed_ll2_info *p_ll2_conn,
  1695. struct qed_ll2_stats *p_stats)
  1696. {
  1697. struct core_ll2_tstorm_per_queue_stat tstats;
  1698. u8 qid = p_ll2_conn->queue_id;
  1699. u32 tstats_addr;
  1700. memset(&tstats, 0, sizeof(tstats));
  1701. tstats_addr = BAR0_MAP_REG_TSDM_RAM +
  1702. CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET(qid);
  1703. qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, sizeof(tstats));
  1704. p_stats->packet_too_big_discard =
  1705. HILO_64_REGPAIR(tstats.packet_too_big_discard);
  1706. p_stats->no_buff_discard = HILO_64_REGPAIR(tstats.no_buff_discard);
  1707. }
  1708. static void _qed_ll2_get_ustats(struct qed_hwfn *p_hwfn,
  1709. struct qed_ptt *p_ptt,
  1710. struct qed_ll2_info *p_ll2_conn,
  1711. struct qed_ll2_stats *p_stats)
  1712. {
  1713. struct core_ll2_ustorm_per_queue_stat ustats;
  1714. u8 qid = p_ll2_conn->queue_id;
  1715. u32 ustats_addr;
  1716. memset(&ustats, 0, sizeof(ustats));
  1717. ustats_addr = BAR0_MAP_REG_USDM_RAM +
  1718. CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET(qid);
  1719. qed_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, sizeof(ustats));
  1720. p_stats->rcv_ucast_bytes = HILO_64_REGPAIR(ustats.rcv_ucast_bytes);
  1721. p_stats->rcv_mcast_bytes = HILO_64_REGPAIR(ustats.rcv_mcast_bytes);
  1722. p_stats->rcv_bcast_bytes = HILO_64_REGPAIR(ustats.rcv_bcast_bytes);
  1723. p_stats->rcv_ucast_pkts = HILO_64_REGPAIR(ustats.rcv_ucast_pkts);
  1724. p_stats->rcv_mcast_pkts = HILO_64_REGPAIR(ustats.rcv_mcast_pkts);
  1725. p_stats->rcv_bcast_pkts = HILO_64_REGPAIR(ustats.rcv_bcast_pkts);
  1726. }
  1727. static void _qed_ll2_get_pstats(struct qed_hwfn *p_hwfn,
  1728. struct qed_ptt *p_ptt,
  1729. struct qed_ll2_info *p_ll2_conn,
  1730. struct qed_ll2_stats *p_stats)
  1731. {
  1732. struct core_ll2_pstorm_per_queue_stat pstats;
  1733. u8 stats_id = p_ll2_conn->tx_stats_id;
  1734. u32 pstats_addr;
  1735. memset(&pstats, 0, sizeof(pstats));
  1736. pstats_addr = BAR0_MAP_REG_PSDM_RAM +
  1737. CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET(stats_id);
  1738. qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, sizeof(pstats));
  1739. p_stats->sent_ucast_bytes = HILO_64_REGPAIR(pstats.sent_ucast_bytes);
  1740. p_stats->sent_mcast_bytes = HILO_64_REGPAIR(pstats.sent_mcast_bytes);
  1741. p_stats->sent_bcast_bytes = HILO_64_REGPAIR(pstats.sent_bcast_bytes);
  1742. p_stats->sent_ucast_pkts = HILO_64_REGPAIR(pstats.sent_ucast_pkts);
  1743. p_stats->sent_mcast_pkts = HILO_64_REGPAIR(pstats.sent_mcast_pkts);
  1744. p_stats->sent_bcast_pkts = HILO_64_REGPAIR(pstats.sent_bcast_pkts);
  1745. }
  1746. int qed_ll2_get_stats(void *cxt,
  1747. u8 connection_handle, struct qed_ll2_stats *p_stats)
  1748. {
  1749. struct qed_hwfn *p_hwfn = cxt;
  1750. struct qed_ll2_info *p_ll2_conn = NULL;
  1751. struct qed_ptt *p_ptt;
  1752. memset(p_stats, 0, sizeof(*p_stats));
  1753. if ((connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) ||
  1754. !p_hwfn->p_ll2_info)
  1755. return -EINVAL;
  1756. p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
  1757. p_ptt = qed_ptt_acquire(p_hwfn);
  1758. if (!p_ptt) {
  1759. DP_ERR(p_hwfn, "Failed to acquire ptt\n");
  1760. return -EINVAL;
  1761. }
  1762. if (p_ll2_conn->input.gsi_enable)
  1763. _qed_ll2_get_port_stats(p_hwfn, p_ptt, p_stats);
  1764. _qed_ll2_get_tstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
  1765. _qed_ll2_get_ustats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
  1766. if (p_ll2_conn->tx_stats_en)
  1767. _qed_ll2_get_pstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
  1768. qed_ptt_release(p_hwfn, p_ptt);
  1769. return 0;
  1770. }
  1771. static void qed_ll2b_release_rx_packet(void *cxt,
  1772. u8 connection_handle,
  1773. void *cookie,
  1774. dma_addr_t rx_buf_addr,
  1775. bool b_last_packet)
  1776. {
  1777. struct qed_hwfn *p_hwfn = cxt;
  1778. qed_ll2_dealloc_buffer(p_hwfn->cdev, cookie);
  1779. }
  1780. static void qed_ll2_register_cb_ops(struct qed_dev *cdev,
  1781. const struct qed_ll2_cb_ops *ops,
  1782. void *cookie)
  1783. {
  1784. cdev->ll2->cbs = ops;
  1785. cdev->ll2->cb_cookie = cookie;
  1786. }
  1787. struct qed_ll2_cbs ll2_cbs = {
  1788. .rx_comp_cb = &qed_ll2b_complete_rx_packet,
  1789. .rx_release_cb = &qed_ll2b_release_rx_packet,
  1790. .tx_comp_cb = &qed_ll2b_complete_tx_packet,
  1791. .tx_release_cb = &qed_ll2b_complete_tx_packet,
  1792. };
  1793. static void qed_ll2_set_conn_data(struct qed_dev *cdev,
  1794. struct qed_ll2_acquire_data *data,
  1795. struct qed_ll2_params *params,
  1796. enum qed_ll2_conn_type conn_type,
  1797. u8 *handle, bool lb)
  1798. {
  1799. memset(data, 0, sizeof(*data));
  1800. data->input.conn_type = conn_type;
  1801. data->input.mtu = params->mtu;
  1802. data->input.rx_num_desc = QED_LL2_RX_SIZE;
  1803. data->input.rx_drop_ttl0_flg = params->drop_ttl0_packets;
  1804. data->input.rx_vlan_removal_en = params->rx_vlan_stripping;
  1805. data->input.tx_num_desc = QED_LL2_TX_SIZE;
  1806. data->p_connection_handle = handle;
  1807. data->cbs = &ll2_cbs;
  1808. ll2_cbs.cookie = QED_LEADING_HWFN(cdev);
  1809. if (lb) {
  1810. data->input.tx_tc = PKT_LB_TC;
  1811. data->input.tx_dest = QED_LL2_TX_DEST_LB;
  1812. } else {
  1813. data->input.tx_tc = 0;
  1814. data->input.tx_dest = QED_LL2_TX_DEST_NW;
  1815. }
  1816. }
  1817. static int qed_ll2_start_ooo(struct qed_dev *cdev,
  1818. struct qed_ll2_params *params)
  1819. {
  1820. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1821. u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
  1822. struct qed_ll2_acquire_data data;
  1823. int rc;
  1824. qed_ll2_set_conn_data(cdev, &data, params,
  1825. QED_LL2_TYPE_OOO, handle, true);
  1826. rc = qed_ll2_acquire_connection(hwfn, &data);
  1827. if (rc) {
  1828. DP_INFO(cdev, "Failed to acquire LL2 OOO connection\n");
  1829. goto out;
  1830. }
  1831. rc = qed_ll2_establish_connection(hwfn, *handle);
  1832. if (rc) {
  1833. DP_INFO(cdev, "Failed to establist LL2 OOO connection\n");
  1834. goto fail;
  1835. }
  1836. return 0;
  1837. fail:
  1838. qed_ll2_release_connection(hwfn, *handle);
  1839. out:
  1840. *handle = QED_LL2_UNUSED_HANDLE;
  1841. return rc;
  1842. }
  1843. static int qed_ll2_start(struct qed_dev *cdev, struct qed_ll2_params *params)
  1844. {
  1845. struct qed_ll2_buffer *buffer, *tmp_buffer;
  1846. enum qed_ll2_conn_type conn_type;
  1847. struct qed_ll2_acquire_data data;
  1848. struct qed_ptt *p_ptt;
  1849. int rc, i;
  1850. /* Initialize LL2 locks & lists */
  1851. INIT_LIST_HEAD(&cdev->ll2->list);
  1852. spin_lock_init(&cdev->ll2->lock);
  1853. cdev->ll2->rx_size = NET_SKB_PAD + ETH_HLEN +
  1854. L1_CACHE_BYTES + params->mtu;
  1855. /*Allocate memory for LL2 */
  1856. DP_INFO(cdev, "Allocating LL2 buffers of size %08x bytes\n",
  1857. cdev->ll2->rx_size);
  1858. for (i = 0; i < QED_LL2_RX_SIZE; i++) {
  1859. buffer = kzalloc(sizeof(*buffer), GFP_KERNEL);
  1860. if (!buffer) {
  1861. DP_INFO(cdev, "Failed to allocate LL2 buffers\n");
  1862. goto fail;
  1863. }
  1864. rc = qed_ll2_alloc_buffer(cdev, (u8 **)&buffer->data,
  1865. &buffer->phys_addr);
  1866. if (rc) {
  1867. kfree(buffer);
  1868. goto fail;
  1869. }
  1870. list_add_tail(&buffer->list, &cdev->ll2->list);
  1871. }
  1872. switch (QED_LEADING_HWFN(cdev)->hw_info.personality) {
  1873. case QED_PCI_FCOE:
  1874. conn_type = QED_LL2_TYPE_FCOE;
  1875. break;
  1876. case QED_PCI_ISCSI:
  1877. conn_type = QED_LL2_TYPE_ISCSI;
  1878. break;
  1879. case QED_PCI_ETH_ROCE:
  1880. conn_type = QED_LL2_TYPE_ROCE;
  1881. break;
  1882. default:
  1883. conn_type = QED_LL2_TYPE_TEST;
  1884. }
  1885. qed_ll2_set_conn_data(cdev, &data, params, conn_type,
  1886. &cdev->ll2->handle, false);
  1887. rc = qed_ll2_acquire_connection(QED_LEADING_HWFN(cdev), &data);
  1888. if (rc) {
  1889. DP_INFO(cdev, "Failed to acquire LL2 connection\n");
  1890. goto fail;
  1891. }
  1892. rc = qed_ll2_establish_connection(QED_LEADING_HWFN(cdev),
  1893. cdev->ll2->handle);
  1894. if (rc) {
  1895. DP_INFO(cdev, "Failed to establish LL2 connection\n");
  1896. goto release_fail;
  1897. }
  1898. /* Post all Rx buffers to FW */
  1899. spin_lock_bh(&cdev->ll2->lock);
  1900. list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) {
  1901. rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev),
  1902. cdev->ll2->handle,
  1903. buffer->phys_addr, 0, buffer, 1);
  1904. if (rc) {
  1905. DP_INFO(cdev,
  1906. "Failed to post an Rx buffer; Deleting it\n");
  1907. dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
  1908. cdev->ll2->rx_size, DMA_FROM_DEVICE);
  1909. kfree(buffer->data);
  1910. list_del(&buffer->list);
  1911. kfree(buffer);
  1912. } else {
  1913. cdev->ll2->rx_cnt++;
  1914. }
  1915. }
  1916. spin_unlock_bh(&cdev->ll2->lock);
  1917. if (!cdev->ll2->rx_cnt) {
  1918. DP_INFO(cdev, "Failed passing even a single Rx buffer\n");
  1919. goto release_terminate;
  1920. }
  1921. if (!is_valid_ether_addr(params->ll2_mac_address)) {
  1922. DP_INFO(cdev, "Invalid Ethernet address\n");
  1923. goto release_terminate;
  1924. }
  1925. if (cdev->hwfns[0].hw_info.personality == QED_PCI_ISCSI &&
  1926. cdev->hwfns[0].pf_params.iscsi_pf_params.ooo_enable) {
  1927. DP_VERBOSE(cdev, QED_MSG_STORAGE, "Starting OOO LL2 queue\n");
  1928. rc = qed_ll2_start_ooo(cdev, params);
  1929. if (rc) {
  1930. DP_INFO(cdev,
  1931. "Failed to initialize the OOO LL2 queue\n");
  1932. goto release_terminate;
  1933. }
  1934. }
  1935. p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev));
  1936. if (!p_ptt) {
  1937. DP_INFO(cdev, "Failed to acquire PTT\n");
  1938. goto release_terminate;
  1939. }
  1940. rc = qed_llh_add_mac_filter(QED_LEADING_HWFN(cdev), p_ptt,
  1941. params->ll2_mac_address);
  1942. qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt);
  1943. if (rc) {
  1944. DP_ERR(cdev, "Failed to allocate LLH filter\n");
  1945. goto release_terminate_all;
  1946. }
  1947. ether_addr_copy(cdev->ll2_mac_address, params->ll2_mac_address);
  1948. return 0;
  1949. release_terminate_all:
  1950. release_terminate:
  1951. qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle);
  1952. release_fail:
  1953. qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle);
  1954. fail:
  1955. qed_ll2_kill_buffers(cdev);
  1956. cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
  1957. return -EINVAL;
  1958. }
  1959. static int qed_ll2_stop(struct qed_dev *cdev)
  1960. {
  1961. struct qed_ptt *p_ptt;
  1962. int rc;
  1963. if (cdev->ll2->handle == QED_LL2_UNUSED_HANDLE)
  1964. return 0;
  1965. p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev));
  1966. if (!p_ptt) {
  1967. DP_INFO(cdev, "Failed to acquire PTT\n");
  1968. goto fail;
  1969. }
  1970. qed_llh_remove_mac_filter(QED_LEADING_HWFN(cdev), p_ptt,
  1971. cdev->ll2_mac_address);
  1972. qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt);
  1973. eth_zero_addr(cdev->ll2_mac_address);
  1974. if (cdev->hwfns[0].hw_info.personality == QED_PCI_ISCSI &&
  1975. cdev->hwfns[0].pf_params.iscsi_pf_params.ooo_enable)
  1976. qed_ll2_stop_ooo(cdev);
  1977. rc = qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev),
  1978. cdev->ll2->handle);
  1979. if (rc)
  1980. DP_INFO(cdev, "Failed to terminate LL2 connection\n");
  1981. qed_ll2_kill_buffers(cdev);
  1982. qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle);
  1983. cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
  1984. return rc;
  1985. fail:
  1986. return -EINVAL;
  1987. }
  1988. static int qed_ll2_start_xmit(struct qed_dev *cdev, struct sk_buff *skb)
  1989. {
  1990. struct qed_ll2_tx_pkt_info pkt;
  1991. const skb_frag_t *frag;
  1992. int rc = -EINVAL, i;
  1993. dma_addr_t mapping;
  1994. u16 vlan = 0;
  1995. u8 flags = 0;
  1996. if (unlikely(skb->ip_summed != CHECKSUM_NONE)) {
  1997. DP_INFO(cdev, "Cannot transmit a checksumed packet\n");
  1998. return -EINVAL;
  1999. }
  2000. if (1 + skb_shinfo(skb)->nr_frags > CORE_LL2_TX_MAX_BDS_PER_PACKET) {
  2001. DP_ERR(cdev, "Cannot transmit a packet with %d fragments\n",
  2002. 1 + skb_shinfo(skb)->nr_frags);
  2003. return -EINVAL;
  2004. }
  2005. mapping = dma_map_single(&cdev->pdev->dev, skb->data,
  2006. skb->len, DMA_TO_DEVICE);
  2007. if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) {
  2008. DP_NOTICE(cdev, "SKB mapping failed\n");
  2009. return -EINVAL;
  2010. }
  2011. /* Request HW to calculate IP csum */
  2012. if (!((vlan_get_protocol(skb) == htons(ETH_P_IPV6)) &&
  2013. ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
  2014. flags |= BIT(CORE_TX_BD_DATA_IP_CSUM_SHIFT);
  2015. if (skb_vlan_tag_present(skb)) {
  2016. vlan = skb_vlan_tag_get(skb);
  2017. flags |= BIT(CORE_TX_BD_DATA_VLAN_INSERTION_SHIFT);
  2018. }
  2019. memset(&pkt, 0, sizeof(pkt));
  2020. pkt.num_of_bds = 1 + skb_shinfo(skb)->nr_frags;
  2021. pkt.vlan = vlan;
  2022. pkt.bd_flags = flags;
  2023. pkt.tx_dest = QED_LL2_TX_DEST_NW;
  2024. pkt.first_frag = mapping;
  2025. pkt.first_frag_len = skb->len;
  2026. pkt.cookie = skb;
  2027. rc = qed_ll2_prepare_tx_packet(&cdev->hwfns[0], cdev->ll2->handle,
  2028. &pkt, 1);
  2029. if (rc)
  2030. goto err;
  2031. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
  2032. frag = &skb_shinfo(skb)->frags[i];
  2033. mapping = skb_frag_dma_map(&cdev->pdev->dev, frag, 0,
  2034. skb_frag_size(frag), DMA_TO_DEVICE);
  2035. if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) {
  2036. DP_NOTICE(cdev,
  2037. "Unable to map frag - dropping packet\n");
  2038. goto err;
  2039. }
  2040. rc = qed_ll2_set_fragment_of_tx_packet(QED_LEADING_HWFN(cdev),
  2041. cdev->ll2->handle,
  2042. mapping,
  2043. skb_frag_size(frag));
  2044. /* if failed not much to do here, partial packet has been posted
  2045. * we can't free memory, will need to wait for completion.
  2046. */
  2047. if (rc)
  2048. goto err2;
  2049. }
  2050. return 0;
  2051. err:
  2052. dma_unmap_single(&cdev->pdev->dev, mapping, skb->len, DMA_TO_DEVICE);
  2053. err2:
  2054. return rc;
  2055. }
  2056. static int qed_ll2_stats(struct qed_dev *cdev, struct qed_ll2_stats *stats)
  2057. {
  2058. if (!cdev->ll2)
  2059. return -EINVAL;
  2060. return qed_ll2_get_stats(QED_LEADING_HWFN(cdev),
  2061. cdev->ll2->handle, stats);
  2062. }
  2063. const struct qed_ll2_ops qed_ll2_ops_pass = {
  2064. .start = &qed_ll2_start,
  2065. .stop = &qed_ll2_stop,
  2066. .start_xmit = &qed_ll2_start_xmit,
  2067. .register_cb_ops = &qed_ll2_register_cb_ops,
  2068. .get_stats = &qed_ll2_stats,
  2069. };
  2070. int qed_ll2_alloc_if(struct qed_dev *cdev)
  2071. {
  2072. cdev->ll2 = kzalloc(sizeof(*cdev->ll2), GFP_KERNEL);
  2073. return cdev->ll2 ? 0 : -ENOMEM;
  2074. }
  2075. void qed_ll2_dealloc_if(struct qed_dev *cdev)
  2076. {
  2077. kfree(cdev->ll2);
  2078. cdev->ll2 = NULL;
  2079. }