qed_dcbx.c 64 KB

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  1. /* QLogic qed NIC Driver
  2. * Copyright (c) 2015-2017 QLogic Corporation
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and /or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/types.h>
  33. #include <asm/byteorder.h>
  34. #include <linux/bitops.h>
  35. #include <linux/dcbnl.h>
  36. #include <linux/errno.h>
  37. #include <linux/kernel.h>
  38. #include <linux/slab.h>
  39. #include <linux/string.h>
  40. #include "qed.h"
  41. #include "qed_cxt.h"
  42. #include "qed_dcbx.h"
  43. #include "qed_hsi.h"
  44. #include "qed_sp.h"
  45. #include "qed_sriov.h"
  46. #include "qed_rdma.h"
  47. #ifdef CONFIG_DCB
  48. #include <linux/qed/qed_eth_if.h>
  49. #endif
  50. #define QED_DCBX_MAX_MIB_READ_TRY (100)
  51. #define QED_ETH_TYPE_DEFAULT (0)
  52. #define QED_ETH_TYPE_ROCE (0x8915)
  53. #define QED_UDP_PORT_TYPE_ROCE_V2 (0x12B7)
  54. #define QED_ETH_TYPE_FCOE (0x8906)
  55. #define QED_TCP_PORT_ISCSI (0xCBC)
  56. #define QED_DCBX_INVALID_PRIORITY 0xFF
  57. /* Get Traffic Class from priority traffic class table, 4 bits represent
  58. * the traffic class corresponding to the priority.
  59. */
  60. #define QED_DCBX_PRIO2TC(prio_tc_tbl, prio) \
  61. ((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7)
  62. static const struct qed_dcbx_app_metadata qed_dcbx_app_update[] = {
  63. {DCBX_PROTOCOL_ISCSI, "ISCSI", QED_PCI_ISCSI},
  64. {DCBX_PROTOCOL_FCOE, "FCOE", QED_PCI_FCOE},
  65. {DCBX_PROTOCOL_ROCE, "ROCE", QED_PCI_ETH_ROCE},
  66. {DCBX_PROTOCOL_ROCE_V2, "ROCE_V2", QED_PCI_ETH_ROCE},
  67. {DCBX_PROTOCOL_ETH, "ETH", QED_PCI_ETH},
  68. };
  69. static bool qed_dcbx_app_ethtype(u32 app_info_bitmap)
  70. {
  71. return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) ==
  72. DCBX_APP_SF_ETHTYPE);
  73. }
  74. static bool qed_dcbx_ieee_app_ethtype(u32 app_info_bitmap)
  75. {
  76. u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
  77. /* Old MFW */
  78. if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
  79. return qed_dcbx_app_ethtype(app_info_bitmap);
  80. return !!(mfw_val == DCBX_APP_SF_IEEE_ETHTYPE);
  81. }
  82. static bool qed_dcbx_app_port(u32 app_info_bitmap)
  83. {
  84. return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) ==
  85. DCBX_APP_SF_PORT);
  86. }
  87. static bool qed_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type)
  88. {
  89. u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
  90. /* Old MFW */
  91. if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
  92. return qed_dcbx_app_port(app_info_bitmap);
  93. return !!(mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT);
  94. }
  95. static bool qed_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
  96. {
  97. bool ethtype;
  98. if (ieee)
  99. ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap);
  100. else
  101. ethtype = qed_dcbx_app_ethtype(app_info_bitmap);
  102. return !!(ethtype && (proto_id == QED_ETH_TYPE_DEFAULT));
  103. }
  104. static bool qed_dcbx_iscsi_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
  105. {
  106. bool port;
  107. if (ieee)
  108. port = qed_dcbx_ieee_app_port(app_info_bitmap,
  109. DCBX_APP_SF_IEEE_TCP_PORT);
  110. else
  111. port = qed_dcbx_app_port(app_info_bitmap);
  112. return !!(port && (proto_id == QED_TCP_PORT_ISCSI));
  113. }
  114. static bool qed_dcbx_fcoe_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
  115. {
  116. bool ethtype;
  117. if (ieee)
  118. ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap);
  119. else
  120. ethtype = qed_dcbx_app_ethtype(app_info_bitmap);
  121. return !!(ethtype && (proto_id == QED_ETH_TYPE_FCOE));
  122. }
  123. static bool qed_dcbx_roce_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
  124. {
  125. bool ethtype;
  126. if (ieee)
  127. ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap);
  128. else
  129. ethtype = qed_dcbx_app_ethtype(app_info_bitmap);
  130. return !!(ethtype && (proto_id == QED_ETH_TYPE_ROCE));
  131. }
  132. static bool qed_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
  133. {
  134. bool port;
  135. if (ieee)
  136. port = qed_dcbx_ieee_app_port(app_info_bitmap,
  137. DCBX_APP_SF_IEEE_UDP_PORT);
  138. else
  139. port = qed_dcbx_app_port(app_info_bitmap);
  140. return !!(port && (proto_id == QED_UDP_PORT_TYPE_ROCE_V2));
  141. }
  142. static void
  143. qed_dcbx_dp_protocol(struct qed_hwfn *p_hwfn, struct qed_dcbx_results *p_data)
  144. {
  145. enum dcbx_protocol_type id;
  146. int i;
  147. DP_VERBOSE(p_hwfn, QED_MSG_DCB, "DCBX negotiated: %d\n",
  148. p_data->dcbx_enabled);
  149. for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) {
  150. id = qed_dcbx_app_update[i].id;
  151. DP_VERBOSE(p_hwfn, QED_MSG_DCB,
  152. "%s info: update %d, enable %d, prio %d, tc %d, num_tc %d\n",
  153. qed_dcbx_app_update[i].name, p_data->arr[id].update,
  154. p_data->arr[id].enable, p_data->arr[id].priority,
  155. p_data->arr[id].tc, p_hwfn->hw_info.num_active_tc);
  156. }
  157. }
  158. static void
  159. qed_dcbx_set_params(struct qed_dcbx_results *p_data,
  160. struct qed_hw_info *p_info,
  161. bool enable,
  162. u8 prio,
  163. u8 tc,
  164. enum dcbx_protocol_type type,
  165. enum qed_pci_personality personality)
  166. {
  167. /* PF update ramrod data */
  168. p_data->arr[type].enable = enable;
  169. p_data->arr[type].priority = prio;
  170. p_data->arr[type].tc = tc;
  171. if (enable)
  172. p_data->arr[type].update = UPDATE_DCB;
  173. else
  174. p_data->arr[type].update = DONT_UPDATE_DCB_DSCP;
  175. /* QM reconf data */
  176. if (p_info->personality == personality)
  177. p_info->offload_tc = tc;
  178. }
  179. /* Update app protocol data and hw_info fields with the TLV info */
  180. static void
  181. qed_dcbx_update_app_info(struct qed_dcbx_results *p_data,
  182. struct qed_hwfn *p_hwfn,
  183. bool enable,
  184. u8 prio, u8 tc, enum dcbx_protocol_type type)
  185. {
  186. struct qed_hw_info *p_info = &p_hwfn->hw_info;
  187. enum qed_pci_personality personality;
  188. enum dcbx_protocol_type id;
  189. char *name;
  190. int i;
  191. for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) {
  192. id = qed_dcbx_app_update[i].id;
  193. if (type != id)
  194. continue;
  195. personality = qed_dcbx_app_update[i].personality;
  196. name = qed_dcbx_app_update[i].name;
  197. qed_dcbx_set_params(p_data, p_info, enable,
  198. prio, tc, type, personality);
  199. }
  200. }
  201. static bool
  202. qed_dcbx_get_app_protocol_type(struct qed_hwfn *p_hwfn,
  203. u32 app_prio_bitmap,
  204. u16 id, enum dcbx_protocol_type *type, bool ieee)
  205. {
  206. if (qed_dcbx_fcoe_tlv(app_prio_bitmap, id, ieee)) {
  207. *type = DCBX_PROTOCOL_FCOE;
  208. } else if (qed_dcbx_roce_tlv(app_prio_bitmap, id, ieee)) {
  209. *type = DCBX_PROTOCOL_ROCE;
  210. } else if (qed_dcbx_iscsi_tlv(app_prio_bitmap, id, ieee)) {
  211. *type = DCBX_PROTOCOL_ISCSI;
  212. } else if (qed_dcbx_default_tlv(app_prio_bitmap, id, ieee)) {
  213. *type = DCBX_PROTOCOL_ETH;
  214. } else if (qed_dcbx_roce_v2_tlv(app_prio_bitmap, id, ieee)) {
  215. *type = DCBX_PROTOCOL_ROCE_V2;
  216. } else {
  217. *type = DCBX_MAX_PROTOCOL_TYPE;
  218. DP_ERR(p_hwfn,
  219. "No action required, App TLV id = 0x%x app_prio_bitmap = 0x%x\n",
  220. id, app_prio_bitmap);
  221. return false;
  222. }
  223. return true;
  224. }
  225. /* Parse app TLV's to update TC information in hw_info structure for
  226. * reconfiguring QM. Get protocol specific data for PF update ramrod command.
  227. */
  228. static int
  229. qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn,
  230. struct qed_dcbx_results *p_data,
  231. struct dcbx_app_priority_entry *p_tbl,
  232. u32 pri_tc_tbl, int count, u8 dcbx_version)
  233. {
  234. enum dcbx_protocol_type type;
  235. u8 tc, priority_map;
  236. bool enable, ieee;
  237. u16 protocol_id;
  238. int priority;
  239. int i;
  240. DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Num APP entries = %d\n", count);
  241. ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE);
  242. /* Parse APP TLV */
  243. for (i = 0; i < count; i++) {
  244. protocol_id = QED_MFW_GET_FIELD(p_tbl[i].entry,
  245. DCBX_APP_PROTOCOL_ID);
  246. priority_map = QED_MFW_GET_FIELD(p_tbl[i].entry,
  247. DCBX_APP_PRI_MAP);
  248. priority = ffs(priority_map) - 1;
  249. if (priority < 0) {
  250. DP_ERR(p_hwfn, "Invalid priority\n");
  251. return -EINVAL;
  252. }
  253. tc = QED_DCBX_PRIO2TC(pri_tc_tbl, priority);
  254. if (qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
  255. protocol_id, &type, ieee)) {
  256. /* ETH always have the enable bit reset, as it gets
  257. * vlan information per packet. For other protocols,
  258. * should be set according to the dcbx_enabled
  259. * indication, but we only got here if there was an
  260. * app tlv for the protocol, so dcbx must be enabled.
  261. */
  262. enable = !(type == DCBX_PROTOCOL_ETH);
  263. qed_dcbx_update_app_info(p_data, p_hwfn, enable,
  264. priority, tc, type);
  265. }
  266. }
  267. /* Update ramrod protocol data and hw_info fields
  268. * with default info when corresponding APP TLV's are not detected.
  269. * The enabled field has a different logic for ethernet as only for
  270. * ethernet dcb should disabled by default, as the information arrives
  271. * from the OS (unless an explicit app tlv was present).
  272. */
  273. tc = p_data->arr[DCBX_PROTOCOL_ETH].tc;
  274. priority = p_data->arr[DCBX_PROTOCOL_ETH].priority;
  275. for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) {
  276. if (p_data->arr[type].update)
  277. continue;
  278. enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version;
  279. qed_dcbx_update_app_info(p_data, p_hwfn, enable,
  280. priority, tc, type);
  281. }
  282. return 0;
  283. }
  284. /* Parse app TLV's to update TC information in hw_info structure for
  285. * reconfiguring QM. Get protocol specific data for PF update ramrod command.
  286. */
  287. static int qed_dcbx_process_mib_info(struct qed_hwfn *p_hwfn)
  288. {
  289. struct dcbx_app_priority_feature *p_app;
  290. struct dcbx_app_priority_entry *p_tbl;
  291. struct qed_dcbx_results data = { 0 };
  292. struct dcbx_ets_feature *p_ets;
  293. struct qed_hw_info *p_info;
  294. u32 pri_tc_tbl, flags;
  295. u8 dcbx_version;
  296. int num_entries;
  297. int rc = 0;
  298. flags = p_hwfn->p_dcbx_info->operational.flags;
  299. dcbx_version = QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION);
  300. p_app = &p_hwfn->p_dcbx_info->operational.features.app;
  301. p_tbl = p_app->app_pri_tbl;
  302. p_ets = &p_hwfn->p_dcbx_info->operational.features.ets;
  303. pri_tc_tbl = p_ets->pri_tc_tbl[0];
  304. p_info = &p_hwfn->hw_info;
  305. num_entries = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES);
  306. rc = qed_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl,
  307. num_entries, dcbx_version);
  308. if (rc)
  309. return rc;
  310. p_info->num_active_tc = QED_MFW_GET_FIELD(p_ets->flags,
  311. DCBX_ETS_MAX_TCS);
  312. p_hwfn->qm_info.ooo_tc = QED_MFW_GET_FIELD(p_ets->flags, DCBX_OOO_TC);
  313. data.pf_id = p_hwfn->rel_pf_id;
  314. data.dcbx_enabled = !!dcbx_version;
  315. qed_dcbx_dp_protocol(p_hwfn, &data);
  316. memcpy(&p_hwfn->p_dcbx_info->results, &data,
  317. sizeof(struct qed_dcbx_results));
  318. return 0;
  319. }
  320. static int
  321. qed_dcbx_copy_mib(struct qed_hwfn *p_hwfn,
  322. struct qed_ptt *p_ptt,
  323. struct qed_dcbx_mib_meta_data *p_data,
  324. enum qed_mib_read_type type)
  325. {
  326. u32 prefix_seq_num, suffix_seq_num;
  327. int read_count = 0;
  328. int rc = 0;
  329. /* The data is considered to be valid only if both sequence numbers are
  330. * the same.
  331. */
  332. do {
  333. if (type == QED_DCBX_REMOTE_LLDP_MIB) {
  334. qed_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote,
  335. p_data->addr, p_data->size);
  336. prefix_seq_num = p_data->lldp_remote->prefix_seq_num;
  337. suffix_seq_num = p_data->lldp_remote->suffix_seq_num;
  338. } else {
  339. qed_memcpy_from(p_hwfn, p_ptt, p_data->mib,
  340. p_data->addr, p_data->size);
  341. prefix_seq_num = p_data->mib->prefix_seq_num;
  342. suffix_seq_num = p_data->mib->suffix_seq_num;
  343. }
  344. read_count++;
  345. DP_VERBOSE(p_hwfn,
  346. QED_MSG_DCB,
  347. "mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n",
  348. type, read_count, prefix_seq_num, suffix_seq_num);
  349. } while ((prefix_seq_num != suffix_seq_num) &&
  350. (read_count < QED_DCBX_MAX_MIB_READ_TRY));
  351. if (read_count >= QED_DCBX_MAX_MIB_READ_TRY) {
  352. DP_ERR(p_hwfn,
  353. "MIB read err, mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n",
  354. type, read_count, prefix_seq_num, suffix_seq_num);
  355. rc = -EIO;
  356. }
  357. return rc;
  358. }
  359. static void
  360. qed_dcbx_get_priority_info(struct qed_hwfn *p_hwfn,
  361. struct qed_dcbx_app_prio *p_prio,
  362. struct qed_dcbx_results *p_results)
  363. {
  364. u8 val;
  365. p_prio->roce = QED_DCBX_INVALID_PRIORITY;
  366. p_prio->roce_v2 = QED_DCBX_INVALID_PRIORITY;
  367. p_prio->iscsi = QED_DCBX_INVALID_PRIORITY;
  368. p_prio->fcoe = QED_DCBX_INVALID_PRIORITY;
  369. if (p_results->arr[DCBX_PROTOCOL_ROCE].update &&
  370. p_results->arr[DCBX_PROTOCOL_ROCE].enable)
  371. p_prio->roce = p_results->arr[DCBX_PROTOCOL_ROCE].priority;
  372. if (p_results->arr[DCBX_PROTOCOL_ROCE_V2].update &&
  373. p_results->arr[DCBX_PROTOCOL_ROCE_V2].enable) {
  374. val = p_results->arr[DCBX_PROTOCOL_ROCE_V2].priority;
  375. p_prio->roce_v2 = val;
  376. }
  377. if (p_results->arr[DCBX_PROTOCOL_ISCSI].update &&
  378. p_results->arr[DCBX_PROTOCOL_ISCSI].enable)
  379. p_prio->iscsi = p_results->arr[DCBX_PROTOCOL_ISCSI].priority;
  380. if (p_results->arr[DCBX_PROTOCOL_FCOE].update &&
  381. p_results->arr[DCBX_PROTOCOL_FCOE].enable)
  382. p_prio->fcoe = p_results->arr[DCBX_PROTOCOL_FCOE].priority;
  383. if (p_results->arr[DCBX_PROTOCOL_ETH].update &&
  384. p_results->arr[DCBX_PROTOCOL_ETH].enable)
  385. p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority;
  386. DP_VERBOSE(p_hwfn, QED_MSG_DCB,
  387. "Priorities: iscsi %d, roce %d, roce v2 %d, fcoe %d, eth %d\n",
  388. p_prio->iscsi, p_prio->roce, p_prio->roce_v2, p_prio->fcoe,
  389. p_prio->eth);
  390. }
  391. static void
  392. qed_dcbx_get_app_data(struct qed_hwfn *p_hwfn,
  393. struct dcbx_app_priority_feature *p_app,
  394. struct dcbx_app_priority_entry *p_tbl,
  395. struct qed_dcbx_params *p_params, bool ieee)
  396. {
  397. struct qed_app_entry *entry;
  398. u8 pri_map;
  399. int i;
  400. p_params->app_willing = QED_MFW_GET_FIELD(p_app->flags,
  401. DCBX_APP_WILLING);
  402. p_params->app_valid = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ENABLED);
  403. p_params->app_error = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ERROR);
  404. p_params->num_app_entries = QED_MFW_GET_FIELD(p_app->flags,
  405. DCBX_APP_NUM_ENTRIES);
  406. for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
  407. entry = &p_params->app_entry[i];
  408. if (ieee) {
  409. u8 sf_ieee;
  410. u32 val;
  411. sf_ieee = QED_MFW_GET_FIELD(p_tbl[i].entry,
  412. DCBX_APP_SF_IEEE);
  413. switch (sf_ieee) {
  414. case DCBX_APP_SF_IEEE_RESERVED:
  415. /* Old MFW */
  416. val = QED_MFW_GET_FIELD(p_tbl[i].entry,
  417. DCBX_APP_SF);
  418. entry->sf_ieee = val ?
  419. QED_DCBX_SF_IEEE_TCP_UDP_PORT :
  420. QED_DCBX_SF_IEEE_ETHTYPE;
  421. break;
  422. case DCBX_APP_SF_IEEE_ETHTYPE:
  423. entry->sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE;
  424. break;
  425. case DCBX_APP_SF_IEEE_TCP_PORT:
  426. entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT;
  427. break;
  428. case DCBX_APP_SF_IEEE_UDP_PORT:
  429. entry->sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT;
  430. break;
  431. case DCBX_APP_SF_IEEE_TCP_UDP_PORT:
  432. entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT;
  433. break;
  434. }
  435. } else {
  436. entry->ethtype = !(QED_MFW_GET_FIELD(p_tbl[i].entry,
  437. DCBX_APP_SF));
  438. }
  439. pri_map = QED_MFW_GET_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP);
  440. entry->prio = ffs(pri_map) - 1;
  441. entry->proto_id = QED_MFW_GET_FIELD(p_tbl[i].entry,
  442. DCBX_APP_PROTOCOL_ID);
  443. qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
  444. entry->proto_id,
  445. &entry->proto_type, ieee);
  446. }
  447. DP_VERBOSE(p_hwfn, QED_MSG_DCB,
  448. "APP params: willing %d, valid %d error = %d\n",
  449. p_params->app_willing, p_params->app_valid,
  450. p_params->app_error);
  451. }
  452. static void
  453. qed_dcbx_get_pfc_data(struct qed_hwfn *p_hwfn,
  454. u32 pfc, struct qed_dcbx_params *p_params)
  455. {
  456. u8 pfc_map;
  457. p_params->pfc.willing = QED_MFW_GET_FIELD(pfc, DCBX_PFC_WILLING);
  458. p_params->pfc.max_tc = QED_MFW_GET_FIELD(pfc, DCBX_PFC_CAPS);
  459. p_params->pfc.enabled = QED_MFW_GET_FIELD(pfc, DCBX_PFC_ENABLED);
  460. pfc_map = QED_MFW_GET_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP);
  461. p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0);
  462. p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1);
  463. p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2);
  464. p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3);
  465. p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4);
  466. p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5);
  467. p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6);
  468. p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7);
  469. DP_VERBOSE(p_hwfn, QED_MSG_DCB,
  470. "PFC params: willing %d, pfc_bitmap %u max_tc = %u enabled = %d\n",
  471. p_params->pfc.willing, pfc_map, p_params->pfc.max_tc,
  472. p_params->pfc.enabled);
  473. }
  474. static void
  475. qed_dcbx_get_ets_data(struct qed_hwfn *p_hwfn,
  476. struct dcbx_ets_feature *p_ets,
  477. struct qed_dcbx_params *p_params)
  478. {
  479. u32 bw_map[2], tsa_map[2], pri_map;
  480. int i;
  481. p_params->ets_willing = QED_MFW_GET_FIELD(p_ets->flags,
  482. DCBX_ETS_WILLING);
  483. p_params->ets_enabled = QED_MFW_GET_FIELD(p_ets->flags,
  484. DCBX_ETS_ENABLED);
  485. p_params->ets_cbs = QED_MFW_GET_FIELD(p_ets->flags, DCBX_ETS_CBS);
  486. p_params->max_ets_tc = QED_MFW_GET_FIELD(p_ets->flags,
  487. DCBX_ETS_MAX_TCS);
  488. DP_VERBOSE(p_hwfn, QED_MSG_DCB,
  489. "ETS params: willing %d, enabled = %d ets_cbs %d pri_tc_tbl_0 %x max_ets_tc %d\n",
  490. p_params->ets_willing, p_params->ets_enabled,
  491. p_params->ets_cbs, p_ets->pri_tc_tbl[0],
  492. p_params->max_ets_tc);
  493. if (p_params->ets_enabled && !p_params->max_ets_tc) {
  494. p_params->max_ets_tc = QED_MAX_PFC_PRIORITIES;
  495. DP_VERBOSE(p_hwfn, QED_MSG_DCB,
  496. "ETS params: max_ets_tc is forced to %d\n",
  497. p_params->max_ets_tc);
  498. }
  499. /* 8 bit tsa and bw data corresponding to each of the 8 TC's are
  500. * encoded in a type u32 array of size 2.
  501. */
  502. bw_map[0] = be32_to_cpu(p_ets->tc_bw_tbl[0]);
  503. bw_map[1] = be32_to_cpu(p_ets->tc_bw_tbl[1]);
  504. tsa_map[0] = be32_to_cpu(p_ets->tc_tsa_tbl[0]);
  505. tsa_map[1] = be32_to_cpu(p_ets->tc_tsa_tbl[1]);
  506. pri_map = p_ets->pri_tc_tbl[0];
  507. for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) {
  508. p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i];
  509. p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i];
  510. p_params->ets_pri_tc_tbl[i] = QED_DCBX_PRIO2TC(pri_map, i);
  511. DP_VERBOSE(p_hwfn, QED_MSG_DCB,
  512. "elem %d bw_tbl %x tsa_tbl %x\n",
  513. i, p_params->ets_tc_bw_tbl[i],
  514. p_params->ets_tc_tsa_tbl[i]);
  515. }
  516. }
  517. static void
  518. qed_dcbx_get_common_params(struct qed_hwfn *p_hwfn,
  519. struct dcbx_app_priority_feature *p_app,
  520. struct dcbx_app_priority_entry *p_tbl,
  521. struct dcbx_ets_feature *p_ets,
  522. u32 pfc, struct qed_dcbx_params *p_params, bool ieee)
  523. {
  524. qed_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee);
  525. qed_dcbx_get_ets_data(p_hwfn, p_ets, p_params);
  526. qed_dcbx_get_pfc_data(p_hwfn, pfc, p_params);
  527. }
  528. static void
  529. qed_dcbx_get_local_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *params)
  530. {
  531. struct dcbx_features *p_feat;
  532. p_feat = &p_hwfn->p_dcbx_info->local_admin.features;
  533. qed_dcbx_get_common_params(p_hwfn, &p_feat->app,
  534. p_feat->app.app_pri_tbl, &p_feat->ets,
  535. p_feat->pfc, &params->local.params, false);
  536. params->local.valid = true;
  537. }
  538. static void
  539. qed_dcbx_get_remote_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *params)
  540. {
  541. struct dcbx_features *p_feat;
  542. p_feat = &p_hwfn->p_dcbx_info->remote.features;
  543. qed_dcbx_get_common_params(p_hwfn, &p_feat->app,
  544. p_feat->app.app_pri_tbl, &p_feat->ets,
  545. p_feat->pfc, &params->remote.params, false);
  546. params->remote.valid = true;
  547. }
  548. static void
  549. qed_dcbx_get_operational_params(struct qed_hwfn *p_hwfn,
  550. struct qed_dcbx_get *params)
  551. {
  552. struct qed_dcbx_operational_params *p_operational;
  553. struct qed_dcbx_results *p_results;
  554. struct dcbx_features *p_feat;
  555. bool enabled, err;
  556. u32 flags;
  557. bool val;
  558. flags = p_hwfn->p_dcbx_info->operational.flags;
  559. /* If DCBx version is non zero, then negotiation
  560. * was successfuly performed
  561. */
  562. p_operational = &params->operational;
  563. enabled = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) !=
  564. DCBX_CONFIG_VERSION_DISABLED);
  565. if (!enabled) {
  566. p_operational->enabled = enabled;
  567. p_operational->valid = false;
  568. DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Dcbx is disabled\n");
  569. return;
  570. }
  571. p_feat = &p_hwfn->p_dcbx_info->operational.features;
  572. p_results = &p_hwfn->p_dcbx_info->results;
  573. val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) ==
  574. DCBX_CONFIG_VERSION_IEEE);
  575. p_operational->ieee = val;
  576. val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) ==
  577. DCBX_CONFIG_VERSION_CEE);
  578. p_operational->cee = val;
  579. val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) ==
  580. DCBX_CONFIG_VERSION_STATIC);
  581. p_operational->local = val;
  582. DP_VERBOSE(p_hwfn, QED_MSG_DCB,
  583. "Version support: ieee %d, cee %d, static %d\n",
  584. p_operational->ieee, p_operational->cee,
  585. p_operational->local);
  586. qed_dcbx_get_common_params(p_hwfn, &p_feat->app,
  587. p_feat->app.app_pri_tbl, &p_feat->ets,
  588. p_feat->pfc, &params->operational.params,
  589. p_operational->ieee);
  590. qed_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio, p_results);
  591. err = QED_MFW_GET_FIELD(p_feat->app.flags, DCBX_APP_ERROR);
  592. p_operational->err = err;
  593. p_operational->enabled = enabled;
  594. p_operational->valid = true;
  595. }
  596. static void
  597. qed_dcbx_get_local_lldp_params(struct qed_hwfn *p_hwfn,
  598. struct qed_dcbx_get *params)
  599. {
  600. struct lldp_config_params_s *p_local;
  601. p_local = &p_hwfn->p_dcbx_info->lldp_local[LLDP_NEAREST_BRIDGE];
  602. memcpy(params->lldp_local.local_chassis_id, p_local->local_chassis_id,
  603. ARRAY_SIZE(p_local->local_chassis_id));
  604. memcpy(params->lldp_local.local_port_id, p_local->local_port_id,
  605. ARRAY_SIZE(p_local->local_port_id));
  606. }
  607. static void
  608. qed_dcbx_get_remote_lldp_params(struct qed_hwfn *p_hwfn,
  609. struct qed_dcbx_get *params)
  610. {
  611. struct lldp_status_params_s *p_remote;
  612. p_remote = &p_hwfn->p_dcbx_info->lldp_remote[LLDP_NEAREST_BRIDGE];
  613. memcpy(params->lldp_remote.peer_chassis_id, p_remote->peer_chassis_id,
  614. ARRAY_SIZE(p_remote->peer_chassis_id));
  615. memcpy(params->lldp_remote.peer_port_id, p_remote->peer_port_id,
  616. ARRAY_SIZE(p_remote->peer_port_id));
  617. }
  618. static int
  619. qed_dcbx_get_params(struct qed_hwfn *p_hwfn, struct qed_dcbx_get *p_params,
  620. enum qed_mib_read_type type)
  621. {
  622. switch (type) {
  623. case QED_DCBX_REMOTE_MIB:
  624. qed_dcbx_get_remote_params(p_hwfn, p_params);
  625. break;
  626. case QED_DCBX_LOCAL_MIB:
  627. qed_dcbx_get_local_params(p_hwfn, p_params);
  628. break;
  629. case QED_DCBX_OPERATIONAL_MIB:
  630. qed_dcbx_get_operational_params(p_hwfn, p_params);
  631. break;
  632. case QED_DCBX_REMOTE_LLDP_MIB:
  633. qed_dcbx_get_remote_lldp_params(p_hwfn, p_params);
  634. break;
  635. case QED_DCBX_LOCAL_LLDP_MIB:
  636. qed_dcbx_get_local_lldp_params(p_hwfn, p_params);
  637. break;
  638. default:
  639. DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
  640. return -EINVAL;
  641. }
  642. return 0;
  643. }
  644. static int
  645. qed_dcbx_read_local_lldp_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
  646. {
  647. struct qed_dcbx_mib_meta_data data;
  648. int rc = 0;
  649. memset(&data, 0, sizeof(data));
  650. data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
  651. lldp_config_params);
  652. data.lldp_local = p_hwfn->p_dcbx_info->lldp_local;
  653. data.size = sizeof(struct lldp_config_params_s);
  654. qed_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size);
  655. return rc;
  656. }
  657. static int
  658. qed_dcbx_read_remote_lldp_mib(struct qed_hwfn *p_hwfn,
  659. struct qed_ptt *p_ptt,
  660. enum qed_mib_read_type type)
  661. {
  662. struct qed_dcbx_mib_meta_data data;
  663. int rc = 0;
  664. memset(&data, 0, sizeof(data));
  665. data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
  666. lldp_status_params);
  667. data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote;
  668. data.size = sizeof(struct lldp_status_params_s);
  669. rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
  670. return rc;
  671. }
  672. static int
  673. qed_dcbx_read_operational_mib(struct qed_hwfn *p_hwfn,
  674. struct qed_ptt *p_ptt,
  675. enum qed_mib_read_type type)
  676. {
  677. struct qed_dcbx_mib_meta_data data;
  678. int rc = 0;
  679. memset(&data, 0, sizeof(data));
  680. data.addr = p_hwfn->mcp_info->port_addr +
  681. offsetof(struct public_port, operational_dcbx_mib);
  682. data.mib = &p_hwfn->p_dcbx_info->operational;
  683. data.size = sizeof(struct dcbx_mib);
  684. rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
  685. return rc;
  686. }
  687. static int
  688. qed_dcbx_read_remote_mib(struct qed_hwfn *p_hwfn,
  689. struct qed_ptt *p_ptt, enum qed_mib_read_type type)
  690. {
  691. struct qed_dcbx_mib_meta_data data;
  692. int rc = 0;
  693. memset(&data, 0, sizeof(data));
  694. data.addr = p_hwfn->mcp_info->port_addr +
  695. offsetof(struct public_port, remote_dcbx_mib);
  696. data.mib = &p_hwfn->p_dcbx_info->remote;
  697. data.size = sizeof(struct dcbx_mib);
  698. rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
  699. return rc;
  700. }
  701. static int
  702. qed_dcbx_read_local_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
  703. {
  704. struct qed_dcbx_mib_meta_data data;
  705. int rc = 0;
  706. memset(&data, 0, sizeof(data));
  707. data.addr = p_hwfn->mcp_info->port_addr +
  708. offsetof(struct public_port, local_admin_dcbx_mib);
  709. data.local_admin = &p_hwfn->p_dcbx_info->local_admin;
  710. data.size = sizeof(struct dcbx_local_params);
  711. qed_memcpy_from(p_hwfn, p_ptt, data.local_admin, data.addr, data.size);
  712. return rc;
  713. }
  714. static int qed_dcbx_read_mib(struct qed_hwfn *p_hwfn,
  715. struct qed_ptt *p_ptt, enum qed_mib_read_type type)
  716. {
  717. int rc = -EINVAL;
  718. switch (type) {
  719. case QED_DCBX_OPERATIONAL_MIB:
  720. rc = qed_dcbx_read_operational_mib(p_hwfn, p_ptt, type);
  721. break;
  722. case QED_DCBX_REMOTE_MIB:
  723. rc = qed_dcbx_read_remote_mib(p_hwfn, p_ptt, type);
  724. break;
  725. case QED_DCBX_LOCAL_MIB:
  726. rc = qed_dcbx_read_local_mib(p_hwfn, p_ptt);
  727. break;
  728. case QED_DCBX_REMOTE_LLDP_MIB:
  729. rc = qed_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type);
  730. break;
  731. case QED_DCBX_LOCAL_LLDP_MIB:
  732. rc = qed_dcbx_read_local_lldp_mib(p_hwfn, p_ptt);
  733. break;
  734. default:
  735. DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
  736. }
  737. return rc;
  738. }
  739. void qed_dcbx_aen(struct qed_hwfn *hwfn, u32 mib_type)
  740. {
  741. struct qed_common_cb_ops *op = hwfn->cdev->protocol_ops.common;
  742. void *cookie = hwfn->cdev->ops_cookie;
  743. if (cookie && op->dcbx_aen)
  744. op->dcbx_aen(cookie, &hwfn->p_dcbx_info->get, mib_type);
  745. }
  746. /* Read updated MIB.
  747. * Reconfigure QM and invoke PF update ramrod command if operational MIB
  748. * change is detected.
  749. */
  750. int
  751. qed_dcbx_mib_update_event(struct qed_hwfn *p_hwfn,
  752. struct qed_ptt *p_ptt, enum qed_mib_read_type type)
  753. {
  754. int rc = 0;
  755. rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type);
  756. if (rc)
  757. return rc;
  758. if (type == QED_DCBX_OPERATIONAL_MIB) {
  759. rc = qed_dcbx_process_mib_info(p_hwfn);
  760. if (!rc) {
  761. /* reconfigure tcs of QM queues according
  762. * to negotiation results
  763. */
  764. qed_qm_reconf(p_hwfn, p_ptt);
  765. /* update storm FW with negotiation results */
  766. qed_sp_pf_update(p_hwfn);
  767. /* for roce PFs, we may want to enable/disable DPM
  768. * when DCBx change occurs
  769. */
  770. if (p_hwfn->hw_info.personality ==
  771. QED_PCI_ETH_ROCE)
  772. qed_roce_dpm_dcbx(p_hwfn, p_ptt);
  773. }
  774. }
  775. qed_dcbx_get_params(p_hwfn, &p_hwfn->p_dcbx_info->get, type);
  776. if (type == QED_DCBX_OPERATIONAL_MIB) {
  777. struct qed_dcbx_results *p_data;
  778. u16 val;
  779. /* Configure in NIG which protocols support EDPM and should
  780. * honor PFC.
  781. */
  782. p_data = &p_hwfn->p_dcbx_info->results;
  783. val = (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE].tc) |
  784. (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE_V2].tc);
  785. val <<= NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN_SHIFT;
  786. val |= NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN;
  787. qed_wr(p_hwfn, p_ptt, NIG_REG_TX_EDPM_CTRL, val);
  788. }
  789. qed_dcbx_aen(p_hwfn, type);
  790. return rc;
  791. }
  792. int qed_dcbx_info_alloc(struct qed_hwfn *p_hwfn)
  793. {
  794. p_hwfn->p_dcbx_info = kzalloc(sizeof(*p_hwfn->p_dcbx_info), GFP_KERNEL);
  795. if (!p_hwfn->p_dcbx_info)
  796. return -ENOMEM;
  797. return 0;
  798. }
  799. void qed_dcbx_info_free(struct qed_hwfn *p_hwfn)
  800. {
  801. kfree(p_hwfn->p_dcbx_info);
  802. p_hwfn->p_dcbx_info = NULL;
  803. }
  804. static void qed_dcbx_update_protocol_data(struct protocol_dcb_data *p_data,
  805. struct qed_dcbx_results *p_src,
  806. enum dcbx_protocol_type type)
  807. {
  808. p_data->dcb_enable_flag = p_src->arr[type].enable;
  809. p_data->dcb_priority = p_src->arr[type].priority;
  810. p_data->dcb_tc = p_src->arr[type].tc;
  811. }
  812. /* Set pf update ramrod command params */
  813. void qed_dcbx_set_pf_update_params(struct qed_dcbx_results *p_src,
  814. struct pf_update_ramrod_data *p_dest)
  815. {
  816. struct protocol_dcb_data *p_dcb_data;
  817. bool update_flag = false;
  818. p_dest->pf_id = p_src->pf_id;
  819. update_flag = p_src->arr[DCBX_PROTOCOL_FCOE].update;
  820. p_dest->update_fcoe_dcb_data_mode = update_flag;
  821. update_flag = p_src->arr[DCBX_PROTOCOL_ROCE].update;
  822. p_dest->update_roce_dcb_data_mode = update_flag;
  823. update_flag = p_src->arr[DCBX_PROTOCOL_ROCE_V2].update;
  824. p_dest->update_rroce_dcb_data_mode = update_flag;
  825. update_flag = p_src->arr[DCBX_PROTOCOL_ISCSI].update;
  826. p_dest->update_iscsi_dcb_data_mode = update_flag;
  827. update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update;
  828. p_dest->update_eth_dcb_data_mode = update_flag;
  829. p_dcb_data = &p_dest->fcoe_dcb_data;
  830. qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_FCOE);
  831. p_dcb_data = &p_dest->roce_dcb_data;
  832. qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE);
  833. p_dcb_data = &p_dest->rroce_dcb_data;
  834. qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE_V2);
  835. p_dcb_data = &p_dest->iscsi_dcb_data;
  836. qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ISCSI);
  837. p_dcb_data = &p_dest->eth_dcb_data;
  838. qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH);
  839. }
  840. #ifdef CONFIG_DCB
  841. static int qed_dcbx_query_params(struct qed_hwfn *p_hwfn,
  842. struct qed_dcbx_get *p_get,
  843. enum qed_mib_read_type type)
  844. {
  845. struct qed_ptt *p_ptt;
  846. int rc;
  847. if (IS_VF(p_hwfn->cdev))
  848. return -EINVAL;
  849. p_ptt = qed_ptt_acquire(p_hwfn);
  850. if (!p_ptt)
  851. return -EBUSY;
  852. rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type);
  853. if (rc)
  854. goto out;
  855. rc = qed_dcbx_get_params(p_hwfn, p_get, type);
  856. out:
  857. qed_ptt_release(p_hwfn, p_ptt);
  858. return rc;
  859. }
  860. static void
  861. qed_dcbx_set_pfc_data(struct qed_hwfn *p_hwfn,
  862. u32 *pfc, struct qed_dcbx_params *p_params)
  863. {
  864. u8 pfc_map = 0;
  865. int i;
  866. *pfc &= ~DCBX_PFC_ERROR_MASK;
  867. if (p_params->pfc.willing)
  868. *pfc |= DCBX_PFC_WILLING_MASK;
  869. else
  870. *pfc &= ~DCBX_PFC_WILLING_MASK;
  871. if (p_params->pfc.enabled)
  872. *pfc |= DCBX_PFC_ENABLED_MASK;
  873. else
  874. *pfc &= ~DCBX_PFC_ENABLED_MASK;
  875. *pfc &= ~DCBX_PFC_CAPS_MASK;
  876. *pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_SHIFT;
  877. for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++)
  878. if (p_params->pfc.prio[i])
  879. pfc_map |= BIT(i);
  880. *pfc &= ~DCBX_PFC_PRI_EN_BITMAP_MASK;
  881. *pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_SHIFT);
  882. DP_VERBOSE(p_hwfn, QED_MSG_DCB, "pfc = 0x%x\n", *pfc);
  883. }
  884. static void
  885. qed_dcbx_set_ets_data(struct qed_hwfn *p_hwfn,
  886. struct dcbx_ets_feature *p_ets,
  887. struct qed_dcbx_params *p_params)
  888. {
  889. u8 *bw_map, *tsa_map;
  890. u32 val;
  891. int i;
  892. if (p_params->ets_willing)
  893. p_ets->flags |= DCBX_ETS_WILLING_MASK;
  894. else
  895. p_ets->flags &= ~DCBX_ETS_WILLING_MASK;
  896. if (p_params->ets_cbs)
  897. p_ets->flags |= DCBX_ETS_CBS_MASK;
  898. else
  899. p_ets->flags &= ~DCBX_ETS_CBS_MASK;
  900. if (p_params->ets_enabled)
  901. p_ets->flags |= DCBX_ETS_ENABLED_MASK;
  902. else
  903. p_ets->flags &= ~DCBX_ETS_ENABLED_MASK;
  904. p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK;
  905. p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_SHIFT;
  906. bw_map = (u8 *)&p_ets->tc_bw_tbl[0];
  907. tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0];
  908. p_ets->pri_tc_tbl[0] = 0;
  909. for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) {
  910. bw_map[i] = p_params->ets_tc_bw_tbl[i];
  911. tsa_map[i] = p_params->ets_tc_tsa_tbl[i];
  912. /* Copy the priority value to the corresponding 4 bits in the
  913. * traffic class table.
  914. */
  915. val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4));
  916. p_ets->pri_tc_tbl[0] |= val;
  917. }
  918. for (i = 0; i < 2; i++) {
  919. p_ets->tc_bw_tbl[i] = cpu_to_be32(p_ets->tc_bw_tbl[i]);
  920. p_ets->tc_tsa_tbl[i] = cpu_to_be32(p_ets->tc_tsa_tbl[i]);
  921. }
  922. }
  923. static void
  924. qed_dcbx_set_app_data(struct qed_hwfn *p_hwfn,
  925. struct dcbx_app_priority_feature *p_app,
  926. struct qed_dcbx_params *p_params, bool ieee)
  927. {
  928. u32 *entry;
  929. int i;
  930. if (p_params->app_willing)
  931. p_app->flags |= DCBX_APP_WILLING_MASK;
  932. else
  933. p_app->flags &= ~DCBX_APP_WILLING_MASK;
  934. if (p_params->app_valid)
  935. p_app->flags |= DCBX_APP_ENABLED_MASK;
  936. else
  937. p_app->flags &= ~DCBX_APP_ENABLED_MASK;
  938. p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK;
  939. p_app->flags |= (u32)p_params->num_app_entries <<
  940. DCBX_APP_NUM_ENTRIES_SHIFT;
  941. for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
  942. entry = &p_app->app_pri_tbl[i].entry;
  943. *entry = 0;
  944. if (ieee) {
  945. *entry &= ~(DCBX_APP_SF_IEEE_MASK | DCBX_APP_SF_MASK);
  946. switch (p_params->app_entry[i].sf_ieee) {
  947. case QED_DCBX_SF_IEEE_ETHTYPE:
  948. *entry |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE <<
  949. DCBX_APP_SF_IEEE_SHIFT);
  950. *entry |= ((u32)DCBX_APP_SF_ETHTYPE <<
  951. DCBX_APP_SF_SHIFT);
  952. break;
  953. case QED_DCBX_SF_IEEE_TCP_PORT:
  954. *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT <<
  955. DCBX_APP_SF_IEEE_SHIFT);
  956. *entry |= ((u32)DCBX_APP_SF_PORT <<
  957. DCBX_APP_SF_SHIFT);
  958. break;
  959. case QED_DCBX_SF_IEEE_UDP_PORT:
  960. *entry |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT <<
  961. DCBX_APP_SF_IEEE_SHIFT);
  962. *entry |= ((u32)DCBX_APP_SF_PORT <<
  963. DCBX_APP_SF_SHIFT);
  964. break;
  965. case QED_DCBX_SF_IEEE_TCP_UDP_PORT:
  966. *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT <<
  967. DCBX_APP_SF_IEEE_SHIFT);
  968. *entry |= ((u32)DCBX_APP_SF_PORT <<
  969. DCBX_APP_SF_SHIFT);
  970. break;
  971. }
  972. } else {
  973. *entry &= ~DCBX_APP_SF_MASK;
  974. if (p_params->app_entry[i].ethtype)
  975. *entry |= ((u32)DCBX_APP_SF_ETHTYPE <<
  976. DCBX_APP_SF_SHIFT);
  977. else
  978. *entry |= ((u32)DCBX_APP_SF_PORT <<
  979. DCBX_APP_SF_SHIFT);
  980. }
  981. *entry &= ~DCBX_APP_PROTOCOL_ID_MASK;
  982. *entry |= ((u32)p_params->app_entry[i].proto_id <<
  983. DCBX_APP_PROTOCOL_ID_SHIFT);
  984. *entry &= ~DCBX_APP_PRI_MAP_MASK;
  985. *entry |= ((u32)(p_params->app_entry[i].prio) <<
  986. DCBX_APP_PRI_MAP_SHIFT);
  987. }
  988. }
  989. static void
  990. qed_dcbx_set_local_params(struct qed_hwfn *p_hwfn,
  991. struct dcbx_local_params *local_admin,
  992. struct qed_dcbx_set *params)
  993. {
  994. bool ieee = false;
  995. local_admin->flags = 0;
  996. memcpy(&local_admin->features,
  997. &p_hwfn->p_dcbx_info->operational.features,
  998. sizeof(local_admin->features));
  999. if (params->enabled) {
  1000. local_admin->config = params->ver_num;
  1001. ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE);
  1002. } else {
  1003. local_admin->config = DCBX_CONFIG_VERSION_DISABLED;
  1004. }
  1005. DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Dcbx version = %d\n",
  1006. local_admin->config);
  1007. if (params->override_flags & QED_DCBX_OVERRIDE_PFC_CFG)
  1008. qed_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc,
  1009. &params->config.params);
  1010. if (params->override_flags & QED_DCBX_OVERRIDE_ETS_CFG)
  1011. qed_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets,
  1012. &params->config.params);
  1013. if (params->override_flags & QED_DCBX_OVERRIDE_APP_CFG)
  1014. qed_dcbx_set_app_data(p_hwfn, &local_admin->features.app,
  1015. &params->config.params, ieee);
  1016. }
  1017. int qed_dcbx_config_params(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
  1018. struct qed_dcbx_set *params, bool hw_commit)
  1019. {
  1020. struct dcbx_local_params local_admin;
  1021. struct qed_dcbx_mib_meta_data data;
  1022. u32 resp = 0, param = 0;
  1023. int rc = 0;
  1024. if (!hw_commit) {
  1025. memcpy(&p_hwfn->p_dcbx_info->set, params,
  1026. sizeof(struct qed_dcbx_set));
  1027. return 0;
  1028. }
  1029. /* clear set-parmas cache */
  1030. memset(&p_hwfn->p_dcbx_info->set, 0, sizeof(p_hwfn->p_dcbx_info->set));
  1031. memset(&local_admin, 0, sizeof(local_admin));
  1032. qed_dcbx_set_local_params(p_hwfn, &local_admin, params);
  1033. data.addr = p_hwfn->mcp_info->port_addr +
  1034. offsetof(struct public_port, local_admin_dcbx_mib);
  1035. data.local_admin = &local_admin;
  1036. data.size = sizeof(struct dcbx_local_params);
  1037. qed_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size);
  1038. rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX,
  1039. 1 << DRV_MB_PARAM_LLDP_SEND_SHIFT, &resp, &param);
  1040. if (rc)
  1041. DP_NOTICE(p_hwfn, "Failed to send DCBX update request\n");
  1042. return rc;
  1043. }
  1044. int qed_dcbx_get_config_params(struct qed_hwfn *p_hwfn,
  1045. struct qed_dcbx_set *params)
  1046. {
  1047. struct qed_dcbx_get *dcbx_info;
  1048. int rc;
  1049. if (p_hwfn->p_dcbx_info->set.config.valid) {
  1050. memcpy(params, &p_hwfn->p_dcbx_info->set,
  1051. sizeof(struct qed_dcbx_set));
  1052. return 0;
  1053. }
  1054. dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_KERNEL);
  1055. if (!dcbx_info)
  1056. return -ENOMEM;
  1057. rc = qed_dcbx_query_params(p_hwfn, dcbx_info, QED_DCBX_OPERATIONAL_MIB);
  1058. if (rc) {
  1059. kfree(dcbx_info);
  1060. return rc;
  1061. }
  1062. p_hwfn->p_dcbx_info->set.override_flags = 0;
  1063. p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED;
  1064. if (dcbx_info->operational.cee)
  1065. p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE;
  1066. if (dcbx_info->operational.ieee)
  1067. p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE;
  1068. if (dcbx_info->operational.local)
  1069. p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_STATIC;
  1070. p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled;
  1071. memcpy(&p_hwfn->p_dcbx_info->set.config.params,
  1072. &dcbx_info->operational.params,
  1073. sizeof(struct qed_dcbx_admin_params));
  1074. p_hwfn->p_dcbx_info->set.config.valid = true;
  1075. memcpy(params, &p_hwfn->p_dcbx_info->set, sizeof(struct qed_dcbx_set));
  1076. kfree(dcbx_info);
  1077. return 0;
  1078. }
  1079. static struct qed_dcbx_get *qed_dcbnl_get_dcbx(struct qed_hwfn *hwfn,
  1080. enum qed_mib_read_type type)
  1081. {
  1082. struct qed_dcbx_get *dcbx_info;
  1083. dcbx_info = kmalloc(sizeof(*dcbx_info), GFP_ATOMIC);
  1084. if (!dcbx_info)
  1085. return NULL;
  1086. memset(dcbx_info, 0, sizeof(*dcbx_info));
  1087. if (qed_dcbx_query_params(hwfn, dcbx_info, type)) {
  1088. kfree(dcbx_info);
  1089. return NULL;
  1090. }
  1091. if ((type == QED_DCBX_OPERATIONAL_MIB) &&
  1092. !dcbx_info->operational.enabled) {
  1093. DP_INFO(hwfn, "DCBX is not enabled/operational\n");
  1094. kfree(dcbx_info);
  1095. return NULL;
  1096. }
  1097. return dcbx_info;
  1098. }
  1099. static u8 qed_dcbnl_getstate(struct qed_dev *cdev)
  1100. {
  1101. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1102. struct qed_dcbx_get *dcbx_info;
  1103. bool enabled;
  1104. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1105. if (!dcbx_info)
  1106. return 0;
  1107. enabled = dcbx_info->operational.enabled;
  1108. DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", enabled);
  1109. kfree(dcbx_info);
  1110. return enabled;
  1111. }
  1112. static u8 qed_dcbnl_setstate(struct qed_dev *cdev, u8 state)
  1113. {
  1114. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1115. struct qed_dcbx_set dcbx_set;
  1116. struct qed_ptt *ptt;
  1117. int rc;
  1118. DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", state);
  1119. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1120. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1121. if (rc)
  1122. return 1;
  1123. dcbx_set.enabled = !!state;
  1124. ptt = qed_ptt_acquire(hwfn);
  1125. if (!ptt)
  1126. return 1;
  1127. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
  1128. qed_ptt_release(hwfn, ptt);
  1129. return rc ? 1 : 0;
  1130. }
  1131. static void qed_dcbnl_getpgtccfgtx(struct qed_dev *cdev, int tc, u8 *prio_type,
  1132. u8 *pgid, u8 *bw_pct, u8 *up_map)
  1133. {
  1134. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1135. struct qed_dcbx_get *dcbx_info;
  1136. DP_VERBOSE(hwfn, QED_MSG_DCB, "tc = %d\n", tc);
  1137. *prio_type = *pgid = *bw_pct = *up_map = 0;
  1138. if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) {
  1139. DP_INFO(hwfn, "Invalid tc %d\n", tc);
  1140. return;
  1141. }
  1142. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1143. if (!dcbx_info)
  1144. return;
  1145. *pgid = dcbx_info->operational.params.ets_pri_tc_tbl[tc];
  1146. kfree(dcbx_info);
  1147. }
  1148. static void qed_dcbnl_getpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 *bw_pct)
  1149. {
  1150. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1151. struct qed_dcbx_get *dcbx_info;
  1152. *bw_pct = 0;
  1153. DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d\n", pgid);
  1154. if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) {
  1155. DP_INFO(hwfn, "Invalid pgid %d\n", pgid);
  1156. return;
  1157. }
  1158. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1159. if (!dcbx_info)
  1160. return;
  1161. *bw_pct = dcbx_info->operational.params.ets_tc_bw_tbl[pgid];
  1162. DP_VERBOSE(hwfn, QED_MSG_DCB, "bw_pct = %d\n", *bw_pct);
  1163. kfree(dcbx_info);
  1164. }
  1165. static void qed_dcbnl_getpgtccfgrx(struct qed_dev *cdev, int tc, u8 *prio,
  1166. u8 *bwg_id, u8 *bw_pct, u8 *up_map)
  1167. {
  1168. DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n");
  1169. *prio = *bwg_id = *bw_pct = *up_map = 0;
  1170. }
  1171. static void qed_dcbnl_getpgbwgcfgrx(struct qed_dev *cdev,
  1172. int bwg_id, u8 *bw_pct)
  1173. {
  1174. DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n");
  1175. *bw_pct = 0;
  1176. }
  1177. static void qed_dcbnl_getpfccfg(struct qed_dev *cdev,
  1178. int priority, u8 *setting)
  1179. {
  1180. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1181. struct qed_dcbx_get *dcbx_info;
  1182. DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d\n", priority);
  1183. if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) {
  1184. DP_INFO(hwfn, "Invalid priority %d\n", priority);
  1185. return;
  1186. }
  1187. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1188. if (!dcbx_info)
  1189. return;
  1190. *setting = dcbx_info->operational.params.pfc.prio[priority];
  1191. DP_VERBOSE(hwfn, QED_MSG_DCB, "setting = %d\n", *setting);
  1192. kfree(dcbx_info);
  1193. }
  1194. static void qed_dcbnl_setpfccfg(struct qed_dev *cdev, int priority, u8 setting)
  1195. {
  1196. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1197. struct qed_dcbx_set dcbx_set;
  1198. struct qed_ptt *ptt;
  1199. int rc;
  1200. DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d setting = %d\n",
  1201. priority, setting);
  1202. if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) {
  1203. DP_INFO(hwfn, "Invalid priority %d\n", priority);
  1204. return;
  1205. }
  1206. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1207. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1208. if (rc)
  1209. return;
  1210. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG;
  1211. dcbx_set.config.params.pfc.prio[priority] = !!setting;
  1212. ptt = qed_ptt_acquire(hwfn);
  1213. if (!ptt)
  1214. return;
  1215. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
  1216. qed_ptt_release(hwfn, ptt);
  1217. }
  1218. static u8 qed_dcbnl_getcap(struct qed_dev *cdev, int capid, u8 *cap)
  1219. {
  1220. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1221. struct qed_dcbx_get *dcbx_info;
  1222. int rc = 0;
  1223. DP_VERBOSE(hwfn, QED_MSG_DCB, "capid = %d\n", capid);
  1224. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1225. if (!dcbx_info)
  1226. return 1;
  1227. switch (capid) {
  1228. case DCB_CAP_ATTR_PG:
  1229. case DCB_CAP_ATTR_PFC:
  1230. case DCB_CAP_ATTR_UP2TC:
  1231. case DCB_CAP_ATTR_GSP:
  1232. *cap = true;
  1233. break;
  1234. case DCB_CAP_ATTR_PG_TCS:
  1235. case DCB_CAP_ATTR_PFC_TCS:
  1236. *cap = 0x80;
  1237. break;
  1238. case DCB_CAP_ATTR_DCBX:
  1239. *cap = (DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE |
  1240. DCB_CAP_DCBX_VER_IEEE | DCB_CAP_DCBX_STATIC);
  1241. break;
  1242. default:
  1243. *cap = false;
  1244. rc = 1;
  1245. }
  1246. DP_VERBOSE(hwfn, QED_MSG_DCB, "id = %d caps = %d\n", capid, *cap);
  1247. kfree(dcbx_info);
  1248. return rc;
  1249. }
  1250. static int qed_dcbnl_getnumtcs(struct qed_dev *cdev, int tcid, u8 *num)
  1251. {
  1252. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1253. struct qed_dcbx_get *dcbx_info;
  1254. int rc = 0;
  1255. DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d\n", tcid);
  1256. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1257. if (!dcbx_info)
  1258. return -EINVAL;
  1259. switch (tcid) {
  1260. case DCB_NUMTCS_ATTR_PG:
  1261. *num = dcbx_info->operational.params.max_ets_tc;
  1262. break;
  1263. case DCB_NUMTCS_ATTR_PFC:
  1264. *num = dcbx_info->operational.params.pfc.max_tc;
  1265. break;
  1266. default:
  1267. rc = -EINVAL;
  1268. }
  1269. kfree(dcbx_info);
  1270. DP_VERBOSE(hwfn, QED_MSG_DCB, "numtcs = %d\n", *num);
  1271. return rc;
  1272. }
  1273. static u8 qed_dcbnl_getpfcstate(struct qed_dev *cdev)
  1274. {
  1275. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1276. struct qed_dcbx_get *dcbx_info;
  1277. bool enabled;
  1278. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1279. if (!dcbx_info)
  1280. return 0;
  1281. enabled = dcbx_info->operational.params.pfc.enabled;
  1282. DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d\n", enabled);
  1283. kfree(dcbx_info);
  1284. return enabled;
  1285. }
  1286. static u8 qed_dcbnl_getdcbx(struct qed_dev *cdev)
  1287. {
  1288. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1289. struct qed_dcbx_get *dcbx_info;
  1290. u8 mode = 0;
  1291. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1292. if (!dcbx_info)
  1293. return 0;
  1294. if (dcbx_info->operational.enabled)
  1295. mode |= DCB_CAP_DCBX_LLD_MANAGED;
  1296. if (dcbx_info->operational.ieee)
  1297. mode |= DCB_CAP_DCBX_VER_IEEE;
  1298. if (dcbx_info->operational.cee)
  1299. mode |= DCB_CAP_DCBX_VER_CEE;
  1300. if (dcbx_info->operational.local)
  1301. mode |= DCB_CAP_DCBX_STATIC;
  1302. DP_VERBOSE(hwfn, QED_MSG_DCB, "dcb mode = %d\n", mode);
  1303. kfree(dcbx_info);
  1304. return mode;
  1305. }
  1306. static void qed_dcbnl_setpgtccfgtx(struct qed_dev *cdev,
  1307. int tc,
  1308. u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map)
  1309. {
  1310. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1311. struct qed_dcbx_set dcbx_set;
  1312. struct qed_ptt *ptt;
  1313. int rc;
  1314. DP_VERBOSE(hwfn, QED_MSG_DCB,
  1315. "tc = %d pri_type = %d pgid = %d bw_pct = %d up_map = %d\n",
  1316. tc, pri_type, pgid, bw_pct, up_map);
  1317. if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) {
  1318. DP_INFO(hwfn, "Invalid tc %d\n", tc);
  1319. return;
  1320. }
  1321. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1322. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1323. if (rc)
  1324. return;
  1325. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG;
  1326. dcbx_set.config.params.ets_pri_tc_tbl[tc] = pgid;
  1327. ptt = qed_ptt_acquire(hwfn);
  1328. if (!ptt)
  1329. return;
  1330. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
  1331. qed_ptt_release(hwfn, ptt);
  1332. }
  1333. static void qed_dcbnl_setpgtccfgrx(struct qed_dev *cdev, int prio,
  1334. u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map)
  1335. {
  1336. DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n");
  1337. }
  1338. static void qed_dcbnl_setpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 bw_pct)
  1339. {
  1340. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1341. struct qed_dcbx_set dcbx_set;
  1342. struct qed_ptt *ptt;
  1343. int rc;
  1344. DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d bw_pct = %d\n", pgid, bw_pct);
  1345. if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) {
  1346. DP_INFO(hwfn, "Invalid pgid %d\n", pgid);
  1347. return;
  1348. }
  1349. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1350. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1351. if (rc)
  1352. return;
  1353. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG;
  1354. dcbx_set.config.params.ets_tc_bw_tbl[pgid] = bw_pct;
  1355. ptt = qed_ptt_acquire(hwfn);
  1356. if (!ptt)
  1357. return;
  1358. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
  1359. qed_ptt_release(hwfn, ptt);
  1360. }
  1361. static void qed_dcbnl_setpgbwgcfgrx(struct qed_dev *cdev, int pgid, u8 bw_pct)
  1362. {
  1363. DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n");
  1364. }
  1365. static u8 qed_dcbnl_setall(struct qed_dev *cdev)
  1366. {
  1367. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1368. struct qed_dcbx_set dcbx_set;
  1369. struct qed_ptt *ptt;
  1370. int rc;
  1371. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1372. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1373. if (rc)
  1374. return 1;
  1375. ptt = qed_ptt_acquire(hwfn);
  1376. if (!ptt)
  1377. return 1;
  1378. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 1);
  1379. qed_ptt_release(hwfn, ptt);
  1380. return rc;
  1381. }
  1382. static int qed_dcbnl_setnumtcs(struct qed_dev *cdev, int tcid, u8 num)
  1383. {
  1384. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1385. struct qed_dcbx_set dcbx_set;
  1386. struct qed_ptt *ptt;
  1387. int rc;
  1388. DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d num = %d\n", tcid, num);
  1389. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1390. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1391. if (rc)
  1392. return 1;
  1393. switch (tcid) {
  1394. case DCB_NUMTCS_ATTR_PG:
  1395. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG;
  1396. dcbx_set.config.params.max_ets_tc = num;
  1397. break;
  1398. case DCB_NUMTCS_ATTR_PFC:
  1399. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG;
  1400. dcbx_set.config.params.pfc.max_tc = num;
  1401. break;
  1402. default:
  1403. DP_INFO(hwfn, "Invalid tcid %d\n", tcid);
  1404. return -EINVAL;
  1405. }
  1406. ptt = qed_ptt_acquire(hwfn);
  1407. if (!ptt)
  1408. return -EINVAL;
  1409. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
  1410. qed_ptt_release(hwfn, ptt);
  1411. return 0;
  1412. }
  1413. static void qed_dcbnl_setpfcstate(struct qed_dev *cdev, u8 state)
  1414. {
  1415. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1416. struct qed_dcbx_set dcbx_set;
  1417. struct qed_ptt *ptt;
  1418. int rc;
  1419. DP_VERBOSE(hwfn, QED_MSG_DCB, "new state = %d\n", state);
  1420. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1421. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1422. if (rc)
  1423. return;
  1424. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG;
  1425. dcbx_set.config.params.pfc.enabled = !!state;
  1426. ptt = qed_ptt_acquire(hwfn);
  1427. if (!ptt)
  1428. return;
  1429. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
  1430. qed_ptt_release(hwfn, ptt);
  1431. }
  1432. static int qed_dcbnl_getapp(struct qed_dev *cdev, u8 idtype, u16 idval)
  1433. {
  1434. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1435. struct qed_dcbx_get *dcbx_info;
  1436. struct qed_app_entry *entry;
  1437. bool ethtype;
  1438. u8 prio = 0;
  1439. int i;
  1440. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1441. if (!dcbx_info)
  1442. return -EINVAL;
  1443. ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE);
  1444. for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) {
  1445. entry = &dcbx_info->operational.params.app_entry[i];
  1446. if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) {
  1447. prio = entry->prio;
  1448. break;
  1449. }
  1450. }
  1451. if (i == QED_DCBX_MAX_APP_PROTOCOL) {
  1452. DP_ERR(cdev, "App entry (%d, %d) not found\n", idtype, idval);
  1453. kfree(dcbx_info);
  1454. return -EINVAL;
  1455. }
  1456. kfree(dcbx_info);
  1457. return prio;
  1458. }
  1459. static int qed_dcbnl_setapp(struct qed_dev *cdev,
  1460. u8 idtype, u16 idval, u8 pri_map)
  1461. {
  1462. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1463. struct qed_dcbx_set dcbx_set;
  1464. struct qed_app_entry *entry;
  1465. struct qed_ptt *ptt;
  1466. bool ethtype;
  1467. int rc, i;
  1468. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1469. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1470. if (rc)
  1471. return -EINVAL;
  1472. ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE);
  1473. for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) {
  1474. entry = &dcbx_set.config.params.app_entry[i];
  1475. if ((entry->ethtype == ethtype) && (entry->proto_id == idval))
  1476. break;
  1477. /* First empty slot */
  1478. if (!entry->proto_id) {
  1479. dcbx_set.config.params.num_app_entries++;
  1480. break;
  1481. }
  1482. }
  1483. if (i == QED_DCBX_MAX_APP_PROTOCOL) {
  1484. DP_ERR(cdev, "App table is full\n");
  1485. return -EBUSY;
  1486. }
  1487. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG;
  1488. dcbx_set.config.params.app_entry[i].ethtype = ethtype;
  1489. dcbx_set.config.params.app_entry[i].proto_id = idval;
  1490. dcbx_set.config.params.app_entry[i].prio = pri_map;
  1491. ptt = qed_ptt_acquire(hwfn);
  1492. if (!ptt)
  1493. return -EBUSY;
  1494. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
  1495. qed_ptt_release(hwfn, ptt);
  1496. return rc;
  1497. }
  1498. static u8 qed_dcbnl_setdcbx(struct qed_dev *cdev, u8 mode)
  1499. {
  1500. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1501. struct qed_dcbx_set dcbx_set;
  1502. struct qed_ptt *ptt;
  1503. int rc;
  1504. DP_VERBOSE(hwfn, QED_MSG_DCB, "new mode = %x\n", mode);
  1505. if (!(mode & DCB_CAP_DCBX_VER_IEEE) &&
  1506. !(mode & DCB_CAP_DCBX_VER_CEE) && !(mode & DCB_CAP_DCBX_STATIC)) {
  1507. DP_INFO(hwfn, "Allowed modes are cee, ieee or static\n");
  1508. return 1;
  1509. }
  1510. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1511. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1512. if (rc)
  1513. return 1;
  1514. dcbx_set.ver_num = 0;
  1515. if (mode & DCB_CAP_DCBX_VER_CEE) {
  1516. dcbx_set.ver_num |= DCBX_CONFIG_VERSION_CEE;
  1517. dcbx_set.enabled = true;
  1518. }
  1519. if (mode & DCB_CAP_DCBX_VER_IEEE) {
  1520. dcbx_set.ver_num |= DCBX_CONFIG_VERSION_IEEE;
  1521. dcbx_set.enabled = true;
  1522. }
  1523. if (mode & DCB_CAP_DCBX_STATIC) {
  1524. dcbx_set.ver_num |= DCBX_CONFIG_VERSION_STATIC;
  1525. dcbx_set.enabled = true;
  1526. }
  1527. ptt = qed_ptt_acquire(hwfn);
  1528. if (!ptt)
  1529. return 1;
  1530. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
  1531. qed_ptt_release(hwfn, ptt);
  1532. return rc;
  1533. }
  1534. static u8 qed_dcbnl_getfeatcfg(struct qed_dev *cdev, int featid, u8 *flags)
  1535. {
  1536. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1537. struct qed_dcbx_get *dcbx_info;
  1538. DP_VERBOSE(hwfn, QED_MSG_DCB, "Feature id = %d\n", featid);
  1539. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1540. if (!dcbx_info)
  1541. return 1;
  1542. *flags = 0;
  1543. switch (featid) {
  1544. case DCB_FEATCFG_ATTR_PG:
  1545. if (dcbx_info->operational.params.ets_enabled)
  1546. *flags = DCB_FEATCFG_ENABLE;
  1547. else
  1548. *flags = DCB_FEATCFG_ERROR;
  1549. break;
  1550. case DCB_FEATCFG_ATTR_PFC:
  1551. if (dcbx_info->operational.params.pfc.enabled)
  1552. *flags = DCB_FEATCFG_ENABLE;
  1553. else
  1554. *flags = DCB_FEATCFG_ERROR;
  1555. break;
  1556. case DCB_FEATCFG_ATTR_APP:
  1557. if (dcbx_info->operational.params.app_valid)
  1558. *flags = DCB_FEATCFG_ENABLE;
  1559. else
  1560. *flags = DCB_FEATCFG_ERROR;
  1561. break;
  1562. default:
  1563. DP_INFO(hwfn, "Invalid feature-ID %d\n", featid);
  1564. kfree(dcbx_info);
  1565. return 1;
  1566. }
  1567. DP_VERBOSE(hwfn, QED_MSG_DCB, "flags = %d\n", *flags);
  1568. kfree(dcbx_info);
  1569. return 0;
  1570. }
  1571. static u8 qed_dcbnl_setfeatcfg(struct qed_dev *cdev, int featid, u8 flags)
  1572. {
  1573. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1574. struct qed_dcbx_set dcbx_set;
  1575. bool enabled, willing;
  1576. struct qed_ptt *ptt;
  1577. int rc;
  1578. DP_VERBOSE(hwfn, QED_MSG_DCB, "featid = %d flags = %d\n",
  1579. featid, flags);
  1580. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1581. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1582. if (rc)
  1583. return 1;
  1584. enabled = !!(flags & DCB_FEATCFG_ENABLE);
  1585. willing = !!(flags & DCB_FEATCFG_WILLING);
  1586. switch (featid) {
  1587. case DCB_FEATCFG_ATTR_PG:
  1588. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG;
  1589. dcbx_set.config.params.ets_enabled = enabled;
  1590. dcbx_set.config.params.ets_willing = willing;
  1591. break;
  1592. case DCB_FEATCFG_ATTR_PFC:
  1593. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG;
  1594. dcbx_set.config.params.pfc.enabled = enabled;
  1595. dcbx_set.config.params.pfc.willing = willing;
  1596. break;
  1597. case DCB_FEATCFG_ATTR_APP:
  1598. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG;
  1599. dcbx_set.config.params.app_willing = willing;
  1600. break;
  1601. default:
  1602. DP_INFO(hwfn, "Invalid feature-ID %d\n", featid);
  1603. return 1;
  1604. }
  1605. ptt = qed_ptt_acquire(hwfn);
  1606. if (!ptt)
  1607. return 1;
  1608. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
  1609. qed_ptt_release(hwfn, ptt);
  1610. return 0;
  1611. }
  1612. static int qed_dcbnl_peer_getappinfo(struct qed_dev *cdev,
  1613. struct dcb_peer_app_info *info,
  1614. u16 *app_count)
  1615. {
  1616. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1617. struct qed_dcbx_get *dcbx_info;
  1618. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB);
  1619. if (!dcbx_info)
  1620. return -EINVAL;
  1621. info->willing = dcbx_info->remote.params.app_willing;
  1622. info->error = dcbx_info->remote.params.app_error;
  1623. *app_count = dcbx_info->remote.params.num_app_entries;
  1624. kfree(dcbx_info);
  1625. return 0;
  1626. }
  1627. static int qed_dcbnl_peer_getapptable(struct qed_dev *cdev,
  1628. struct dcb_app *table)
  1629. {
  1630. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1631. struct qed_dcbx_get *dcbx_info;
  1632. int i;
  1633. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB);
  1634. if (!dcbx_info)
  1635. return -EINVAL;
  1636. for (i = 0; i < dcbx_info->remote.params.num_app_entries; i++) {
  1637. if (dcbx_info->remote.params.app_entry[i].ethtype)
  1638. table[i].selector = DCB_APP_IDTYPE_ETHTYPE;
  1639. else
  1640. table[i].selector = DCB_APP_IDTYPE_PORTNUM;
  1641. table[i].priority = dcbx_info->remote.params.app_entry[i].prio;
  1642. table[i].protocol =
  1643. dcbx_info->remote.params.app_entry[i].proto_id;
  1644. }
  1645. kfree(dcbx_info);
  1646. return 0;
  1647. }
  1648. static int qed_dcbnl_cee_peer_getpfc(struct qed_dev *cdev, struct cee_pfc *pfc)
  1649. {
  1650. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1651. struct qed_dcbx_get *dcbx_info;
  1652. int i;
  1653. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB);
  1654. if (!dcbx_info)
  1655. return -EINVAL;
  1656. for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++)
  1657. if (dcbx_info->remote.params.pfc.prio[i])
  1658. pfc->pfc_en |= BIT(i);
  1659. pfc->tcs_supported = dcbx_info->remote.params.pfc.max_tc;
  1660. DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d tcs_supported = %d\n",
  1661. pfc->pfc_en, pfc->tcs_supported);
  1662. kfree(dcbx_info);
  1663. return 0;
  1664. }
  1665. static int qed_dcbnl_cee_peer_getpg(struct qed_dev *cdev, struct cee_pg *pg)
  1666. {
  1667. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1668. struct qed_dcbx_get *dcbx_info;
  1669. int i;
  1670. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB);
  1671. if (!dcbx_info)
  1672. return -EINVAL;
  1673. pg->willing = dcbx_info->remote.params.ets_willing;
  1674. for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) {
  1675. pg->pg_bw[i] = dcbx_info->remote.params.ets_tc_bw_tbl[i];
  1676. pg->prio_pg[i] = dcbx_info->remote.params.ets_pri_tc_tbl[i];
  1677. }
  1678. DP_VERBOSE(hwfn, QED_MSG_DCB, "willing = %d", pg->willing);
  1679. kfree(dcbx_info);
  1680. return 0;
  1681. }
  1682. static int qed_dcbnl_get_ieee_pfc(struct qed_dev *cdev,
  1683. struct ieee_pfc *pfc, bool remote)
  1684. {
  1685. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1686. struct qed_dcbx_params *params;
  1687. struct qed_dcbx_get *dcbx_info;
  1688. int rc, i;
  1689. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1690. if (!dcbx_info)
  1691. return -EINVAL;
  1692. if (!dcbx_info->operational.ieee) {
  1693. DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n");
  1694. kfree(dcbx_info);
  1695. return -EINVAL;
  1696. }
  1697. if (remote) {
  1698. memset(dcbx_info, 0, sizeof(*dcbx_info));
  1699. rc = qed_dcbx_query_params(hwfn, dcbx_info,
  1700. QED_DCBX_REMOTE_MIB);
  1701. if (rc) {
  1702. kfree(dcbx_info);
  1703. return -EINVAL;
  1704. }
  1705. params = &dcbx_info->remote.params;
  1706. } else {
  1707. params = &dcbx_info->operational.params;
  1708. }
  1709. pfc->pfc_cap = params->pfc.max_tc;
  1710. pfc->pfc_en = 0;
  1711. for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++)
  1712. if (params->pfc.prio[i])
  1713. pfc->pfc_en |= BIT(i);
  1714. kfree(dcbx_info);
  1715. return 0;
  1716. }
  1717. static int qed_dcbnl_ieee_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc)
  1718. {
  1719. return qed_dcbnl_get_ieee_pfc(cdev, pfc, false);
  1720. }
  1721. static int qed_dcbnl_ieee_setpfc(struct qed_dev *cdev, struct ieee_pfc *pfc)
  1722. {
  1723. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1724. struct qed_dcbx_get *dcbx_info;
  1725. struct qed_dcbx_set dcbx_set;
  1726. struct qed_ptt *ptt;
  1727. int rc, i;
  1728. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1729. if (!dcbx_info)
  1730. return -EINVAL;
  1731. if (!dcbx_info->operational.ieee) {
  1732. DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n");
  1733. kfree(dcbx_info);
  1734. return -EINVAL;
  1735. }
  1736. kfree(dcbx_info);
  1737. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1738. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1739. if (rc)
  1740. return -EINVAL;
  1741. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG;
  1742. for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++)
  1743. dcbx_set.config.params.pfc.prio[i] = !!(pfc->pfc_en & BIT(i));
  1744. dcbx_set.config.params.pfc.max_tc = pfc->pfc_cap;
  1745. ptt = qed_ptt_acquire(hwfn);
  1746. if (!ptt)
  1747. return -EINVAL;
  1748. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
  1749. qed_ptt_release(hwfn, ptt);
  1750. return rc;
  1751. }
  1752. static int qed_dcbnl_get_ieee_ets(struct qed_dev *cdev,
  1753. struct ieee_ets *ets, bool remote)
  1754. {
  1755. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1756. struct qed_dcbx_get *dcbx_info;
  1757. struct qed_dcbx_params *params;
  1758. int rc;
  1759. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1760. if (!dcbx_info)
  1761. return -EINVAL;
  1762. if (!dcbx_info->operational.ieee) {
  1763. DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n");
  1764. kfree(dcbx_info);
  1765. return -EINVAL;
  1766. }
  1767. if (remote) {
  1768. memset(dcbx_info, 0, sizeof(*dcbx_info));
  1769. rc = qed_dcbx_query_params(hwfn, dcbx_info,
  1770. QED_DCBX_REMOTE_MIB);
  1771. if (rc) {
  1772. kfree(dcbx_info);
  1773. return -EINVAL;
  1774. }
  1775. params = &dcbx_info->remote.params;
  1776. } else {
  1777. params = &dcbx_info->operational.params;
  1778. }
  1779. ets->ets_cap = params->max_ets_tc;
  1780. ets->willing = params->ets_willing;
  1781. ets->cbs = params->ets_cbs;
  1782. memcpy(ets->tc_tx_bw, params->ets_tc_bw_tbl, sizeof(ets->tc_tx_bw));
  1783. memcpy(ets->tc_tsa, params->ets_tc_tsa_tbl, sizeof(ets->tc_tsa));
  1784. memcpy(ets->prio_tc, params->ets_pri_tc_tbl, sizeof(ets->prio_tc));
  1785. kfree(dcbx_info);
  1786. return 0;
  1787. }
  1788. static int qed_dcbnl_ieee_getets(struct qed_dev *cdev, struct ieee_ets *ets)
  1789. {
  1790. return qed_dcbnl_get_ieee_ets(cdev, ets, false);
  1791. }
  1792. static int qed_dcbnl_ieee_setets(struct qed_dev *cdev, struct ieee_ets *ets)
  1793. {
  1794. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1795. struct qed_dcbx_get *dcbx_info;
  1796. struct qed_dcbx_set dcbx_set;
  1797. struct qed_ptt *ptt;
  1798. int rc;
  1799. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1800. if (!dcbx_info)
  1801. return -EINVAL;
  1802. if (!dcbx_info->operational.ieee) {
  1803. DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n");
  1804. kfree(dcbx_info);
  1805. return -EINVAL;
  1806. }
  1807. kfree(dcbx_info);
  1808. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1809. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1810. if (rc)
  1811. return -EINVAL;
  1812. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG;
  1813. dcbx_set.config.params.max_ets_tc = ets->ets_cap;
  1814. dcbx_set.config.params.ets_willing = ets->willing;
  1815. dcbx_set.config.params.ets_cbs = ets->cbs;
  1816. memcpy(dcbx_set.config.params.ets_tc_bw_tbl, ets->tc_tx_bw,
  1817. sizeof(ets->tc_tx_bw));
  1818. memcpy(dcbx_set.config.params.ets_tc_tsa_tbl, ets->tc_tsa,
  1819. sizeof(ets->tc_tsa));
  1820. memcpy(dcbx_set.config.params.ets_pri_tc_tbl, ets->prio_tc,
  1821. sizeof(ets->prio_tc));
  1822. ptt = qed_ptt_acquire(hwfn);
  1823. if (!ptt)
  1824. return -EINVAL;
  1825. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
  1826. qed_ptt_release(hwfn, ptt);
  1827. return rc;
  1828. }
  1829. static int
  1830. qed_dcbnl_ieee_peer_getets(struct qed_dev *cdev, struct ieee_ets *ets)
  1831. {
  1832. return qed_dcbnl_get_ieee_ets(cdev, ets, true);
  1833. }
  1834. static int
  1835. qed_dcbnl_ieee_peer_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc)
  1836. {
  1837. return qed_dcbnl_get_ieee_pfc(cdev, pfc, true);
  1838. }
  1839. static int qed_get_sf_ieee_value(u8 selector, u8 *sf_ieee)
  1840. {
  1841. switch (selector) {
  1842. case IEEE_8021QAZ_APP_SEL_ETHERTYPE:
  1843. *sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE;
  1844. break;
  1845. case IEEE_8021QAZ_APP_SEL_STREAM:
  1846. *sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT;
  1847. break;
  1848. case IEEE_8021QAZ_APP_SEL_DGRAM:
  1849. *sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT;
  1850. break;
  1851. case IEEE_8021QAZ_APP_SEL_ANY:
  1852. *sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT;
  1853. break;
  1854. default:
  1855. return -EINVAL;
  1856. }
  1857. return 0;
  1858. }
  1859. static int qed_dcbnl_ieee_getapp(struct qed_dev *cdev, struct dcb_app *app)
  1860. {
  1861. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1862. struct qed_dcbx_get *dcbx_info;
  1863. struct qed_app_entry *entry;
  1864. u8 prio = 0;
  1865. u8 sf_ieee;
  1866. int i;
  1867. DP_VERBOSE(hwfn, QED_MSG_DCB, "selector = %d protocol = %d\n",
  1868. app->selector, app->protocol);
  1869. if (qed_get_sf_ieee_value(app->selector, &sf_ieee)) {
  1870. DP_INFO(cdev, "Invalid selector field value %d\n",
  1871. app->selector);
  1872. return -EINVAL;
  1873. }
  1874. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1875. if (!dcbx_info)
  1876. return -EINVAL;
  1877. if (!dcbx_info->operational.ieee) {
  1878. DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n");
  1879. kfree(dcbx_info);
  1880. return -EINVAL;
  1881. }
  1882. for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) {
  1883. entry = &dcbx_info->operational.params.app_entry[i];
  1884. if ((entry->sf_ieee == sf_ieee) &&
  1885. (entry->proto_id == app->protocol)) {
  1886. prio = entry->prio;
  1887. break;
  1888. }
  1889. }
  1890. if (i == QED_DCBX_MAX_APP_PROTOCOL) {
  1891. DP_ERR(cdev, "App entry (%d, %d) not found\n", app->selector,
  1892. app->protocol);
  1893. kfree(dcbx_info);
  1894. return -EINVAL;
  1895. }
  1896. app->priority = ffs(prio) - 1;
  1897. kfree(dcbx_info);
  1898. return 0;
  1899. }
  1900. static int qed_dcbnl_ieee_setapp(struct qed_dev *cdev, struct dcb_app *app)
  1901. {
  1902. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1903. struct qed_dcbx_get *dcbx_info;
  1904. struct qed_dcbx_set dcbx_set;
  1905. struct qed_app_entry *entry;
  1906. struct qed_ptt *ptt;
  1907. u8 sf_ieee;
  1908. int rc, i;
  1909. DP_VERBOSE(hwfn, QED_MSG_DCB, "selector = %d protocol = %d pri = %d\n",
  1910. app->selector, app->protocol, app->priority);
  1911. if (app->priority >= QED_MAX_PFC_PRIORITIES) {
  1912. DP_INFO(hwfn, "Invalid priority %d\n", app->priority);
  1913. return -EINVAL;
  1914. }
  1915. if (qed_get_sf_ieee_value(app->selector, &sf_ieee)) {
  1916. DP_INFO(cdev, "Invalid selector field value %d\n",
  1917. app->selector);
  1918. return -EINVAL;
  1919. }
  1920. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1921. if (!dcbx_info)
  1922. return -EINVAL;
  1923. if (!dcbx_info->operational.ieee) {
  1924. DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n");
  1925. kfree(dcbx_info);
  1926. return -EINVAL;
  1927. }
  1928. kfree(dcbx_info);
  1929. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1930. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1931. if (rc)
  1932. return -EINVAL;
  1933. for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) {
  1934. entry = &dcbx_set.config.params.app_entry[i];
  1935. if ((entry->sf_ieee == sf_ieee) &&
  1936. (entry->proto_id == app->protocol))
  1937. break;
  1938. /* First empty slot */
  1939. if (!entry->proto_id) {
  1940. dcbx_set.config.params.num_app_entries++;
  1941. break;
  1942. }
  1943. }
  1944. if (i == QED_DCBX_MAX_APP_PROTOCOL) {
  1945. DP_ERR(cdev, "App table is full\n");
  1946. return -EBUSY;
  1947. }
  1948. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG;
  1949. dcbx_set.config.params.app_entry[i].sf_ieee = sf_ieee;
  1950. dcbx_set.config.params.app_entry[i].proto_id = app->protocol;
  1951. dcbx_set.config.params.app_entry[i].prio = BIT(app->priority);
  1952. ptt = qed_ptt_acquire(hwfn);
  1953. if (!ptt)
  1954. return -EBUSY;
  1955. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
  1956. qed_ptt_release(hwfn, ptt);
  1957. return rc;
  1958. }
  1959. const struct qed_eth_dcbnl_ops qed_dcbnl_ops_pass = {
  1960. .getstate = qed_dcbnl_getstate,
  1961. .setstate = qed_dcbnl_setstate,
  1962. .getpgtccfgtx = qed_dcbnl_getpgtccfgtx,
  1963. .getpgbwgcfgtx = qed_dcbnl_getpgbwgcfgtx,
  1964. .getpgtccfgrx = qed_dcbnl_getpgtccfgrx,
  1965. .getpgbwgcfgrx = qed_dcbnl_getpgbwgcfgrx,
  1966. .getpfccfg = qed_dcbnl_getpfccfg,
  1967. .setpfccfg = qed_dcbnl_setpfccfg,
  1968. .getcap = qed_dcbnl_getcap,
  1969. .getnumtcs = qed_dcbnl_getnumtcs,
  1970. .getpfcstate = qed_dcbnl_getpfcstate,
  1971. .getdcbx = qed_dcbnl_getdcbx,
  1972. .setpgtccfgtx = qed_dcbnl_setpgtccfgtx,
  1973. .setpgtccfgrx = qed_dcbnl_setpgtccfgrx,
  1974. .setpgbwgcfgtx = qed_dcbnl_setpgbwgcfgtx,
  1975. .setpgbwgcfgrx = qed_dcbnl_setpgbwgcfgrx,
  1976. .setall = qed_dcbnl_setall,
  1977. .setnumtcs = qed_dcbnl_setnumtcs,
  1978. .setpfcstate = qed_dcbnl_setpfcstate,
  1979. .setapp = qed_dcbnl_setapp,
  1980. .setdcbx = qed_dcbnl_setdcbx,
  1981. .setfeatcfg = qed_dcbnl_setfeatcfg,
  1982. .getfeatcfg = qed_dcbnl_getfeatcfg,
  1983. .getapp = qed_dcbnl_getapp,
  1984. .peer_getappinfo = qed_dcbnl_peer_getappinfo,
  1985. .peer_getapptable = qed_dcbnl_peer_getapptable,
  1986. .cee_peer_getpfc = qed_dcbnl_cee_peer_getpfc,
  1987. .cee_peer_getpg = qed_dcbnl_cee_peer_getpg,
  1988. .ieee_getpfc = qed_dcbnl_ieee_getpfc,
  1989. .ieee_setpfc = qed_dcbnl_ieee_setpfc,
  1990. .ieee_getets = qed_dcbnl_ieee_getets,
  1991. .ieee_setets = qed_dcbnl_ieee_setets,
  1992. .ieee_peer_getpfc = qed_dcbnl_ieee_peer_getpfc,
  1993. .ieee_peer_getets = qed_dcbnl_ieee_peer_getets,
  1994. .ieee_getapp = qed_dcbnl_ieee_getapp,
  1995. .ieee_setapp = qed_dcbnl_ieee_setapp,
  1996. };
  1997. #endif