intel.c 24 KB

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  1. /*
  2. * Intel CPU Microcode Update Driver for Linux
  3. *
  4. * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
  5. * 2006 Shaohua Li <shaohua.li@intel.com>
  6. *
  7. * Intel CPU microcode early update for Linux
  8. *
  9. * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
  10. * H Peter Anvin" <hpa@zytor.com>
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License
  14. * as published by the Free Software Foundation; either version
  15. * 2 of the License, or (at your option) any later version.
  16. */
  17. /*
  18. * This needs to be before all headers so that pr_debug in printk.h doesn't turn
  19. * printk calls into no_printk().
  20. *
  21. *#define DEBUG
  22. */
  23. #define pr_fmt(fmt) "microcode: " fmt
  24. #include <linux/earlycpio.h>
  25. #include <linux/firmware.h>
  26. #include <linux/uaccess.h>
  27. #include <linux/vmalloc.h>
  28. #include <linux/initrd.h>
  29. #include <linux/kernel.h>
  30. #include <linux/slab.h>
  31. #include <linux/cpu.h>
  32. #include <linux/mm.h>
  33. #include <asm/microcode_intel.h>
  34. #include <asm/processor.h>
  35. #include <asm/tlbflush.h>
  36. #include <asm/setup.h>
  37. #include <asm/msr.h>
  38. /*
  39. * Temporary microcode blobs pointers storage. We note here the pointers to
  40. * microcode blobs we've got from whatever storage (detached initrd, builtin).
  41. * Later on, we put those into final storage mc_saved_data.mc_saved.
  42. */
  43. static unsigned long mc_tmp_ptrs[MAX_UCODE_COUNT];
  44. static struct mc_saved_data {
  45. unsigned int num_saved;
  46. struct microcode_intel **mc_saved;
  47. } mc_saved_data;
  48. static enum ucode_state
  49. load_microcode_early(struct microcode_intel **saved,
  50. unsigned int num_saved, struct ucode_cpu_info *uci)
  51. {
  52. struct microcode_intel *ucode_ptr, *new_mc = NULL;
  53. struct microcode_header_intel *mc_hdr;
  54. int new_rev, ret, i;
  55. new_rev = uci->cpu_sig.rev;
  56. for (i = 0; i < num_saved; i++) {
  57. ucode_ptr = saved[i];
  58. mc_hdr = (struct microcode_header_intel *)ucode_ptr;
  59. ret = has_newer_microcode(ucode_ptr,
  60. uci->cpu_sig.sig,
  61. uci->cpu_sig.pf,
  62. new_rev);
  63. if (!ret)
  64. continue;
  65. new_rev = mc_hdr->rev;
  66. new_mc = ucode_ptr;
  67. }
  68. if (!new_mc)
  69. return UCODE_NFOUND;
  70. uci->mc = (struct microcode_intel *)new_mc;
  71. return UCODE_OK;
  72. }
  73. static inline void
  74. copy_ptrs(struct microcode_intel **mc_saved, unsigned long *mc_ptrs,
  75. unsigned long off, int num_saved)
  76. {
  77. int i;
  78. for (i = 0; i < num_saved; i++)
  79. mc_saved[i] = (struct microcode_intel *)(mc_ptrs[i] + off);
  80. }
  81. #ifdef CONFIG_X86_32
  82. static void
  83. microcode_phys(struct microcode_intel **mc_saved_tmp, struct mc_saved_data *mcs)
  84. {
  85. int i;
  86. struct microcode_intel ***mc_saved;
  87. mc_saved = (struct microcode_intel ***)__pa_nodebug(&mcs->mc_saved);
  88. for (i = 0; i < mcs->num_saved; i++) {
  89. struct microcode_intel *p;
  90. p = *(struct microcode_intel **)__pa_nodebug(mcs->mc_saved + i);
  91. mc_saved_tmp[i] = (struct microcode_intel *)__pa_nodebug(p);
  92. }
  93. }
  94. #endif
  95. static enum ucode_state
  96. load_microcode(struct mc_saved_data *mcs, unsigned long *mc_ptrs,
  97. unsigned long offset, struct ucode_cpu_info *uci)
  98. {
  99. struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
  100. unsigned int count = mcs->num_saved;
  101. if (!mcs->mc_saved) {
  102. copy_ptrs(mc_saved_tmp, mc_ptrs, offset, count);
  103. return load_microcode_early(mc_saved_tmp, count, uci);
  104. } else {
  105. #ifdef CONFIG_X86_32
  106. microcode_phys(mc_saved_tmp, mcs);
  107. return load_microcode_early(mc_saved_tmp, count, uci);
  108. #else
  109. return load_microcode_early(mcs->mc_saved, count, uci);
  110. #endif
  111. }
  112. }
  113. /*
  114. * Given CPU signature and a microcode patch, this function finds if the
  115. * microcode patch has matching family and model with the CPU.
  116. */
  117. static enum ucode_state
  118. matching_model_microcode(struct microcode_header_intel *mc_header,
  119. unsigned long sig)
  120. {
  121. unsigned int fam, model;
  122. unsigned int fam_ucode, model_ucode;
  123. struct extended_sigtable *ext_header;
  124. unsigned long total_size = get_totalsize(mc_header);
  125. unsigned long data_size = get_datasize(mc_header);
  126. int ext_sigcount, i;
  127. struct extended_signature *ext_sig;
  128. fam = x86_family(sig);
  129. model = x86_model(sig);
  130. fam_ucode = x86_family(mc_header->sig);
  131. model_ucode = x86_model(mc_header->sig);
  132. if (fam == fam_ucode && model == model_ucode)
  133. return UCODE_OK;
  134. /* Look for ext. headers: */
  135. if (total_size <= data_size + MC_HEADER_SIZE)
  136. return UCODE_NFOUND;
  137. ext_header = (void *) mc_header + data_size + MC_HEADER_SIZE;
  138. ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
  139. ext_sigcount = ext_header->count;
  140. for (i = 0; i < ext_sigcount; i++) {
  141. fam_ucode = x86_family(ext_sig->sig);
  142. model_ucode = x86_model(ext_sig->sig);
  143. if (fam == fam_ucode && model == model_ucode)
  144. return UCODE_OK;
  145. ext_sig++;
  146. }
  147. return UCODE_NFOUND;
  148. }
  149. static int
  150. save_microcode(struct mc_saved_data *mcs,
  151. struct microcode_intel **mc_saved_src,
  152. unsigned int num_saved)
  153. {
  154. int i, j;
  155. struct microcode_intel **saved_ptr;
  156. int ret;
  157. if (!num_saved)
  158. return -EINVAL;
  159. /*
  160. * Copy new microcode data.
  161. */
  162. saved_ptr = kcalloc(num_saved, sizeof(struct microcode_intel *), GFP_KERNEL);
  163. if (!saved_ptr)
  164. return -ENOMEM;
  165. for (i = 0; i < num_saved; i++) {
  166. struct microcode_header_intel *mc_hdr;
  167. struct microcode_intel *mc;
  168. unsigned long size;
  169. if (!mc_saved_src[i]) {
  170. ret = -EINVAL;
  171. goto err;
  172. }
  173. mc = mc_saved_src[i];
  174. mc_hdr = &mc->hdr;
  175. size = get_totalsize(mc_hdr);
  176. saved_ptr[i] = kmemdup(mc, size, GFP_KERNEL);
  177. if (!saved_ptr[i]) {
  178. ret = -ENOMEM;
  179. goto err;
  180. }
  181. }
  182. /*
  183. * Point to newly saved microcode.
  184. */
  185. mcs->mc_saved = saved_ptr;
  186. mcs->num_saved = num_saved;
  187. return 0;
  188. err:
  189. for (j = 0; j <= i; j++)
  190. kfree(saved_ptr[j]);
  191. kfree(saved_ptr);
  192. return ret;
  193. }
  194. /*
  195. * A microcode patch in ucode_ptr is saved into mc_saved
  196. * - if it has matching signature and newer revision compared to an existing
  197. * patch mc_saved.
  198. * - or if it is a newly discovered microcode patch.
  199. *
  200. * The microcode patch should have matching model with CPU.
  201. *
  202. * Returns: The updated number @num_saved of saved microcode patches.
  203. */
  204. static unsigned int _save_mc(struct microcode_intel **mc_saved,
  205. u8 *ucode_ptr, unsigned int num_saved)
  206. {
  207. struct microcode_header_intel *mc_hdr, *mc_saved_hdr;
  208. unsigned int sig, pf;
  209. int found = 0, i;
  210. mc_hdr = (struct microcode_header_intel *)ucode_ptr;
  211. for (i = 0; i < num_saved; i++) {
  212. mc_saved_hdr = (struct microcode_header_intel *)mc_saved[i];
  213. sig = mc_saved_hdr->sig;
  214. pf = mc_saved_hdr->pf;
  215. if (!find_matching_signature(ucode_ptr, sig, pf))
  216. continue;
  217. found = 1;
  218. if (mc_hdr->rev <= mc_saved_hdr->rev)
  219. continue;
  220. /*
  221. * Found an older ucode saved earlier. Replace it with
  222. * this newer one.
  223. */
  224. mc_saved[i] = (struct microcode_intel *)ucode_ptr;
  225. break;
  226. }
  227. /* Newly detected microcode, save it to memory. */
  228. if (i >= num_saved && !found)
  229. mc_saved[num_saved++] = (struct microcode_intel *)ucode_ptr;
  230. return num_saved;
  231. }
  232. /*
  233. * Get microcode matching with BSP's model. Only CPUs with the same model as
  234. * BSP can stay in the platform.
  235. */
  236. static enum ucode_state __init
  237. get_matching_model_microcode(unsigned long start, void *data, size_t size,
  238. struct mc_saved_data *mcs, unsigned long *mc_ptrs,
  239. struct ucode_cpu_info *uci)
  240. {
  241. struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
  242. struct microcode_header_intel *mc_header;
  243. unsigned int num_saved = mcs->num_saved;
  244. enum ucode_state state = UCODE_OK;
  245. unsigned int leftover = size;
  246. u8 *ucode_ptr = data;
  247. unsigned int mc_size;
  248. int i;
  249. while (leftover && num_saved < ARRAY_SIZE(mc_saved_tmp)) {
  250. if (leftover < sizeof(mc_header))
  251. break;
  252. mc_header = (struct microcode_header_intel *)ucode_ptr;
  253. mc_size = get_totalsize(mc_header);
  254. if (!mc_size || mc_size > leftover ||
  255. microcode_sanity_check(ucode_ptr, 0) < 0)
  256. break;
  257. leftover -= mc_size;
  258. /*
  259. * Since APs with same family and model as the BSP may boot in
  260. * the platform, we need to find and save microcode patches
  261. * with the same family and model as the BSP.
  262. */
  263. if (matching_model_microcode(mc_header, uci->cpu_sig.sig) != UCODE_OK) {
  264. ucode_ptr += mc_size;
  265. continue;
  266. }
  267. num_saved = _save_mc(mc_saved_tmp, ucode_ptr, num_saved);
  268. ucode_ptr += mc_size;
  269. }
  270. if (leftover) {
  271. state = UCODE_ERROR;
  272. return state;
  273. }
  274. if (!num_saved) {
  275. state = UCODE_NFOUND;
  276. return state;
  277. }
  278. for (i = 0; i < num_saved; i++)
  279. mc_ptrs[i] = (unsigned long)mc_saved_tmp[i] - start;
  280. mcs->num_saved = num_saved;
  281. return state;
  282. }
  283. static int collect_cpu_info_early(struct ucode_cpu_info *uci)
  284. {
  285. unsigned int val[2];
  286. unsigned int family, model;
  287. struct cpu_signature csig;
  288. unsigned int eax, ebx, ecx, edx;
  289. csig.sig = 0;
  290. csig.pf = 0;
  291. csig.rev = 0;
  292. memset(uci, 0, sizeof(*uci));
  293. eax = 0x00000001;
  294. ecx = 0;
  295. native_cpuid(&eax, &ebx, &ecx, &edx);
  296. csig.sig = eax;
  297. family = x86_family(csig.sig);
  298. model = x86_model(csig.sig);
  299. if ((model >= 5) || (family > 6)) {
  300. /* get processor flags from MSR 0x17 */
  301. native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
  302. csig.pf = 1 << ((val[1] >> 18) & 7);
  303. }
  304. native_wrmsrl(MSR_IA32_UCODE_REV, 0);
  305. /* As documented in the SDM: Do a CPUID 1 here */
  306. sync_core();
  307. /* get the current revision from MSR 0x8B */
  308. native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
  309. csig.rev = val[1];
  310. uci->cpu_sig = csig;
  311. uci->valid = 1;
  312. return 0;
  313. }
  314. static void show_saved_mc(void)
  315. {
  316. #ifdef DEBUG
  317. int i, j;
  318. unsigned int sig, pf, rev, total_size, data_size, date;
  319. struct ucode_cpu_info uci;
  320. if (!mc_saved_data.num_saved) {
  321. pr_debug("no microcode data saved.\n");
  322. return;
  323. }
  324. pr_debug("Total microcode saved: %d\n", mc_saved_data.num_saved);
  325. collect_cpu_info_early(&uci);
  326. sig = uci.cpu_sig.sig;
  327. pf = uci.cpu_sig.pf;
  328. rev = uci.cpu_sig.rev;
  329. pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev);
  330. for (i = 0; i < mc_saved_data.num_saved; i++) {
  331. struct microcode_header_intel *mc_saved_header;
  332. struct extended_sigtable *ext_header;
  333. int ext_sigcount;
  334. struct extended_signature *ext_sig;
  335. mc_saved_header = (struct microcode_header_intel *)
  336. mc_saved_data.mc_saved[i];
  337. sig = mc_saved_header->sig;
  338. pf = mc_saved_header->pf;
  339. rev = mc_saved_header->rev;
  340. total_size = get_totalsize(mc_saved_header);
  341. data_size = get_datasize(mc_saved_header);
  342. date = mc_saved_header->date;
  343. pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, total size=0x%x, date = %04x-%02x-%02x\n",
  344. i, sig, pf, rev, total_size,
  345. date & 0xffff,
  346. date >> 24,
  347. (date >> 16) & 0xff);
  348. /* Look for ext. headers: */
  349. if (total_size <= data_size + MC_HEADER_SIZE)
  350. continue;
  351. ext_header = (void *) mc_saved_header + data_size + MC_HEADER_SIZE;
  352. ext_sigcount = ext_header->count;
  353. ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
  354. for (j = 0; j < ext_sigcount; j++) {
  355. sig = ext_sig->sig;
  356. pf = ext_sig->pf;
  357. pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n",
  358. j, sig, pf);
  359. ext_sig++;
  360. }
  361. }
  362. #endif
  363. }
  364. #ifdef CONFIG_HOTPLUG_CPU
  365. static DEFINE_MUTEX(x86_cpu_microcode_mutex);
  366. /*
  367. * Save this mc into mc_saved_data. So it will be loaded early when a CPU is
  368. * hot added or resumes.
  369. *
  370. * Please make sure this mc should be a valid microcode patch before calling
  371. * this function.
  372. */
  373. int save_mc_for_early(u8 *mc)
  374. {
  375. struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
  376. unsigned int mc_saved_count_init;
  377. unsigned int num_saved;
  378. struct microcode_intel **mc_saved;
  379. int ret = 0;
  380. int i;
  381. /*
  382. * Hold hotplug lock so mc_saved_data is not accessed by a CPU in
  383. * hotplug.
  384. */
  385. mutex_lock(&x86_cpu_microcode_mutex);
  386. mc_saved_count_init = mc_saved_data.num_saved;
  387. num_saved = mc_saved_data.num_saved;
  388. mc_saved = mc_saved_data.mc_saved;
  389. if (mc_saved && num_saved)
  390. memcpy(mc_saved_tmp, mc_saved,
  391. num_saved * sizeof(struct microcode_intel *));
  392. /*
  393. * Save the microcode patch mc in mc_save_tmp structure if it's a newer
  394. * version.
  395. */
  396. num_saved = _save_mc(mc_saved_tmp, mc, num_saved);
  397. /*
  398. * Save the mc_save_tmp in global mc_saved_data.
  399. */
  400. ret = save_microcode(&mc_saved_data, mc_saved_tmp, num_saved);
  401. if (ret) {
  402. pr_err("Cannot save microcode patch.\n");
  403. goto out;
  404. }
  405. show_saved_mc();
  406. /*
  407. * Free old saved microcode data.
  408. */
  409. if (mc_saved) {
  410. for (i = 0; i < mc_saved_count_init; i++)
  411. kfree(mc_saved[i]);
  412. kfree(mc_saved);
  413. }
  414. out:
  415. mutex_unlock(&x86_cpu_microcode_mutex);
  416. return ret;
  417. }
  418. EXPORT_SYMBOL_GPL(save_mc_for_early);
  419. #endif
  420. static bool __init load_builtin_intel_microcode(struct cpio_data *cp)
  421. {
  422. #ifdef CONFIG_X86_64
  423. unsigned int eax = 0x00000001, ebx, ecx = 0, edx;
  424. char name[30];
  425. native_cpuid(&eax, &ebx, &ecx, &edx);
  426. sprintf(name, "intel-ucode/%02x-%02x-%02x",
  427. x86_family(eax), x86_model(eax), x86_stepping(eax));
  428. return get_builtin_firmware(cp, name);
  429. #else
  430. return false;
  431. #endif
  432. }
  433. static __initdata char ucode_name[] = "kernel/x86/microcode/GenuineIntel.bin";
  434. static __init enum ucode_state
  435. scan_microcode(struct mc_saved_data *mcs, unsigned long *mc_ptrs,
  436. unsigned long start, unsigned long size,
  437. struct ucode_cpu_info *uci)
  438. {
  439. struct cpio_data cd;
  440. long offset = 0;
  441. #ifdef CONFIG_X86_32
  442. char *p = (char *)__pa_nodebug(ucode_name);
  443. #else
  444. char *p = ucode_name;
  445. #endif
  446. cd.data = NULL;
  447. cd.size = 0;
  448. /* try built-in microcode if no initrd */
  449. if (!size) {
  450. if (!load_builtin_intel_microcode(&cd))
  451. return UCODE_ERROR;
  452. } else {
  453. cd = find_cpio_data(p, (void *)start, size, &offset);
  454. if (!cd.data)
  455. return UCODE_ERROR;
  456. }
  457. return get_matching_model_microcode(start, cd.data, cd.size,
  458. mcs, mc_ptrs, uci);
  459. }
  460. /*
  461. * Print ucode update info.
  462. */
  463. static void
  464. print_ucode_info(struct ucode_cpu_info *uci, unsigned int date)
  465. {
  466. pr_info_once("microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n",
  467. uci->cpu_sig.rev,
  468. date & 0xffff,
  469. date >> 24,
  470. (date >> 16) & 0xff);
  471. }
  472. #ifdef CONFIG_X86_32
  473. static int delay_ucode_info;
  474. static int current_mc_date;
  475. /*
  476. * Print early updated ucode info after printk works. This is delayed info dump.
  477. */
  478. void show_ucode_info_early(void)
  479. {
  480. struct ucode_cpu_info uci;
  481. if (delay_ucode_info) {
  482. collect_cpu_info_early(&uci);
  483. print_ucode_info(&uci, current_mc_date);
  484. delay_ucode_info = 0;
  485. }
  486. }
  487. /*
  488. * At this point, we can not call printk() yet. Keep microcode patch number in
  489. * mc_saved_data.mc_saved and delay printing microcode info in
  490. * show_ucode_info_early() until printk() works.
  491. */
  492. static void print_ucode(struct ucode_cpu_info *uci)
  493. {
  494. struct microcode_intel *mc;
  495. int *delay_ucode_info_p;
  496. int *current_mc_date_p;
  497. mc = uci->mc;
  498. if (!mc)
  499. return;
  500. delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info);
  501. current_mc_date_p = (int *)__pa_nodebug(&current_mc_date);
  502. *delay_ucode_info_p = 1;
  503. *current_mc_date_p = mc->hdr.date;
  504. }
  505. #else
  506. /*
  507. * Flush global tlb. We only do this in x86_64 where paging has been enabled
  508. * already and PGE should be enabled as well.
  509. */
  510. static inline void flush_tlb_early(void)
  511. {
  512. __native_flush_tlb_global_irq_disabled();
  513. }
  514. static inline void print_ucode(struct ucode_cpu_info *uci)
  515. {
  516. struct microcode_intel *mc;
  517. mc = uci->mc;
  518. if (!mc)
  519. return;
  520. print_ucode_info(uci, mc->hdr.date);
  521. }
  522. #endif
  523. static int apply_microcode_early(struct ucode_cpu_info *uci, bool early)
  524. {
  525. struct microcode_intel *mc;
  526. unsigned int val[2];
  527. mc = uci->mc;
  528. if (!mc)
  529. return 0;
  530. /* write microcode via MSR 0x79 */
  531. native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
  532. native_wrmsrl(MSR_IA32_UCODE_REV, 0);
  533. /* As documented in the SDM: Do a CPUID 1 here */
  534. sync_core();
  535. /* get the current revision from MSR 0x8B */
  536. native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
  537. if (val[1] != mc->hdr.rev)
  538. return -1;
  539. #ifdef CONFIG_X86_64
  540. /* Flush global tlb. This is precaution. */
  541. flush_tlb_early();
  542. #endif
  543. uci->cpu_sig.rev = val[1];
  544. if (early)
  545. print_ucode(uci);
  546. else
  547. print_ucode_info(uci, mc->hdr.date);
  548. return 0;
  549. }
  550. /*
  551. * This function converts microcode patch offsets previously stored in
  552. * mc_tmp_ptrs to pointers and stores the pointers in mc_saved_data.
  553. */
  554. int __init save_microcode_in_initrd_intel(void)
  555. {
  556. unsigned int count = mc_saved_data.num_saved;
  557. struct microcode_intel *mc_saved[MAX_UCODE_COUNT];
  558. int ret = 0;
  559. if (!count)
  560. return ret;
  561. copy_ptrs(mc_saved, mc_tmp_ptrs, get_initrd_start(), count);
  562. ret = save_microcode(&mc_saved_data, mc_saved, count);
  563. if (ret)
  564. pr_err("Cannot save microcode patches from initrd.\n");
  565. show_saved_mc();
  566. return ret;
  567. }
  568. static void __init
  569. _load_ucode_intel_bsp(struct mc_saved_data *mcs, unsigned long *mc_ptrs,
  570. unsigned long start, unsigned long size)
  571. {
  572. struct ucode_cpu_info uci;
  573. enum ucode_state ret;
  574. collect_cpu_info_early(&uci);
  575. ret = scan_microcode(mcs, mc_ptrs, start, size, &uci);
  576. if (ret != UCODE_OK)
  577. return;
  578. ret = load_microcode(mcs, mc_ptrs, start, &uci);
  579. if (ret != UCODE_OK)
  580. return;
  581. apply_microcode_early(&uci, true);
  582. }
  583. void __init load_ucode_intel_bsp(void)
  584. {
  585. u64 start, size;
  586. #ifdef CONFIG_X86_32
  587. struct boot_params *p;
  588. p = (struct boot_params *)__pa_nodebug(&boot_params);
  589. size = p->hdr.ramdisk_size;
  590. /*
  591. * Set start only if we have an initrd image. We cannot use initrd_start
  592. * because it is not set that early yet.
  593. */
  594. start = (size ? p->hdr.ramdisk_image : 0);
  595. _load_ucode_intel_bsp((struct mc_saved_data *)__pa_nodebug(&mc_saved_data),
  596. (unsigned long *)__pa_nodebug(&mc_tmp_ptrs),
  597. start, size);
  598. #else
  599. size = boot_params.hdr.ramdisk_size;
  600. start = (size ? boot_params.hdr.ramdisk_image + PAGE_OFFSET : 0);
  601. _load_ucode_intel_bsp(&mc_saved_data, mc_tmp_ptrs, start, size);
  602. #endif
  603. }
  604. void load_ucode_intel_ap(void)
  605. {
  606. unsigned long *mcs_tmp_p;
  607. struct mc_saved_data *mcs_p;
  608. struct ucode_cpu_info uci;
  609. enum ucode_state ret;
  610. #ifdef CONFIG_X86_32
  611. mcs_tmp_p = (unsigned long *)__pa_nodebug(mc_tmp_ptrs);
  612. mcs_p = (struct mc_saved_data *)__pa_nodebug(&mc_saved_data);
  613. #else
  614. mcs_tmp_p = mc_tmp_ptrs;
  615. mcs_p = &mc_saved_data;
  616. #endif
  617. /*
  618. * If there is no valid ucode previously saved in memory, no need to
  619. * update ucode on this AP.
  620. */
  621. if (!mcs_p->num_saved)
  622. return;
  623. collect_cpu_info_early(&uci);
  624. ret = load_microcode(mcs_p, mcs_tmp_p, get_initrd_start_addr(), &uci);
  625. if (ret != UCODE_OK)
  626. return;
  627. apply_microcode_early(&uci, true);
  628. }
  629. void reload_ucode_intel(void)
  630. {
  631. struct ucode_cpu_info uci;
  632. enum ucode_state ret;
  633. if (!mc_saved_data.num_saved)
  634. return;
  635. collect_cpu_info_early(&uci);
  636. ret = load_microcode_early(mc_saved_data.mc_saved,
  637. mc_saved_data.num_saved, &uci);
  638. if (ret != UCODE_OK)
  639. return;
  640. apply_microcode_early(&uci, false);
  641. }
  642. static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
  643. {
  644. struct cpuinfo_x86 *c = &cpu_data(cpu_num);
  645. unsigned int val[2];
  646. memset(csig, 0, sizeof(*csig));
  647. csig->sig = cpuid_eax(0x00000001);
  648. if ((c->x86_model >= 5) || (c->x86 > 6)) {
  649. /* get processor flags from MSR 0x17 */
  650. rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
  651. csig->pf = 1 << ((val[1] >> 18) & 7);
  652. }
  653. csig->rev = c->microcode;
  654. pr_info("CPU%d sig=0x%x, pf=0x%x, revision=0x%x\n",
  655. cpu_num, csig->sig, csig->pf, csig->rev);
  656. return 0;
  657. }
  658. /*
  659. * return 0 - no update found
  660. * return 1 - found update
  661. */
  662. static int get_matching_mc(struct microcode_intel *mc, int cpu)
  663. {
  664. struct cpu_signature cpu_sig;
  665. unsigned int csig, cpf, crev;
  666. collect_cpu_info(cpu, &cpu_sig);
  667. csig = cpu_sig.sig;
  668. cpf = cpu_sig.pf;
  669. crev = cpu_sig.rev;
  670. return has_newer_microcode(mc, csig, cpf, crev);
  671. }
  672. static int apply_microcode_intel(int cpu)
  673. {
  674. struct microcode_intel *mc;
  675. struct ucode_cpu_info *uci;
  676. struct cpuinfo_x86 *c;
  677. unsigned int val[2];
  678. /* We should bind the task to the CPU */
  679. if (WARN_ON(raw_smp_processor_id() != cpu))
  680. return -1;
  681. uci = ucode_cpu_info + cpu;
  682. mc = uci->mc;
  683. if (!mc)
  684. return 0;
  685. /*
  686. * Microcode on this CPU could be updated earlier. Only apply the
  687. * microcode patch in mc when it is newer than the one on this
  688. * CPU.
  689. */
  690. if (!get_matching_mc(mc, cpu))
  691. return 0;
  692. /* write microcode via MSR 0x79 */
  693. wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
  694. wrmsrl(MSR_IA32_UCODE_REV, 0);
  695. /* As documented in the SDM: Do a CPUID 1 here */
  696. sync_core();
  697. /* get the current revision from MSR 0x8B */
  698. rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
  699. if (val[1] != mc->hdr.rev) {
  700. pr_err("CPU%d update to revision 0x%x failed\n",
  701. cpu, mc->hdr.rev);
  702. return -1;
  703. }
  704. pr_info("CPU%d updated to revision 0x%x, date = %04x-%02x-%02x\n",
  705. cpu, val[1],
  706. mc->hdr.date & 0xffff,
  707. mc->hdr.date >> 24,
  708. (mc->hdr.date >> 16) & 0xff);
  709. c = &cpu_data(cpu);
  710. uci->cpu_sig.rev = val[1];
  711. c->microcode = val[1];
  712. return 0;
  713. }
  714. static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
  715. int (*get_ucode_data)(void *, const void *, size_t))
  716. {
  717. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  718. u8 *ucode_ptr = data, *new_mc = NULL, *mc = NULL;
  719. int new_rev = uci->cpu_sig.rev;
  720. unsigned int leftover = size;
  721. enum ucode_state state = UCODE_OK;
  722. unsigned int curr_mc_size = 0;
  723. unsigned int csig, cpf;
  724. while (leftover) {
  725. struct microcode_header_intel mc_header;
  726. unsigned int mc_size;
  727. if (leftover < sizeof(mc_header)) {
  728. pr_err("error! Truncated header in microcode data file\n");
  729. break;
  730. }
  731. if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header)))
  732. break;
  733. mc_size = get_totalsize(&mc_header);
  734. if (!mc_size || mc_size > leftover) {
  735. pr_err("error! Bad data in microcode data file\n");
  736. break;
  737. }
  738. /* For performance reasons, reuse mc area when possible */
  739. if (!mc || mc_size > curr_mc_size) {
  740. vfree(mc);
  741. mc = vmalloc(mc_size);
  742. if (!mc)
  743. break;
  744. curr_mc_size = mc_size;
  745. }
  746. if (get_ucode_data(mc, ucode_ptr, mc_size) ||
  747. microcode_sanity_check(mc, 1) < 0) {
  748. break;
  749. }
  750. csig = uci->cpu_sig.sig;
  751. cpf = uci->cpu_sig.pf;
  752. if (has_newer_microcode(mc, csig, cpf, new_rev)) {
  753. vfree(new_mc);
  754. new_rev = mc_header.rev;
  755. new_mc = mc;
  756. mc = NULL; /* trigger new vmalloc */
  757. }
  758. ucode_ptr += mc_size;
  759. leftover -= mc_size;
  760. }
  761. vfree(mc);
  762. if (leftover) {
  763. vfree(new_mc);
  764. state = UCODE_ERROR;
  765. goto out;
  766. }
  767. if (!new_mc) {
  768. state = UCODE_NFOUND;
  769. goto out;
  770. }
  771. vfree(uci->mc);
  772. uci->mc = (struct microcode_intel *)new_mc;
  773. /*
  774. * If early loading microcode is supported, save this mc into
  775. * permanent memory. So it will be loaded early when a CPU is hot added
  776. * or resumes.
  777. */
  778. save_mc_for_early(new_mc);
  779. pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
  780. cpu, new_rev, uci->cpu_sig.rev);
  781. out:
  782. return state;
  783. }
  784. static int get_ucode_fw(void *to, const void *from, size_t n)
  785. {
  786. memcpy(to, from, n);
  787. return 0;
  788. }
  789. static enum ucode_state request_microcode_fw(int cpu, struct device *device,
  790. bool refresh_fw)
  791. {
  792. char name[30];
  793. struct cpuinfo_x86 *c = &cpu_data(cpu);
  794. const struct firmware *firmware;
  795. enum ucode_state ret;
  796. sprintf(name, "intel-ucode/%02x-%02x-%02x",
  797. c->x86, c->x86_model, c->x86_mask);
  798. if (request_firmware_direct(&firmware, name, device)) {
  799. pr_debug("data file %s load failed\n", name);
  800. return UCODE_NFOUND;
  801. }
  802. ret = generic_load_microcode(cpu, (void *)firmware->data,
  803. firmware->size, &get_ucode_fw);
  804. release_firmware(firmware);
  805. return ret;
  806. }
  807. static int get_ucode_user(void *to, const void *from, size_t n)
  808. {
  809. return copy_from_user(to, from, n);
  810. }
  811. static enum ucode_state
  812. request_microcode_user(int cpu, const void __user *buf, size_t size)
  813. {
  814. return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user);
  815. }
  816. static void microcode_fini_cpu(int cpu)
  817. {
  818. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  819. vfree(uci->mc);
  820. uci->mc = NULL;
  821. }
  822. static struct microcode_ops microcode_intel_ops = {
  823. .request_microcode_user = request_microcode_user,
  824. .request_microcode_fw = request_microcode_fw,
  825. .collect_cpu_info = collect_cpu_info,
  826. .apply_microcode = apply_microcode_intel,
  827. .microcode_fini_cpu = microcode_fini_cpu,
  828. };
  829. struct microcode_ops * __init init_intel_microcode(void)
  830. {
  831. struct cpuinfo_x86 *c = &boot_cpu_data;
  832. if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
  833. cpu_has(c, X86_FEATURE_IA64)) {
  834. pr_err("Intel CPU family 0x%x not supported\n", c->x86);
  835. return NULL;
  836. }
  837. return &microcode_intel_ops;
  838. }