rtc-s3c.c 20 KB

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  1. /* drivers/rtc/rtc-s3c.c
  2. *
  3. * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com/
  5. *
  6. * Copyright (c) 2004,2006 Simtec Electronics
  7. * Ben Dooks, <ben@simtec.co.uk>
  8. * http://armlinux.simtec.co.uk/
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * S3C2410/S3C2440/S3C24XX Internal RTC Driver
  15. */
  16. #include <linux/module.h>
  17. #include <linux/fs.h>
  18. #include <linux/string.h>
  19. #include <linux/init.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/rtc.h>
  23. #include <linux/bcd.h>
  24. #include <linux/clk.h>
  25. #include <linux/log2.h>
  26. #include <linux/slab.h>
  27. #include <linux/of.h>
  28. #include <linux/uaccess.h>
  29. #include <linux/io.h>
  30. #include <asm/irq.h>
  31. #include "rtc-s3c.h"
  32. struct s3c_rtc {
  33. struct device *dev;
  34. struct rtc_device *rtc;
  35. void __iomem *base;
  36. struct clk *rtc_clk;
  37. struct clk *rtc_src_clk;
  38. bool clk_disabled;
  39. struct s3c_rtc_data *data;
  40. int irq_alarm;
  41. int irq_tick;
  42. spinlock_t pie_lock;
  43. spinlock_t alarm_clk_lock;
  44. int ticnt_save, ticnt_en_save;
  45. bool wake_en;
  46. };
  47. struct s3c_rtc_data {
  48. int max_user_freq;
  49. bool needs_src_clk;
  50. void (*irq_handler) (struct s3c_rtc *info, int mask);
  51. void (*set_freq) (struct s3c_rtc *info, int freq);
  52. void (*enable_tick) (struct s3c_rtc *info, struct seq_file *seq);
  53. void (*select_tick_clk) (struct s3c_rtc *info);
  54. void (*save_tick_cnt) (struct s3c_rtc *info);
  55. void (*restore_tick_cnt) (struct s3c_rtc *info);
  56. void (*enable) (struct s3c_rtc *info);
  57. void (*disable) (struct s3c_rtc *info);
  58. };
  59. static void s3c_rtc_enable_clk(struct s3c_rtc *info)
  60. {
  61. unsigned long irq_flags;
  62. spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
  63. if (info->clk_disabled) {
  64. clk_enable(info->rtc_clk);
  65. if (info->data->needs_src_clk)
  66. clk_enable(info->rtc_src_clk);
  67. info->clk_disabled = false;
  68. }
  69. spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
  70. }
  71. static void s3c_rtc_disable_clk(struct s3c_rtc *info)
  72. {
  73. unsigned long irq_flags;
  74. spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
  75. if (!info->clk_disabled) {
  76. if (info->data->needs_src_clk)
  77. clk_disable(info->rtc_src_clk);
  78. clk_disable(info->rtc_clk);
  79. info->clk_disabled = true;
  80. }
  81. spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
  82. }
  83. /* IRQ Handlers */
  84. static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
  85. {
  86. struct s3c_rtc *info = (struct s3c_rtc *)id;
  87. if (info->data->irq_handler)
  88. info->data->irq_handler(info, S3C2410_INTP_TIC);
  89. return IRQ_HANDLED;
  90. }
  91. static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
  92. {
  93. struct s3c_rtc *info = (struct s3c_rtc *)id;
  94. if (info->data->irq_handler)
  95. info->data->irq_handler(info, S3C2410_INTP_ALM);
  96. return IRQ_HANDLED;
  97. }
  98. /* Update control registers */
  99. static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
  100. {
  101. struct s3c_rtc *info = dev_get_drvdata(dev);
  102. unsigned int tmp;
  103. dev_dbg(info->dev, "%s: aie=%d\n", __func__, enabled);
  104. s3c_rtc_enable_clk(info);
  105. tmp = readb(info->base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
  106. if (enabled)
  107. tmp |= S3C2410_RTCALM_ALMEN;
  108. writeb(tmp, info->base + S3C2410_RTCALM);
  109. s3c_rtc_disable_clk(info);
  110. if (enabled)
  111. s3c_rtc_enable_clk(info);
  112. else
  113. s3c_rtc_disable_clk(info);
  114. return 0;
  115. }
  116. /* Set RTC frequency */
  117. static int s3c_rtc_setfreq(struct s3c_rtc *info, int freq)
  118. {
  119. if (!is_power_of_2(freq))
  120. return -EINVAL;
  121. spin_lock_irq(&info->pie_lock);
  122. if (info->data->set_freq)
  123. info->data->set_freq(info, freq);
  124. spin_unlock_irq(&info->pie_lock);
  125. return 0;
  126. }
  127. /* Time read/write */
  128. static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
  129. {
  130. struct s3c_rtc *info = dev_get_drvdata(dev);
  131. unsigned int have_retried = 0;
  132. s3c_rtc_enable_clk(info);
  133. retry_get_time:
  134. rtc_tm->tm_min = readb(info->base + S3C2410_RTCMIN);
  135. rtc_tm->tm_hour = readb(info->base + S3C2410_RTCHOUR);
  136. rtc_tm->tm_mday = readb(info->base + S3C2410_RTCDATE);
  137. rtc_tm->tm_mon = readb(info->base + S3C2410_RTCMON);
  138. rtc_tm->tm_year = readb(info->base + S3C2410_RTCYEAR);
  139. rtc_tm->tm_sec = readb(info->base + S3C2410_RTCSEC);
  140. /* the only way to work out whether the system was mid-update
  141. * when we read it is to check the second counter, and if it
  142. * is zero, then we re-try the entire read
  143. */
  144. if (rtc_tm->tm_sec == 0 && !have_retried) {
  145. have_retried = 1;
  146. goto retry_get_time;
  147. }
  148. rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
  149. rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
  150. rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
  151. rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
  152. rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
  153. rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
  154. s3c_rtc_disable_clk(info);
  155. rtc_tm->tm_year += 100;
  156. dev_dbg(dev, "read time %04d.%02d.%02d %02d:%02d:%02d\n",
  157. 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
  158. rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
  159. rtc_tm->tm_mon -= 1;
  160. return rtc_valid_tm(rtc_tm);
  161. }
  162. static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
  163. {
  164. struct s3c_rtc *info = dev_get_drvdata(dev);
  165. int year = tm->tm_year - 100;
  166. dev_dbg(dev, "set time %04d.%02d.%02d %02d:%02d:%02d\n",
  167. 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
  168. tm->tm_hour, tm->tm_min, tm->tm_sec);
  169. /* we get around y2k by simply not supporting it */
  170. if (year < 0 || year >= 100) {
  171. dev_err(dev, "rtc only supports 100 years\n");
  172. return -EINVAL;
  173. }
  174. s3c_rtc_enable_clk(info);
  175. writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_RTCSEC);
  176. writeb(bin2bcd(tm->tm_min), info->base + S3C2410_RTCMIN);
  177. writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_RTCHOUR);
  178. writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_RTCDATE);
  179. writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_RTCMON);
  180. writeb(bin2bcd(year), info->base + S3C2410_RTCYEAR);
  181. s3c_rtc_disable_clk(info);
  182. return 0;
  183. }
  184. static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
  185. {
  186. struct s3c_rtc *info = dev_get_drvdata(dev);
  187. struct rtc_time *alm_tm = &alrm->time;
  188. unsigned int alm_en;
  189. s3c_rtc_enable_clk(info);
  190. alm_tm->tm_sec = readb(info->base + S3C2410_ALMSEC);
  191. alm_tm->tm_min = readb(info->base + S3C2410_ALMMIN);
  192. alm_tm->tm_hour = readb(info->base + S3C2410_ALMHOUR);
  193. alm_tm->tm_mon = readb(info->base + S3C2410_ALMMON);
  194. alm_tm->tm_mday = readb(info->base + S3C2410_ALMDATE);
  195. alm_tm->tm_year = readb(info->base + S3C2410_ALMYEAR);
  196. alm_en = readb(info->base + S3C2410_RTCALM);
  197. s3c_rtc_disable_clk(info);
  198. alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
  199. dev_dbg(dev, "read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
  200. alm_en,
  201. 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
  202. alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
  203. /* decode the alarm enable field */
  204. if (alm_en & S3C2410_RTCALM_SECEN)
  205. alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
  206. else
  207. alm_tm->tm_sec = -1;
  208. if (alm_en & S3C2410_RTCALM_MINEN)
  209. alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
  210. else
  211. alm_tm->tm_min = -1;
  212. if (alm_en & S3C2410_RTCALM_HOUREN)
  213. alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
  214. else
  215. alm_tm->tm_hour = -1;
  216. if (alm_en & S3C2410_RTCALM_DAYEN)
  217. alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
  218. else
  219. alm_tm->tm_mday = -1;
  220. if (alm_en & S3C2410_RTCALM_MONEN) {
  221. alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
  222. alm_tm->tm_mon -= 1;
  223. } else {
  224. alm_tm->tm_mon = -1;
  225. }
  226. if (alm_en & S3C2410_RTCALM_YEAREN)
  227. alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
  228. else
  229. alm_tm->tm_year = -1;
  230. return 0;
  231. }
  232. static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
  233. {
  234. struct s3c_rtc *info = dev_get_drvdata(dev);
  235. struct rtc_time *tm = &alrm->time;
  236. unsigned int alrm_en;
  237. dev_dbg(dev, "s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
  238. alrm->enabled,
  239. 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
  240. tm->tm_hour, tm->tm_min, tm->tm_sec);
  241. s3c_rtc_enable_clk(info);
  242. alrm_en = readb(info->base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
  243. writeb(0x00, info->base + S3C2410_RTCALM);
  244. if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
  245. alrm_en |= S3C2410_RTCALM_SECEN;
  246. writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_ALMSEC);
  247. }
  248. if (tm->tm_min < 60 && tm->tm_min >= 0) {
  249. alrm_en |= S3C2410_RTCALM_MINEN;
  250. writeb(bin2bcd(tm->tm_min), info->base + S3C2410_ALMMIN);
  251. }
  252. if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
  253. alrm_en |= S3C2410_RTCALM_HOUREN;
  254. writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_ALMHOUR);
  255. }
  256. dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en);
  257. writeb(alrm_en, info->base + S3C2410_RTCALM);
  258. s3c_rtc_disable_clk(info);
  259. s3c_rtc_setaie(dev, alrm->enabled);
  260. return 0;
  261. }
  262. static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
  263. {
  264. struct s3c_rtc *info = dev_get_drvdata(dev);
  265. s3c_rtc_enable_clk(info);
  266. if (info->data->enable_tick)
  267. info->data->enable_tick(info, seq);
  268. s3c_rtc_disable_clk(info);
  269. return 0;
  270. }
  271. static const struct rtc_class_ops s3c_rtcops = {
  272. .read_time = s3c_rtc_gettime,
  273. .set_time = s3c_rtc_settime,
  274. .read_alarm = s3c_rtc_getalarm,
  275. .set_alarm = s3c_rtc_setalarm,
  276. .proc = s3c_rtc_proc,
  277. .alarm_irq_enable = s3c_rtc_setaie,
  278. };
  279. static void s3c24xx_rtc_enable(struct s3c_rtc *info)
  280. {
  281. unsigned int con, tmp;
  282. con = readw(info->base + S3C2410_RTCCON);
  283. /* re-enable the device, and check it is ok */
  284. if ((con & S3C2410_RTCCON_RTCEN) == 0) {
  285. dev_info(info->dev, "rtc disabled, re-enabling\n");
  286. tmp = readw(info->base + S3C2410_RTCCON);
  287. writew(tmp | S3C2410_RTCCON_RTCEN,
  288. info->base + S3C2410_RTCCON);
  289. }
  290. if (con & S3C2410_RTCCON_CNTSEL) {
  291. dev_info(info->dev, "removing RTCCON_CNTSEL\n");
  292. tmp = readw(info->base + S3C2410_RTCCON);
  293. writew(tmp & ~S3C2410_RTCCON_CNTSEL,
  294. info->base + S3C2410_RTCCON);
  295. }
  296. if (con & S3C2410_RTCCON_CLKRST) {
  297. dev_info(info->dev, "removing RTCCON_CLKRST\n");
  298. tmp = readw(info->base + S3C2410_RTCCON);
  299. writew(tmp & ~S3C2410_RTCCON_CLKRST,
  300. info->base + S3C2410_RTCCON);
  301. }
  302. }
  303. static void s3c24xx_rtc_disable(struct s3c_rtc *info)
  304. {
  305. unsigned int con;
  306. con = readw(info->base + S3C2410_RTCCON);
  307. con &= ~S3C2410_RTCCON_RTCEN;
  308. writew(con, info->base + S3C2410_RTCCON);
  309. con = readb(info->base + S3C2410_TICNT);
  310. con &= ~S3C2410_TICNT_ENABLE;
  311. writeb(con, info->base + S3C2410_TICNT);
  312. }
  313. static void s3c6410_rtc_disable(struct s3c_rtc *info)
  314. {
  315. unsigned int con;
  316. con = readw(info->base + S3C2410_RTCCON);
  317. con &= ~S3C64XX_RTCCON_TICEN;
  318. con &= ~S3C2410_RTCCON_RTCEN;
  319. writew(con, info->base + S3C2410_RTCCON);
  320. }
  321. static int s3c_rtc_remove(struct platform_device *pdev)
  322. {
  323. struct s3c_rtc *info = platform_get_drvdata(pdev);
  324. s3c_rtc_setaie(info->dev, 0);
  325. if (info->data->needs_src_clk)
  326. clk_unprepare(info->rtc_src_clk);
  327. clk_unprepare(info->rtc_clk);
  328. return 0;
  329. }
  330. static const struct of_device_id s3c_rtc_dt_match[];
  331. static struct s3c_rtc_data *s3c_rtc_get_data(struct platform_device *pdev)
  332. {
  333. const struct of_device_id *match;
  334. match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
  335. return (struct s3c_rtc_data *)match->data;
  336. }
  337. static int s3c_rtc_probe(struct platform_device *pdev)
  338. {
  339. struct s3c_rtc *info = NULL;
  340. struct rtc_time rtc_tm;
  341. struct resource *res;
  342. int ret;
  343. info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
  344. if (!info)
  345. return -ENOMEM;
  346. /* find the IRQs */
  347. info->irq_tick = platform_get_irq(pdev, 1);
  348. if (info->irq_tick < 0) {
  349. dev_err(&pdev->dev, "no irq for rtc tick\n");
  350. return info->irq_tick;
  351. }
  352. info->dev = &pdev->dev;
  353. info->data = s3c_rtc_get_data(pdev);
  354. if (!info->data) {
  355. dev_err(&pdev->dev, "failed getting s3c_rtc_data\n");
  356. return -EINVAL;
  357. }
  358. spin_lock_init(&info->pie_lock);
  359. spin_lock_init(&info->alarm_clk_lock);
  360. platform_set_drvdata(pdev, info);
  361. info->irq_alarm = platform_get_irq(pdev, 0);
  362. if (info->irq_alarm < 0) {
  363. dev_err(&pdev->dev, "no irq for alarm\n");
  364. return info->irq_alarm;
  365. }
  366. dev_dbg(&pdev->dev, "s3c2410_rtc: tick irq %d, alarm irq %d\n",
  367. info->irq_tick, info->irq_alarm);
  368. /* get the memory region */
  369. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  370. info->base = devm_ioremap_resource(&pdev->dev, res);
  371. if (IS_ERR(info->base))
  372. return PTR_ERR(info->base);
  373. info->rtc_clk = devm_clk_get(&pdev->dev, "rtc");
  374. if (IS_ERR(info->rtc_clk)) {
  375. dev_err(&pdev->dev, "failed to find rtc clock\n");
  376. return PTR_ERR(info->rtc_clk);
  377. }
  378. clk_prepare_enable(info->rtc_clk);
  379. if (info->data->needs_src_clk) {
  380. info->rtc_src_clk = devm_clk_get(&pdev->dev, "rtc_src");
  381. if (IS_ERR(info->rtc_src_clk)) {
  382. dev_err(&pdev->dev,
  383. "failed to find rtc source clock\n");
  384. clk_disable_unprepare(info->rtc_clk);
  385. return PTR_ERR(info->rtc_src_clk);
  386. }
  387. clk_prepare_enable(info->rtc_src_clk);
  388. }
  389. /* check to see if everything is setup correctly */
  390. if (info->data->enable)
  391. info->data->enable(info);
  392. dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n",
  393. readw(info->base + S3C2410_RTCCON));
  394. device_init_wakeup(&pdev->dev, 1);
  395. /* Check RTC Time */
  396. if (s3c_rtc_gettime(&pdev->dev, &rtc_tm)) {
  397. rtc_tm.tm_year = 100;
  398. rtc_tm.tm_mon = 0;
  399. rtc_tm.tm_mday = 1;
  400. rtc_tm.tm_hour = 0;
  401. rtc_tm.tm_min = 0;
  402. rtc_tm.tm_sec = 0;
  403. s3c_rtc_settime(&pdev->dev, &rtc_tm);
  404. dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
  405. }
  406. /* register RTC and exit */
  407. info->rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops,
  408. THIS_MODULE);
  409. if (IS_ERR(info->rtc)) {
  410. dev_err(&pdev->dev, "cannot attach rtc\n");
  411. ret = PTR_ERR(info->rtc);
  412. goto err_nortc;
  413. }
  414. ret = devm_request_irq(&pdev->dev, info->irq_alarm, s3c_rtc_alarmirq,
  415. 0, "s3c2410-rtc alarm", info);
  416. if (ret) {
  417. dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_alarm, ret);
  418. goto err_nortc;
  419. }
  420. ret = devm_request_irq(&pdev->dev, info->irq_tick, s3c_rtc_tickirq,
  421. 0, "s3c2410-rtc tick", info);
  422. if (ret) {
  423. dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_tick, ret);
  424. goto err_nortc;
  425. }
  426. if (info->data->select_tick_clk)
  427. info->data->select_tick_clk(info);
  428. s3c_rtc_setfreq(info, 1);
  429. s3c_rtc_disable_clk(info);
  430. return 0;
  431. err_nortc:
  432. if (info->data->disable)
  433. info->data->disable(info);
  434. if (info->data->needs_src_clk)
  435. clk_disable_unprepare(info->rtc_src_clk);
  436. clk_disable_unprepare(info->rtc_clk);
  437. return ret;
  438. }
  439. #ifdef CONFIG_PM_SLEEP
  440. static int s3c_rtc_suspend(struct device *dev)
  441. {
  442. struct s3c_rtc *info = dev_get_drvdata(dev);
  443. s3c_rtc_enable_clk(info);
  444. /* save TICNT for anyone using periodic interrupts */
  445. if (info->data->save_tick_cnt)
  446. info->data->save_tick_cnt(info);
  447. if (info->data->disable)
  448. info->data->disable(info);
  449. if (device_may_wakeup(dev) && !info->wake_en) {
  450. if (enable_irq_wake(info->irq_alarm) == 0)
  451. info->wake_en = true;
  452. else
  453. dev_err(dev, "enable_irq_wake failed\n");
  454. }
  455. return 0;
  456. }
  457. static int s3c_rtc_resume(struct device *dev)
  458. {
  459. struct s3c_rtc *info = dev_get_drvdata(dev);
  460. if (info->data->enable)
  461. info->data->enable(info);
  462. if (info->data->restore_tick_cnt)
  463. info->data->restore_tick_cnt(info);
  464. s3c_rtc_disable_clk(info);
  465. if (device_may_wakeup(dev) && info->wake_en) {
  466. disable_irq_wake(info->irq_alarm);
  467. info->wake_en = false;
  468. }
  469. return 0;
  470. }
  471. #endif
  472. static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume);
  473. static void s3c24xx_rtc_irq(struct s3c_rtc *info, int mask)
  474. {
  475. rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
  476. }
  477. static void s3c6410_rtc_irq(struct s3c_rtc *info, int mask)
  478. {
  479. rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
  480. writeb(mask, info->base + S3C2410_INTP);
  481. }
  482. static void s3c2410_rtc_setfreq(struct s3c_rtc *info, int freq)
  483. {
  484. unsigned int tmp = 0;
  485. int val;
  486. tmp = readb(info->base + S3C2410_TICNT);
  487. tmp &= S3C2410_TICNT_ENABLE;
  488. val = (info->rtc->max_user_freq / freq) - 1;
  489. tmp |= val;
  490. writel(tmp, info->base + S3C2410_TICNT);
  491. }
  492. static void s3c2416_rtc_setfreq(struct s3c_rtc *info, int freq)
  493. {
  494. unsigned int tmp = 0;
  495. int val;
  496. tmp = readb(info->base + S3C2410_TICNT);
  497. tmp &= S3C2410_TICNT_ENABLE;
  498. val = (info->rtc->max_user_freq / freq) - 1;
  499. tmp |= S3C2443_TICNT_PART(val);
  500. writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
  501. writel(S3C2416_TICNT2_PART(val), info->base + S3C2416_TICNT2);
  502. writel(tmp, info->base + S3C2410_TICNT);
  503. }
  504. static void s3c2443_rtc_setfreq(struct s3c_rtc *info, int freq)
  505. {
  506. unsigned int tmp = 0;
  507. int val;
  508. tmp = readb(info->base + S3C2410_TICNT);
  509. tmp &= S3C2410_TICNT_ENABLE;
  510. val = (info->rtc->max_user_freq / freq) - 1;
  511. tmp |= S3C2443_TICNT_PART(val);
  512. writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
  513. writel(tmp, info->base + S3C2410_TICNT);
  514. }
  515. static void s3c6410_rtc_setfreq(struct s3c_rtc *info, int freq)
  516. {
  517. int val;
  518. val = (info->rtc->max_user_freq / freq) - 1;
  519. writel(val, info->base + S3C2410_TICNT);
  520. }
  521. static void s3c24xx_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
  522. {
  523. unsigned int ticnt;
  524. ticnt = readb(info->base + S3C2410_TICNT);
  525. ticnt &= S3C2410_TICNT_ENABLE;
  526. seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
  527. }
  528. static void s3c2416_rtc_select_tick_clk(struct s3c_rtc *info)
  529. {
  530. unsigned int con;
  531. con = readw(info->base + S3C2410_RTCCON);
  532. con |= S3C2443_RTCCON_TICSEL;
  533. writew(con, info->base + S3C2410_RTCCON);
  534. }
  535. static void s3c6410_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
  536. {
  537. unsigned int ticnt;
  538. ticnt = readw(info->base + S3C2410_RTCCON);
  539. ticnt &= S3C64XX_RTCCON_TICEN;
  540. seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
  541. }
  542. static void s3c24xx_rtc_save_tick_cnt(struct s3c_rtc *info)
  543. {
  544. info->ticnt_save = readb(info->base + S3C2410_TICNT);
  545. }
  546. static void s3c24xx_rtc_restore_tick_cnt(struct s3c_rtc *info)
  547. {
  548. writeb(info->ticnt_save, info->base + S3C2410_TICNT);
  549. }
  550. static void s3c6410_rtc_save_tick_cnt(struct s3c_rtc *info)
  551. {
  552. info->ticnt_en_save = readw(info->base + S3C2410_RTCCON);
  553. info->ticnt_en_save &= S3C64XX_RTCCON_TICEN;
  554. info->ticnt_save = readl(info->base + S3C2410_TICNT);
  555. }
  556. static void s3c6410_rtc_restore_tick_cnt(struct s3c_rtc *info)
  557. {
  558. unsigned int con;
  559. writel(info->ticnt_save, info->base + S3C2410_TICNT);
  560. if (info->ticnt_en_save) {
  561. con = readw(info->base + S3C2410_RTCCON);
  562. writew(con | info->ticnt_en_save,
  563. info->base + S3C2410_RTCCON);
  564. }
  565. }
  566. static struct s3c_rtc_data const s3c2410_rtc_data = {
  567. .max_user_freq = 128,
  568. .irq_handler = s3c24xx_rtc_irq,
  569. .set_freq = s3c2410_rtc_setfreq,
  570. .enable_tick = s3c24xx_rtc_enable_tick,
  571. .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
  572. .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
  573. .enable = s3c24xx_rtc_enable,
  574. .disable = s3c24xx_rtc_disable,
  575. };
  576. static struct s3c_rtc_data const s3c2416_rtc_data = {
  577. .max_user_freq = 32768,
  578. .irq_handler = s3c24xx_rtc_irq,
  579. .set_freq = s3c2416_rtc_setfreq,
  580. .enable_tick = s3c24xx_rtc_enable_tick,
  581. .select_tick_clk = s3c2416_rtc_select_tick_clk,
  582. .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
  583. .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
  584. .enable = s3c24xx_rtc_enable,
  585. .disable = s3c24xx_rtc_disable,
  586. };
  587. static struct s3c_rtc_data const s3c2443_rtc_data = {
  588. .max_user_freq = 32768,
  589. .irq_handler = s3c24xx_rtc_irq,
  590. .set_freq = s3c2443_rtc_setfreq,
  591. .enable_tick = s3c24xx_rtc_enable_tick,
  592. .select_tick_clk = s3c2416_rtc_select_tick_clk,
  593. .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
  594. .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
  595. .enable = s3c24xx_rtc_enable,
  596. .disable = s3c24xx_rtc_disable,
  597. };
  598. static struct s3c_rtc_data const s3c6410_rtc_data = {
  599. .max_user_freq = 32768,
  600. .needs_src_clk = true,
  601. .irq_handler = s3c6410_rtc_irq,
  602. .set_freq = s3c6410_rtc_setfreq,
  603. .enable_tick = s3c6410_rtc_enable_tick,
  604. .save_tick_cnt = s3c6410_rtc_save_tick_cnt,
  605. .restore_tick_cnt = s3c6410_rtc_restore_tick_cnt,
  606. .enable = s3c24xx_rtc_enable,
  607. .disable = s3c6410_rtc_disable,
  608. };
  609. static const struct of_device_id s3c_rtc_dt_match[] = {
  610. {
  611. .compatible = "samsung,s3c2410-rtc",
  612. .data = (void *)&s3c2410_rtc_data,
  613. }, {
  614. .compatible = "samsung,s3c2416-rtc",
  615. .data = (void *)&s3c2416_rtc_data,
  616. }, {
  617. .compatible = "samsung,s3c2443-rtc",
  618. .data = (void *)&s3c2443_rtc_data,
  619. }, {
  620. .compatible = "samsung,s3c6410-rtc",
  621. .data = (void *)&s3c6410_rtc_data,
  622. }, {
  623. .compatible = "samsung,exynos3250-rtc",
  624. .data = (void *)&s3c6410_rtc_data,
  625. },
  626. { /* sentinel */ },
  627. };
  628. MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
  629. static struct platform_driver s3c_rtc_driver = {
  630. .probe = s3c_rtc_probe,
  631. .remove = s3c_rtc_remove,
  632. .driver = {
  633. .name = "s3c-rtc",
  634. .pm = &s3c_rtc_pm_ops,
  635. .of_match_table = of_match_ptr(s3c_rtc_dt_match),
  636. },
  637. };
  638. module_platform_driver(s3c_rtc_driver);
  639. MODULE_DESCRIPTION("Samsung S3C RTC Driver");
  640. MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
  641. MODULE_LICENSE("GPL");
  642. MODULE_ALIAS("platform:s3c2410-rtc");