8250_mid.c 9.4 KB

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  1. /*
  2. * 8250_mid.c - Driver for UART on Intel Penwell and various other Intel SOCs
  3. *
  4. * Copyright (C) 2015 Intel Corporation
  5. * Author: Heikki Krogerus <heikki.krogerus@linux.intel.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/bitops.h>
  12. #include <linux/module.h>
  13. #include <linux/pci.h>
  14. #include <linux/rational.h>
  15. #include <linux/dma/hsu.h>
  16. #include <linux/8250_pci.h>
  17. #include "8250.h"
  18. #define PCI_DEVICE_ID_INTEL_PNW_UART1 0x081b
  19. #define PCI_DEVICE_ID_INTEL_PNW_UART2 0x081c
  20. #define PCI_DEVICE_ID_INTEL_PNW_UART3 0x081d
  21. #define PCI_DEVICE_ID_INTEL_TNG_UART 0x1191
  22. #define PCI_DEVICE_ID_INTEL_DNV_UART 0x19d8
  23. /* Intel MID Specific registers */
  24. #define INTEL_MID_UART_DNV_FISR 0x08
  25. #define INTEL_MID_UART_PS 0x30
  26. #define INTEL_MID_UART_MUL 0x34
  27. #define INTEL_MID_UART_DIV 0x38
  28. struct mid8250;
  29. struct mid8250_board {
  30. unsigned int flags;
  31. unsigned long freq;
  32. unsigned int base_baud;
  33. int (*setup)(struct mid8250 *, struct uart_port *p);
  34. void (*exit)(struct mid8250 *);
  35. };
  36. struct mid8250 {
  37. int line;
  38. int dma_index;
  39. struct pci_dev *dma_dev;
  40. struct uart_8250_dma dma;
  41. struct mid8250_board *board;
  42. struct hsu_dma_chip dma_chip;
  43. };
  44. /*****************************************************************************/
  45. static int pnw_setup(struct mid8250 *mid, struct uart_port *p)
  46. {
  47. struct pci_dev *pdev = to_pci_dev(p->dev);
  48. switch (pdev->device) {
  49. case PCI_DEVICE_ID_INTEL_PNW_UART1:
  50. mid->dma_index = 0;
  51. break;
  52. case PCI_DEVICE_ID_INTEL_PNW_UART2:
  53. mid->dma_index = 1;
  54. break;
  55. case PCI_DEVICE_ID_INTEL_PNW_UART3:
  56. mid->dma_index = 2;
  57. break;
  58. default:
  59. return -EINVAL;
  60. }
  61. mid->dma_dev = pci_get_slot(pdev->bus,
  62. PCI_DEVFN(PCI_SLOT(pdev->devfn), 3));
  63. return 0;
  64. }
  65. static int tng_handle_irq(struct uart_port *p)
  66. {
  67. struct mid8250 *mid = p->private_data;
  68. struct uart_8250_port *up = up_to_u8250p(p);
  69. struct hsu_dma_chip *chip;
  70. u32 status;
  71. int ret = 0;
  72. int err;
  73. chip = pci_get_drvdata(mid->dma_dev);
  74. /* Rx DMA */
  75. err = hsu_dma_get_status(chip, mid->dma_index * 2 + 1, &status);
  76. if (err > 0) {
  77. serial8250_rx_dma_flush(up);
  78. ret |= 1;
  79. } else if (err == 0)
  80. ret |= hsu_dma_do_irq(chip, mid->dma_index * 2 + 1, status);
  81. /* Tx DMA */
  82. err = hsu_dma_get_status(chip, mid->dma_index * 2, &status);
  83. if (err > 0)
  84. ret |= 1;
  85. else if (err == 0)
  86. ret |= hsu_dma_do_irq(chip, mid->dma_index * 2, status);
  87. /* UART */
  88. ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
  89. return IRQ_RETVAL(ret);
  90. }
  91. static int tng_setup(struct mid8250 *mid, struct uart_port *p)
  92. {
  93. struct pci_dev *pdev = to_pci_dev(p->dev);
  94. int index = PCI_FUNC(pdev->devfn);
  95. /*
  96. * Device 0000:00:04.0 is not a real HSU port. It provides a global
  97. * register set for all HSU ports, although it has the same PCI ID.
  98. * Skip it here.
  99. */
  100. if (index-- == 0)
  101. return -ENODEV;
  102. mid->dma_index = index;
  103. mid->dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(5, 0));
  104. p->handle_irq = tng_handle_irq;
  105. return 0;
  106. }
  107. static int dnv_handle_irq(struct uart_port *p)
  108. {
  109. struct mid8250 *mid = p->private_data;
  110. struct uart_8250_port *up = up_to_u8250p(p);
  111. unsigned int fisr = serial_port_in(p, INTEL_MID_UART_DNV_FISR);
  112. u32 status;
  113. int ret = 0;
  114. int err;
  115. if (fisr & BIT(2)) {
  116. err = hsu_dma_get_status(&mid->dma_chip, 1, &status);
  117. if (err > 0) {
  118. serial8250_rx_dma_flush(up);
  119. ret |= 1;
  120. } else if (err == 0)
  121. ret |= hsu_dma_do_irq(&mid->dma_chip, 1, status);
  122. }
  123. if (fisr & BIT(1)) {
  124. err = hsu_dma_get_status(&mid->dma_chip, 0, &status);
  125. if (err > 0)
  126. ret |= 1;
  127. else if (err == 0)
  128. ret |= hsu_dma_do_irq(&mid->dma_chip, 0, status);
  129. }
  130. if (fisr & BIT(0))
  131. ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
  132. return IRQ_RETVAL(ret);
  133. }
  134. #define DNV_DMA_CHAN_OFFSET 0x80
  135. static int dnv_setup(struct mid8250 *mid, struct uart_port *p)
  136. {
  137. struct hsu_dma_chip *chip = &mid->dma_chip;
  138. struct pci_dev *pdev = to_pci_dev(p->dev);
  139. unsigned int bar = FL_GET_BASE(mid->board->flags);
  140. int ret;
  141. pci_set_master(pdev);
  142. ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
  143. if (ret < 0)
  144. return ret;
  145. p->irq = pci_irq_vector(pdev, 0);
  146. chip->dev = &pdev->dev;
  147. chip->irq = pci_irq_vector(pdev, 0);
  148. chip->regs = p->membase;
  149. chip->length = pci_resource_len(pdev, bar);
  150. chip->offset = DNV_DMA_CHAN_OFFSET;
  151. /* Falling back to PIO mode if DMA probing fails */
  152. ret = hsu_dma_probe(chip);
  153. if (ret)
  154. return 0;
  155. mid->dma_dev = pdev;
  156. p->handle_irq = dnv_handle_irq;
  157. return 0;
  158. }
  159. static void dnv_exit(struct mid8250 *mid)
  160. {
  161. if (!mid->dma_dev)
  162. return;
  163. hsu_dma_remove(&mid->dma_chip);
  164. }
  165. /*****************************************************************************/
  166. static void mid8250_set_termios(struct uart_port *p,
  167. struct ktermios *termios,
  168. struct ktermios *old)
  169. {
  170. unsigned int baud = tty_termios_baud_rate(termios);
  171. struct mid8250 *mid = p->private_data;
  172. unsigned short ps = 16;
  173. unsigned long fuart = baud * ps;
  174. unsigned long w = BIT(24) - 1;
  175. unsigned long mul, div;
  176. /* Gracefully handle the B0 case: fall back to B9600 */
  177. fuart = fuart ? fuart : 9600 * 16;
  178. if (mid->board->freq < fuart) {
  179. /* Find prescaler value that satisfies Fuart < Fref */
  180. if (mid->board->freq > baud)
  181. ps = mid->board->freq / baud; /* baud rate too high */
  182. else
  183. ps = 1; /* PLL case */
  184. fuart = baud * ps;
  185. } else {
  186. /* Get Fuart closer to Fref */
  187. fuart *= rounddown_pow_of_two(mid->board->freq / fuart);
  188. }
  189. rational_best_approximation(fuart, mid->board->freq, w, w, &mul, &div);
  190. p->uartclk = fuart * 16 / ps; /* core uses ps = 16 always */
  191. writel(ps, p->membase + INTEL_MID_UART_PS); /* set PS */
  192. writel(mul, p->membase + INTEL_MID_UART_MUL); /* set MUL */
  193. writel(div, p->membase + INTEL_MID_UART_DIV);
  194. serial8250_do_set_termios(p, termios, old);
  195. }
  196. static bool mid8250_dma_filter(struct dma_chan *chan, void *param)
  197. {
  198. struct hsu_dma_slave *s = param;
  199. if (s->dma_dev != chan->device->dev || s->chan_id != chan->chan_id)
  200. return false;
  201. chan->private = s;
  202. return true;
  203. }
  204. static int mid8250_dma_setup(struct mid8250 *mid, struct uart_8250_port *port)
  205. {
  206. struct uart_8250_dma *dma = &mid->dma;
  207. struct device *dev = port->port.dev;
  208. struct hsu_dma_slave *rx_param;
  209. struct hsu_dma_slave *tx_param;
  210. if (!mid->dma_dev)
  211. return 0;
  212. rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL);
  213. if (!rx_param)
  214. return -ENOMEM;
  215. tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL);
  216. if (!tx_param)
  217. return -ENOMEM;
  218. rx_param->chan_id = mid->dma_index * 2 + 1;
  219. tx_param->chan_id = mid->dma_index * 2;
  220. dma->rxconf.src_maxburst = 64;
  221. dma->txconf.dst_maxburst = 64;
  222. rx_param->dma_dev = &mid->dma_dev->dev;
  223. tx_param->dma_dev = &mid->dma_dev->dev;
  224. dma->fn = mid8250_dma_filter;
  225. dma->rx_param = rx_param;
  226. dma->tx_param = tx_param;
  227. port->dma = dma;
  228. return 0;
  229. }
  230. static int mid8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  231. {
  232. struct uart_8250_port uart;
  233. struct mid8250 *mid;
  234. unsigned int bar;
  235. int ret;
  236. ret = pcim_enable_device(pdev);
  237. if (ret)
  238. return ret;
  239. mid = devm_kzalloc(&pdev->dev, sizeof(*mid), GFP_KERNEL);
  240. if (!mid)
  241. return -ENOMEM;
  242. mid->board = (struct mid8250_board *)id->driver_data;
  243. bar = FL_GET_BASE(mid->board->flags);
  244. memset(&uart, 0, sizeof(struct uart_8250_port));
  245. uart.port.dev = &pdev->dev;
  246. uart.port.irq = pdev->irq;
  247. uart.port.private_data = mid;
  248. uart.port.type = PORT_16750;
  249. uart.port.iotype = UPIO_MEM;
  250. uart.port.uartclk = mid->board->base_baud * 16;
  251. uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE;
  252. uart.port.set_termios = mid8250_set_termios;
  253. uart.port.mapbase = pci_resource_start(pdev, bar);
  254. uart.port.membase = pcim_iomap(pdev, bar, 0);
  255. if (!uart.port.membase)
  256. return -ENOMEM;
  257. if (mid->board->setup) {
  258. ret = mid->board->setup(mid, &uart.port);
  259. if (ret)
  260. return ret;
  261. }
  262. ret = mid8250_dma_setup(mid, &uart);
  263. if (ret)
  264. goto err;
  265. ret = serial8250_register_8250_port(&uart);
  266. if (ret < 0)
  267. goto err;
  268. mid->line = ret;
  269. pci_set_drvdata(pdev, mid);
  270. return 0;
  271. err:
  272. if (mid->board->exit)
  273. mid->board->exit(mid);
  274. return ret;
  275. }
  276. static void mid8250_remove(struct pci_dev *pdev)
  277. {
  278. struct mid8250 *mid = pci_get_drvdata(pdev);
  279. serial8250_unregister_port(mid->line);
  280. if (mid->board->exit)
  281. mid->board->exit(mid);
  282. }
  283. static const struct mid8250_board pnw_board = {
  284. .flags = FL_BASE0,
  285. .freq = 50000000,
  286. .base_baud = 115200,
  287. .setup = pnw_setup,
  288. };
  289. static const struct mid8250_board tng_board = {
  290. .flags = FL_BASE0,
  291. .freq = 38400000,
  292. .base_baud = 1843200,
  293. .setup = tng_setup,
  294. };
  295. static const struct mid8250_board dnv_board = {
  296. .flags = FL_BASE1,
  297. .freq = 133333333,
  298. .base_baud = 115200,
  299. .setup = dnv_setup,
  300. .exit = dnv_exit,
  301. };
  302. #define MID_DEVICE(id, board) { PCI_VDEVICE(INTEL, id), (kernel_ulong_t)&board }
  303. static const struct pci_device_id pci_ids[] = {
  304. MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART1, pnw_board),
  305. MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART2, pnw_board),
  306. MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART3, pnw_board),
  307. MID_DEVICE(PCI_DEVICE_ID_INTEL_TNG_UART, tng_board),
  308. MID_DEVICE(PCI_DEVICE_ID_INTEL_DNV_UART, dnv_board),
  309. { },
  310. };
  311. MODULE_DEVICE_TABLE(pci, pci_ids);
  312. static struct pci_driver mid8250_pci_driver = {
  313. .name = "8250_mid",
  314. .id_table = pci_ids,
  315. .probe = mid8250_probe,
  316. .remove = mid8250_remove,
  317. };
  318. module_pci_driver(mid8250_pci_driver);
  319. MODULE_AUTHOR("Intel Corporation");
  320. MODULE_LICENSE("GPL v2");
  321. MODULE_DESCRIPTION("Intel MID UART driver");