8250_lpss.c 9.2 KB

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  1. /*
  2. * 8250_lpss.c - Driver for UART on Intel Braswell and various other Intel SoCs
  3. *
  4. * Copyright (C) 2016 Intel Corporation
  5. * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/bitops.h>
  12. #include <linux/module.h>
  13. #include <linux/pci.h>
  14. #include <linux/rational.h>
  15. #include <linux/dmaengine.h>
  16. #include <linux/dma/dw.h>
  17. #include "8250.h"
  18. #define PCI_DEVICE_ID_INTEL_QRK_UARTx 0x0936
  19. #define PCI_DEVICE_ID_INTEL_BYT_UART1 0x0f0a
  20. #define PCI_DEVICE_ID_INTEL_BYT_UART2 0x0f0c
  21. #define PCI_DEVICE_ID_INTEL_BSW_UART1 0x228a
  22. #define PCI_DEVICE_ID_INTEL_BSW_UART2 0x228c
  23. #define PCI_DEVICE_ID_INTEL_BDW_UART1 0x9ce3
  24. #define PCI_DEVICE_ID_INTEL_BDW_UART2 0x9ce4
  25. /* Intel LPSS specific registers */
  26. #define BYT_PRV_CLK 0x800
  27. #define BYT_PRV_CLK_EN BIT(0)
  28. #define BYT_PRV_CLK_M_VAL_SHIFT 1
  29. #define BYT_PRV_CLK_N_VAL_SHIFT 16
  30. #define BYT_PRV_CLK_UPDATE BIT(31)
  31. #define BYT_TX_OVF_INT 0x820
  32. #define BYT_TX_OVF_INT_MASK BIT(1)
  33. struct lpss8250;
  34. struct lpss8250_board {
  35. unsigned long freq;
  36. unsigned int base_baud;
  37. int (*setup)(struct lpss8250 *, struct uart_port *p);
  38. void (*exit)(struct lpss8250 *);
  39. };
  40. struct lpss8250 {
  41. int line;
  42. struct lpss8250_board *board;
  43. /* DMA parameters */
  44. struct uart_8250_dma dma;
  45. struct dw_dma_chip dma_chip;
  46. struct dw_dma_slave dma_param;
  47. u8 dma_maxburst;
  48. };
  49. static void byt_set_termios(struct uart_port *p, struct ktermios *termios,
  50. struct ktermios *old)
  51. {
  52. unsigned int baud = tty_termios_baud_rate(termios);
  53. struct lpss8250 *lpss = p->private_data;
  54. unsigned long fref = lpss->board->freq, fuart = baud * 16;
  55. unsigned long w = BIT(15) - 1;
  56. unsigned long m, n;
  57. u32 reg;
  58. /* Gracefully handle the B0 case: fall back to B9600 */
  59. fuart = fuart ? fuart : 9600 * 16;
  60. /* Get Fuart closer to Fref */
  61. fuart *= rounddown_pow_of_two(fref / fuart);
  62. /*
  63. * For baud rates 0.5M, 1M, 1.5M, 2M, 2.5M, 3M, 3.5M and 4M the
  64. * dividers must be adjusted.
  65. *
  66. * uartclk = (m / n) * 100 MHz, where m <= n
  67. */
  68. rational_best_approximation(fuart, fref, w, w, &m, &n);
  69. p->uartclk = fuart;
  70. /* Reset the clock */
  71. reg = (m << BYT_PRV_CLK_M_VAL_SHIFT) | (n << BYT_PRV_CLK_N_VAL_SHIFT);
  72. writel(reg, p->membase + BYT_PRV_CLK);
  73. reg |= BYT_PRV_CLK_EN | BYT_PRV_CLK_UPDATE;
  74. writel(reg, p->membase + BYT_PRV_CLK);
  75. p->status &= ~UPSTAT_AUTOCTS;
  76. if (termios->c_cflag & CRTSCTS)
  77. p->status |= UPSTAT_AUTOCTS;
  78. serial8250_do_set_termios(p, termios, old);
  79. }
  80. static unsigned int byt_get_mctrl(struct uart_port *port)
  81. {
  82. unsigned int ret = serial8250_do_get_mctrl(port);
  83. /* Force DCD and DSR signals to permanently be reported as active */
  84. ret |= TIOCM_CAR | TIOCM_DSR;
  85. return ret;
  86. }
  87. static int byt_serial_setup(struct lpss8250 *lpss, struct uart_port *port)
  88. {
  89. struct dw_dma_slave *param = &lpss->dma_param;
  90. struct uart_8250_port *up = up_to_u8250p(port);
  91. struct pci_dev *pdev = to_pci_dev(port->dev);
  92. unsigned int dma_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);
  93. struct pci_dev *dma_dev = pci_get_slot(pdev->bus, dma_devfn);
  94. switch (pdev->device) {
  95. case PCI_DEVICE_ID_INTEL_BYT_UART1:
  96. case PCI_DEVICE_ID_INTEL_BSW_UART1:
  97. case PCI_DEVICE_ID_INTEL_BDW_UART1:
  98. param->src_id = 3;
  99. param->dst_id = 2;
  100. break;
  101. case PCI_DEVICE_ID_INTEL_BYT_UART2:
  102. case PCI_DEVICE_ID_INTEL_BSW_UART2:
  103. case PCI_DEVICE_ID_INTEL_BDW_UART2:
  104. param->src_id = 5;
  105. param->dst_id = 4;
  106. break;
  107. default:
  108. return -EINVAL;
  109. }
  110. param->dma_dev = &dma_dev->dev;
  111. param->m_master = 0;
  112. param->p_master = 1;
  113. /* TODO: Detect FIFO size automaticaly for DesignWare 8250 */
  114. port->fifosize = 64;
  115. up->tx_loadsz = 64;
  116. lpss->dma_maxburst = 16;
  117. port->set_termios = byt_set_termios;
  118. port->get_mctrl = byt_get_mctrl;
  119. /* Disable TX counter interrupts */
  120. writel(BYT_TX_OVF_INT_MASK, port->membase + BYT_TX_OVF_INT);
  121. return 0;
  122. }
  123. #ifdef CONFIG_SERIAL_8250_DMA
  124. static const struct dw_dma_platform_data qrk_serial_dma_pdata = {
  125. .nr_channels = 2,
  126. .is_private = true,
  127. .chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
  128. .chan_priority = CHAN_PRIORITY_ASCENDING,
  129. .block_size = 4095,
  130. .nr_masters = 1,
  131. .data_width = {4},
  132. .multi_block = {0},
  133. };
  134. static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port)
  135. {
  136. struct uart_8250_dma *dma = &lpss->dma;
  137. struct dw_dma_chip *chip = &lpss->dma_chip;
  138. struct dw_dma_slave *param = &lpss->dma_param;
  139. struct pci_dev *pdev = to_pci_dev(port->dev);
  140. int ret;
  141. chip->dev = &pdev->dev;
  142. chip->irq = pci_irq_vector(pdev, 0);
  143. chip->regs = pci_ioremap_bar(pdev, 1);
  144. chip->pdata = &qrk_serial_dma_pdata;
  145. /* Falling back to PIO mode if DMA probing fails */
  146. ret = dw_dma_probe(chip);
  147. if (ret)
  148. return;
  149. pci_set_master(pdev);
  150. pci_try_set_mwi(pdev);
  151. /* Special DMA address for UART */
  152. dma->rx_dma_addr = 0xfffff000;
  153. dma->tx_dma_addr = 0xfffff000;
  154. param->dma_dev = &pdev->dev;
  155. param->src_id = 0;
  156. param->dst_id = 1;
  157. param->hs_polarity = true;
  158. lpss->dma_maxburst = 8;
  159. }
  160. static void qrk_serial_exit_dma(struct lpss8250 *lpss)
  161. {
  162. struct dw_dma_slave *param = &lpss->dma_param;
  163. if (!param->dma_dev)
  164. return;
  165. dw_dma_remove(&lpss->dma_chip);
  166. }
  167. #else /* CONFIG_SERIAL_8250_DMA */
  168. static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port) {}
  169. static void qrk_serial_exit_dma(struct lpss8250 *lpss) {}
  170. #endif /* !CONFIG_SERIAL_8250_DMA */
  171. static int qrk_serial_setup(struct lpss8250 *lpss, struct uart_port *port)
  172. {
  173. struct pci_dev *pdev = to_pci_dev(port->dev);
  174. int ret;
  175. ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
  176. if (ret < 0)
  177. return ret;
  178. port->irq = pci_irq_vector(pdev, 0);
  179. qrk_serial_setup_dma(lpss, port);
  180. return 0;
  181. }
  182. static void qrk_serial_exit(struct lpss8250 *lpss)
  183. {
  184. qrk_serial_exit_dma(lpss);
  185. }
  186. static bool lpss8250_dma_filter(struct dma_chan *chan, void *param)
  187. {
  188. struct dw_dma_slave *dws = param;
  189. if (dws->dma_dev != chan->device->dev)
  190. return false;
  191. chan->private = dws;
  192. return true;
  193. }
  194. static int lpss8250_dma_setup(struct lpss8250 *lpss, struct uart_8250_port *port)
  195. {
  196. struct uart_8250_dma *dma = &lpss->dma;
  197. struct dw_dma_slave *rx_param, *tx_param;
  198. struct device *dev = port->port.dev;
  199. if (!lpss->dma_param.dma_dev)
  200. return 0;
  201. rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL);
  202. if (!rx_param)
  203. return -ENOMEM;
  204. tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL);
  205. if (!tx_param)
  206. return -ENOMEM;
  207. *rx_param = lpss->dma_param;
  208. dma->rxconf.src_maxburst = lpss->dma_maxburst;
  209. *tx_param = lpss->dma_param;
  210. dma->txconf.dst_maxburst = lpss->dma_maxburst;
  211. dma->fn = lpss8250_dma_filter;
  212. dma->rx_param = rx_param;
  213. dma->tx_param = tx_param;
  214. port->dma = dma;
  215. return 0;
  216. }
  217. static int lpss8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  218. {
  219. struct uart_8250_port uart;
  220. struct lpss8250 *lpss;
  221. int ret;
  222. ret = pcim_enable_device(pdev);
  223. if (ret)
  224. return ret;
  225. lpss = devm_kzalloc(&pdev->dev, sizeof(*lpss), GFP_KERNEL);
  226. if (!lpss)
  227. return -ENOMEM;
  228. lpss->board = (struct lpss8250_board *)id->driver_data;
  229. memset(&uart, 0, sizeof(struct uart_8250_port));
  230. uart.port.dev = &pdev->dev;
  231. uart.port.irq = pdev->irq;
  232. uart.port.private_data = lpss;
  233. uart.port.type = PORT_16550A;
  234. uart.port.iotype = UPIO_MEM;
  235. uart.port.regshift = 2;
  236. uart.port.uartclk = lpss->board->base_baud * 16;
  237. uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE;
  238. uart.capabilities = UART_CAP_FIFO | UART_CAP_AFE;
  239. uart.port.mapbase = pci_resource_start(pdev, 0);
  240. uart.port.membase = pcim_iomap(pdev, 0, 0);
  241. if (!uart.port.membase)
  242. return -ENOMEM;
  243. ret = lpss->board->setup(lpss, &uart.port);
  244. if (ret)
  245. return ret;
  246. ret = lpss8250_dma_setup(lpss, &uart);
  247. if (ret)
  248. goto err_exit;
  249. ret = serial8250_register_8250_port(&uart);
  250. if (ret < 0)
  251. goto err_exit;
  252. lpss->line = ret;
  253. pci_set_drvdata(pdev, lpss);
  254. return 0;
  255. err_exit:
  256. if (lpss->board->exit)
  257. lpss->board->exit(lpss);
  258. return ret;
  259. }
  260. static void lpss8250_remove(struct pci_dev *pdev)
  261. {
  262. struct lpss8250 *lpss = pci_get_drvdata(pdev);
  263. serial8250_unregister_port(lpss->line);
  264. if (lpss->board->exit)
  265. lpss->board->exit(lpss);
  266. }
  267. static const struct lpss8250_board byt_board = {
  268. .freq = 100000000,
  269. .base_baud = 2764800,
  270. .setup = byt_serial_setup,
  271. };
  272. static const struct lpss8250_board qrk_board = {
  273. .freq = 44236800,
  274. .base_baud = 2764800,
  275. .setup = qrk_serial_setup,
  276. .exit = qrk_serial_exit,
  277. };
  278. #define LPSS_DEVICE(id, board) { PCI_VDEVICE(INTEL, id), (kernel_ulong_t)&board }
  279. static const struct pci_device_id pci_ids[] = {
  280. LPSS_DEVICE(PCI_DEVICE_ID_INTEL_QRK_UARTx, qrk_board),
  281. LPSS_DEVICE(PCI_DEVICE_ID_INTEL_BYT_UART1, byt_board),
  282. LPSS_DEVICE(PCI_DEVICE_ID_INTEL_BYT_UART2, byt_board),
  283. LPSS_DEVICE(PCI_DEVICE_ID_INTEL_BSW_UART1, byt_board),
  284. LPSS_DEVICE(PCI_DEVICE_ID_INTEL_BSW_UART2, byt_board),
  285. LPSS_DEVICE(PCI_DEVICE_ID_INTEL_BDW_UART1, byt_board),
  286. LPSS_DEVICE(PCI_DEVICE_ID_INTEL_BDW_UART2, byt_board),
  287. { },
  288. };
  289. MODULE_DEVICE_TABLE(pci, pci_ids);
  290. static struct pci_driver lpss8250_pci_driver = {
  291. .name = "8250_lpss",
  292. .id_table = pci_ids,
  293. .probe = lpss8250_probe,
  294. .remove = lpss8250_remove,
  295. };
  296. module_pci_driver(lpss8250_pci_driver);
  297. MODULE_AUTHOR("Intel Corporation");
  298. MODULE_LICENSE("GPL v2");
  299. MODULE_DESCRIPTION("Intel LPSS UART driver");