qe_tdm.c 6.7 KB

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  1. /*
  2. * Copyright (C) 2015 Freescale Semiconductor, Inc. All rights reserved.
  3. *
  4. * Authors: Zhao Qiang <qiang.zhao@nxp.com>
  5. *
  6. * Description:
  7. * QE TDM API Set - TDM specific routines implementations.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #include <linux/io.h>
  15. #include <linux/kernel.h>
  16. #include <linux/of_address.h>
  17. #include <linux/of_irq.h>
  18. #include <linux/of_platform.h>
  19. #include <soc/fsl/qe/qe_tdm.h>
  20. static int set_tdm_framer(const char *tdm_framer_type)
  21. {
  22. if (strcmp(tdm_framer_type, "e1") == 0)
  23. return TDM_FRAMER_E1;
  24. else if (strcmp(tdm_framer_type, "t1") == 0)
  25. return TDM_FRAMER_T1;
  26. else
  27. return -EINVAL;
  28. }
  29. static void set_si_param(struct ucc_tdm *utdm, struct ucc_tdm_info *ut_info)
  30. {
  31. struct si_mode_info *si_info = &ut_info->si_info;
  32. if (utdm->tdm_mode == TDM_INTERNAL_LOOPBACK) {
  33. si_info->simr_crt = 1;
  34. si_info->simr_rfsd = 0;
  35. }
  36. }
  37. int ucc_of_parse_tdm(struct device_node *np, struct ucc_tdm *utdm,
  38. struct ucc_tdm_info *ut_info)
  39. {
  40. const char *sprop;
  41. int ret = 0;
  42. u32 val;
  43. struct resource *res;
  44. struct device_node *np2;
  45. static int siram_init_flag;
  46. struct platform_device *pdev;
  47. sprop = of_get_property(np, "fsl,rx-sync-clock", NULL);
  48. if (sprop) {
  49. ut_info->uf_info.rx_sync = qe_clock_source(sprop);
  50. if ((ut_info->uf_info.rx_sync < QE_CLK_NONE) ||
  51. (ut_info->uf_info.rx_sync > QE_RSYNC_PIN)) {
  52. pr_err("QE-TDM: Invalid rx-sync-clock property\n");
  53. return -EINVAL;
  54. }
  55. } else {
  56. pr_err("QE-TDM: Invalid rx-sync-clock property\n");
  57. return -EINVAL;
  58. }
  59. sprop = of_get_property(np, "fsl,tx-sync-clock", NULL);
  60. if (sprop) {
  61. ut_info->uf_info.tx_sync = qe_clock_source(sprop);
  62. if ((ut_info->uf_info.tx_sync < QE_CLK_NONE) ||
  63. (ut_info->uf_info.tx_sync > QE_TSYNC_PIN)) {
  64. pr_err("QE-TDM: Invalid tx-sync-clock property\n");
  65. return -EINVAL;
  66. }
  67. } else {
  68. pr_err("QE-TDM: Invalid tx-sync-clock property\n");
  69. return -EINVAL;
  70. }
  71. ret = of_property_read_u32_index(np, "fsl,tx-timeslot-mask", 0, &val);
  72. if (ret) {
  73. pr_err("QE-TDM: Invalid tx-timeslot-mask property\n");
  74. return -EINVAL;
  75. }
  76. utdm->tx_ts_mask = val;
  77. ret = of_property_read_u32_index(np, "fsl,rx-timeslot-mask", 0, &val);
  78. if (ret) {
  79. ret = -EINVAL;
  80. pr_err("QE-TDM: Invalid rx-timeslot-mask property\n");
  81. return ret;
  82. }
  83. utdm->rx_ts_mask = val;
  84. ret = of_property_read_u32_index(np, "fsl,tdm-id", 0, &val);
  85. if (ret) {
  86. ret = -EINVAL;
  87. pr_err("QE-TDM: No fsl,tdm-id property for this UCC\n");
  88. return ret;
  89. }
  90. utdm->tdm_port = val;
  91. ut_info->uf_info.tdm_num = utdm->tdm_port;
  92. if (of_property_read_bool(np, "fsl,tdm-internal-loopback"))
  93. utdm->tdm_mode = TDM_INTERNAL_LOOPBACK;
  94. else
  95. utdm->tdm_mode = TDM_NORMAL;
  96. sprop = of_get_property(np, "fsl,tdm-framer-type", NULL);
  97. if (!sprop) {
  98. ret = -EINVAL;
  99. pr_err("QE-TDM: No tdm-framer-type property for UCC\n");
  100. return ret;
  101. }
  102. ret = set_tdm_framer(sprop);
  103. if (ret < 0)
  104. return -EINVAL;
  105. utdm->tdm_framer_type = ret;
  106. ret = of_property_read_u32_index(np, "fsl,siram-entry-id", 0, &val);
  107. if (ret) {
  108. ret = -EINVAL;
  109. pr_err("QE-TDM: No siram entry id for UCC\n");
  110. return ret;
  111. }
  112. utdm->siram_entry_id = val;
  113. set_si_param(utdm, ut_info);
  114. np2 = of_find_compatible_node(NULL, NULL, "fsl,t1040-qe-si");
  115. if (!np2)
  116. return -EINVAL;
  117. pdev = of_find_device_by_node(np2);
  118. if (!pdev) {
  119. pr_err("%s: failed to lookup pdev\n", np2->name);
  120. of_node_put(np2);
  121. return -EINVAL;
  122. }
  123. of_node_put(np2);
  124. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  125. utdm->si_regs = devm_ioremap_resource(&pdev->dev, res);
  126. if (IS_ERR(utdm->si_regs)) {
  127. ret = PTR_ERR(utdm->si_regs);
  128. goto err_miss_siram_property;
  129. }
  130. np2 = of_find_compatible_node(NULL, NULL, "fsl,t1040-qe-siram");
  131. if (!np2) {
  132. ret = -EINVAL;
  133. goto err_miss_siram_property;
  134. }
  135. pdev = of_find_device_by_node(np2);
  136. if (!pdev) {
  137. ret = -EINVAL;
  138. pr_err("%s: failed to lookup pdev\n", np2->name);
  139. of_node_put(np2);
  140. goto err_miss_siram_property;
  141. }
  142. of_node_put(np2);
  143. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  144. utdm->siram = devm_ioremap_resource(&pdev->dev, res);
  145. if (IS_ERR(utdm->siram)) {
  146. ret = PTR_ERR(utdm->siram);
  147. goto err_miss_siram_property;
  148. }
  149. if (siram_init_flag == 0) {
  150. memset_io(utdm->siram, 0, resource_size(res));
  151. siram_init_flag = 1;
  152. }
  153. return ret;
  154. err_miss_siram_property:
  155. devm_iounmap(&pdev->dev, utdm->si_regs);
  156. return ret;
  157. }
  158. void ucc_tdm_init(struct ucc_tdm *utdm, struct ucc_tdm_info *ut_info)
  159. {
  160. struct si1 __iomem *si_regs;
  161. u16 __iomem *siram;
  162. u16 siram_entry_valid;
  163. u16 siram_entry_closed;
  164. u16 ucc_num;
  165. u8 csel;
  166. u16 sixmr;
  167. u16 tdm_port;
  168. u32 siram_entry_id;
  169. u32 mask;
  170. int i;
  171. si_regs = utdm->si_regs;
  172. siram = utdm->siram;
  173. ucc_num = ut_info->uf_info.ucc_num;
  174. tdm_port = utdm->tdm_port;
  175. siram_entry_id = utdm->siram_entry_id;
  176. if (utdm->tdm_framer_type == TDM_FRAMER_T1)
  177. utdm->num_of_ts = 24;
  178. if (utdm->tdm_framer_type == TDM_FRAMER_E1)
  179. utdm->num_of_ts = 32;
  180. /* set siram table */
  181. csel = (ucc_num < 4) ? ucc_num + 9 : ucc_num - 3;
  182. siram_entry_valid = SIR_CSEL(csel) | SIR_BYTE | SIR_CNT(0);
  183. siram_entry_closed = SIR_IDLE | SIR_BYTE | SIR_CNT(0);
  184. for (i = 0; i < utdm->num_of_ts; i++) {
  185. mask = 0x01 << i;
  186. if (utdm->tx_ts_mask & mask)
  187. iowrite16be(siram_entry_valid,
  188. &siram[siram_entry_id * 32 + i]);
  189. else
  190. iowrite16be(siram_entry_closed,
  191. &siram[siram_entry_id * 32 + i]);
  192. if (utdm->rx_ts_mask & mask)
  193. iowrite16be(siram_entry_valid,
  194. &siram[siram_entry_id * 32 + 0x200 + i]);
  195. else
  196. iowrite16be(siram_entry_closed,
  197. &siram[siram_entry_id * 32 + 0x200 + i]);
  198. }
  199. setbits16(&siram[(siram_entry_id * 32) + (utdm->num_of_ts - 1)],
  200. SIR_LAST);
  201. setbits16(&siram[(siram_entry_id * 32) + 0x200 + (utdm->num_of_ts - 1)],
  202. SIR_LAST);
  203. /* Set SIxMR register */
  204. sixmr = SIMR_SAD(siram_entry_id);
  205. sixmr &= ~SIMR_SDM_MASK;
  206. if (utdm->tdm_mode == TDM_INTERNAL_LOOPBACK)
  207. sixmr |= SIMR_SDM_INTERNAL_LOOPBACK;
  208. else
  209. sixmr |= SIMR_SDM_NORMAL;
  210. sixmr |= SIMR_RFSD(ut_info->si_info.simr_rfsd) |
  211. SIMR_TFSD(ut_info->si_info.simr_tfsd);
  212. if (ut_info->si_info.simr_crt)
  213. sixmr |= SIMR_CRT;
  214. if (ut_info->si_info.simr_sl)
  215. sixmr |= SIMR_SL;
  216. if (ut_info->si_info.simr_ce)
  217. sixmr |= SIMR_CE;
  218. if (ut_info->si_info.simr_fe)
  219. sixmr |= SIMR_FE;
  220. if (ut_info->si_info.simr_gm)
  221. sixmr |= SIMR_GM;
  222. switch (tdm_port) {
  223. case 0:
  224. iowrite16be(sixmr, &si_regs->sixmr1[0]);
  225. break;
  226. case 1:
  227. iowrite16be(sixmr, &si_regs->sixmr1[1]);
  228. break;
  229. case 2:
  230. iowrite16be(sixmr, &si_regs->sixmr1[2]);
  231. break;
  232. case 3:
  233. iowrite16be(sixmr, &si_regs->sixmr1[3]);
  234. break;
  235. default:
  236. pr_err("QE-TDM: can not find tdm sixmr reg\n");
  237. break;
  238. }
  239. }