pcie-dpc.c 5.0 KB

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  1. /*
  2. * PCI Express Downstream Port Containment services driver
  3. * Author: Keith Busch <keith.busch@intel.com>
  4. *
  5. * Copyright (C) 2016 Intel Corp.
  6. *
  7. * This file is subject to the terms and conditions of the GNU General Public
  8. * License. See the file "COPYING" in the main directory of this archive
  9. * for more details.
  10. */
  11. #include <linux/delay.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/init.h>
  14. #include <linux/pci.h>
  15. #include <linux/pcieport_if.h>
  16. struct dpc_dev {
  17. struct pcie_device *dev;
  18. struct work_struct work;
  19. int cap_pos;
  20. bool rp;
  21. };
  22. static int dpc_wait_rp_inactive(struct dpc_dev *dpc)
  23. {
  24. unsigned long timeout = jiffies + HZ;
  25. struct pci_dev *pdev = dpc->dev->port;
  26. u16 status;
  27. pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS, &status);
  28. while (status & PCI_EXP_DPC_RP_BUSY &&
  29. !time_after(jiffies, timeout)) {
  30. msleep(10);
  31. pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS, &status);
  32. }
  33. if (status & PCI_EXP_DPC_RP_BUSY) {
  34. dev_warn(&pdev->dev, "DPC root port still busy\n");
  35. return -EBUSY;
  36. }
  37. return 0;
  38. }
  39. static void dpc_wait_link_inactive(struct pci_dev *pdev)
  40. {
  41. unsigned long timeout = jiffies + HZ;
  42. u16 lnk_status;
  43. pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status);
  44. while (lnk_status & PCI_EXP_LNKSTA_DLLLA &&
  45. !time_after(jiffies, timeout)) {
  46. msleep(10);
  47. pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status);
  48. }
  49. if (lnk_status & PCI_EXP_LNKSTA_DLLLA)
  50. dev_warn(&pdev->dev, "Link state not disabled for DPC event\n");
  51. }
  52. static void interrupt_event_handler(struct work_struct *work)
  53. {
  54. struct dpc_dev *dpc = container_of(work, struct dpc_dev, work);
  55. struct pci_dev *dev, *temp, *pdev = dpc->dev->port;
  56. struct pci_bus *parent = pdev->subordinate;
  57. pci_lock_rescan_remove();
  58. list_for_each_entry_safe_reverse(dev, temp, &parent->devices,
  59. bus_list) {
  60. pci_dev_get(dev);
  61. pci_stop_and_remove_bus_device(dev);
  62. pci_dev_put(dev);
  63. }
  64. pci_unlock_rescan_remove();
  65. dpc_wait_link_inactive(pdev);
  66. if (dpc->rp && dpc_wait_rp_inactive(dpc))
  67. return;
  68. pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS,
  69. PCI_EXP_DPC_STATUS_TRIGGER | PCI_EXP_DPC_STATUS_INTERRUPT);
  70. }
  71. static irqreturn_t dpc_irq(int irq, void *context)
  72. {
  73. struct dpc_dev *dpc = (struct dpc_dev *)context;
  74. struct pci_dev *pdev = dpc->dev->port;
  75. u16 status, source;
  76. pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS, &status);
  77. pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_SOURCE_ID,
  78. &source);
  79. if (!status)
  80. return IRQ_NONE;
  81. dev_info(&dpc->dev->device, "DPC containment event, status:%#06x source:%#06x\n",
  82. status, source);
  83. if (status & PCI_EXP_DPC_STATUS_TRIGGER) {
  84. u16 reason = (status >> 1) & 0x3;
  85. u16 ext_reason = (status >> 5) & 0x3;
  86. dev_warn(&dpc->dev->device, "DPC %s detected, remove downstream devices\n",
  87. (reason == 0) ? "unmasked uncorrectable error" :
  88. (reason == 1) ? "ERR_NONFATAL" :
  89. (reason == 2) ? "ERR_FATAL" :
  90. (ext_reason == 0) ? "RP PIO error" :
  91. (ext_reason == 1) ? "software trigger" :
  92. "reserved error");
  93. schedule_work(&dpc->work);
  94. }
  95. return IRQ_HANDLED;
  96. }
  97. #define FLAG(x, y) (((x) & (y)) ? '+' : '-')
  98. static int dpc_probe(struct pcie_device *dev)
  99. {
  100. struct dpc_dev *dpc;
  101. struct pci_dev *pdev = dev->port;
  102. int status;
  103. u16 ctl, cap;
  104. dpc = devm_kzalloc(&dev->device, sizeof(*dpc), GFP_KERNEL);
  105. if (!dpc)
  106. return -ENOMEM;
  107. dpc->cap_pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_DPC);
  108. dpc->dev = dev;
  109. INIT_WORK(&dpc->work, interrupt_event_handler);
  110. set_service_data(dev, dpc);
  111. status = devm_request_irq(&dev->device, dev->irq, dpc_irq, IRQF_SHARED,
  112. "pcie-dpc", dpc);
  113. if (status) {
  114. dev_warn(&dev->device, "request IRQ%d failed: %d\n", dev->irq,
  115. status);
  116. return status;
  117. }
  118. pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CAP, &cap);
  119. pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, &ctl);
  120. dpc->rp = (cap & PCI_EXP_DPC_CAP_RP_EXT);
  121. ctl |= PCI_EXP_DPC_CTL_EN_NONFATAL | PCI_EXP_DPC_CTL_INT_EN;
  122. pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, ctl);
  123. dev_info(&dev->device, "DPC error containment capabilities: Int Msg #%d, RPExt%c PoisonedTLP%c SwTrigger%c RP PIO Log %d, DL_ActiveErr%c\n",
  124. cap & 0xf, FLAG(cap, PCI_EXP_DPC_CAP_RP_EXT),
  125. FLAG(cap, PCI_EXP_DPC_CAP_POISONED_TLP),
  126. FLAG(cap, PCI_EXP_DPC_CAP_SW_TRIGGER), (cap >> 8) & 0xf,
  127. FLAG(cap, PCI_EXP_DPC_CAP_DL_ACTIVE));
  128. return status;
  129. }
  130. static void dpc_remove(struct pcie_device *dev)
  131. {
  132. struct dpc_dev *dpc = get_service_data(dev);
  133. struct pci_dev *pdev = dev->port;
  134. u16 ctl;
  135. pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, &ctl);
  136. ctl &= ~(PCI_EXP_DPC_CTL_EN_NONFATAL | PCI_EXP_DPC_CTL_INT_EN);
  137. pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, ctl);
  138. }
  139. static struct pcie_port_service_driver dpcdriver = {
  140. .name = "dpc",
  141. .port_type = PCIE_ANY_PORT,
  142. .service = PCIE_PORT_SERVICE_DPC,
  143. .probe = dpc_probe,
  144. .remove = dpc_remove,
  145. };
  146. static int __init dpc_service_init(void)
  147. {
  148. return pcie_port_service_register(&dpcdriver);
  149. }
  150. device_initcall(dpc_service_init);