rdma.c 52 KB

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  1. /*
  2. * NVMe over Fabrics RDMA host code.
  3. * Copyright (c) 2015-2016 HGST, a Western Digital Company.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. */
  14. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  15. #include <linux/module.h>
  16. #include <linux/init.h>
  17. #include <linux/slab.h>
  18. #include <linux/err.h>
  19. #include <linux/string.h>
  20. #include <linux/atomic.h>
  21. #include <linux/blk-mq.h>
  22. #include <linux/types.h>
  23. #include <linux/list.h>
  24. #include <linux/mutex.h>
  25. #include <linux/scatterlist.h>
  26. #include <linux/nvme.h>
  27. #include <asm/unaligned.h>
  28. #include <rdma/ib_verbs.h>
  29. #include <rdma/rdma_cm.h>
  30. #include <linux/nvme-rdma.h>
  31. #include "nvme.h"
  32. #include "fabrics.h"
  33. #define NVME_RDMA_CONNECT_TIMEOUT_MS 1000 /* 1 second */
  34. #define NVME_RDMA_MAX_SEGMENT_SIZE 0xffffff /* 24-bit SGL field */
  35. #define NVME_RDMA_MAX_SEGMENTS 256
  36. #define NVME_RDMA_MAX_INLINE_SEGMENTS 1
  37. /*
  38. * We handle AEN commands ourselves and don't even let the
  39. * block layer know about them.
  40. */
  41. #define NVME_RDMA_NR_AEN_COMMANDS 1
  42. #define NVME_RDMA_AQ_BLKMQ_DEPTH \
  43. (NVMF_AQ_DEPTH - NVME_RDMA_NR_AEN_COMMANDS)
  44. struct nvme_rdma_device {
  45. struct ib_device *dev;
  46. struct ib_pd *pd;
  47. struct kref ref;
  48. struct list_head entry;
  49. };
  50. struct nvme_rdma_qe {
  51. struct ib_cqe cqe;
  52. void *data;
  53. u64 dma;
  54. };
  55. struct nvme_rdma_queue;
  56. struct nvme_rdma_request {
  57. struct nvme_request req;
  58. struct ib_mr *mr;
  59. struct nvme_rdma_qe sqe;
  60. struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS];
  61. u32 num_sge;
  62. int nents;
  63. bool inline_data;
  64. struct ib_reg_wr reg_wr;
  65. struct ib_cqe reg_cqe;
  66. struct nvme_rdma_queue *queue;
  67. struct sg_table sg_table;
  68. struct scatterlist first_sgl[];
  69. };
  70. enum nvme_rdma_queue_flags {
  71. NVME_RDMA_Q_CONNECTED = (1 << 0),
  72. NVME_RDMA_IB_QUEUE_ALLOCATED = (1 << 1),
  73. NVME_RDMA_Q_DELETING = (1 << 2),
  74. NVME_RDMA_Q_LIVE = (1 << 3),
  75. };
  76. struct nvme_rdma_queue {
  77. struct nvme_rdma_qe *rsp_ring;
  78. u8 sig_count;
  79. int queue_size;
  80. size_t cmnd_capsule_len;
  81. struct nvme_rdma_ctrl *ctrl;
  82. struct nvme_rdma_device *device;
  83. struct ib_cq *ib_cq;
  84. struct ib_qp *qp;
  85. unsigned long flags;
  86. struct rdma_cm_id *cm_id;
  87. int cm_error;
  88. struct completion cm_done;
  89. };
  90. struct nvme_rdma_ctrl {
  91. /* read and written in the hot path */
  92. spinlock_t lock;
  93. /* read only in the hot path */
  94. struct nvme_rdma_queue *queues;
  95. u32 queue_count;
  96. /* other member variables */
  97. struct blk_mq_tag_set tag_set;
  98. struct work_struct delete_work;
  99. struct work_struct reset_work;
  100. struct work_struct err_work;
  101. struct nvme_rdma_qe async_event_sqe;
  102. int reconnect_delay;
  103. struct delayed_work reconnect_work;
  104. struct list_head list;
  105. struct blk_mq_tag_set admin_tag_set;
  106. struct nvme_rdma_device *device;
  107. u64 cap;
  108. u32 max_fr_pages;
  109. union {
  110. struct sockaddr addr;
  111. struct sockaddr_in addr_in;
  112. };
  113. union {
  114. struct sockaddr src_addr;
  115. struct sockaddr_in src_addr_in;
  116. };
  117. struct nvme_ctrl ctrl;
  118. };
  119. static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl)
  120. {
  121. return container_of(ctrl, struct nvme_rdma_ctrl, ctrl);
  122. }
  123. static LIST_HEAD(device_list);
  124. static DEFINE_MUTEX(device_list_mutex);
  125. static LIST_HEAD(nvme_rdma_ctrl_list);
  126. static DEFINE_MUTEX(nvme_rdma_ctrl_mutex);
  127. static struct workqueue_struct *nvme_rdma_wq;
  128. /*
  129. * Disabling this option makes small I/O goes faster, but is fundamentally
  130. * unsafe. With it turned off we will have to register a global rkey that
  131. * allows read and write access to all physical memory.
  132. */
  133. static bool register_always = true;
  134. module_param(register_always, bool, 0444);
  135. MODULE_PARM_DESC(register_always,
  136. "Use memory registration even for contiguous memory regions");
  137. static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
  138. struct rdma_cm_event *event);
  139. static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
  140. /* XXX: really should move to a generic header sooner or later.. */
  141. static inline void put_unaligned_le24(u32 val, u8 *p)
  142. {
  143. *p++ = val;
  144. *p++ = val >> 8;
  145. *p++ = val >> 16;
  146. }
  147. static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue)
  148. {
  149. return queue - queue->ctrl->queues;
  150. }
  151. static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue)
  152. {
  153. return queue->cmnd_capsule_len - sizeof(struct nvme_command);
  154. }
  155. static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
  156. size_t capsule_size, enum dma_data_direction dir)
  157. {
  158. ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir);
  159. kfree(qe->data);
  160. }
  161. static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
  162. size_t capsule_size, enum dma_data_direction dir)
  163. {
  164. qe->data = kzalloc(capsule_size, GFP_KERNEL);
  165. if (!qe->data)
  166. return -ENOMEM;
  167. qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir);
  168. if (ib_dma_mapping_error(ibdev, qe->dma)) {
  169. kfree(qe->data);
  170. return -ENOMEM;
  171. }
  172. return 0;
  173. }
  174. static void nvme_rdma_free_ring(struct ib_device *ibdev,
  175. struct nvme_rdma_qe *ring, size_t ib_queue_size,
  176. size_t capsule_size, enum dma_data_direction dir)
  177. {
  178. int i;
  179. for (i = 0; i < ib_queue_size; i++)
  180. nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir);
  181. kfree(ring);
  182. }
  183. static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev,
  184. size_t ib_queue_size, size_t capsule_size,
  185. enum dma_data_direction dir)
  186. {
  187. struct nvme_rdma_qe *ring;
  188. int i;
  189. ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL);
  190. if (!ring)
  191. return NULL;
  192. for (i = 0; i < ib_queue_size; i++) {
  193. if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir))
  194. goto out_free_ring;
  195. }
  196. return ring;
  197. out_free_ring:
  198. nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir);
  199. return NULL;
  200. }
  201. static void nvme_rdma_qp_event(struct ib_event *event, void *context)
  202. {
  203. pr_debug("QP event %s (%d)\n",
  204. ib_event_msg(event->event), event->event);
  205. }
  206. static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue)
  207. {
  208. wait_for_completion_interruptible_timeout(&queue->cm_done,
  209. msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1);
  210. return queue->cm_error;
  211. }
  212. static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor)
  213. {
  214. struct nvme_rdma_device *dev = queue->device;
  215. struct ib_qp_init_attr init_attr;
  216. int ret;
  217. memset(&init_attr, 0, sizeof(init_attr));
  218. init_attr.event_handler = nvme_rdma_qp_event;
  219. /* +1 for drain */
  220. init_attr.cap.max_send_wr = factor * queue->queue_size + 1;
  221. /* +1 for drain */
  222. init_attr.cap.max_recv_wr = queue->queue_size + 1;
  223. init_attr.cap.max_recv_sge = 1;
  224. init_attr.cap.max_send_sge = 1 + NVME_RDMA_MAX_INLINE_SEGMENTS;
  225. init_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
  226. init_attr.qp_type = IB_QPT_RC;
  227. init_attr.send_cq = queue->ib_cq;
  228. init_attr.recv_cq = queue->ib_cq;
  229. ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr);
  230. queue->qp = queue->cm_id->qp;
  231. return ret;
  232. }
  233. static int nvme_rdma_reinit_request(void *data, struct request *rq)
  234. {
  235. struct nvme_rdma_ctrl *ctrl = data;
  236. struct nvme_rdma_device *dev = ctrl->device;
  237. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  238. int ret = 0;
  239. if (!req->mr->need_inval)
  240. goto out;
  241. ib_dereg_mr(req->mr);
  242. req->mr = ib_alloc_mr(dev->pd, IB_MR_TYPE_MEM_REG,
  243. ctrl->max_fr_pages);
  244. if (IS_ERR(req->mr)) {
  245. ret = PTR_ERR(req->mr);
  246. req->mr = NULL;
  247. goto out;
  248. }
  249. req->mr->need_inval = false;
  250. out:
  251. return ret;
  252. }
  253. static void __nvme_rdma_exit_request(struct nvme_rdma_ctrl *ctrl,
  254. struct request *rq, unsigned int queue_idx)
  255. {
  256. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  257. struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
  258. struct nvme_rdma_device *dev = queue->device;
  259. if (req->mr)
  260. ib_dereg_mr(req->mr);
  261. nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command),
  262. DMA_TO_DEVICE);
  263. }
  264. static void nvme_rdma_exit_request(void *data, struct request *rq,
  265. unsigned int hctx_idx, unsigned int rq_idx)
  266. {
  267. return __nvme_rdma_exit_request(data, rq, hctx_idx + 1);
  268. }
  269. static void nvme_rdma_exit_admin_request(void *data, struct request *rq,
  270. unsigned int hctx_idx, unsigned int rq_idx)
  271. {
  272. return __nvme_rdma_exit_request(data, rq, 0);
  273. }
  274. static int __nvme_rdma_init_request(struct nvme_rdma_ctrl *ctrl,
  275. struct request *rq, unsigned int queue_idx)
  276. {
  277. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  278. struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
  279. struct nvme_rdma_device *dev = queue->device;
  280. struct ib_device *ibdev = dev->dev;
  281. int ret;
  282. ret = nvme_rdma_alloc_qe(ibdev, &req->sqe, sizeof(struct nvme_command),
  283. DMA_TO_DEVICE);
  284. if (ret)
  285. return ret;
  286. req->mr = ib_alloc_mr(dev->pd, IB_MR_TYPE_MEM_REG,
  287. ctrl->max_fr_pages);
  288. if (IS_ERR(req->mr)) {
  289. ret = PTR_ERR(req->mr);
  290. goto out_free_qe;
  291. }
  292. req->queue = queue;
  293. return 0;
  294. out_free_qe:
  295. nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command),
  296. DMA_TO_DEVICE);
  297. return -ENOMEM;
  298. }
  299. static int nvme_rdma_init_request(void *data, struct request *rq,
  300. unsigned int hctx_idx, unsigned int rq_idx,
  301. unsigned int numa_node)
  302. {
  303. return __nvme_rdma_init_request(data, rq, hctx_idx + 1);
  304. }
  305. static int nvme_rdma_init_admin_request(void *data, struct request *rq,
  306. unsigned int hctx_idx, unsigned int rq_idx,
  307. unsigned int numa_node)
  308. {
  309. return __nvme_rdma_init_request(data, rq, 0);
  310. }
  311. static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
  312. unsigned int hctx_idx)
  313. {
  314. struct nvme_rdma_ctrl *ctrl = data;
  315. struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1];
  316. BUG_ON(hctx_idx >= ctrl->queue_count);
  317. hctx->driver_data = queue;
  318. return 0;
  319. }
  320. static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data,
  321. unsigned int hctx_idx)
  322. {
  323. struct nvme_rdma_ctrl *ctrl = data;
  324. struct nvme_rdma_queue *queue = &ctrl->queues[0];
  325. BUG_ON(hctx_idx != 0);
  326. hctx->driver_data = queue;
  327. return 0;
  328. }
  329. static void nvme_rdma_free_dev(struct kref *ref)
  330. {
  331. struct nvme_rdma_device *ndev =
  332. container_of(ref, struct nvme_rdma_device, ref);
  333. mutex_lock(&device_list_mutex);
  334. list_del(&ndev->entry);
  335. mutex_unlock(&device_list_mutex);
  336. ib_dealloc_pd(ndev->pd);
  337. kfree(ndev);
  338. }
  339. static void nvme_rdma_dev_put(struct nvme_rdma_device *dev)
  340. {
  341. kref_put(&dev->ref, nvme_rdma_free_dev);
  342. }
  343. static int nvme_rdma_dev_get(struct nvme_rdma_device *dev)
  344. {
  345. return kref_get_unless_zero(&dev->ref);
  346. }
  347. static struct nvme_rdma_device *
  348. nvme_rdma_find_get_device(struct rdma_cm_id *cm_id)
  349. {
  350. struct nvme_rdma_device *ndev;
  351. mutex_lock(&device_list_mutex);
  352. list_for_each_entry(ndev, &device_list, entry) {
  353. if (ndev->dev->node_guid == cm_id->device->node_guid &&
  354. nvme_rdma_dev_get(ndev))
  355. goto out_unlock;
  356. }
  357. ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
  358. if (!ndev)
  359. goto out_err;
  360. ndev->dev = cm_id->device;
  361. kref_init(&ndev->ref);
  362. ndev->pd = ib_alloc_pd(ndev->dev,
  363. register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY);
  364. if (IS_ERR(ndev->pd))
  365. goto out_free_dev;
  366. if (!(ndev->dev->attrs.device_cap_flags &
  367. IB_DEVICE_MEM_MGT_EXTENSIONS)) {
  368. dev_err(&ndev->dev->dev,
  369. "Memory registrations not supported.\n");
  370. goto out_free_pd;
  371. }
  372. list_add(&ndev->entry, &device_list);
  373. out_unlock:
  374. mutex_unlock(&device_list_mutex);
  375. return ndev;
  376. out_free_pd:
  377. ib_dealloc_pd(ndev->pd);
  378. out_free_dev:
  379. kfree(ndev);
  380. out_err:
  381. mutex_unlock(&device_list_mutex);
  382. return NULL;
  383. }
  384. static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue)
  385. {
  386. struct nvme_rdma_device *dev;
  387. struct ib_device *ibdev;
  388. if (!test_and_clear_bit(NVME_RDMA_IB_QUEUE_ALLOCATED, &queue->flags))
  389. return;
  390. dev = queue->device;
  391. ibdev = dev->dev;
  392. rdma_destroy_qp(queue->cm_id);
  393. ib_free_cq(queue->ib_cq);
  394. nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
  395. sizeof(struct nvme_completion), DMA_FROM_DEVICE);
  396. nvme_rdma_dev_put(dev);
  397. }
  398. static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue,
  399. struct nvme_rdma_device *dev)
  400. {
  401. struct ib_device *ibdev = dev->dev;
  402. const int send_wr_factor = 3; /* MR, SEND, INV */
  403. const int cq_factor = send_wr_factor + 1; /* + RECV */
  404. int comp_vector, idx = nvme_rdma_queue_idx(queue);
  405. int ret;
  406. queue->device = dev;
  407. /*
  408. * The admin queue is barely used once the controller is live, so don't
  409. * bother to spread it out.
  410. */
  411. if (idx == 0)
  412. comp_vector = 0;
  413. else
  414. comp_vector = idx % ibdev->num_comp_vectors;
  415. /* +1 for ib_stop_cq */
  416. queue->ib_cq = ib_alloc_cq(dev->dev, queue,
  417. cq_factor * queue->queue_size + 1, comp_vector,
  418. IB_POLL_SOFTIRQ);
  419. if (IS_ERR(queue->ib_cq)) {
  420. ret = PTR_ERR(queue->ib_cq);
  421. goto out;
  422. }
  423. ret = nvme_rdma_create_qp(queue, send_wr_factor);
  424. if (ret)
  425. goto out_destroy_ib_cq;
  426. queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size,
  427. sizeof(struct nvme_completion), DMA_FROM_DEVICE);
  428. if (!queue->rsp_ring) {
  429. ret = -ENOMEM;
  430. goto out_destroy_qp;
  431. }
  432. set_bit(NVME_RDMA_IB_QUEUE_ALLOCATED, &queue->flags);
  433. return 0;
  434. out_destroy_qp:
  435. ib_destroy_qp(queue->qp);
  436. out_destroy_ib_cq:
  437. ib_free_cq(queue->ib_cq);
  438. out:
  439. return ret;
  440. }
  441. static int nvme_rdma_init_queue(struct nvme_rdma_ctrl *ctrl,
  442. int idx, size_t queue_size)
  443. {
  444. struct nvme_rdma_queue *queue;
  445. struct sockaddr *src_addr = NULL;
  446. int ret;
  447. queue = &ctrl->queues[idx];
  448. queue->ctrl = ctrl;
  449. init_completion(&queue->cm_done);
  450. if (idx > 0)
  451. queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16;
  452. else
  453. queue->cmnd_capsule_len = sizeof(struct nvme_command);
  454. queue->queue_size = queue_size;
  455. queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue,
  456. RDMA_PS_TCP, IB_QPT_RC);
  457. if (IS_ERR(queue->cm_id)) {
  458. dev_info(ctrl->ctrl.device,
  459. "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id));
  460. return PTR_ERR(queue->cm_id);
  461. }
  462. queue->cm_error = -ETIMEDOUT;
  463. if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR)
  464. src_addr = &ctrl->src_addr;
  465. ret = rdma_resolve_addr(queue->cm_id, src_addr, &ctrl->addr,
  466. NVME_RDMA_CONNECT_TIMEOUT_MS);
  467. if (ret) {
  468. dev_info(ctrl->ctrl.device,
  469. "rdma_resolve_addr failed (%d).\n", ret);
  470. goto out_destroy_cm_id;
  471. }
  472. ret = nvme_rdma_wait_for_cm(queue);
  473. if (ret) {
  474. dev_info(ctrl->ctrl.device,
  475. "rdma_resolve_addr wait failed (%d).\n", ret);
  476. goto out_destroy_cm_id;
  477. }
  478. clear_bit(NVME_RDMA_Q_DELETING, &queue->flags);
  479. set_bit(NVME_RDMA_Q_CONNECTED, &queue->flags);
  480. return 0;
  481. out_destroy_cm_id:
  482. nvme_rdma_destroy_queue_ib(queue);
  483. rdma_destroy_id(queue->cm_id);
  484. return ret;
  485. }
  486. static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
  487. {
  488. rdma_disconnect(queue->cm_id);
  489. ib_drain_qp(queue->qp);
  490. }
  491. static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue)
  492. {
  493. nvme_rdma_destroy_queue_ib(queue);
  494. rdma_destroy_id(queue->cm_id);
  495. }
  496. static void nvme_rdma_stop_and_free_queue(struct nvme_rdma_queue *queue)
  497. {
  498. if (test_and_set_bit(NVME_RDMA_Q_DELETING, &queue->flags))
  499. return;
  500. nvme_rdma_stop_queue(queue);
  501. nvme_rdma_free_queue(queue);
  502. }
  503. static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl)
  504. {
  505. int i;
  506. for (i = 1; i < ctrl->queue_count; i++)
  507. nvme_rdma_stop_and_free_queue(&ctrl->queues[i]);
  508. }
  509. static int nvme_rdma_connect_io_queues(struct nvme_rdma_ctrl *ctrl)
  510. {
  511. int i, ret = 0;
  512. for (i = 1; i < ctrl->queue_count; i++) {
  513. ret = nvmf_connect_io_queue(&ctrl->ctrl, i);
  514. if (ret) {
  515. dev_info(ctrl->ctrl.device,
  516. "failed to connect i/o queue: %d\n", ret);
  517. goto out_free_queues;
  518. }
  519. set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[i].flags);
  520. }
  521. return 0;
  522. out_free_queues:
  523. nvme_rdma_free_io_queues(ctrl);
  524. return ret;
  525. }
  526. static int nvme_rdma_init_io_queues(struct nvme_rdma_ctrl *ctrl)
  527. {
  528. struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
  529. unsigned int nr_io_queues;
  530. int i, ret;
  531. nr_io_queues = min(opts->nr_io_queues, num_online_cpus());
  532. ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues);
  533. if (ret)
  534. return ret;
  535. ctrl->queue_count = nr_io_queues + 1;
  536. if (ctrl->queue_count < 2)
  537. return 0;
  538. dev_info(ctrl->ctrl.device,
  539. "creating %d I/O queues.\n", nr_io_queues);
  540. for (i = 1; i < ctrl->queue_count; i++) {
  541. ret = nvme_rdma_init_queue(ctrl, i,
  542. ctrl->ctrl.opts->queue_size);
  543. if (ret) {
  544. dev_info(ctrl->ctrl.device,
  545. "failed to initialize i/o queue: %d\n", ret);
  546. goto out_free_queues;
  547. }
  548. }
  549. return 0;
  550. out_free_queues:
  551. for (i--; i >= 1; i--)
  552. nvme_rdma_stop_and_free_queue(&ctrl->queues[i]);
  553. return ret;
  554. }
  555. static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl)
  556. {
  557. nvme_rdma_free_qe(ctrl->queues[0].device->dev, &ctrl->async_event_sqe,
  558. sizeof(struct nvme_command), DMA_TO_DEVICE);
  559. nvme_rdma_stop_and_free_queue(&ctrl->queues[0]);
  560. blk_cleanup_queue(ctrl->ctrl.admin_q);
  561. blk_mq_free_tag_set(&ctrl->admin_tag_set);
  562. nvme_rdma_dev_put(ctrl->device);
  563. }
  564. static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl)
  565. {
  566. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
  567. if (list_empty(&ctrl->list))
  568. goto free_ctrl;
  569. mutex_lock(&nvme_rdma_ctrl_mutex);
  570. list_del(&ctrl->list);
  571. mutex_unlock(&nvme_rdma_ctrl_mutex);
  572. kfree(ctrl->queues);
  573. nvmf_free_options(nctrl->opts);
  574. free_ctrl:
  575. kfree(ctrl);
  576. }
  577. static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work)
  578. {
  579. struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work),
  580. struct nvme_rdma_ctrl, reconnect_work);
  581. bool changed;
  582. int ret;
  583. if (ctrl->queue_count > 1) {
  584. nvme_rdma_free_io_queues(ctrl);
  585. ret = blk_mq_reinit_tagset(&ctrl->tag_set);
  586. if (ret)
  587. goto requeue;
  588. }
  589. nvme_rdma_stop_and_free_queue(&ctrl->queues[0]);
  590. ret = blk_mq_reinit_tagset(&ctrl->admin_tag_set);
  591. if (ret)
  592. goto requeue;
  593. ret = nvme_rdma_init_queue(ctrl, 0, NVMF_AQ_DEPTH);
  594. if (ret)
  595. goto requeue;
  596. blk_mq_start_stopped_hw_queues(ctrl->ctrl.admin_q, true);
  597. ret = nvmf_connect_admin_queue(&ctrl->ctrl);
  598. if (ret)
  599. goto stop_admin_q;
  600. set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[0].flags);
  601. ret = nvme_enable_ctrl(&ctrl->ctrl, ctrl->cap);
  602. if (ret)
  603. goto stop_admin_q;
  604. nvme_start_keep_alive(&ctrl->ctrl);
  605. if (ctrl->queue_count > 1) {
  606. ret = nvme_rdma_init_io_queues(ctrl);
  607. if (ret)
  608. goto stop_admin_q;
  609. ret = nvme_rdma_connect_io_queues(ctrl);
  610. if (ret)
  611. goto stop_admin_q;
  612. }
  613. changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
  614. WARN_ON_ONCE(!changed);
  615. if (ctrl->queue_count > 1) {
  616. nvme_start_queues(&ctrl->ctrl);
  617. nvme_queue_scan(&ctrl->ctrl);
  618. nvme_queue_async_events(&ctrl->ctrl);
  619. }
  620. dev_info(ctrl->ctrl.device, "Successfully reconnected\n");
  621. return;
  622. stop_admin_q:
  623. blk_mq_stop_hw_queues(ctrl->ctrl.admin_q);
  624. requeue:
  625. /* Make sure we are not resetting/deleting */
  626. if (ctrl->ctrl.state == NVME_CTRL_RECONNECTING) {
  627. dev_info(ctrl->ctrl.device,
  628. "Failed reconnect attempt, requeueing...\n");
  629. queue_delayed_work(nvme_rdma_wq, &ctrl->reconnect_work,
  630. ctrl->reconnect_delay * HZ);
  631. }
  632. }
  633. static void nvme_rdma_error_recovery_work(struct work_struct *work)
  634. {
  635. struct nvme_rdma_ctrl *ctrl = container_of(work,
  636. struct nvme_rdma_ctrl, err_work);
  637. int i;
  638. nvme_stop_keep_alive(&ctrl->ctrl);
  639. for (i = 0; i < ctrl->queue_count; i++) {
  640. clear_bit(NVME_RDMA_Q_CONNECTED, &ctrl->queues[i].flags);
  641. clear_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[i].flags);
  642. }
  643. if (ctrl->queue_count > 1)
  644. nvme_stop_queues(&ctrl->ctrl);
  645. blk_mq_stop_hw_queues(ctrl->ctrl.admin_q);
  646. /* We must take care of fastfail/requeue all our inflight requests */
  647. if (ctrl->queue_count > 1)
  648. blk_mq_tagset_busy_iter(&ctrl->tag_set,
  649. nvme_cancel_request, &ctrl->ctrl);
  650. blk_mq_tagset_busy_iter(&ctrl->admin_tag_set,
  651. nvme_cancel_request, &ctrl->ctrl);
  652. dev_info(ctrl->ctrl.device, "reconnecting in %d seconds\n",
  653. ctrl->reconnect_delay);
  654. queue_delayed_work(nvme_rdma_wq, &ctrl->reconnect_work,
  655. ctrl->reconnect_delay * HZ);
  656. }
  657. static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl)
  658. {
  659. if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RECONNECTING))
  660. return;
  661. queue_work(nvme_rdma_wq, &ctrl->err_work);
  662. }
  663. static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc,
  664. const char *op)
  665. {
  666. struct nvme_rdma_queue *queue = cq->cq_context;
  667. struct nvme_rdma_ctrl *ctrl = queue->ctrl;
  668. if (ctrl->ctrl.state == NVME_CTRL_LIVE)
  669. dev_info(ctrl->ctrl.device,
  670. "%s for CQE 0x%p failed with status %s (%d)\n",
  671. op, wc->wr_cqe,
  672. ib_wc_status_msg(wc->status), wc->status);
  673. nvme_rdma_error_recovery(ctrl);
  674. }
  675. static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc)
  676. {
  677. if (unlikely(wc->status != IB_WC_SUCCESS))
  678. nvme_rdma_wr_error(cq, wc, "MEMREG");
  679. }
  680. static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc)
  681. {
  682. if (unlikely(wc->status != IB_WC_SUCCESS))
  683. nvme_rdma_wr_error(cq, wc, "LOCAL_INV");
  684. }
  685. static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue,
  686. struct nvme_rdma_request *req)
  687. {
  688. struct ib_send_wr *bad_wr;
  689. struct ib_send_wr wr = {
  690. .opcode = IB_WR_LOCAL_INV,
  691. .next = NULL,
  692. .num_sge = 0,
  693. .send_flags = 0,
  694. .ex.invalidate_rkey = req->mr->rkey,
  695. };
  696. req->reg_cqe.done = nvme_rdma_inv_rkey_done;
  697. wr.wr_cqe = &req->reg_cqe;
  698. return ib_post_send(queue->qp, &wr, &bad_wr);
  699. }
  700. static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue,
  701. struct request *rq)
  702. {
  703. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  704. struct nvme_rdma_ctrl *ctrl = queue->ctrl;
  705. struct nvme_rdma_device *dev = queue->device;
  706. struct ib_device *ibdev = dev->dev;
  707. int res;
  708. if (!blk_rq_bytes(rq))
  709. return;
  710. if (req->mr->need_inval) {
  711. res = nvme_rdma_inv_rkey(queue, req);
  712. if (res < 0) {
  713. dev_err(ctrl->ctrl.device,
  714. "Queueing INV WR for rkey %#x failed (%d)\n",
  715. req->mr->rkey, res);
  716. nvme_rdma_error_recovery(queue->ctrl);
  717. }
  718. }
  719. ib_dma_unmap_sg(ibdev, req->sg_table.sgl,
  720. req->nents, rq_data_dir(rq) ==
  721. WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
  722. nvme_cleanup_cmd(rq);
  723. sg_free_table_chained(&req->sg_table, true);
  724. }
  725. static int nvme_rdma_set_sg_null(struct nvme_command *c)
  726. {
  727. struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
  728. sg->addr = 0;
  729. put_unaligned_le24(0, sg->length);
  730. put_unaligned_le32(0, sg->key);
  731. sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
  732. return 0;
  733. }
  734. static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue,
  735. struct nvme_rdma_request *req, struct nvme_command *c)
  736. {
  737. struct nvme_sgl_desc *sg = &c->common.dptr.sgl;
  738. req->sge[1].addr = sg_dma_address(req->sg_table.sgl);
  739. req->sge[1].length = sg_dma_len(req->sg_table.sgl);
  740. req->sge[1].lkey = queue->device->pd->local_dma_lkey;
  741. sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff);
  742. sg->length = cpu_to_le32(sg_dma_len(req->sg_table.sgl));
  743. sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET;
  744. req->inline_data = true;
  745. req->num_sge++;
  746. return 0;
  747. }
  748. static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue,
  749. struct nvme_rdma_request *req, struct nvme_command *c)
  750. {
  751. struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
  752. sg->addr = cpu_to_le64(sg_dma_address(req->sg_table.sgl));
  753. put_unaligned_le24(sg_dma_len(req->sg_table.sgl), sg->length);
  754. put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key);
  755. sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
  756. return 0;
  757. }
  758. static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue,
  759. struct nvme_rdma_request *req, struct nvme_command *c,
  760. int count)
  761. {
  762. struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
  763. int nr;
  764. nr = ib_map_mr_sg(req->mr, req->sg_table.sgl, count, NULL, PAGE_SIZE);
  765. if (nr < count) {
  766. if (nr < 0)
  767. return nr;
  768. return -EINVAL;
  769. }
  770. ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
  771. req->reg_cqe.done = nvme_rdma_memreg_done;
  772. memset(&req->reg_wr, 0, sizeof(req->reg_wr));
  773. req->reg_wr.wr.opcode = IB_WR_REG_MR;
  774. req->reg_wr.wr.wr_cqe = &req->reg_cqe;
  775. req->reg_wr.wr.num_sge = 0;
  776. req->reg_wr.mr = req->mr;
  777. req->reg_wr.key = req->mr->rkey;
  778. req->reg_wr.access = IB_ACCESS_LOCAL_WRITE |
  779. IB_ACCESS_REMOTE_READ |
  780. IB_ACCESS_REMOTE_WRITE;
  781. req->mr->need_inval = true;
  782. sg->addr = cpu_to_le64(req->mr->iova);
  783. put_unaligned_le24(req->mr->length, sg->length);
  784. put_unaligned_le32(req->mr->rkey, sg->key);
  785. sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) |
  786. NVME_SGL_FMT_INVALIDATE;
  787. return 0;
  788. }
  789. static int nvme_rdma_map_data(struct nvme_rdma_queue *queue,
  790. struct request *rq, struct nvme_command *c)
  791. {
  792. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  793. struct nvme_rdma_device *dev = queue->device;
  794. struct ib_device *ibdev = dev->dev;
  795. int count, ret;
  796. req->num_sge = 1;
  797. req->inline_data = false;
  798. req->mr->need_inval = false;
  799. c->common.flags |= NVME_CMD_SGL_METABUF;
  800. if (!blk_rq_bytes(rq))
  801. return nvme_rdma_set_sg_null(c);
  802. req->sg_table.sgl = req->first_sgl;
  803. ret = sg_alloc_table_chained(&req->sg_table,
  804. blk_rq_nr_phys_segments(rq), req->sg_table.sgl);
  805. if (ret)
  806. return -ENOMEM;
  807. req->nents = blk_rq_map_sg(rq->q, rq, req->sg_table.sgl);
  808. count = ib_dma_map_sg(ibdev, req->sg_table.sgl, req->nents,
  809. rq_data_dir(rq) == WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
  810. if (unlikely(count <= 0)) {
  811. sg_free_table_chained(&req->sg_table, true);
  812. return -EIO;
  813. }
  814. if (count == 1) {
  815. if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) &&
  816. blk_rq_payload_bytes(rq) <=
  817. nvme_rdma_inline_data_size(queue))
  818. return nvme_rdma_map_sg_inline(queue, req, c);
  819. if (dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY)
  820. return nvme_rdma_map_sg_single(queue, req, c);
  821. }
  822. return nvme_rdma_map_sg_fr(queue, req, c, count);
  823. }
  824. static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
  825. {
  826. if (unlikely(wc->status != IB_WC_SUCCESS))
  827. nvme_rdma_wr_error(cq, wc, "SEND");
  828. }
  829. static int nvme_rdma_post_send(struct nvme_rdma_queue *queue,
  830. struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge,
  831. struct ib_send_wr *first, bool flush)
  832. {
  833. struct ib_send_wr wr, *bad_wr;
  834. int ret;
  835. sge->addr = qe->dma;
  836. sge->length = sizeof(struct nvme_command),
  837. sge->lkey = queue->device->pd->local_dma_lkey;
  838. qe->cqe.done = nvme_rdma_send_done;
  839. wr.next = NULL;
  840. wr.wr_cqe = &qe->cqe;
  841. wr.sg_list = sge;
  842. wr.num_sge = num_sge;
  843. wr.opcode = IB_WR_SEND;
  844. wr.send_flags = 0;
  845. /*
  846. * Unsignalled send completions are another giant desaster in the
  847. * IB Verbs spec: If we don't regularly post signalled sends
  848. * the send queue will fill up and only a QP reset will rescue us.
  849. * Would have been way to obvious to handle this in hardware or
  850. * at least the RDMA stack..
  851. *
  852. * This messy and racy code sniplet is copy and pasted from the iSER
  853. * initiator, and the magic '32' comes from there as well.
  854. *
  855. * Always signal the flushes. The magic request used for the flush
  856. * sequencer is not allocated in our driver's tagset and it's
  857. * triggered to be freed by blk_cleanup_queue(). So we need to
  858. * always mark it as signaled to ensure that the "wr_cqe", which is
  859. * embedded in request's payload, is not freed when __ib_process_cq()
  860. * calls wr_cqe->done().
  861. */
  862. if ((++queue->sig_count % 32) == 0 || flush)
  863. wr.send_flags |= IB_SEND_SIGNALED;
  864. if (first)
  865. first->next = &wr;
  866. else
  867. first = &wr;
  868. ret = ib_post_send(queue->qp, first, &bad_wr);
  869. if (ret) {
  870. dev_err(queue->ctrl->ctrl.device,
  871. "%s failed with error code %d\n", __func__, ret);
  872. }
  873. return ret;
  874. }
  875. static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue,
  876. struct nvme_rdma_qe *qe)
  877. {
  878. struct ib_recv_wr wr, *bad_wr;
  879. struct ib_sge list;
  880. int ret;
  881. list.addr = qe->dma;
  882. list.length = sizeof(struct nvme_completion);
  883. list.lkey = queue->device->pd->local_dma_lkey;
  884. qe->cqe.done = nvme_rdma_recv_done;
  885. wr.next = NULL;
  886. wr.wr_cqe = &qe->cqe;
  887. wr.sg_list = &list;
  888. wr.num_sge = 1;
  889. ret = ib_post_recv(queue->qp, &wr, &bad_wr);
  890. if (ret) {
  891. dev_err(queue->ctrl->ctrl.device,
  892. "%s failed with error code %d\n", __func__, ret);
  893. }
  894. return ret;
  895. }
  896. static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue)
  897. {
  898. u32 queue_idx = nvme_rdma_queue_idx(queue);
  899. if (queue_idx == 0)
  900. return queue->ctrl->admin_tag_set.tags[queue_idx];
  901. return queue->ctrl->tag_set.tags[queue_idx - 1];
  902. }
  903. static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg, int aer_idx)
  904. {
  905. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg);
  906. struct nvme_rdma_queue *queue = &ctrl->queues[0];
  907. struct ib_device *dev = queue->device->dev;
  908. struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe;
  909. struct nvme_command *cmd = sqe->data;
  910. struct ib_sge sge;
  911. int ret;
  912. if (WARN_ON_ONCE(aer_idx != 0))
  913. return;
  914. ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE);
  915. memset(cmd, 0, sizeof(*cmd));
  916. cmd->common.opcode = nvme_admin_async_event;
  917. cmd->common.command_id = NVME_RDMA_AQ_BLKMQ_DEPTH;
  918. cmd->common.flags |= NVME_CMD_SGL_METABUF;
  919. nvme_rdma_set_sg_null(cmd);
  920. ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd),
  921. DMA_TO_DEVICE);
  922. ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL, false);
  923. WARN_ON_ONCE(ret);
  924. }
  925. static int nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue,
  926. struct nvme_completion *cqe, struct ib_wc *wc, int tag)
  927. {
  928. struct request *rq;
  929. struct nvme_rdma_request *req;
  930. int ret = 0;
  931. rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id);
  932. if (!rq) {
  933. dev_err(queue->ctrl->ctrl.device,
  934. "tag 0x%x on QP %#x not found\n",
  935. cqe->command_id, queue->qp->qp_num);
  936. nvme_rdma_error_recovery(queue->ctrl);
  937. return ret;
  938. }
  939. req = blk_mq_rq_to_pdu(rq);
  940. if (rq->tag == tag)
  941. ret = 1;
  942. if ((wc->wc_flags & IB_WC_WITH_INVALIDATE) &&
  943. wc->ex.invalidate_rkey == req->mr->rkey)
  944. req->mr->need_inval = false;
  945. req->req.result = cqe->result;
  946. blk_mq_complete_request(rq, le16_to_cpu(cqe->status) >> 1);
  947. return ret;
  948. }
  949. static int __nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc, int tag)
  950. {
  951. struct nvme_rdma_qe *qe =
  952. container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
  953. struct nvme_rdma_queue *queue = cq->cq_context;
  954. struct ib_device *ibdev = queue->device->dev;
  955. struct nvme_completion *cqe = qe->data;
  956. const size_t len = sizeof(struct nvme_completion);
  957. int ret = 0;
  958. if (unlikely(wc->status != IB_WC_SUCCESS)) {
  959. nvme_rdma_wr_error(cq, wc, "RECV");
  960. return 0;
  961. }
  962. ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE);
  963. /*
  964. * AEN requests are special as they don't time out and can
  965. * survive any kind of queue freeze and often don't respond to
  966. * aborts. We don't even bother to allocate a struct request
  967. * for them but rather special case them here.
  968. */
  969. if (unlikely(nvme_rdma_queue_idx(queue) == 0 &&
  970. cqe->command_id >= NVME_RDMA_AQ_BLKMQ_DEPTH))
  971. nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status,
  972. &cqe->result);
  973. else
  974. ret = nvme_rdma_process_nvme_rsp(queue, cqe, wc, tag);
  975. ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE);
  976. nvme_rdma_post_recv(queue, qe);
  977. return ret;
  978. }
  979. static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
  980. {
  981. __nvme_rdma_recv_done(cq, wc, -1);
  982. }
  983. static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue)
  984. {
  985. int ret, i;
  986. for (i = 0; i < queue->queue_size; i++) {
  987. ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]);
  988. if (ret)
  989. goto out_destroy_queue_ib;
  990. }
  991. return 0;
  992. out_destroy_queue_ib:
  993. nvme_rdma_destroy_queue_ib(queue);
  994. return ret;
  995. }
  996. static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue,
  997. struct rdma_cm_event *ev)
  998. {
  999. struct rdma_cm_id *cm_id = queue->cm_id;
  1000. int status = ev->status;
  1001. const char *rej_msg;
  1002. const struct nvme_rdma_cm_rej *rej_data;
  1003. u8 rej_data_len;
  1004. rej_msg = rdma_reject_msg(cm_id, status);
  1005. rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len);
  1006. if (rej_data && rej_data_len >= sizeof(u16)) {
  1007. u16 sts = le16_to_cpu(rej_data->sts);
  1008. dev_err(queue->ctrl->ctrl.device,
  1009. "Connect rejected: status %d (%s) nvme status %d (%s).\n",
  1010. status, rej_msg, sts, nvme_rdma_cm_msg(sts));
  1011. } else {
  1012. dev_err(queue->ctrl->ctrl.device,
  1013. "Connect rejected: status %d (%s).\n", status, rej_msg);
  1014. }
  1015. return -ECONNRESET;
  1016. }
  1017. static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue)
  1018. {
  1019. struct nvme_rdma_device *dev;
  1020. int ret;
  1021. dev = nvme_rdma_find_get_device(queue->cm_id);
  1022. if (!dev) {
  1023. dev_err(queue->cm_id->device->dev.parent,
  1024. "no client data found!\n");
  1025. return -ECONNREFUSED;
  1026. }
  1027. ret = nvme_rdma_create_queue_ib(queue, dev);
  1028. if (ret) {
  1029. nvme_rdma_dev_put(dev);
  1030. goto out;
  1031. }
  1032. ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS);
  1033. if (ret) {
  1034. dev_err(queue->ctrl->ctrl.device,
  1035. "rdma_resolve_route failed (%d).\n",
  1036. queue->cm_error);
  1037. goto out_destroy_queue;
  1038. }
  1039. return 0;
  1040. out_destroy_queue:
  1041. nvme_rdma_destroy_queue_ib(queue);
  1042. out:
  1043. return ret;
  1044. }
  1045. static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue)
  1046. {
  1047. struct nvme_rdma_ctrl *ctrl = queue->ctrl;
  1048. struct rdma_conn_param param = { };
  1049. struct nvme_rdma_cm_req priv = { };
  1050. int ret;
  1051. param.qp_num = queue->qp->qp_num;
  1052. param.flow_control = 1;
  1053. param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom;
  1054. /* maximum retry count */
  1055. param.retry_count = 7;
  1056. param.rnr_retry_count = 7;
  1057. param.private_data = &priv;
  1058. param.private_data_len = sizeof(priv);
  1059. priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
  1060. priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue));
  1061. /*
  1062. * set the admin queue depth to the minimum size
  1063. * specified by the Fabrics standard.
  1064. */
  1065. if (priv.qid == 0) {
  1066. priv.hrqsize = cpu_to_le16(NVMF_AQ_DEPTH);
  1067. priv.hsqsize = cpu_to_le16(NVMF_AQ_DEPTH - 1);
  1068. } else {
  1069. /*
  1070. * current interpretation of the fabrics spec
  1071. * is at minimum you make hrqsize sqsize+1, or a
  1072. * 1's based representation of sqsize.
  1073. */
  1074. priv.hrqsize = cpu_to_le16(queue->queue_size);
  1075. priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize);
  1076. }
  1077. ret = rdma_connect(queue->cm_id, &param);
  1078. if (ret) {
  1079. dev_err(ctrl->ctrl.device,
  1080. "rdma_connect failed (%d).\n", ret);
  1081. goto out_destroy_queue_ib;
  1082. }
  1083. return 0;
  1084. out_destroy_queue_ib:
  1085. nvme_rdma_destroy_queue_ib(queue);
  1086. return ret;
  1087. }
  1088. static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
  1089. struct rdma_cm_event *ev)
  1090. {
  1091. struct nvme_rdma_queue *queue = cm_id->context;
  1092. int cm_error = 0;
  1093. dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n",
  1094. rdma_event_msg(ev->event), ev->event,
  1095. ev->status, cm_id);
  1096. switch (ev->event) {
  1097. case RDMA_CM_EVENT_ADDR_RESOLVED:
  1098. cm_error = nvme_rdma_addr_resolved(queue);
  1099. break;
  1100. case RDMA_CM_EVENT_ROUTE_RESOLVED:
  1101. cm_error = nvme_rdma_route_resolved(queue);
  1102. break;
  1103. case RDMA_CM_EVENT_ESTABLISHED:
  1104. queue->cm_error = nvme_rdma_conn_established(queue);
  1105. /* complete cm_done regardless of success/failure */
  1106. complete(&queue->cm_done);
  1107. return 0;
  1108. case RDMA_CM_EVENT_REJECTED:
  1109. cm_error = nvme_rdma_conn_rejected(queue, ev);
  1110. break;
  1111. case RDMA_CM_EVENT_ADDR_ERROR:
  1112. case RDMA_CM_EVENT_ROUTE_ERROR:
  1113. case RDMA_CM_EVENT_CONNECT_ERROR:
  1114. case RDMA_CM_EVENT_UNREACHABLE:
  1115. dev_dbg(queue->ctrl->ctrl.device,
  1116. "CM error event %d\n", ev->event);
  1117. cm_error = -ECONNRESET;
  1118. break;
  1119. case RDMA_CM_EVENT_DISCONNECTED:
  1120. case RDMA_CM_EVENT_ADDR_CHANGE:
  1121. case RDMA_CM_EVENT_TIMEWAIT_EXIT:
  1122. dev_dbg(queue->ctrl->ctrl.device,
  1123. "disconnect received - connection closed\n");
  1124. nvme_rdma_error_recovery(queue->ctrl);
  1125. break;
  1126. case RDMA_CM_EVENT_DEVICE_REMOVAL:
  1127. /* device removal is handled via the ib_client API */
  1128. break;
  1129. default:
  1130. dev_err(queue->ctrl->ctrl.device,
  1131. "Unexpected RDMA CM event (%d)\n", ev->event);
  1132. nvme_rdma_error_recovery(queue->ctrl);
  1133. break;
  1134. }
  1135. if (cm_error) {
  1136. queue->cm_error = cm_error;
  1137. complete(&queue->cm_done);
  1138. }
  1139. return 0;
  1140. }
  1141. static enum blk_eh_timer_return
  1142. nvme_rdma_timeout(struct request *rq, bool reserved)
  1143. {
  1144. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  1145. /* queue error recovery */
  1146. nvme_rdma_error_recovery(req->queue->ctrl);
  1147. /* fail with DNR on cmd timeout */
  1148. rq->errors = NVME_SC_ABORT_REQ | NVME_SC_DNR;
  1149. return BLK_EH_HANDLED;
  1150. }
  1151. /*
  1152. * We cannot accept any other command until the Connect command has completed.
  1153. */
  1154. static inline bool nvme_rdma_queue_is_ready(struct nvme_rdma_queue *queue,
  1155. struct request *rq)
  1156. {
  1157. if (unlikely(!test_bit(NVME_RDMA_Q_LIVE, &queue->flags))) {
  1158. struct nvme_command *cmd = nvme_req(rq)->cmd;
  1159. if (!blk_rq_is_passthrough(rq) ||
  1160. cmd->common.opcode != nvme_fabrics_command ||
  1161. cmd->fabrics.fctype != nvme_fabrics_type_connect)
  1162. return false;
  1163. }
  1164. return true;
  1165. }
  1166. static int nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx,
  1167. const struct blk_mq_queue_data *bd)
  1168. {
  1169. struct nvme_ns *ns = hctx->queue->queuedata;
  1170. struct nvme_rdma_queue *queue = hctx->driver_data;
  1171. struct request *rq = bd->rq;
  1172. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  1173. struct nvme_rdma_qe *sqe = &req->sqe;
  1174. struct nvme_command *c = sqe->data;
  1175. bool flush = false;
  1176. struct ib_device *dev;
  1177. int ret;
  1178. WARN_ON_ONCE(rq->tag < 0);
  1179. if (!nvme_rdma_queue_is_ready(queue, rq))
  1180. return BLK_MQ_RQ_QUEUE_BUSY;
  1181. dev = queue->device->dev;
  1182. ib_dma_sync_single_for_cpu(dev, sqe->dma,
  1183. sizeof(struct nvme_command), DMA_TO_DEVICE);
  1184. ret = nvme_setup_cmd(ns, rq, c);
  1185. if (ret != BLK_MQ_RQ_QUEUE_OK)
  1186. return ret;
  1187. blk_mq_start_request(rq);
  1188. ret = nvme_rdma_map_data(queue, rq, c);
  1189. if (ret < 0) {
  1190. dev_err(queue->ctrl->ctrl.device,
  1191. "Failed to map data (%d)\n", ret);
  1192. nvme_cleanup_cmd(rq);
  1193. goto err;
  1194. }
  1195. ib_dma_sync_single_for_device(dev, sqe->dma,
  1196. sizeof(struct nvme_command), DMA_TO_DEVICE);
  1197. if (req_op(rq) == REQ_OP_FLUSH)
  1198. flush = true;
  1199. ret = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge,
  1200. req->mr->need_inval ? &req->reg_wr.wr : NULL, flush);
  1201. if (ret) {
  1202. nvme_rdma_unmap_data(queue, rq);
  1203. goto err;
  1204. }
  1205. return BLK_MQ_RQ_QUEUE_OK;
  1206. err:
  1207. return (ret == -ENOMEM || ret == -EAGAIN) ?
  1208. BLK_MQ_RQ_QUEUE_BUSY : BLK_MQ_RQ_QUEUE_ERROR;
  1209. }
  1210. static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag)
  1211. {
  1212. struct nvme_rdma_queue *queue = hctx->driver_data;
  1213. struct ib_cq *cq = queue->ib_cq;
  1214. struct ib_wc wc;
  1215. int found = 0;
  1216. ib_req_notify_cq(cq, IB_CQ_NEXT_COMP);
  1217. while (ib_poll_cq(cq, 1, &wc) > 0) {
  1218. struct ib_cqe *cqe = wc.wr_cqe;
  1219. if (cqe) {
  1220. if (cqe->done == nvme_rdma_recv_done)
  1221. found |= __nvme_rdma_recv_done(cq, &wc, tag);
  1222. else
  1223. cqe->done(cq, &wc);
  1224. }
  1225. }
  1226. return found;
  1227. }
  1228. static void nvme_rdma_complete_rq(struct request *rq)
  1229. {
  1230. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  1231. struct nvme_rdma_queue *queue = req->queue;
  1232. int error = 0;
  1233. nvme_rdma_unmap_data(queue, rq);
  1234. if (unlikely(rq->errors)) {
  1235. if (nvme_req_needs_retry(rq, rq->errors)) {
  1236. nvme_requeue_req(rq);
  1237. return;
  1238. }
  1239. if (blk_rq_is_passthrough(rq))
  1240. error = rq->errors;
  1241. else
  1242. error = nvme_error_status(rq->errors);
  1243. }
  1244. blk_mq_end_request(rq, error);
  1245. }
  1246. static struct blk_mq_ops nvme_rdma_mq_ops = {
  1247. .queue_rq = nvme_rdma_queue_rq,
  1248. .complete = nvme_rdma_complete_rq,
  1249. .init_request = nvme_rdma_init_request,
  1250. .exit_request = nvme_rdma_exit_request,
  1251. .reinit_request = nvme_rdma_reinit_request,
  1252. .init_hctx = nvme_rdma_init_hctx,
  1253. .poll = nvme_rdma_poll,
  1254. .timeout = nvme_rdma_timeout,
  1255. };
  1256. static struct blk_mq_ops nvme_rdma_admin_mq_ops = {
  1257. .queue_rq = nvme_rdma_queue_rq,
  1258. .complete = nvme_rdma_complete_rq,
  1259. .init_request = nvme_rdma_init_admin_request,
  1260. .exit_request = nvme_rdma_exit_admin_request,
  1261. .reinit_request = nvme_rdma_reinit_request,
  1262. .init_hctx = nvme_rdma_init_admin_hctx,
  1263. .timeout = nvme_rdma_timeout,
  1264. };
  1265. static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl)
  1266. {
  1267. int error;
  1268. error = nvme_rdma_init_queue(ctrl, 0, NVMF_AQ_DEPTH);
  1269. if (error)
  1270. return error;
  1271. ctrl->device = ctrl->queues[0].device;
  1272. /*
  1273. * We need a reference on the device as long as the tag_set is alive,
  1274. * as the MRs in the request structures need a valid ib_device.
  1275. */
  1276. error = -EINVAL;
  1277. if (!nvme_rdma_dev_get(ctrl->device))
  1278. goto out_free_queue;
  1279. ctrl->max_fr_pages = min_t(u32, NVME_RDMA_MAX_SEGMENTS,
  1280. ctrl->device->dev->attrs.max_fast_reg_page_list_len);
  1281. memset(&ctrl->admin_tag_set, 0, sizeof(ctrl->admin_tag_set));
  1282. ctrl->admin_tag_set.ops = &nvme_rdma_admin_mq_ops;
  1283. ctrl->admin_tag_set.queue_depth = NVME_RDMA_AQ_BLKMQ_DEPTH;
  1284. ctrl->admin_tag_set.reserved_tags = 2; /* connect + keep-alive */
  1285. ctrl->admin_tag_set.numa_node = NUMA_NO_NODE;
  1286. ctrl->admin_tag_set.cmd_size = sizeof(struct nvme_rdma_request) +
  1287. SG_CHUNK_SIZE * sizeof(struct scatterlist);
  1288. ctrl->admin_tag_set.driver_data = ctrl;
  1289. ctrl->admin_tag_set.nr_hw_queues = 1;
  1290. ctrl->admin_tag_set.timeout = ADMIN_TIMEOUT;
  1291. error = blk_mq_alloc_tag_set(&ctrl->admin_tag_set);
  1292. if (error)
  1293. goto out_put_dev;
  1294. ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set);
  1295. if (IS_ERR(ctrl->ctrl.admin_q)) {
  1296. error = PTR_ERR(ctrl->ctrl.admin_q);
  1297. goto out_free_tagset;
  1298. }
  1299. error = nvmf_connect_admin_queue(&ctrl->ctrl);
  1300. if (error)
  1301. goto out_cleanup_queue;
  1302. set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[0].flags);
  1303. error = nvmf_reg_read64(&ctrl->ctrl, NVME_REG_CAP, &ctrl->cap);
  1304. if (error) {
  1305. dev_err(ctrl->ctrl.device,
  1306. "prop_get NVME_REG_CAP failed\n");
  1307. goto out_cleanup_queue;
  1308. }
  1309. ctrl->ctrl.sqsize =
  1310. min_t(int, NVME_CAP_MQES(ctrl->cap) + 1, ctrl->ctrl.sqsize);
  1311. error = nvme_enable_ctrl(&ctrl->ctrl, ctrl->cap);
  1312. if (error)
  1313. goto out_cleanup_queue;
  1314. ctrl->ctrl.max_hw_sectors =
  1315. (ctrl->max_fr_pages - 1) << (PAGE_SHIFT - 9);
  1316. error = nvme_init_identify(&ctrl->ctrl);
  1317. if (error)
  1318. goto out_cleanup_queue;
  1319. error = nvme_rdma_alloc_qe(ctrl->queues[0].device->dev,
  1320. &ctrl->async_event_sqe, sizeof(struct nvme_command),
  1321. DMA_TO_DEVICE);
  1322. if (error)
  1323. goto out_cleanup_queue;
  1324. nvme_start_keep_alive(&ctrl->ctrl);
  1325. return 0;
  1326. out_cleanup_queue:
  1327. blk_cleanup_queue(ctrl->ctrl.admin_q);
  1328. out_free_tagset:
  1329. /* disconnect and drain the queue before freeing the tagset */
  1330. nvme_rdma_stop_queue(&ctrl->queues[0]);
  1331. blk_mq_free_tag_set(&ctrl->admin_tag_set);
  1332. out_put_dev:
  1333. nvme_rdma_dev_put(ctrl->device);
  1334. out_free_queue:
  1335. nvme_rdma_free_queue(&ctrl->queues[0]);
  1336. return error;
  1337. }
  1338. static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl)
  1339. {
  1340. nvme_stop_keep_alive(&ctrl->ctrl);
  1341. cancel_work_sync(&ctrl->err_work);
  1342. cancel_delayed_work_sync(&ctrl->reconnect_work);
  1343. if (ctrl->queue_count > 1) {
  1344. nvme_stop_queues(&ctrl->ctrl);
  1345. blk_mq_tagset_busy_iter(&ctrl->tag_set,
  1346. nvme_cancel_request, &ctrl->ctrl);
  1347. nvme_rdma_free_io_queues(ctrl);
  1348. }
  1349. if (test_bit(NVME_RDMA_Q_CONNECTED, &ctrl->queues[0].flags))
  1350. nvme_shutdown_ctrl(&ctrl->ctrl);
  1351. blk_mq_stop_hw_queues(ctrl->ctrl.admin_q);
  1352. blk_mq_tagset_busy_iter(&ctrl->admin_tag_set,
  1353. nvme_cancel_request, &ctrl->ctrl);
  1354. nvme_rdma_destroy_admin_queue(ctrl);
  1355. }
  1356. static void __nvme_rdma_remove_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown)
  1357. {
  1358. nvme_uninit_ctrl(&ctrl->ctrl);
  1359. if (shutdown)
  1360. nvme_rdma_shutdown_ctrl(ctrl);
  1361. if (ctrl->ctrl.tagset) {
  1362. blk_cleanup_queue(ctrl->ctrl.connect_q);
  1363. blk_mq_free_tag_set(&ctrl->tag_set);
  1364. nvme_rdma_dev_put(ctrl->device);
  1365. }
  1366. nvme_put_ctrl(&ctrl->ctrl);
  1367. }
  1368. static void nvme_rdma_del_ctrl_work(struct work_struct *work)
  1369. {
  1370. struct nvme_rdma_ctrl *ctrl = container_of(work,
  1371. struct nvme_rdma_ctrl, delete_work);
  1372. __nvme_rdma_remove_ctrl(ctrl, true);
  1373. }
  1374. static int __nvme_rdma_del_ctrl(struct nvme_rdma_ctrl *ctrl)
  1375. {
  1376. if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_DELETING))
  1377. return -EBUSY;
  1378. if (!queue_work(nvme_rdma_wq, &ctrl->delete_work))
  1379. return -EBUSY;
  1380. return 0;
  1381. }
  1382. static int nvme_rdma_del_ctrl(struct nvme_ctrl *nctrl)
  1383. {
  1384. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
  1385. int ret = 0;
  1386. /*
  1387. * Keep a reference until all work is flushed since
  1388. * __nvme_rdma_del_ctrl can free the ctrl mem
  1389. */
  1390. if (!kref_get_unless_zero(&ctrl->ctrl.kref))
  1391. return -EBUSY;
  1392. ret = __nvme_rdma_del_ctrl(ctrl);
  1393. if (!ret)
  1394. flush_work(&ctrl->delete_work);
  1395. nvme_put_ctrl(&ctrl->ctrl);
  1396. return ret;
  1397. }
  1398. static void nvme_rdma_remove_ctrl_work(struct work_struct *work)
  1399. {
  1400. struct nvme_rdma_ctrl *ctrl = container_of(work,
  1401. struct nvme_rdma_ctrl, delete_work);
  1402. __nvme_rdma_remove_ctrl(ctrl, false);
  1403. }
  1404. static void nvme_rdma_reset_ctrl_work(struct work_struct *work)
  1405. {
  1406. struct nvme_rdma_ctrl *ctrl = container_of(work,
  1407. struct nvme_rdma_ctrl, reset_work);
  1408. int ret;
  1409. bool changed;
  1410. nvme_rdma_shutdown_ctrl(ctrl);
  1411. ret = nvme_rdma_configure_admin_queue(ctrl);
  1412. if (ret) {
  1413. /* ctrl is already shutdown, just remove the ctrl */
  1414. INIT_WORK(&ctrl->delete_work, nvme_rdma_remove_ctrl_work);
  1415. goto del_dead_ctrl;
  1416. }
  1417. if (ctrl->queue_count > 1) {
  1418. ret = blk_mq_reinit_tagset(&ctrl->tag_set);
  1419. if (ret)
  1420. goto del_dead_ctrl;
  1421. ret = nvme_rdma_init_io_queues(ctrl);
  1422. if (ret)
  1423. goto del_dead_ctrl;
  1424. ret = nvme_rdma_connect_io_queues(ctrl);
  1425. if (ret)
  1426. goto del_dead_ctrl;
  1427. }
  1428. changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
  1429. WARN_ON_ONCE(!changed);
  1430. if (ctrl->queue_count > 1) {
  1431. nvme_start_queues(&ctrl->ctrl);
  1432. nvme_queue_scan(&ctrl->ctrl);
  1433. nvme_queue_async_events(&ctrl->ctrl);
  1434. }
  1435. return;
  1436. del_dead_ctrl:
  1437. /* Deleting this dead controller... */
  1438. dev_warn(ctrl->ctrl.device, "Removing after reset failure\n");
  1439. WARN_ON(!queue_work(nvme_rdma_wq, &ctrl->delete_work));
  1440. }
  1441. static int nvme_rdma_reset_ctrl(struct nvme_ctrl *nctrl)
  1442. {
  1443. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
  1444. if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING))
  1445. return -EBUSY;
  1446. if (!queue_work(nvme_rdma_wq, &ctrl->reset_work))
  1447. return -EBUSY;
  1448. flush_work(&ctrl->reset_work);
  1449. return 0;
  1450. }
  1451. static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = {
  1452. .name = "rdma",
  1453. .module = THIS_MODULE,
  1454. .is_fabrics = true,
  1455. .reg_read32 = nvmf_reg_read32,
  1456. .reg_read64 = nvmf_reg_read64,
  1457. .reg_write32 = nvmf_reg_write32,
  1458. .reset_ctrl = nvme_rdma_reset_ctrl,
  1459. .free_ctrl = nvme_rdma_free_ctrl,
  1460. .submit_async_event = nvme_rdma_submit_async_event,
  1461. .delete_ctrl = nvme_rdma_del_ctrl,
  1462. .get_subsysnqn = nvmf_get_subsysnqn,
  1463. .get_address = nvmf_get_address,
  1464. };
  1465. static int nvme_rdma_create_io_queues(struct nvme_rdma_ctrl *ctrl)
  1466. {
  1467. int ret;
  1468. ret = nvme_rdma_init_io_queues(ctrl);
  1469. if (ret)
  1470. return ret;
  1471. /*
  1472. * We need a reference on the device as long as the tag_set is alive,
  1473. * as the MRs in the request structures need a valid ib_device.
  1474. */
  1475. ret = -EINVAL;
  1476. if (!nvme_rdma_dev_get(ctrl->device))
  1477. goto out_free_io_queues;
  1478. memset(&ctrl->tag_set, 0, sizeof(ctrl->tag_set));
  1479. ctrl->tag_set.ops = &nvme_rdma_mq_ops;
  1480. ctrl->tag_set.queue_depth = ctrl->ctrl.opts->queue_size;
  1481. ctrl->tag_set.reserved_tags = 1; /* fabric connect */
  1482. ctrl->tag_set.numa_node = NUMA_NO_NODE;
  1483. ctrl->tag_set.flags = BLK_MQ_F_SHOULD_MERGE;
  1484. ctrl->tag_set.cmd_size = sizeof(struct nvme_rdma_request) +
  1485. SG_CHUNK_SIZE * sizeof(struct scatterlist);
  1486. ctrl->tag_set.driver_data = ctrl;
  1487. ctrl->tag_set.nr_hw_queues = ctrl->queue_count - 1;
  1488. ctrl->tag_set.timeout = NVME_IO_TIMEOUT;
  1489. ret = blk_mq_alloc_tag_set(&ctrl->tag_set);
  1490. if (ret)
  1491. goto out_put_dev;
  1492. ctrl->ctrl.tagset = &ctrl->tag_set;
  1493. ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set);
  1494. if (IS_ERR(ctrl->ctrl.connect_q)) {
  1495. ret = PTR_ERR(ctrl->ctrl.connect_q);
  1496. goto out_free_tag_set;
  1497. }
  1498. ret = nvme_rdma_connect_io_queues(ctrl);
  1499. if (ret)
  1500. goto out_cleanup_connect_q;
  1501. return 0;
  1502. out_cleanup_connect_q:
  1503. blk_cleanup_queue(ctrl->ctrl.connect_q);
  1504. out_free_tag_set:
  1505. blk_mq_free_tag_set(&ctrl->tag_set);
  1506. out_put_dev:
  1507. nvme_rdma_dev_put(ctrl->device);
  1508. out_free_io_queues:
  1509. nvme_rdma_free_io_queues(ctrl);
  1510. return ret;
  1511. }
  1512. static int nvme_rdma_parse_ipaddr(struct sockaddr_in *in_addr, char *p)
  1513. {
  1514. u8 *addr = (u8 *)&in_addr->sin_addr.s_addr;
  1515. size_t buflen = strlen(p);
  1516. /* XXX: handle IPv6 addresses */
  1517. if (buflen > INET_ADDRSTRLEN)
  1518. return -EINVAL;
  1519. if (in4_pton(p, buflen, addr, '\0', NULL) == 0)
  1520. return -EINVAL;
  1521. in_addr->sin_family = AF_INET;
  1522. return 0;
  1523. }
  1524. static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev,
  1525. struct nvmf_ctrl_options *opts)
  1526. {
  1527. struct nvme_rdma_ctrl *ctrl;
  1528. int ret;
  1529. bool changed;
  1530. ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
  1531. if (!ctrl)
  1532. return ERR_PTR(-ENOMEM);
  1533. ctrl->ctrl.opts = opts;
  1534. INIT_LIST_HEAD(&ctrl->list);
  1535. ret = nvme_rdma_parse_ipaddr(&ctrl->addr_in, opts->traddr);
  1536. if (ret) {
  1537. pr_err("malformed IP address passed: %s\n", opts->traddr);
  1538. goto out_free_ctrl;
  1539. }
  1540. if (opts->mask & NVMF_OPT_HOST_TRADDR) {
  1541. ret = nvme_rdma_parse_ipaddr(&ctrl->src_addr_in,
  1542. opts->host_traddr);
  1543. if (ret) {
  1544. pr_err("malformed src IP address passed: %s\n",
  1545. opts->host_traddr);
  1546. goto out_free_ctrl;
  1547. }
  1548. }
  1549. if (opts->mask & NVMF_OPT_TRSVCID) {
  1550. u16 port;
  1551. ret = kstrtou16(opts->trsvcid, 0, &port);
  1552. if (ret)
  1553. goto out_free_ctrl;
  1554. ctrl->addr_in.sin_port = cpu_to_be16(port);
  1555. } else {
  1556. ctrl->addr_in.sin_port = cpu_to_be16(NVME_RDMA_IP_PORT);
  1557. }
  1558. ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops,
  1559. 0 /* no quirks, we're perfect! */);
  1560. if (ret)
  1561. goto out_free_ctrl;
  1562. ctrl->reconnect_delay = opts->reconnect_delay;
  1563. INIT_DELAYED_WORK(&ctrl->reconnect_work,
  1564. nvme_rdma_reconnect_ctrl_work);
  1565. INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work);
  1566. INIT_WORK(&ctrl->delete_work, nvme_rdma_del_ctrl_work);
  1567. INIT_WORK(&ctrl->reset_work, nvme_rdma_reset_ctrl_work);
  1568. spin_lock_init(&ctrl->lock);
  1569. ctrl->queue_count = opts->nr_io_queues + 1; /* +1 for admin queue */
  1570. ctrl->ctrl.sqsize = opts->queue_size - 1;
  1571. ctrl->ctrl.kato = opts->kato;
  1572. ret = -ENOMEM;
  1573. ctrl->queues = kcalloc(ctrl->queue_count, sizeof(*ctrl->queues),
  1574. GFP_KERNEL);
  1575. if (!ctrl->queues)
  1576. goto out_uninit_ctrl;
  1577. ret = nvme_rdma_configure_admin_queue(ctrl);
  1578. if (ret)
  1579. goto out_kfree_queues;
  1580. /* sanity check icdoff */
  1581. if (ctrl->ctrl.icdoff) {
  1582. dev_err(ctrl->ctrl.device, "icdoff is not supported!\n");
  1583. goto out_remove_admin_queue;
  1584. }
  1585. /* sanity check keyed sgls */
  1586. if (!(ctrl->ctrl.sgls & (1 << 20))) {
  1587. dev_err(ctrl->ctrl.device, "Mandatory keyed sgls are not support\n");
  1588. goto out_remove_admin_queue;
  1589. }
  1590. if (opts->queue_size > ctrl->ctrl.maxcmd) {
  1591. /* warn if maxcmd is lower than queue_size */
  1592. dev_warn(ctrl->ctrl.device,
  1593. "queue_size %zu > ctrl maxcmd %u, clamping down\n",
  1594. opts->queue_size, ctrl->ctrl.maxcmd);
  1595. opts->queue_size = ctrl->ctrl.maxcmd;
  1596. }
  1597. if (opts->queue_size > ctrl->ctrl.sqsize + 1) {
  1598. /* warn if sqsize is lower than queue_size */
  1599. dev_warn(ctrl->ctrl.device,
  1600. "queue_size %zu > ctrl sqsize %u, clamping down\n",
  1601. opts->queue_size, ctrl->ctrl.sqsize + 1);
  1602. opts->queue_size = ctrl->ctrl.sqsize + 1;
  1603. }
  1604. if (opts->nr_io_queues) {
  1605. ret = nvme_rdma_create_io_queues(ctrl);
  1606. if (ret)
  1607. goto out_remove_admin_queue;
  1608. }
  1609. changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
  1610. WARN_ON_ONCE(!changed);
  1611. dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISp\n",
  1612. ctrl->ctrl.opts->subsysnqn, &ctrl->addr);
  1613. kref_get(&ctrl->ctrl.kref);
  1614. mutex_lock(&nvme_rdma_ctrl_mutex);
  1615. list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list);
  1616. mutex_unlock(&nvme_rdma_ctrl_mutex);
  1617. if (opts->nr_io_queues) {
  1618. nvme_queue_scan(&ctrl->ctrl);
  1619. nvme_queue_async_events(&ctrl->ctrl);
  1620. }
  1621. return &ctrl->ctrl;
  1622. out_remove_admin_queue:
  1623. nvme_stop_keep_alive(&ctrl->ctrl);
  1624. nvme_rdma_destroy_admin_queue(ctrl);
  1625. out_kfree_queues:
  1626. kfree(ctrl->queues);
  1627. out_uninit_ctrl:
  1628. nvme_uninit_ctrl(&ctrl->ctrl);
  1629. nvme_put_ctrl(&ctrl->ctrl);
  1630. if (ret > 0)
  1631. ret = -EIO;
  1632. return ERR_PTR(ret);
  1633. out_free_ctrl:
  1634. kfree(ctrl);
  1635. return ERR_PTR(ret);
  1636. }
  1637. static struct nvmf_transport_ops nvme_rdma_transport = {
  1638. .name = "rdma",
  1639. .required_opts = NVMF_OPT_TRADDR,
  1640. .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY |
  1641. NVMF_OPT_HOST_TRADDR,
  1642. .create_ctrl = nvme_rdma_create_ctrl,
  1643. };
  1644. static void nvme_rdma_add_one(struct ib_device *ib_device)
  1645. {
  1646. }
  1647. static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data)
  1648. {
  1649. struct nvme_rdma_ctrl *ctrl;
  1650. /* Delete all controllers using this device */
  1651. mutex_lock(&nvme_rdma_ctrl_mutex);
  1652. list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
  1653. if (ctrl->device->dev != ib_device)
  1654. continue;
  1655. dev_info(ctrl->ctrl.device,
  1656. "Removing ctrl: NQN \"%s\", addr %pISp\n",
  1657. ctrl->ctrl.opts->subsysnqn, &ctrl->addr);
  1658. __nvme_rdma_del_ctrl(ctrl);
  1659. }
  1660. mutex_unlock(&nvme_rdma_ctrl_mutex);
  1661. flush_workqueue(nvme_rdma_wq);
  1662. }
  1663. static struct ib_client nvme_rdma_ib_client = {
  1664. .name = "nvme_rdma",
  1665. .add = nvme_rdma_add_one,
  1666. .remove = nvme_rdma_remove_one
  1667. };
  1668. static int __init nvme_rdma_init_module(void)
  1669. {
  1670. int ret;
  1671. nvme_rdma_wq = create_workqueue("nvme_rdma_wq");
  1672. if (!nvme_rdma_wq)
  1673. return -ENOMEM;
  1674. ret = ib_register_client(&nvme_rdma_ib_client);
  1675. if (ret) {
  1676. destroy_workqueue(nvme_rdma_wq);
  1677. return ret;
  1678. }
  1679. return nvmf_register_transport(&nvme_rdma_transport);
  1680. }
  1681. static void __exit nvme_rdma_cleanup_module(void)
  1682. {
  1683. nvmf_unregister_transport(&nvme_rdma_transport);
  1684. ib_unregister_client(&nvme_rdma_ib_client);
  1685. destroy_workqueue(nvme_rdma_wq);
  1686. }
  1687. module_init(nvme_rdma_init_module);
  1688. module_exit(nvme_rdma_cleanup_module);
  1689. MODULE_LICENSE("GPL v2");