nvme.h 10 KB

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  1. /*
  2. * Copyright (c) 2011-2014, Intel Corporation.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. */
  13. #ifndef _NVME_H
  14. #define _NVME_H
  15. #include <linux/nvme.h>
  16. #include <linux/pci.h>
  17. #include <linux/kref.h>
  18. #include <linux/blk-mq.h>
  19. #include <linux/lightnvm.h>
  20. #include <linux/sed-opal.h>
  21. enum {
  22. /*
  23. * Driver internal status code for commands that were cancelled due
  24. * to timeouts or controller shutdown. The value is negative so
  25. * that it a) doesn't overlap with the unsigned hardware error codes,
  26. * and b) can easily be tested for.
  27. */
  28. NVME_SC_CANCELLED = -EINTR,
  29. };
  30. extern unsigned char nvme_io_timeout;
  31. #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
  32. extern unsigned char admin_timeout;
  33. #define ADMIN_TIMEOUT (admin_timeout * HZ)
  34. extern unsigned char shutdown_timeout;
  35. #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ)
  36. #define NVME_DEFAULT_KATO 5
  37. #define NVME_KATO_GRACE 10
  38. extern unsigned int nvme_max_retries;
  39. enum {
  40. NVME_NS_LBA = 0,
  41. NVME_NS_LIGHTNVM = 1,
  42. };
  43. /*
  44. * List of workarounds for devices that required behavior not specified in
  45. * the standard.
  46. */
  47. enum nvme_quirks {
  48. /*
  49. * Prefers I/O aligned to a stripe size specified in a vendor
  50. * specific Identify field.
  51. */
  52. NVME_QUIRK_STRIPE_SIZE = (1 << 0),
  53. /*
  54. * The controller doesn't handle Identify value others than 0 or 1
  55. * correctly.
  56. */
  57. NVME_QUIRK_IDENTIFY_CNS = (1 << 1),
  58. /*
  59. * The controller deterministically returns O's on reads to discarded
  60. * logical blocks.
  61. */
  62. NVME_QUIRK_DISCARD_ZEROES = (1 << 2),
  63. /*
  64. * The controller needs a delay before starts checking the device
  65. * readiness, which is done by reading the NVME_CSTS_RDY bit.
  66. */
  67. NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3),
  68. /*
  69. * APST should not be used.
  70. */
  71. NVME_QUIRK_NO_APST = (1 << 4),
  72. };
  73. /*
  74. * Common request structure for NVMe passthrough. All drivers must have
  75. * this structure as the first member of their request-private data.
  76. */
  77. struct nvme_request {
  78. struct nvme_command *cmd;
  79. union nvme_result result;
  80. };
  81. static inline struct nvme_request *nvme_req(struct request *req)
  82. {
  83. return blk_mq_rq_to_pdu(req);
  84. }
  85. /* The below value is the specific amount of delay needed before checking
  86. * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
  87. * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
  88. * found empirically.
  89. */
  90. #define NVME_QUIRK_DELAY_AMOUNT 2000
  91. enum nvme_ctrl_state {
  92. NVME_CTRL_NEW,
  93. NVME_CTRL_LIVE,
  94. NVME_CTRL_RESETTING,
  95. NVME_CTRL_RECONNECTING,
  96. NVME_CTRL_DELETING,
  97. NVME_CTRL_DEAD,
  98. };
  99. struct nvme_ctrl {
  100. enum nvme_ctrl_state state;
  101. bool identified;
  102. spinlock_t lock;
  103. const struct nvme_ctrl_ops *ops;
  104. struct request_queue *admin_q;
  105. struct request_queue *connect_q;
  106. struct device *dev;
  107. struct kref kref;
  108. int instance;
  109. struct blk_mq_tag_set *tagset;
  110. struct list_head namespaces;
  111. struct mutex namespaces_mutex;
  112. struct device *device; /* char device */
  113. struct list_head node;
  114. struct ida ns_ida;
  115. struct opal_dev *opal_dev;
  116. char name[12];
  117. char serial[20];
  118. char model[40];
  119. char firmware_rev[8];
  120. u16 cntlid;
  121. u32 ctrl_config;
  122. u32 page_size;
  123. u32 max_hw_sectors;
  124. u16 oncs;
  125. u16 vid;
  126. u16 oacs;
  127. atomic_t abort_limit;
  128. u8 event_limit;
  129. u8 vwc;
  130. u32 vs;
  131. u32 sgls;
  132. u16 kas;
  133. u8 npss;
  134. u8 apsta;
  135. unsigned int kato;
  136. bool subsystem;
  137. unsigned long quirks;
  138. struct nvme_id_power_state psd[32];
  139. struct work_struct scan_work;
  140. struct work_struct async_event_work;
  141. struct delayed_work ka_work;
  142. /* Power saving configuration */
  143. u64 ps_max_latency_us;
  144. /* Fabrics only */
  145. u16 sqsize;
  146. u32 ioccsz;
  147. u32 iorcsz;
  148. u16 icdoff;
  149. u16 maxcmd;
  150. struct nvmf_ctrl_options *opts;
  151. };
  152. /*
  153. * An NVM Express namespace is equivalent to a SCSI LUN
  154. */
  155. struct nvme_ns {
  156. struct list_head list;
  157. struct nvme_ctrl *ctrl;
  158. struct request_queue *queue;
  159. struct gendisk *disk;
  160. struct nvm_dev *ndev;
  161. struct kref kref;
  162. int instance;
  163. u8 eui[8];
  164. u8 uuid[16];
  165. unsigned ns_id;
  166. int lba_shift;
  167. u16 ms;
  168. bool ext;
  169. u8 pi_type;
  170. unsigned long flags;
  171. #define NVME_NS_REMOVING 0
  172. #define NVME_NS_DEAD 1
  173. u64 mode_select_num_blocks;
  174. u32 mode_select_block_len;
  175. };
  176. struct nvme_ctrl_ops {
  177. const char *name;
  178. struct module *module;
  179. bool is_fabrics;
  180. int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
  181. int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
  182. int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
  183. int (*reset_ctrl)(struct nvme_ctrl *ctrl);
  184. void (*free_ctrl)(struct nvme_ctrl *ctrl);
  185. void (*submit_async_event)(struct nvme_ctrl *ctrl, int aer_idx);
  186. int (*delete_ctrl)(struct nvme_ctrl *ctrl);
  187. const char *(*get_subsysnqn)(struct nvme_ctrl *ctrl);
  188. int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
  189. };
  190. static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl)
  191. {
  192. u32 val = 0;
  193. if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
  194. return false;
  195. return val & NVME_CSTS_RDY;
  196. }
  197. static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
  198. {
  199. if (!ctrl->subsystem)
  200. return -ENOTTY;
  201. return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
  202. }
  203. static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
  204. {
  205. return (sector >> (ns->lba_shift - 9));
  206. }
  207. static inline void nvme_cleanup_cmd(struct request *req)
  208. {
  209. if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
  210. kfree(page_address(req->special_vec.bv_page) +
  211. req->special_vec.bv_offset);
  212. }
  213. }
  214. static inline int nvme_error_status(u16 status)
  215. {
  216. switch (status & 0x7ff) {
  217. case NVME_SC_SUCCESS:
  218. return 0;
  219. case NVME_SC_CAP_EXCEEDED:
  220. return -ENOSPC;
  221. default:
  222. return -EIO;
  223. }
  224. }
  225. static inline bool nvme_req_needs_retry(struct request *req, u16 status)
  226. {
  227. return !(status & NVME_SC_DNR || blk_noretry_request(req)) &&
  228. (jiffies - req->start_time) < req->timeout &&
  229. req->retries < nvme_max_retries;
  230. }
  231. void nvme_cancel_request(struct request *req, void *data, bool reserved);
  232. bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
  233. enum nvme_ctrl_state new_state);
  234. int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
  235. int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
  236. int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
  237. int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
  238. const struct nvme_ctrl_ops *ops, unsigned long quirks);
  239. void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
  240. void nvme_put_ctrl(struct nvme_ctrl *ctrl);
  241. int nvme_init_identify(struct nvme_ctrl *ctrl);
  242. void nvme_queue_scan(struct nvme_ctrl *ctrl);
  243. void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
  244. int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
  245. bool send);
  246. #define NVME_NR_AERS 1
  247. void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
  248. union nvme_result *res);
  249. void nvme_queue_async_events(struct nvme_ctrl *ctrl);
  250. void nvme_stop_queues(struct nvme_ctrl *ctrl);
  251. void nvme_start_queues(struct nvme_ctrl *ctrl);
  252. void nvme_kill_queues(struct nvme_ctrl *ctrl);
  253. void nvme_unfreeze(struct nvme_ctrl *ctrl);
  254. void nvme_wait_freeze(struct nvme_ctrl *ctrl);
  255. void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
  256. void nvme_start_freeze(struct nvme_ctrl *ctrl);
  257. #define NVME_QID_ANY -1
  258. struct request *nvme_alloc_request(struct request_queue *q,
  259. struct nvme_command *cmd, unsigned int flags, int qid);
  260. void nvme_requeue_req(struct request *req);
  261. int nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
  262. struct nvme_command *cmd);
  263. int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
  264. void *buf, unsigned bufflen);
  265. int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
  266. union nvme_result *result, void *buffer, unsigned bufflen,
  267. unsigned timeout, int qid, int at_head, int flags);
  268. int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
  269. void __user *ubuffer, unsigned bufflen, u32 *result,
  270. unsigned timeout);
  271. int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
  272. void __user *ubuffer, unsigned bufflen,
  273. void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
  274. u32 *result, unsigned timeout);
  275. int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id);
  276. int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid,
  277. struct nvme_id_ns **id);
  278. int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log);
  279. int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid,
  280. void *buffer, size_t buflen, u32 *result);
  281. int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
  282. void *buffer, size_t buflen, u32 *result);
  283. int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
  284. void nvme_start_keep_alive(struct nvme_ctrl *ctrl);
  285. void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
  286. struct sg_io_hdr;
  287. int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr);
  288. int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg);
  289. int nvme_sg_get_version_num(int __user *ip);
  290. #ifdef CONFIG_NVM
  291. int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id);
  292. int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node);
  293. void nvme_nvm_unregister(struct nvme_ns *ns);
  294. int nvme_nvm_register_sysfs(struct nvme_ns *ns);
  295. void nvme_nvm_unregister_sysfs(struct nvme_ns *ns);
  296. int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg);
  297. #else
  298. static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name,
  299. int node)
  300. {
  301. return 0;
  302. }
  303. static inline void nvme_nvm_unregister(struct nvme_ns *ns) {};
  304. static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns)
  305. {
  306. return 0;
  307. }
  308. static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {};
  309. static inline int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id)
  310. {
  311. return 0;
  312. }
  313. static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd,
  314. unsigned long arg)
  315. {
  316. return -ENOTTY;
  317. }
  318. #endif /* CONFIG_NVM */
  319. static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
  320. {
  321. return dev_to_disk(dev)->private_data;
  322. }
  323. int __init nvme_core_init(void);
  324. void nvme_core_exit(void);
  325. #endif /* _NVME_H */