core.c 60 KB

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  1. /*
  2. * NVM Express device driver
  3. * Copyright (c) 2011-2014, Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. */
  14. #include <linux/blkdev.h>
  15. #include <linux/blk-mq.h>
  16. #include <linux/delay.h>
  17. #include <linux/errno.h>
  18. #include <linux/hdreg.h>
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/list_sort.h>
  22. #include <linux/slab.h>
  23. #include <linux/types.h>
  24. #include <linux/pr.h>
  25. #include <linux/ptrace.h>
  26. #include <linux/nvme_ioctl.h>
  27. #include <linux/t10-pi.h>
  28. #include <linux/pm_qos.h>
  29. #include <scsi/sg.h>
  30. #include <asm/unaligned.h>
  31. #include "nvme.h"
  32. #include "fabrics.h"
  33. #define NVME_MINORS (1U << MINORBITS)
  34. unsigned char admin_timeout = 60;
  35. module_param(admin_timeout, byte, 0644);
  36. MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
  37. EXPORT_SYMBOL_GPL(admin_timeout);
  38. unsigned char nvme_io_timeout = 30;
  39. module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
  40. MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
  41. EXPORT_SYMBOL_GPL(nvme_io_timeout);
  42. unsigned char shutdown_timeout = 5;
  43. module_param(shutdown_timeout, byte, 0644);
  44. MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
  45. unsigned int nvme_max_retries = 5;
  46. module_param_named(max_retries, nvme_max_retries, uint, 0644);
  47. MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
  48. EXPORT_SYMBOL_GPL(nvme_max_retries);
  49. static int nvme_char_major;
  50. module_param(nvme_char_major, int, 0);
  51. static unsigned long default_ps_max_latency_us = 25000;
  52. module_param(default_ps_max_latency_us, ulong, 0644);
  53. MODULE_PARM_DESC(default_ps_max_latency_us,
  54. "max power saving latency for new devices; use PM QOS to change per device");
  55. static LIST_HEAD(nvme_ctrl_list);
  56. static DEFINE_SPINLOCK(dev_list_lock);
  57. static struct class *nvme_class;
  58. void nvme_cancel_request(struct request *req, void *data, bool reserved)
  59. {
  60. int status;
  61. if (!blk_mq_request_started(req))
  62. return;
  63. dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
  64. "Cancelling I/O %d", req->tag);
  65. status = NVME_SC_ABORT_REQ;
  66. if (blk_queue_dying(req->q))
  67. status |= NVME_SC_DNR;
  68. blk_mq_complete_request(req, status);
  69. }
  70. EXPORT_SYMBOL_GPL(nvme_cancel_request);
  71. bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
  72. enum nvme_ctrl_state new_state)
  73. {
  74. enum nvme_ctrl_state old_state;
  75. bool changed = false;
  76. spin_lock_irq(&ctrl->lock);
  77. old_state = ctrl->state;
  78. switch (new_state) {
  79. case NVME_CTRL_LIVE:
  80. switch (old_state) {
  81. case NVME_CTRL_NEW:
  82. case NVME_CTRL_RESETTING:
  83. case NVME_CTRL_RECONNECTING:
  84. changed = true;
  85. /* FALLTHRU */
  86. default:
  87. break;
  88. }
  89. break;
  90. case NVME_CTRL_RESETTING:
  91. switch (old_state) {
  92. case NVME_CTRL_NEW:
  93. case NVME_CTRL_LIVE:
  94. case NVME_CTRL_RECONNECTING:
  95. changed = true;
  96. /* FALLTHRU */
  97. default:
  98. break;
  99. }
  100. break;
  101. case NVME_CTRL_RECONNECTING:
  102. switch (old_state) {
  103. case NVME_CTRL_LIVE:
  104. changed = true;
  105. /* FALLTHRU */
  106. default:
  107. break;
  108. }
  109. break;
  110. case NVME_CTRL_DELETING:
  111. switch (old_state) {
  112. case NVME_CTRL_LIVE:
  113. case NVME_CTRL_RESETTING:
  114. case NVME_CTRL_RECONNECTING:
  115. changed = true;
  116. /* FALLTHRU */
  117. default:
  118. break;
  119. }
  120. break;
  121. case NVME_CTRL_DEAD:
  122. switch (old_state) {
  123. case NVME_CTRL_DELETING:
  124. changed = true;
  125. /* FALLTHRU */
  126. default:
  127. break;
  128. }
  129. break;
  130. default:
  131. break;
  132. }
  133. if (changed)
  134. ctrl->state = new_state;
  135. spin_unlock_irq(&ctrl->lock);
  136. return changed;
  137. }
  138. EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
  139. static void nvme_free_ns(struct kref *kref)
  140. {
  141. struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
  142. if (ns->ndev)
  143. nvme_nvm_unregister(ns);
  144. if (ns->disk) {
  145. spin_lock(&dev_list_lock);
  146. ns->disk->private_data = NULL;
  147. spin_unlock(&dev_list_lock);
  148. }
  149. put_disk(ns->disk);
  150. ida_simple_remove(&ns->ctrl->ns_ida, ns->instance);
  151. nvme_put_ctrl(ns->ctrl);
  152. kfree(ns);
  153. }
  154. static void nvme_put_ns(struct nvme_ns *ns)
  155. {
  156. kref_put(&ns->kref, nvme_free_ns);
  157. }
  158. static struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk)
  159. {
  160. struct nvme_ns *ns;
  161. spin_lock(&dev_list_lock);
  162. ns = disk->private_data;
  163. if (ns) {
  164. if (!kref_get_unless_zero(&ns->kref))
  165. goto fail;
  166. if (!try_module_get(ns->ctrl->ops->module))
  167. goto fail_put_ns;
  168. }
  169. spin_unlock(&dev_list_lock);
  170. return ns;
  171. fail_put_ns:
  172. kref_put(&ns->kref, nvme_free_ns);
  173. fail:
  174. spin_unlock(&dev_list_lock);
  175. return NULL;
  176. }
  177. void nvme_requeue_req(struct request *req)
  178. {
  179. blk_mq_requeue_request(req, !blk_mq_queue_stopped(req->q));
  180. }
  181. EXPORT_SYMBOL_GPL(nvme_requeue_req);
  182. struct request *nvme_alloc_request(struct request_queue *q,
  183. struct nvme_command *cmd, unsigned int flags, int qid)
  184. {
  185. unsigned op = nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN;
  186. struct request *req;
  187. if (qid == NVME_QID_ANY) {
  188. req = blk_mq_alloc_request(q, op, flags);
  189. } else {
  190. req = blk_mq_alloc_request_hctx(q, op, flags,
  191. qid ? qid - 1 : 0);
  192. }
  193. if (IS_ERR(req))
  194. return req;
  195. req->cmd_flags |= REQ_FAILFAST_DRIVER;
  196. nvme_req(req)->cmd = cmd;
  197. return req;
  198. }
  199. EXPORT_SYMBOL_GPL(nvme_alloc_request);
  200. static inline void nvme_setup_flush(struct nvme_ns *ns,
  201. struct nvme_command *cmnd)
  202. {
  203. memset(cmnd, 0, sizeof(*cmnd));
  204. cmnd->common.opcode = nvme_cmd_flush;
  205. cmnd->common.nsid = cpu_to_le32(ns->ns_id);
  206. }
  207. static inline int nvme_setup_discard(struct nvme_ns *ns, struct request *req,
  208. struct nvme_command *cmnd)
  209. {
  210. unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
  211. struct nvme_dsm_range *range;
  212. struct bio *bio;
  213. range = kmalloc_array(segments, sizeof(*range), GFP_ATOMIC);
  214. if (!range)
  215. return BLK_MQ_RQ_QUEUE_BUSY;
  216. __rq_for_each_bio(bio, req) {
  217. u64 slba = nvme_block_nr(ns, bio->bi_iter.bi_sector);
  218. u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift;
  219. range[n].cattr = cpu_to_le32(0);
  220. range[n].nlb = cpu_to_le32(nlb);
  221. range[n].slba = cpu_to_le64(slba);
  222. n++;
  223. }
  224. if (WARN_ON_ONCE(n != segments)) {
  225. kfree(range);
  226. return BLK_MQ_RQ_QUEUE_ERROR;
  227. }
  228. memset(cmnd, 0, sizeof(*cmnd));
  229. cmnd->dsm.opcode = nvme_cmd_dsm;
  230. cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
  231. cmnd->dsm.nr = segments - 1;
  232. cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
  233. req->special_vec.bv_page = virt_to_page(range);
  234. req->special_vec.bv_offset = offset_in_page(range);
  235. req->special_vec.bv_len = sizeof(*range) * segments;
  236. req->rq_flags |= RQF_SPECIAL_PAYLOAD;
  237. return BLK_MQ_RQ_QUEUE_OK;
  238. }
  239. static inline void nvme_setup_rw(struct nvme_ns *ns, struct request *req,
  240. struct nvme_command *cmnd)
  241. {
  242. u16 control = 0;
  243. u32 dsmgmt = 0;
  244. if (req->cmd_flags & REQ_FUA)
  245. control |= NVME_RW_FUA;
  246. if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
  247. control |= NVME_RW_LR;
  248. if (req->cmd_flags & REQ_RAHEAD)
  249. dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
  250. memset(cmnd, 0, sizeof(*cmnd));
  251. cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
  252. cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
  253. cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
  254. cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
  255. if (ns->ms) {
  256. switch (ns->pi_type) {
  257. case NVME_NS_DPS_PI_TYPE3:
  258. control |= NVME_RW_PRINFO_PRCHK_GUARD;
  259. break;
  260. case NVME_NS_DPS_PI_TYPE1:
  261. case NVME_NS_DPS_PI_TYPE2:
  262. control |= NVME_RW_PRINFO_PRCHK_GUARD |
  263. NVME_RW_PRINFO_PRCHK_REF;
  264. cmnd->rw.reftag = cpu_to_le32(
  265. nvme_block_nr(ns, blk_rq_pos(req)));
  266. break;
  267. }
  268. if (!blk_integrity_rq(req))
  269. control |= NVME_RW_PRINFO_PRACT;
  270. }
  271. cmnd->rw.control = cpu_to_le16(control);
  272. cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
  273. }
  274. int nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
  275. struct nvme_command *cmd)
  276. {
  277. int ret = BLK_MQ_RQ_QUEUE_OK;
  278. switch (req_op(req)) {
  279. case REQ_OP_DRV_IN:
  280. case REQ_OP_DRV_OUT:
  281. memcpy(cmd, nvme_req(req)->cmd, sizeof(*cmd));
  282. break;
  283. case REQ_OP_FLUSH:
  284. nvme_setup_flush(ns, cmd);
  285. break;
  286. case REQ_OP_DISCARD:
  287. ret = nvme_setup_discard(ns, req, cmd);
  288. break;
  289. case REQ_OP_READ:
  290. case REQ_OP_WRITE:
  291. nvme_setup_rw(ns, req, cmd);
  292. break;
  293. default:
  294. WARN_ON_ONCE(1);
  295. return BLK_MQ_RQ_QUEUE_ERROR;
  296. }
  297. cmd->common.command_id = req->tag;
  298. return ret;
  299. }
  300. EXPORT_SYMBOL_GPL(nvme_setup_cmd);
  301. /*
  302. * Returns 0 on success. If the result is negative, it's a Linux error code;
  303. * if the result is positive, it's an NVM Express status code
  304. */
  305. int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
  306. union nvme_result *result, void *buffer, unsigned bufflen,
  307. unsigned timeout, int qid, int at_head, int flags)
  308. {
  309. struct request *req;
  310. int ret;
  311. req = nvme_alloc_request(q, cmd, flags, qid);
  312. if (IS_ERR(req))
  313. return PTR_ERR(req);
  314. req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
  315. if (buffer && bufflen) {
  316. ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
  317. if (ret)
  318. goto out;
  319. }
  320. blk_execute_rq(req->q, NULL, req, at_head);
  321. if (result)
  322. *result = nvme_req(req)->result;
  323. ret = req->errors;
  324. out:
  325. blk_mq_free_request(req);
  326. return ret;
  327. }
  328. EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
  329. int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
  330. void *buffer, unsigned bufflen)
  331. {
  332. return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 0,
  333. NVME_QID_ANY, 0, 0);
  334. }
  335. EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
  336. int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
  337. void __user *ubuffer, unsigned bufflen,
  338. void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
  339. u32 *result, unsigned timeout)
  340. {
  341. bool write = nvme_is_write(cmd);
  342. struct nvme_ns *ns = q->queuedata;
  343. struct gendisk *disk = ns ? ns->disk : NULL;
  344. struct request *req;
  345. struct bio *bio = NULL;
  346. void *meta = NULL;
  347. int ret;
  348. req = nvme_alloc_request(q, cmd, 0, NVME_QID_ANY);
  349. if (IS_ERR(req))
  350. return PTR_ERR(req);
  351. req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
  352. if (ubuffer && bufflen) {
  353. ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen,
  354. GFP_KERNEL);
  355. if (ret)
  356. goto out;
  357. bio = req->bio;
  358. if (!disk)
  359. goto submit;
  360. bio->bi_bdev = bdget_disk(disk, 0);
  361. if (!bio->bi_bdev) {
  362. ret = -ENODEV;
  363. goto out_unmap;
  364. }
  365. if (meta_buffer && meta_len) {
  366. struct bio_integrity_payload *bip;
  367. meta = kmalloc(meta_len, GFP_KERNEL);
  368. if (!meta) {
  369. ret = -ENOMEM;
  370. goto out_unmap;
  371. }
  372. if (write) {
  373. if (copy_from_user(meta, meta_buffer,
  374. meta_len)) {
  375. ret = -EFAULT;
  376. goto out_free_meta;
  377. }
  378. }
  379. bip = bio_integrity_alloc(bio, GFP_KERNEL, 1);
  380. if (IS_ERR(bip)) {
  381. ret = PTR_ERR(bip);
  382. goto out_free_meta;
  383. }
  384. bip->bip_iter.bi_size = meta_len;
  385. bip->bip_iter.bi_sector = meta_seed;
  386. ret = bio_integrity_add_page(bio, virt_to_page(meta),
  387. meta_len, offset_in_page(meta));
  388. if (ret != meta_len) {
  389. ret = -ENOMEM;
  390. goto out_free_meta;
  391. }
  392. }
  393. }
  394. submit:
  395. blk_execute_rq(req->q, disk, req, 0);
  396. ret = req->errors;
  397. if (result)
  398. *result = le32_to_cpu(nvme_req(req)->result.u32);
  399. if (meta && !ret && !write) {
  400. if (copy_to_user(meta_buffer, meta, meta_len))
  401. ret = -EFAULT;
  402. }
  403. out_free_meta:
  404. kfree(meta);
  405. out_unmap:
  406. if (bio) {
  407. if (disk && bio->bi_bdev)
  408. bdput(bio->bi_bdev);
  409. blk_rq_unmap_user(bio);
  410. }
  411. out:
  412. blk_mq_free_request(req);
  413. return ret;
  414. }
  415. int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
  416. void __user *ubuffer, unsigned bufflen, u32 *result,
  417. unsigned timeout)
  418. {
  419. return __nvme_submit_user_cmd(q, cmd, ubuffer, bufflen, NULL, 0, 0,
  420. result, timeout);
  421. }
  422. static void nvme_keep_alive_end_io(struct request *rq, int error)
  423. {
  424. struct nvme_ctrl *ctrl = rq->end_io_data;
  425. blk_mq_free_request(rq);
  426. if (error) {
  427. dev_err(ctrl->device,
  428. "failed nvme_keep_alive_end_io error=%d\n", error);
  429. return;
  430. }
  431. schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
  432. }
  433. static int nvme_keep_alive(struct nvme_ctrl *ctrl)
  434. {
  435. struct nvme_command c;
  436. struct request *rq;
  437. memset(&c, 0, sizeof(c));
  438. c.common.opcode = nvme_admin_keep_alive;
  439. rq = nvme_alloc_request(ctrl->admin_q, &c, BLK_MQ_REQ_RESERVED,
  440. NVME_QID_ANY);
  441. if (IS_ERR(rq))
  442. return PTR_ERR(rq);
  443. rq->timeout = ctrl->kato * HZ;
  444. rq->end_io_data = ctrl;
  445. blk_execute_rq_nowait(rq->q, NULL, rq, 0, nvme_keep_alive_end_io);
  446. return 0;
  447. }
  448. static void nvme_keep_alive_work(struct work_struct *work)
  449. {
  450. struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
  451. struct nvme_ctrl, ka_work);
  452. if (nvme_keep_alive(ctrl)) {
  453. /* allocation failure, reset the controller */
  454. dev_err(ctrl->device, "keep-alive failed\n");
  455. ctrl->ops->reset_ctrl(ctrl);
  456. return;
  457. }
  458. }
  459. void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
  460. {
  461. if (unlikely(ctrl->kato == 0))
  462. return;
  463. INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
  464. schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
  465. }
  466. EXPORT_SYMBOL_GPL(nvme_start_keep_alive);
  467. void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
  468. {
  469. if (unlikely(ctrl->kato == 0))
  470. return;
  471. cancel_delayed_work_sync(&ctrl->ka_work);
  472. }
  473. EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
  474. int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
  475. {
  476. struct nvme_command c = { };
  477. int error;
  478. /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
  479. c.identify.opcode = nvme_admin_identify;
  480. c.identify.cns = NVME_ID_CNS_CTRL;
  481. *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
  482. if (!*id)
  483. return -ENOMEM;
  484. error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
  485. sizeof(struct nvme_id_ctrl));
  486. if (error)
  487. kfree(*id);
  488. return error;
  489. }
  490. static int nvme_identify_ns_list(struct nvme_ctrl *dev, unsigned nsid, __le32 *ns_list)
  491. {
  492. struct nvme_command c = { };
  493. c.identify.opcode = nvme_admin_identify;
  494. c.identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST;
  495. c.identify.nsid = cpu_to_le32(nsid);
  496. return nvme_submit_sync_cmd(dev->admin_q, &c, ns_list, 0x1000);
  497. }
  498. int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid,
  499. struct nvme_id_ns **id)
  500. {
  501. struct nvme_command c = { };
  502. int error;
  503. /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
  504. c.identify.opcode = nvme_admin_identify;
  505. c.identify.nsid = cpu_to_le32(nsid);
  506. c.identify.cns = NVME_ID_CNS_NS;
  507. *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
  508. if (!*id)
  509. return -ENOMEM;
  510. error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
  511. sizeof(struct nvme_id_ns));
  512. if (error)
  513. kfree(*id);
  514. return error;
  515. }
  516. int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid,
  517. void *buffer, size_t buflen, u32 *result)
  518. {
  519. struct nvme_command c;
  520. union nvme_result res;
  521. int ret;
  522. memset(&c, 0, sizeof(c));
  523. c.features.opcode = nvme_admin_get_features;
  524. c.features.nsid = cpu_to_le32(nsid);
  525. c.features.fid = cpu_to_le32(fid);
  526. ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res, buffer, buflen, 0,
  527. NVME_QID_ANY, 0, 0);
  528. if (ret >= 0 && result)
  529. *result = le32_to_cpu(res.u32);
  530. return ret;
  531. }
  532. int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
  533. void *buffer, size_t buflen, u32 *result)
  534. {
  535. struct nvme_command c;
  536. union nvme_result res;
  537. int ret;
  538. memset(&c, 0, sizeof(c));
  539. c.features.opcode = nvme_admin_set_features;
  540. c.features.fid = cpu_to_le32(fid);
  541. c.features.dword11 = cpu_to_le32(dword11);
  542. ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
  543. buffer, buflen, 0, NVME_QID_ANY, 0, 0);
  544. if (ret >= 0 && result)
  545. *result = le32_to_cpu(res.u32);
  546. return ret;
  547. }
  548. int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log)
  549. {
  550. struct nvme_command c = { };
  551. int error;
  552. c.common.opcode = nvme_admin_get_log_page,
  553. c.common.nsid = cpu_to_le32(0xFFFFFFFF),
  554. c.common.cdw10[0] = cpu_to_le32(
  555. (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
  556. NVME_LOG_SMART),
  557. *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
  558. if (!*log)
  559. return -ENOMEM;
  560. error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
  561. sizeof(struct nvme_smart_log));
  562. if (error)
  563. kfree(*log);
  564. return error;
  565. }
  566. int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
  567. {
  568. u32 q_count = (*count - 1) | ((*count - 1) << 16);
  569. u32 result;
  570. int status, nr_io_queues;
  571. status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
  572. &result);
  573. if (status < 0)
  574. return status;
  575. /*
  576. * Degraded controllers might return an error when setting the queue
  577. * count. We still want to be able to bring them online and offer
  578. * access to the admin queue, as that might be only way to fix them up.
  579. */
  580. if (status > 0) {
  581. dev_err(ctrl->dev, "Could not set queue count (%d)\n", status);
  582. *count = 0;
  583. } else {
  584. nr_io_queues = min(result & 0xffff, result >> 16) + 1;
  585. *count = min(*count, nr_io_queues);
  586. }
  587. return 0;
  588. }
  589. EXPORT_SYMBOL_GPL(nvme_set_queue_count);
  590. static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
  591. {
  592. struct nvme_user_io io;
  593. struct nvme_command c;
  594. unsigned length, meta_len;
  595. void __user *metadata;
  596. if (copy_from_user(&io, uio, sizeof(io)))
  597. return -EFAULT;
  598. if (io.flags)
  599. return -EINVAL;
  600. switch (io.opcode) {
  601. case nvme_cmd_write:
  602. case nvme_cmd_read:
  603. case nvme_cmd_compare:
  604. break;
  605. default:
  606. return -EINVAL;
  607. }
  608. length = (io.nblocks + 1) << ns->lba_shift;
  609. meta_len = (io.nblocks + 1) * ns->ms;
  610. metadata = (void __user *)(uintptr_t)io.metadata;
  611. if (ns->ext) {
  612. length += meta_len;
  613. meta_len = 0;
  614. } else if (meta_len) {
  615. if ((io.metadata & 3) || !io.metadata)
  616. return -EINVAL;
  617. }
  618. memset(&c, 0, sizeof(c));
  619. c.rw.opcode = io.opcode;
  620. c.rw.flags = io.flags;
  621. c.rw.nsid = cpu_to_le32(ns->ns_id);
  622. c.rw.slba = cpu_to_le64(io.slba);
  623. c.rw.length = cpu_to_le16(io.nblocks);
  624. c.rw.control = cpu_to_le16(io.control);
  625. c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
  626. c.rw.reftag = cpu_to_le32(io.reftag);
  627. c.rw.apptag = cpu_to_le16(io.apptag);
  628. c.rw.appmask = cpu_to_le16(io.appmask);
  629. return __nvme_submit_user_cmd(ns->queue, &c,
  630. (void __user *)(uintptr_t)io.addr, length,
  631. metadata, meta_len, io.slba, NULL, 0);
  632. }
  633. static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
  634. struct nvme_passthru_cmd __user *ucmd)
  635. {
  636. struct nvme_passthru_cmd cmd;
  637. struct nvme_command c;
  638. unsigned timeout = 0;
  639. int status;
  640. if (!capable(CAP_SYS_ADMIN))
  641. return -EACCES;
  642. if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
  643. return -EFAULT;
  644. if (cmd.flags)
  645. return -EINVAL;
  646. memset(&c, 0, sizeof(c));
  647. c.common.opcode = cmd.opcode;
  648. c.common.flags = cmd.flags;
  649. c.common.nsid = cpu_to_le32(cmd.nsid);
  650. c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
  651. c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
  652. c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
  653. c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
  654. c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
  655. c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
  656. c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
  657. c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
  658. if (cmd.timeout_ms)
  659. timeout = msecs_to_jiffies(cmd.timeout_ms);
  660. status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c,
  661. (void __user *)(uintptr_t)cmd.addr, cmd.data_len,
  662. &cmd.result, timeout);
  663. if (status >= 0) {
  664. if (put_user(cmd.result, &ucmd->result))
  665. return -EFAULT;
  666. }
  667. return status;
  668. }
  669. static int nvme_ioctl(struct block_device *bdev, fmode_t mode,
  670. unsigned int cmd, unsigned long arg)
  671. {
  672. struct nvme_ns *ns = bdev->bd_disk->private_data;
  673. switch (cmd) {
  674. case NVME_IOCTL_ID:
  675. force_successful_syscall_return();
  676. return ns->ns_id;
  677. case NVME_IOCTL_ADMIN_CMD:
  678. return nvme_user_cmd(ns->ctrl, NULL, (void __user *)arg);
  679. case NVME_IOCTL_IO_CMD:
  680. return nvme_user_cmd(ns->ctrl, ns, (void __user *)arg);
  681. case NVME_IOCTL_SUBMIT_IO:
  682. return nvme_submit_io(ns, (void __user *)arg);
  683. #ifdef CONFIG_BLK_DEV_NVME_SCSI
  684. case SG_GET_VERSION_NUM:
  685. return nvme_sg_get_version_num((void __user *)arg);
  686. case SG_IO:
  687. return nvme_sg_io(ns, (void __user *)arg);
  688. #endif
  689. default:
  690. #ifdef CONFIG_NVM
  691. if (ns->ndev)
  692. return nvme_nvm_ioctl(ns, cmd, arg);
  693. #endif
  694. if (is_sed_ioctl(cmd))
  695. return sed_ioctl(ns->ctrl->opal_dev, cmd,
  696. (void __user *) arg);
  697. return -ENOTTY;
  698. }
  699. }
  700. #ifdef CONFIG_COMPAT
  701. static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
  702. unsigned int cmd, unsigned long arg)
  703. {
  704. switch (cmd) {
  705. case SG_IO:
  706. return -ENOIOCTLCMD;
  707. }
  708. return nvme_ioctl(bdev, mode, cmd, arg);
  709. }
  710. #else
  711. #define nvme_compat_ioctl NULL
  712. #endif
  713. static int nvme_open(struct block_device *bdev, fmode_t mode)
  714. {
  715. return nvme_get_ns_from_disk(bdev->bd_disk) ? 0 : -ENXIO;
  716. }
  717. static void nvme_release(struct gendisk *disk, fmode_t mode)
  718. {
  719. struct nvme_ns *ns = disk->private_data;
  720. module_put(ns->ctrl->ops->module);
  721. nvme_put_ns(ns);
  722. }
  723. static int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
  724. {
  725. /* some standard values */
  726. geo->heads = 1 << 6;
  727. geo->sectors = 1 << 5;
  728. geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
  729. return 0;
  730. }
  731. #ifdef CONFIG_BLK_DEV_INTEGRITY
  732. static void nvme_init_integrity(struct nvme_ns *ns)
  733. {
  734. struct blk_integrity integrity;
  735. memset(&integrity, 0, sizeof(integrity));
  736. switch (ns->pi_type) {
  737. case NVME_NS_DPS_PI_TYPE3:
  738. integrity.profile = &t10_pi_type3_crc;
  739. integrity.tag_size = sizeof(u16) + sizeof(u32);
  740. integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
  741. break;
  742. case NVME_NS_DPS_PI_TYPE1:
  743. case NVME_NS_DPS_PI_TYPE2:
  744. integrity.profile = &t10_pi_type1_crc;
  745. integrity.tag_size = sizeof(u16);
  746. integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
  747. break;
  748. default:
  749. integrity.profile = NULL;
  750. break;
  751. }
  752. integrity.tuple_size = ns->ms;
  753. blk_integrity_register(ns->disk, &integrity);
  754. blk_queue_max_integrity_segments(ns->queue, 1);
  755. }
  756. #else
  757. static void nvme_init_integrity(struct nvme_ns *ns)
  758. {
  759. }
  760. #endif /* CONFIG_BLK_DEV_INTEGRITY */
  761. static void nvme_config_discard(struct nvme_ns *ns)
  762. {
  763. struct nvme_ctrl *ctrl = ns->ctrl;
  764. u32 logical_block_size = queue_logical_block_size(ns->queue);
  765. BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) <
  766. NVME_DSM_MAX_RANGES);
  767. if (ctrl->quirks & NVME_QUIRK_DISCARD_ZEROES)
  768. ns->queue->limits.discard_zeroes_data = 1;
  769. else
  770. ns->queue->limits.discard_zeroes_data = 0;
  771. ns->queue->limits.discard_alignment = logical_block_size;
  772. ns->queue->limits.discard_granularity = logical_block_size;
  773. blk_queue_max_discard_sectors(ns->queue, UINT_MAX);
  774. blk_queue_max_discard_segments(ns->queue, NVME_DSM_MAX_RANGES);
  775. queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
  776. }
  777. static int nvme_revalidate_ns(struct nvme_ns *ns, struct nvme_id_ns **id)
  778. {
  779. if (nvme_identify_ns(ns->ctrl, ns->ns_id, id)) {
  780. dev_warn(ns->ctrl->dev, "%s: Identify failure\n", __func__);
  781. return -ENODEV;
  782. }
  783. if ((*id)->ncap == 0) {
  784. kfree(*id);
  785. return -ENODEV;
  786. }
  787. if (ns->ctrl->vs >= NVME_VS(1, 1, 0))
  788. memcpy(ns->eui, (*id)->eui64, sizeof(ns->eui));
  789. if (ns->ctrl->vs >= NVME_VS(1, 2, 0))
  790. memcpy(ns->uuid, (*id)->nguid, sizeof(ns->uuid));
  791. return 0;
  792. }
  793. static void __nvme_revalidate_disk(struct gendisk *disk, struct nvme_id_ns *id)
  794. {
  795. struct nvme_ns *ns = disk->private_data;
  796. u8 lbaf, pi_type;
  797. u16 old_ms;
  798. unsigned short bs;
  799. old_ms = ns->ms;
  800. lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
  801. ns->lba_shift = id->lbaf[lbaf].ds;
  802. ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
  803. ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
  804. /*
  805. * If identify namespace failed, use default 512 byte block size so
  806. * block layer can use before failing read/write for 0 capacity.
  807. */
  808. if (ns->lba_shift == 0)
  809. ns->lba_shift = 9;
  810. bs = 1 << ns->lba_shift;
  811. /* XXX: PI implementation requires metadata equal t10 pi tuple size */
  812. pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
  813. id->dps & NVME_NS_DPS_PI_MASK : 0;
  814. blk_mq_freeze_queue(disk->queue);
  815. if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
  816. ns->ms != old_ms ||
  817. bs != queue_logical_block_size(disk->queue) ||
  818. (ns->ms && ns->ext)))
  819. blk_integrity_unregister(disk);
  820. ns->pi_type = pi_type;
  821. blk_queue_logical_block_size(ns->queue, bs);
  822. if (ns->ms && !blk_get_integrity(disk) && !ns->ext)
  823. nvme_init_integrity(ns);
  824. if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk))
  825. set_capacity(disk, 0);
  826. else
  827. set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
  828. if (ns->ctrl->oncs & NVME_CTRL_ONCS_DSM)
  829. nvme_config_discard(ns);
  830. blk_mq_unfreeze_queue(disk->queue);
  831. }
  832. static int nvme_revalidate_disk(struct gendisk *disk)
  833. {
  834. struct nvme_ns *ns = disk->private_data;
  835. struct nvme_id_ns *id = NULL;
  836. int ret;
  837. if (test_bit(NVME_NS_DEAD, &ns->flags)) {
  838. set_capacity(disk, 0);
  839. return -ENODEV;
  840. }
  841. ret = nvme_revalidate_ns(ns, &id);
  842. if (ret)
  843. return ret;
  844. __nvme_revalidate_disk(disk, id);
  845. kfree(id);
  846. return 0;
  847. }
  848. static char nvme_pr_type(enum pr_type type)
  849. {
  850. switch (type) {
  851. case PR_WRITE_EXCLUSIVE:
  852. return 1;
  853. case PR_EXCLUSIVE_ACCESS:
  854. return 2;
  855. case PR_WRITE_EXCLUSIVE_REG_ONLY:
  856. return 3;
  857. case PR_EXCLUSIVE_ACCESS_REG_ONLY:
  858. return 4;
  859. case PR_WRITE_EXCLUSIVE_ALL_REGS:
  860. return 5;
  861. case PR_EXCLUSIVE_ACCESS_ALL_REGS:
  862. return 6;
  863. default:
  864. return 0;
  865. }
  866. };
  867. static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
  868. u64 key, u64 sa_key, u8 op)
  869. {
  870. struct nvme_ns *ns = bdev->bd_disk->private_data;
  871. struct nvme_command c;
  872. u8 data[16] = { 0, };
  873. put_unaligned_le64(key, &data[0]);
  874. put_unaligned_le64(sa_key, &data[8]);
  875. memset(&c, 0, sizeof(c));
  876. c.common.opcode = op;
  877. c.common.nsid = cpu_to_le32(ns->ns_id);
  878. c.common.cdw10[0] = cpu_to_le32(cdw10);
  879. return nvme_submit_sync_cmd(ns->queue, &c, data, 16);
  880. }
  881. static int nvme_pr_register(struct block_device *bdev, u64 old,
  882. u64 new, unsigned flags)
  883. {
  884. u32 cdw10;
  885. if (flags & ~PR_FL_IGNORE_KEY)
  886. return -EOPNOTSUPP;
  887. cdw10 = old ? 2 : 0;
  888. cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
  889. cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
  890. return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
  891. }
  892. static int nvme_pr_reserve(struct block_device *bdev, u64 key,
  893. enum pr_type type, unsigned flags)
  894. {
  895. u32 cdw10;
  896. if (flags & ~PR_FL_IGNORE_KEY)
  897. return -EOPNOTSUPP;
  898. cdw10 = nvme_pr_type(type) << 8;
  899. cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
  900. return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
  901. }
  902. static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
  903. enum pr_type type, bool abort)
  904. {
  905. u32 cdw10 = nvme_pr_type(type) << 8 | abort ? 2 : 1;
  906. return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
  907. }
  908. static int nvme_pr_clear(struct block_device *bdev, u64 key)
  909. {
  910. u32 cdw10 = 1 | (key ? 1 << 3 : 0);
  911. return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register);
  912. }
  913. static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
  914. {
  915. u32 cdw10 = nvme_pr_type(type) << 8 | key ? 1 << 3 : 0;
  916. return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
  917. }
  918. static const struct pr_ops nvme_pr_ops = {
  919. .pr_register = nvme_pr_register,
  920. .pr_reserve = nvme_pr_reserve,
  921. .pr_release = nvme_pr_release,
  922. .pr_preempt = nvme_pr_preempt,
  923. .pr_clear = nvme_pr_clear,
  924. };
  925. #ifdef CONFIG_BLK_SED_OPAL
  926. int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
  927. bool send)
  928. {
  929. struct nvme_ctrl *ctrl = data;
  930. struct nvme_command cmd;
  931. memset(&cmd, 0, sizeof(cmd));
  932. if (send)
  933. cmd.common.opcode = nvme_admin_security_send;
  934. else
  935. cmd.common.opcode = nvme_admin_security_recv;
  936. cmd.common.nsid = 0;
  937. cmd.common.cdw10[0] = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
  938. cmd.common.cdw10[1] = cpu_to_le32(len);
  939. return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
  940. ADMIN_TIMEOUT, NVME_QID_ANY, 1, 0);
  941. }
  942. EXPORT_SYMBOL_GPL(nvme_sec_submit);
  943. #endif /* CONFIG_BLK_SED_OPAL */
  944. static const struct block_device_operations nvme_fops = {
  945. .owner = THIS_MODULE,
  946. .ioctl = nvme_ioctl,
  947. .compat_ioctl = nvme_compat_ioctl,
  948. .open = nvme_open,
  949. .release = nvme_release,
  950. .getgeo = nvme_getgeo,
  951. .revalidate_disk= nvme_revalidate_disk,
  952. .pr_ops = &nvme_pr_ops,
  953. };
  954. static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled)
  955. {
  956. unsigned long timeout =
  957. ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
  958. u32 csts, bit = enabled ? NVME_CSTS_RDY : 0;
  959. int ret;
  960. while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
  961. if (csts == ~0)
  962. return -ENODEV;
  963. if ((csts & NVME_CSTS_RDY) == bit)
  964. break;
  965. msleep(100);
  966. if (fatal_signal_pending(current))
  967. return -EINTR;
  968. if (time_after(jiffies, timeout)) {
  969. dev_err(ctrl->device,
  970. "Device not ready; aborting %s\n", enabled ?
  971. "initialisation" : "reset");
  972. return -ENODEV;
  973. }
  974. }
  975. return ret;
  976. }
  977. /*
  978. * If the device has been passed off to us in an enabled state, just clear
  979. * the enabled bit. The spec says we should set the 'shutdown notification
  980. * bits', but doing so may cause the device to complete commands to the
  981. * admin queue ... and we don't know what memory that might be pointing at!
  982. */
  983. int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
  984. {
  985. int ret;
  986. ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
  987. ctrl->ctrl_config &= ~NVME_CC_ENABLE;
  988. ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
  989. if (ret)
  990. return ret;
  991. if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
  992. msleep(NVME_QUIRK_DELAY_AMOUNT);
  993. return nvme_wait_ready(ctrl, cap, false);
  994. }
  995. EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
  996. int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
  997. {
  998. /*
  999. * Default to a 4K page size, with the intention to update this
  1000. * path in the future to accomodate architectures with differing
  1001. * kernel and IO page sizes.
  1002. */
  1003. unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12, page_shift = 12;
  1004. int ret;
  1005. if (page_shift < dev_page_min) {
  1006. dev_err(ctrl->device,
  1007. "Minimum device page size %u too large for host (%u)\n",
  1008. 1 << dev_page_min, 1 << page_shift);
  1009. return -ENODEV;
  1010. }
  1011. ctrl->page_size = 1 << page_shift;
  1012. ctrl->ctrl_config = NVME_CC_CSS_NVM;
  1013. ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
  1014. ctrl->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
  1015. ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
  1016. ctrl->ctrl_config |= NVME_CC_ENABLE;
  1017. ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
  1018. if (ret)
  1019. return ret;
  1020. return nvme_wait_ready(ctrl, cap, true);
  1021. }
  1022. EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
  1023. int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl)
  1024. {
  1025. unsigned long timeout = SHUTDOWN_TIMEOUT + jiffies;
  1026. u32 csts;
  1027. int ret;
  1028. ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
  1029. ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
  1030. ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
  1031. if (ret)
  1032. return ret;
  1033. while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
  1034. if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT)
  1035. break;
  1036. msleep(100);
  1037. if (fatal_signal_pending(current))
  1038. return -EINTR;
  1039. if (time_after(jiffies, timeout)) {
  1040. dev_err(ctrl->device,
  1041. "Device shutdown incomplete; abort shutdown\n");
  1042. return -ENODEV;
  1043. }
  1044. }
  1045. return ret;
  1046. }
  1047. EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl);
  1048. static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
  1049. struct request_queue *q)
  1050. {
  1051. bool vwc = false;
  1052. if (ctrl->max_hw_sectors) {
  1053. u32 max_segments =
  1054. (ctrl->max_hw_sectors / (ctrl->page_size >> 9)) + 1;
  1055. blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
  1056. blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
  1057. }
  1058. if (ctrl->quirks & NVME_QUIRK_STRIPE_SIZE)
  1059. blk_queue_chunk_sectors(q, ctrl->max_hw_sectors);
  1060. blk_queue_virt_boundary(q, ctrl->page_size - 1);
  1061. if (ctrl->vwc & NVME_CTRL_VWC_PRESENT)
  1062. vwc = true;
  1063. blk_queue_write_cache(q, vwc, vwc);
  1064. }
  1065. static void nvme_configure_apst(struct nvme_ctrl *ctrl)
  1066. {
  1067. /*
  1068. * APST (Autonomous Power State Transition) lets us program a
  1069. * table of power state transitions that the controller will
  1070. * perform automatically. We configure it with a simple
  1071. * heuristic: we are willing to spend at most 2% of the time
  1072. * transitioning between power states. Therefore, when running
  1073. * in any given state, we will enter the next lower-power
  1074. * non-operational state after waiting 100 * (enlat + exlat)
  1075. * microseconds, as long as that state's total latency is under
  1076. * the requested maximum latency.
  1077. *
  1078. * We will not autonomously enter any non-operational state for
  1079. * which the total latency exceeds ps_max_latency_us. Users
  1080. * can set ps_max_latency_us to zero to turn off APST.
  1081. */
  1082. unsigned apste;
  1083. struct nvme_feat_auto_pst *table;
  1084. int ret;
  1085. /*
  1086. * If APST isn't supported or if we haven't been initialized yet,
  1087. * then don't do anything.
  1088. */
  1089. if (!ctrl->apsta)
  1090. return;
  1091. if (ctrl->npss > 31) {
  1092. dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
  1093. return;
  1094. }
  1095. table = kzalloc(sizeof(*table), GFP_KERNEL);
  1096. if (!table)
  1097. return;
  1098. if (ctrl->ps_max_latency_us == 0) {
  1099. /* Turn off APST. */
  1100. apste = 0;
  1101. } else {
  1102. __le64 target = cpu_to_le64(0);
  1103. int state;
  1104. /*
  1105. * Walk through all states from lowest- to highest-power.
  1106. * According to the spec, lower-numbered states use more
  1107. * power. NPSS, despite the name, is the index of the
  1108. * lowest-power state, not the number of states.
  1109. */
  1110. for (state = (int)ctrl->npss; state >= 0; state--) {
  1111. u64 total_latency_us, transition_ms;
  1112. if (target)
  1113. table->entries[state] = target;
  1114. /*
  1115. * Is this state a useful non-operational state for
  1116. * higher-power states to autonomously transition to?
  1117. */
  1118. if (!(ctrl->psd[state].flags &
  1119. NVME_PS_FLAGS_NON_OP_STATE))
  1120. continue;
  1121. total_latency_us =
  1122. (u64)le32_to_cpu(ctrl->psd[state].entry_lat) +
  1123. + le32_to_cpu(ctrl->psd[state].exit_lat);
  1124. if (total_latency_us > ctrl->ps_max_latency_us)
  1125. continue;
  1126. /*
  1127. * This state is good. Use it as the APST idle
  1128. * target for higher power states.
  1129. */
  1130. transition_ms = total_latency_us + 19;
  1131. do_div(transition_ms, 20);
  1132. if (transition_ms > (1 << 24) - 1)
  1133. transition_ms = (1 << 24) - 1;
  1134. target = cpu_to_le64((state << 3) |
  1135. (transition_ms << 8));
  1136. }
  1137. apste = 1;
  1138. }
  1139. ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
  1140. table, sizeof(*table), NULL);
  1141. if (ret)
  1142. dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
  1143. kfree(table);
  1144. }
  1145. static void nvme_set_latency_tolerance(struct device *dev, s32 val)
  1146. {
  1147. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1148. u64 latency;
  1149. switch (val) {
  1150. case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
  1151. case PM_QOS_LATENCY_ANY:
  1152. latency = U64_MAX;
  1153. break;
  1154. default:
  1155. latency = val;
  1156. }
  1157. if (ctrl->ps_max_latency_us != latency) {
  1158. ctrl->ps_max_latency_us = latency;
  1159. nvme_configure_apst(ctrl);
  1160. }
  1161. }
  1162. struct nvme_core_quirk_entry {
  1163. /*
  1164. * NVMe model and firmware strings are padded with spaces. For
  1165. * simplicity, strings in the quirk table are padded with NULLs
  1166. * instead.
  1167. */
  1168. u16 vid;
  1169. const char *mn;
  1170. const char *fr;
  1171. unsigned long quirks;
  1172. };
  1173. static const struct nvme_core_quirk_entry core_quirks[] = {
  1174. /*
  1175. * Seen on a Samsung "SM951 NVMe SAMSUNG 256GB": using APST causes
  1176. * the controller to go out to lunch. It dies when the watchdog
  1177. * timer reads CSTS and gets 0xffffffff.
  1178. */
  1179. {
  1180. .vid = 0x144d,
  1181. .fr = "BXW75D0Q",
  1182. .quirks = NVME_QUIRK_NO_APST,
  1183. },
  1184. };
  1185. /* match is null-terminated but idstr is space-padded. */
  1186. static bool string_matches(const char *idstr, const char *match, size_t len)
  1187. {
  1188. size_t matchlen;
  1189. if (!match)
  1190. return true;
  1191. matchlen = strlen(match);
  1192. WARN_ON_ONCE(matchlen > len);
  1193. if (memcmp(idstr, match, matchlen))
  1194. return false;
  1195. for (; matchlen < len; matchlen++)
  1196. if (idstr[matchlen] != ' ')
  1197. return false;
  1198. return true;
  1199. }
  1200. static bool quirk_matches(const struct nvme_id_ctrl *id,
  1201. const struct nvme_core_quirk_entry *q)
  1202. {
  1203. return q->vid == le16_to_cpu(id->vid) &&
  1204. string_matches(id->mn, q->mn, sizeof(id->mn)) &&
  1205. string_matches(id->fr, q->fr, sizeof(id->fr));
  1206. }
  1207. /*
  1208. * Initialize the cached copies of the Identify data and various controller
  1209. * register in our nvme_ctrl structure. This should be called as soon as
  1210. * the admin queue is fully up and running.
  1211. */
  1212. int nvme_init_identify(struct nvme_ctrl *ctrl)
  1213. {
  1214. struct nvme_id_ctrl *id;
  1215. u64 cap;
  1216. int ret, page_shift;
  1217. u32 max_hw_sectors;
  1218. u8 prev_apsta;
  1219. ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
  1220. if (ret) {
  1221. dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
  1222. return ret;
  1223. }
  1224. ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &cap);
  1225. if (ret) {
  1226. dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
  1227. return ret;
  1228. }
  1229. page_shift = NVME_CAP_MPSMIN(cap) + 12;
  1230. if (ctrl->vs >= NVME_VS(1, 1, 0))
  1231. ctrl->subsystem = NVME_CAP_NSSRC(cap);
  1232. ret = nvme_identify_ctrl(ctrl, &id);
  1233. if (ret) {
  1234. dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
  1235. return -EIO;
  1236. }
  1237. if (!ctrl->identified) {
  1238. /*
  1239. * Check for quirks. Quirk can depend on firmware version,
  1240. * so, in principle, the set of quirks present can change
  1241. * across a reset. As a possible future enhancement, we
  1242. * could re-scan for quirks every time we reinitialize
  1243. * the device, but we'd have to make sure that the driver
  1244. * behaves intelligently if the quirks change.
  1245. */
  1246. int i;
  1247. for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
  1248. if (quirk_matches(id, &core_quirks[i]))
  1249. ctrl->quirks |= core_quirks[i].quirks;
  1250. }
  1251. }
  1252. ctrl->oacs = le16_to_cpu(id->oacs);
  1253. ctrl->vid = le16_to_cpu(id->vid);
  1254. ctrl->oncs = le16_to_cpup(&id->oncs);
  1255. atomic_set(&ctrl->abort_limit, id->acl + 1);
  1256. ctrl->vwc = id->vwc;
  1257. ctrl->cntlid = le16_to_cpup(&id->cntlid);
  1258. memcpy(ctrl->serial, id->sn, sizeof(id->sn));
  1259. memcpy(ctrl->model, id->mn, sizeof(id->mn));
  1260. memcpy(ctrl->firmware_rev, id->fr, sizeof(id->fr));
  1261. if (id->mdts)
  1262. max_hw_sectors = 1 << (id->mdts + page_shift - 9);
  1263. else
  1264. max_hw_sectors = UINT_MAX;
  1265. ctrl->max_hw_sectors =
  1266. min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
  1267. nvme_set_queue_limits(ctrl, ctrl->admin_q);
  1268. ctrl->sgls = le32_to_cpu(id->sgls);
  1269. ctrl->kas = le16_to_cpu(id->kas);
  1270. ctrl->npss = id->npss;
  1271. prev_apsta = ctrl->apsta;
  1272. ctrl->apsta = (ctrl->quirks & NVME_QUIRK_NO_APST) ? 0 : id->apsta;
  1273. memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
  1274. if (ctrl->ops->is_fabrics) {
  1275. ctrl->icdoff = le16_to_cpu(id->icdoff);
  1276. ctrl->ioccsz = le32_to_cpu(id->ioccsz);
  1277. ctrl->iorcsz = le32_to_cpu(id->iorcsz);
  1278. ctrl->maxcmd = le16_to_cpu(id->maxcmd);
  1279. /*
  1280. * In fabrics we need to verify the cntlid matches the
  1281. * admin connect
  1282. */
  1283. if (ctrl->cntlid != le16_to_cpu(id->cntlid))
  1284. ret = -EINVAL;
  1285. if (!ctrl->opts->discovery_nqn && !ctrl->kas) {
  1286. dev_err(ctrl->dev,
  1287. "keep-alive support is mandatory for fabrics\n");
  1288. ret = -EINVAL;
  1289. }
  1290. } else {
  1291. ctrl->cntlid = le16_to_cpu(id->cntlid);
  1292. }
  1293. kfree(id);
  1294. if (ctrl->apsta && !prev_apsta)
  1295. dev_pm_qos_expose_latency_tolerance(ctrl->device);
  1296. else if (!ctrl->apsta && prev_apsta)
  1297. dev_pm_qos_hide_latency_tolerance(ctrl->device);
  1298. nvme_configure_apst(ctrl);
  1299. ctrl->identified = true;
  1300. return ret;
  1301. }
  1302. EXPORT_SYMBOL_GPL(nvme_init_identify);
  1303. static int nvme_dev_open(struct inode *inode, struct file *file)
  1304. {
  1305. struct nvme_ctrl *ctrl;
  1306. int instance = iminor(inode);
  1307. int ret = -ENODEV;
  1308. spin_lock(&dev_list_lock);
  1309. list_for_each_entry(ctrl, &nvme_ctrl_list, node) {
  1310. if (ctrl->instance != instance)
  1311. continue;
  1312. if (!ctrl->admin_q) {
  1313. ret = -EWOULDBLOCK;
  1314. break;
  1315. }
  1316. if (!kref_get_unless_zero(&ctrl->kref))
  1317. break;
  1318. file->private_data = ctrl;
  1319. ret = 0;
  1320. break;
  1321. }
  1322. spin_unlock(&dev_list_lock);
  1323. return ret;
  1324. }
  1325. static int nvme_dev_release(struct inode *inode, struct file *file)
  1326. {
  1327. nvme_put_ctrl(file->private_data);
  1328. return 0;
  1329. }
  1330. static int nvme_dev_user_cmd(struct nvme_ctrl *ctrl, void __user *argp)
  1331. {
  1332. struct nvme_ns *ns;
  1333. int ret;
  1334. mutex_lock(&ctrl->namespaces_mutex);
  1335. if (list_empty(&ctrl->namespaces)) {
  1336. ret = -ENOTTY;
  1337. goto out_unlock;
  1338. }
  1339. ns = list_first_entry(&ctrl->namespaces, struct nvme_ns, list);
  1340. if (ns != list_last_entry(&ctrl->namespaces, struct nvme_ns, list)) {
  1341. dev_warn(ctrl->device,
  1342. "NVME_IOCTL_IO_CMD not supported when multiple namespaces present!\n");
  1343. ret = -EINVAL;
  1344. goto out_unlock;
  1345. }
  1346. dev_warn(ctrl->device,
  1347. "using deprecated NVME_IOCTL_IO_CMD ioctl on the char device!\n");
  1348. kref_get(&ns->kref);
  1349. mutex_unlock(&ctrl->namespaces_mutex);
  1350. ret = nvme_user_cmd(ctrl, ns, argp);
  1351. nvme_put_ns(ns);
  1352. return ret;
  1353. out_unlock:
  1354. mutex_unlock(&ctrl->namespaces_mutex);
  1355. return ret;
  1356. }
  1357. static long nvme_dev_ioctl(struct file *file, unsigned int cmd,
  1358. unsigned long arg)
  1359. {
  1360. struct nvme_ctrl *ctrl = file->private_data;
  1361. void __user *argp = (void __user *)arg;
  1362. switch (cmd) {
  1363. case NVME_IOCTL_ADMIN_CMD:
  1364. return nvme_user_cmd(ctrl, NULL, argp);
  1365. case NVME_IOCTL_IO_CMD:
  1366. return nvme_dev_user_cmd(ctrl, argp);
  1367. case NVME_IOCTL_RESET:
  1368. dev_warn(ctrl->device, "resetting controller\n");
  1369. return ctrl->ops->reset_ctrl(ctrl);
  1370. case NVME_IOCTL_SUBSYS_RESET:
  1371. return nvme_reset_subsystem(ctrl);
  1372. case NVME_IOCTL_RESCAN:
  1373. nvme_queue_scan(ctrl);
  1374. return 0;
  1375. default:
  1376. return -ENOTTY;
  1377. }
  1378. }
  1379. static const struct file_operations nvme_dev_fops = {
  1380. .owner = THIS_MODULE,
  1381. .open = nvme_dev_open,
  1382. .release = nvme_dev_release,
  1383. .unlocked_ioctl = nvme_dev_ioctl,
  1384. .compat_ioctl = nvme_dev_ioctl,
  1385. };
  1386. static ssize_t nvme_sysfs_reset(struct device *dev,
  1387. struct device_attribute *attr, const char *buf,
  1388. size_t count)
  1389. {
  1390. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1391. int ret;
  1392. ret = ctrl->ops->reset_ctrl(ctrl);
  1393. if (ret < 0)
  1394. return ret;
  1395. return count;
  1396. }
  1397. static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
  1398. static ssize_t nvme_sysfs_rescan(struct device *dev,
  1399. struct device_attribute *attr, const char *buf,
  1400. size_t count)
  1401. {
  1402. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1403. nvme_queue_scan(ctrl);
  1404. return count;
  1405. }
  1406. static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan);
  1407. static ssize_t wwid_show(struct device *dev, struct device_attribute *attr,
  1408. char *buf)
  1409. {
  1410. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1411. struct nvme_ctrl *ctrl = ns->ctrl;
  1412. int serial_len = sizeof(ctrl->serial);
  1413. int model_len = sizeof(ctrl->model);
  1414. if (memchr_inv(ns->uuid, 0, sizeof(ns->uuid)))
  1415. return sprintf(buf, "eui.%16phN\n", ns->uuid);
  1416. if (memchr_inv(ns->eui, 0, sizeof(ns->eui)))
  1417. return sprintf(buf, "eui.%8phN\n", ns->eui);
  1418. while (ctrl->serial[serial_len - 1] == ' ')
  1419. serial_len--;
  1420. while (ctrl->model[model_len - 1] == ' ')
  1421. model_len--;
  1422. return sprintf(buf, "nvme.%04x-%*phN-%*phN-%08x\n", ctrl->vid,
  1423. serial_len, ctrl->serial, model_len, ctrl->model, ns->ns_id);
  1424. }
  1425. static DEVICE_ATTR(wwid, S_IRUGO, wwid_show, NULL);
  1426. static ssize_t uuid_show(struct device *dev, struct device_attribute *attr,
  1427. char *buf)
  1428. {
  1429. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1430. return sprintf(buf, "%pU\n", ns->uuid);
  1431. }
  1432. static DEVICE_ATTR(uuid, S_IRUGO, uuid_show, NULL);
  1433. static ssize_t eui_show(struct device *dev, struct device_attribute *attr,
  1434. char *buf)
  1435. {
  1436. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1437. return sprintf(buf, "%8phd\n", ns->eui);
  1438. }
  1439. static DEVICE_ATTR(eui, S_IRUGO, eui_show, NULL);
  1440. static ssize_t nsid_show(struct device *dev, struct device_attribute *attr,
  1441. char *buf)
  1442. {
  1443. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1444. return sprintf(buf, "%d\n", ns->ns_id);
  1445. }
  1446. static DEVICE_ATTR(nsid, S_IRUGO, nsid_show, NULL);
  1447. static struct attribute *nvme_ns_attrs[] = {
  1448. &dev_attr_wwid.attr,
  1449. &dev_attr_uuid.attr,
  1450. &dev_attr_eui.attr,
  1451. &dev_attr_nsid.attr,
  1452. NULL,
  1453. };
  1454. static umode_t nvme_ns_attrs_are_visible(struct kobject *kobj,
  1455. struct attribute *a, int n)
  1456. {
  1457. struct device *dev = container_of(kobj, struct device, kobj);
  1458. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1459. if (a == &dev_attr_uuid.attr) {
  1460. if (!memchr_inv(ns->uuid, 0, sizeof(ns->uuid)))
  1461. return 0;
  1462. }
  1463. if (a == &dev_attr_eui.attr) {
  1464. if (!memchr_inv(ns->eui, 0, sizeof(ns->eui)))
  1465. return 0;
  1466. }
  1467. return a->mode;
  1468. }
  1469. static const struct attribute_group nvme_ns_attr_group = {
  1470. .attrs = nvme_ns_attrs,
  1471. .is_visible = nvme_ns_attrs_are_visible,
  1472. };
  1473. #define nvme_show_str_function(field) \
  1474. static ssize_t field##_show(struct device *dev, \
  1475. struct device_attribute *attr, char *buf) \
  1476. { \
  1477. struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
  1478. return sprintf(buf, "%.*s\n", (int)sizeof(ctrl->field), ctrl->field); \
  1479. } \
  1480. static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
  1481. #define nvme_show_int_function(field) \
  1482. static ssize_t field##_show(struct device *dev, \
  1483. struct device_attribute *attr, char *buf) \
  1484. { \
  1485. struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
  1486. return sprintf(buf, "%d\n", ctrl->field); \
  1487. } \
  1488. static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
  1489. nvme_show_str_function(model);
  1490. nvme_show_str_function(serial);
  1491. nvme_show_str_function(firmware_rev);
  1492. nvme_show_int_function(cntlid);
  1493. static ssize_t nvme_sysfs_delete(struct device *dev,
  1494. struct device_attribute *attr, const char *buf,
  1495. size_t count)
  1496. {
  1497. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1498. if (device_remove_file_self(dev, attr))
  1499. ctrl->ops->delete_ctrl(ctrl);
  1500. return count;
  1501. }
  1502. static DEVICE_ATTR(delete_controller, S_IWUSR, NULL, nvme_sysfs_delete);
  1503. static ssize_t nvme_sysfs_show_transport(struct device *dev,
  1504. struct device_attribute *attr,
  1505. char *buf)
  1506. {
  1507. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1508. return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->ops->name);
  1509. }
  1510. static DEVICE_ATTR(transport, S_IRUGO, nvme_sysfs_show_transport, NULL);
  1511. static ssize_t nvme_sysfs_show_state(struct device *dev,
  1512. struct device_attribute *attr,
  1513. char *buf)
  1514. {
  1515. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1516. static const char *const state_name[] = {
  1517. [NVME_CTRL_NEW] = "new",
  1518. [NVME_CTRL_LIVE] = "live",
  1519. [NVME_CTRL_RESETTING] = "resetting",
  1520. [NVME_CTRL_RECONNECTING]= "reconnecting",
  1521. [NVME_CTRL_DELETING] = "deleting",
  1522. [NVME_CTRL_DEAD] = "dead",
  1523. };
  1524. if ((unsigned)ctrl->state < ARRAY_SIZE(state_name) &&
  1525. state_name[ctrl->state])
  1526. return sprintf(buf, "%s\n", state_name[ctrl->state]);
  1527. return sprintf(buf, "unknown state\n");
  1528. }
  1529. static DEVICE_ATTR(state, S_IRUGO, nvme_sysfs_show_state, NULL);
  1530. static ssize_t nvme_sysfs_show_subsysnqn(struct device *dev,
  1531. struct device_attribute *attr,
  1532. char *buf)
  1533. {
  1534. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1535. return snprintf(buf, PAGE_SIZE, "%s\n",
  1536. ctrl->ops->get_subsysnqn(ctrl));
  1537. }
  1538. static DEVICE_ATTR(subsysnqn, S_IRUGO, nvme_sysfs_show_subsysnqn, NULL);
  1539. static ssize_t nvme_sysfs_show_address(struct device *dev,
  1540. struct device_attribute *attr,
  1541. char *buf)
  1542. {
  1543. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1544. return ctrl->ops->get_address(ctrl, buf, PAGE_SIZE);
  1545. }
  1546. static DEVICE_ATTR(address, S_IRUGO, nvme_sysfs_show_address, NULL);
  1547. static struct attribute *nvme_dev_attrs[] = {
  1548. &dev_attr_reset_controller.attr,
  1549. &dev_attr_rescan_controller.attr,
  1550. &dev_attr_model.attr,
  1551. &dev_attr_serial.attr,
  1552. &dev_attr_firmware_rev.attr,
  1553. &dev_attr_cntlid.attr,
  1554. &dev_attr_delete_controller.attr,
  1555. &dev_attr_transport.attr,
  1556. &dev_attr_subsysnqn.attr,
  1557. &dev_attr_address.attr,
  1558. &dev_attr_state.attr,
  1559. NULL
  1560. };
  1561. #define CHECK_ATTR(ctrl, a, name) \
  1562. if ((a) == &dev_attr_##name.attr && \
  1563. !(ctrl)->ops->get_##name) \
  1564. return 0
  1565. static umode_t nvme_dev_attrs_are_visible(struct kobject *kobj,
  1566. struct attribute *a, int n)
  1567. {
  1568. struct device *dev = container_of(kobj, struct device, kobj);
  1569. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1570. if (a == &dev_attr_delete_controller.attr) {
  1571. if (!ctrl->ops->delete_ctrl)
  1572. return 0;
  1573. }
  1574. CHECK_ATTR(ctrl, a, subsysnqn);
  1575. CHECK_ATTR(ctrl, a, address);
  1576. return a->mode;
  1577. }
  1578. static struct attribute_group nvme_dev_attrs_group = {
  1579. .attrs = nvme_dev_attrs,
  1580. .is_visible = nvme_dev_attrs_are_visible,
  1581. };
  1582. static const struct attribute_group *nvme_dev_attr_groups[] = {
  1583. &nvme_dev_attrs_group,
  1584. NULL,
  1585. };
  1586. static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
  1587. {
  1588. struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
  1589. struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
  1590. return nsa->ns_id - nsb->ns_id;
  1591. }
  1592. static struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
  1593. {
  1594. struct nvme_ns *ns, *ret = NULL;
  1595. mutex_lock(&ctrl->namespaces_mutex);
  1596. list_for_each_entry(ns, &ctrl->namespaces, list) {
  1597. if (ns->ns_id == nsid) {
  1598. kref_get(&ns->kref);
  1599. ret = ns;
  1600. break;
  1601. }
  1602. if (ns->ns_id > nsid)
  1603. break;
  1604. }
  1605. mutex_unlock(&ctrl->namespaces_mutex);
  1606. return ret;
  1607. }
  1608. static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid)
  1609. {
  1610. struct nvme_ns *ns;
  1611. struct gendisk *disk;
  1612. struct nvme_id_ns *id;
  1613. char disk_name[DISK_NAME_LEN];
  1614. int node = dev_to_node(ctrl->dev);
  1615. ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
  1616. if (!ns)
  1617. return;
  1618. ns->instance = ida_simple_get(&ctrl->ns_ida, 1, 0, GFP_KERNEL);
  1619. if (ns->instance < 0)
  1620. goto out_free_ns;
  1621. ns->queue = blk_mq_init_queue(ctrl->tagset);
  1622. if (IS_ERR(ns->queue))
  1623. goto out_release_instance;
  1624. queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
  1625. ns->queue->queuedata = ns;
  1626. ns->ctrl = ctrl;
  1627. kref_init(&ns->kref);
  1628. ns->ns_id = nsid;
  1629. ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
  1630. blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
  1631. nvme_set_queue_limits(ctrl, ns->queue);
  1632. sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->instance);
  1633. if (nvme_revalidate_ns(ns, &id))
  1634. goto out_free_queue;
  1635. if (nvme_nvm_ns_supported(ns, id) &&
  1636. nvme_nvm_register(ns, disk_name, node)) {
  1637. dev_warn(ctrl->dev, "%s: LightNVM init failure\n", __func__);
  1638. goto out_free_id;
  1639. }
  1640. disk = alloc_disk_node(0, node);
  1641. if (!disk)
  1642. goto out_free_id;
  1643. disk->fops = &nvme_fops;
  1644. disk->private_data = ns;
  1645. disk->queue = ns->queue;
  1646. disk->flags = GENHD_FL_EXT_DEVT;
  1647. memcpy(disk->disk_name, disk_name, DISK_NAME_LEN);
  1648. ns->disk = disk;
  1649. __nvme_revalidate_disk(disk, id);
  1650. mutex_lock(&ctrl->namespaces_mutex);
  1651. list_add_tail(&ns->list, &ctrl->namespaces);
  1652. mutex_unlock(&ctrl->namespaces_mutex);
  1653. kref_get(&ctrl->kref);
  1654. kfree(id);
  1655. device_add_disk(ctrl->device, ns->disk);
  1656. if (sysfs_create_group(&disk_to_dev(ns->disk)->kobj,
  1657. &nvme_ns_attr_group))
  1658. pr_warn("%s: failed to create sysfs group for identification\n",
  1659. ns->disk->disk_name);
  1660. if (ns->ndev && nvme_nvm_register_sysfs(ns))
  1661. pr_warn("%s: failed to register lightnvm sysfs group for identification\n",
  1662. ns->disk->disk_name);
  1663. return;
  1664. out_free_id:
  1665. kfree(id);
  1666. out_free_queue:
  1667. blk_cleanup_queue(ns->queue);
  1668. out_release_instance:
  1669. ida_simple_remove(&ctrl->ns_ida, ns->instance);
  1670. out_free_ns:
  1671. kfree(ns);
  1672. }
  1673. static void nvme_ns_remove(struct nvme_ns *ns)
  1674. {
  1675. if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
  1676. return;
  1677. if (ns->disk && ns->disk->flags & GENHD_FL_UP) {
  1678. if (blk_get_integrity(ns->disk))
  1679. blk_integrity_unregister(ns->disk);
  1680. sysfs_remove_group(&disk_to_dev(ns->disk)->kobj,
  1681. &nvme_ns_attr_group);
  1682. if (ns->ndev)
  1683. nvme_nvm_unregister_sysfs(ns);
  1684. del_gendisk(ns->disk);
  1685. blk_mq_abort_requeue_list(ns->queue);
  1686. blk_cleanup_queue(ns->queue);
  1687. }
  1688. mutex_lock(&ns->ctrl->namespaces_mutex);
  1689. list_del_init(&ns->list);
  1690. mutex_unlock(&ns->ctrl->namespaces_mutex);
  1691. nvme_put_ns(ns);
  1692. }
  1693. static void nvme_validate_ns(struct nvme_ctrl *ctrl, unsigned nsid)
  1694. {
  1695. struct nvme_ns *ns;
  1696. ns = nvme_find_get_ns(ctrl, nsid);
  1697. if (ns) {
  1698. if (ns->disk && revalidate_disk(ns->disk))
  1699. nvme_ns_remove(ns);
  1700. nvme_put_ns(ns);
  1701. } else
  1702. nvme_alloc_ns(ctrl, nsid);
  1703. }
  1704. static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
  1705. unsigned nsid)
  1706. {
  1707. struct nvme_ns *ns, *next;
  1708. list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
  1709. if (ns->ns_id > nsid)
  1710. nvme_ns_remove(ns);
  1711. }
  1712. }
  1713. static int nvme_scan_ns_list(struct nvme_ctrl *ctrl, unsigned nn)
  1714. {
  1715. struct nvme_ns *ns;
  1716. __le32 *ns_list;
  1717. unsigned i, j, nsid, prev = 0, num_lists = DIV_ROUND_UP(nn, 1024);
  1718. int ret = 0;
  1719. ns_list = kzalloc(0x1000, GFP_KERNEL);
  1720. if (!ns_list)
  1721. return -ENOMEM;
  1722. for (i = 0; i < num_lists; i++) {
  1723. ret = nvme_identify_ns_list(ctrl, prev, ns_list);
  1724. if (ret)
  1725. goto free;
  1726. for (j = 0; j < min(nn, 1024U); j++) {
  1727. nsid = le32_to_cpu(ns_list[j]);
  1728. if (!nsid)
  1729. goto out;
  1730. nvme_validate_ns(ctrl, nsid);
  1731. while (++prev < nsid) {
  1732. ns = nvme_find_get_ns(ctrl, prev);
  1733. if (ns) {
  1734. nvme_ns_remove(ns);
  1735. nvme_put_ns(ns);
  1736. }
  1737. }
  1738. }
  1739. nn -= j;
  1740. }
  1741. out:
  1742. nvme_remove_invalid_namespaces(ctrl, prev);
  1743. free:
  1744. kfree(ns_list);
  1745. return ret;
  1746. }
  1747. static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl, unsigned nn)
  1748. {
  1749. unsigned i;
  1750. for (i = 1; i <= nn; i++)
  1751. nvme_validate_ns(ctrl, i);
  1752. nvme_remove_invalid_namespaces(ctrl, nn);
  1753. }
  1754. static void nvme_scan_work(struct work_struct *work)
  1755. {
  1756. struct nvme_ctrl *ctrl =
  1757. container_of(work, struct nvme_ctrl, scan_work);
  1758. struct nvme_id_ctrl *id;
  1759. unsigned nn;
  1760. if (ctrl->state != NVME_CTRL_LIVE)
  1761. return;
  1762. if (nvme_identify_ctrl(ctrl, &id))
  1763. return;
  1764. nn = le32_to_cpu(id->nn);
  1765. if (ctrl->vs >= NVME_VS(1, 1, 0) &&
  1766. !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) {
  1767. if (!nvme_scan_ns_list(ctrl, nn))
  1768. goto done;
  1769. }
  1770. nvme_scan_ns_sequential(ctrl, nn);
  1771. done:
  1772. mutex_lock(&ctrl->namespaces_mutex);
  1773. list_sort(NULL, &ctrl->namespaces, ns_cmp);
  1774. mutex_unlock(&ctrl->namespaces_mutex);
  1775. kfree(id);
  1776. }
  1777. void nvme_queue_scan(struct nvme_ctrl *ctrl)
  1778. {
  1779. /*
  1780. * Do not queue new scan work when a controller is reset during
  1781. * removal.
  1782. */
  1783. if (ctrl->state == NVME_CTRL_LIVE)
  1784. schedule_work(&ctrl->scan_work);
  1785. }
  1786. EXPORT_SYMBOL_GPL(nvme_queue_scan);
  1787. /*
  1788. * This function iterates the namespace list unlocked to allow recovery from
  1789. * controller failure. It is up to the caller to ensure the namespace list is
  1790. * not modified by scan work while this function is executing.
  1791. */
  1792. void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
  1793. {
  1794. struct nvme_ns *ns, *next;
  1795. /*
  1796. * The dead states indicates the controller was not gracefully
  1797. * disconnected. In that case, we won't be able to flush any data while
  1798. * removing the namespaces' disks; fail all the queues now to avoid
  1799. * potentially having to clean up the failed sync later.
  1800. */
  1801. if (ctrl->state == NVME_CTRL_DEAD)
  1802. nvme_kill_queues(ctrl);
  1803. list_for_each_entry_safe(ns, next, &ctrl->namespaces, list)
  1804. nvme_ns_remove(ns);
  1805. }
  1806. EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
  1807. static void nvme_async_event_work(struct work_struct *work)
  1808. {
  1809. struct nvme_ctrl *ctrl =
  1810. container_of(work, struct nvme_ctrl, async_event_work);
  1811. spin_lock_irq(&ctrl->lock);
  1812. while (ctrl->event_limit > 0) {
  1813. int aer_idx = --ctrl->event_limit;
  1814. spin_unlock_irq(&ctrl->lock);
  1815. ctrl->ops->submit_async_event(ctrl, aer_idx);
  1816. spin_lock_irq(&ctrl->lock);
  1817. }
  1818. spin_unlock_irq(&ctrl->lock);
  1819. }
  1820. void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
  1821. union nvme_result *res)
  1822. {
  1823. u32 result = le32_to_cpu(res->u32);
  1824. bool done = true;
  1825. switch (le16_to_cpu(status) >> 1) {
  1826. case NVME_SC_SUCCESS:
  1827. done = false;
  1828. /*FALLTHRU*/
  1829. case NVME_SC_ABORT_REQ:
  1830. ++ctrl->event_limit;
  1831. schedule_work(&ctrl->async_event_work);
  1832. break;
  1833. default:
  1834. break;
  1835. }
  1836. if (done)
  1837. return;
  1838. switch (result & 0xff07) {
  1839. case NVME_AER_NOTICE_NS_CHANGED:
  1840. dev_info(ctrl->device, "rescanning\n");
  1841. nvme_queue_scan(ctrl);
  1842. break;
  1843. default:
  1844. dev_warn(ctrl->device, "async event result %08x\n", result);
  1845. }
  1846. }
  1847. EXPORT_SYMBOL_GPL(nvme_complete_async_event);
  1848. void nvme_queue_async_events(struct nvme_ctrl *ctrl)
  1849. {
  1850. ctrl->event_limit = NVME_NR_AERS;
  1851. schedule_work(&ctrl->async_event_work);
  1852. }
  1853. EXPORT_SYMBOL_GPL(nvme_queue_async_events);
  1854. static DEFINE_IDA(nvme_instance_ida);
  1855. static int nvme_set_instance(struct nvme_ctrl *ctrl)
  1856. {
  1857. int instance, error;
  1858. do {
  1859. if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
  1860. return -ENODEV;
  1861. spin_lock(&dev_list_lock);
  1862. error = ida_get_new(&nvme_instance_ida, &instance);
  1863. spin_unlock(&dev_list_lock);
  1864. } while (error == -EAGAIN);
  1865. if (error)
  1866. return -ENODEV;
  1867. ctrl->instance = instance;
  1868. return 0;
  1869. }
  1870. static void nvme_release_instance(struct nvme_ctrl *ctrl)
  1871. {
  1872. spin_lock(&dev_list_lock);
  1873. ida_remove(&nvme_instance_ida, ctrl->instance);
  1874. spin_unlock(&dev_list_lock);
  1875. }
  1876. void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
  1877. {
  1878. flush_work(&ctrl->async_event_work);
  1879. flush_work(&ctrl->scan_work);
  1880. nvme_remove_namespaces(ctrl);
  1881. device_destroy(nvme_class, MKDEV(nvme_char_major, ctrl->instance));
  1882. spin_lock(&dev_list_lock);
  1883. list_del(&ctrl->node);
  1884. spin_unlock(&dev_list_lock);
  1885. }
  1886. EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
  1887. static void nvme_free_ctrl(struct kref *kref)
  1888. {
  1889. struct nvme_ctrl *ctrl = container_of(kref, struct nvme_ctrl, kref);
  1890. put_device(ctrl->device);
  1891. nvme_release_instance(ctrl);
  1892. ida_destroy(&ctrl->ns_ida);
  1893. ctrl->ops->free_ctrl(ctrl);
  1894. }
  1895. void nvme_put_ctrl(struct nvme_ctrl *ctrl)
  1896. {
  1897. kref_put(&ctrl->kref, nvme_free_ctrl);
  1898. }
  1899. EXPORT_SYMBOL_GPL(nvme_put_ctrl);
  1900. /*
  1901. * Initialize a NVMe controller structures. This needs to be called during
  1902. * earliest initialization so that we have the initialized structured around
  1903. * during probing.
  1904. */
  1905. int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
  1906. const struct nvme_ctrl_ops *ops, unsigned long quirks)
  1907. {
  1908. int ret;
  1909. ctrl->state = NVME_CTRL_NEW;
  1910. spin_lock_init(&ctrl->lock);
  1911. INIT_LIST_HEAD(&ctrl->namespaces);
  1912. mutex_init(&ctrl->namespaces_mutex);
  1913. kref_init(&ctrl->kref);
  1914. ctrl->dev = dev;
  1915. ctrl->ops = ops;
  1916. ctrl->quirks = quirks;
  1917. INIT_WORK(&ctrl->scan_work, nvme_scan_work);
  1918. INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
  1919. ret = nvme_set_instance(ctrl);
  1920. if (ret)
  1921. goto out;
  1922. ctrl->device = device_create_with_groups(nvme_class, ctrl->dev,
  1923. MKDEV(nvme_char_major, ctrl->instance),
  1924. ctrl, nvme_dev_attr_groups,
  1925. "nvme%d", ctrl->instance);
  1926. if (IS_ERR(ctrl->device)) {
  1927. ret = PTR_ERR(ctrl->device);
  1928. goto out_release_instance;
  1929. }
  1930. get_device(ctrl->device);
  1931. ida_init(&ctrl->ns_ida);
  1932. spin_lock(&dev_list_lock);
  1933. list_add_tail(&ctrl->node, &nvme_ctrl_list);
  1934. spin_unlock(&dev_list_lock);
  1935. /*
  1936. * Initialize latency tolerance controls. The sysfs files won't
  1937. * be visible to userspace unless the device actually supports APST.
  1938. */
  1939. ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
  1940. dev_pm_qos_update_user_latency_tolerance(ctrl->device,
  1941. min(default_ps_max_latency_us, (unsigned long)S32_MAX));
  1942. return 0;
  1943. out_release_instance:
  1944. nvme_release_instance(ctrl);
  1945. out:
  1946. return ret;
  1947. }
  1948. EXPORT_SYMBOL_GPL(nvme_init_ctrl);
  1949. /**
  1950. * nvme_kill_queues(): Ends all namespace queues
  1951. * @ctrl: the dead controller that needs to end
  1952. *
  1953. * Call this function when the driver determines it is unable to get the
  1954. * controller in a state capable of servicing IO.
  1955. */
  1956. void nvme_kill_queues(struct nvme_ctrl *ctrl)
  1957. {
  1958. struct nvme_ns *ns;
  1959. mutex_lock(&ctrl->namespaces_mutex);
  1960. list_for_each_entry(ns, &ctrl->namespaces, list) {
  1961. /*
  1962. * Revalidating a dead namespace sets capacity to 0. This will
  1963. * end buffered writers dirtying pages that can't be synced.
  1964. */
  1965. if (!ns->disk || test_and_set_bit(NVME_NS_DEAD, &ns->flags))
  1966. continue;
  1967. revalidate_disk(ns->disk);
  1968. blk_set_queue_dying(ns->queue);
  1969. blk_mq_abort_requeue_list(ns->queue);
  1970. blk_mq_start_stopped_hw_queues(ns->queue, true);
  1971. }
  1972. mutex_unlock(&ctrl->namespaces_mutex);
  1973. }
  1974. EXPORT_SYMBOL_GPL(nvme_kill_queues);
  1975. void nvme_unfreeze(struct nvme_ctrl *ctrl)
  1976. {
  1977. struct nvme_ns *ns;
  1978. mutex_lock(&ctrl->namespaces_mutex);
  1979. list_for_each_entry(ns, &ctrl->namespaces, list)
  1980. blk_mq_unfreeze_queue(ns->queue);
  1981. mutex_unlock(&ctrl->namespaces_mutex);
  1982. }
  1983. EXPORT_SYMBOL_GPL(nvme_unfreeze);
  1984. void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
  1985. {
  1986. struct nvme_ns *ns;
  1987. mutex_lock(&ctrl->namespaces_mutex);
  1988. list_for_each_entry(ns, &ctrl->namespaces, list) {
  1989. timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
  1990. if (timeout <= 0)
  1991. break;
  1992. }
  1993. mutex_unlock(&ctrl->namespaces_mutex);
  1994. }
  1995. EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
  1996. void nvme_wait_freeze(struct nvme_ctrl *ctrl)
  1997. {
  1998. struct nvme_ns *ns;
  1999. mutex_lock(&ctrl->namespaces_mutex);
  2000. list_for_each_entry(ns, &ctrl->namespaces, list)
  2001. blk_mq_freeze_queue_wait(ns->queue);
  2002. mutex_unlock(&ctrl->namespaces_mutex);
  2003. }
  2004. EXPORT_SYMBOL_GPL(nvme_wait_freeze);
  2005. void nvme_start_freeze(struct nvme_ctrl *ctrl)
  2006. {
  2007. struct nvme_ns *ns;
  2008. mutex_lock(&ctrl->namespaces_mutex);
  2009. list_for_each_entry(ns, &ctrl->namespaces, list)
  2010. blk_mq_freeze_queue_start(ns->queue);
  2011. mutex_unlock(&ctrl->namespaces_mutex);
  2012. }
  2013. EXPORT_SYMBOL_GPL(nvme_start_freeze);
  2014. void nvme_stop_queues(struct nvme_ctrl *ctrl)
  2015. {
  2016. struct nvme_ns *ns;
  2017. mutex_lock(&ctrl->namespaces_mutex);
  2018. list_for_each_entry(ns, &ctrl->namespaces, list)
  2019. blk_mq_quiesce_queue(ns->queue);
  2020. mutex_unlock(&ctrl->namespaces_mutex);
  2021. }
  2022. EXPORT_SYMBOL_GPL(nvme_stop_queues);
  2023. void nvme_start_queues(struct nvme_ctrl *ctrl)
  2024. {
  2025. struct nvme_ns *ns;
  2026. mutex_lock(&ctrl->namespaces_mutex);
  2027. list_for_each_entry(ns, &ctrl->namespaces, list) {
  2028. blk_mq_start_stopped_hw_queues(ns->queue, true);
  2029. blk_mq_kick_requeue_list(ns->queue);
  2030. }
  2031. mutex_unlock(&ctrl->namespaces_mutex);
  2032. }
  2033. EXPORT_SYMBOL_GPL(nvme_start_queues);
  2034. int __init nvme_core_init(void)
  2035. {
  2036. int result;
  2037. result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
  2038. &nvme_dev_fops);
  2039. if (result < 0)
  2040. return result;
  2041. else if (result > 0)
  2042. nvme_char_major = result;
  2043. nvme_class = class_create(THIS_MODULE, "nvme");
  2044. if (IS_ERR(nvme_class)) {
  2045. result = PTR_ERR(nvme_class);
  2046. goto unregister_chrdev;
  2047. }
  2048. return 0;
  2049. unregister_chrdev:
  2050. __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
  2051. return result;
  2052. }
  2053. void nvme_core_exit(void)
  2054. {
  2055. class_destroy(nvme_class);
  2056. __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
  2057. }
  2058. MODULE_LICENSE("GPL");
  2059. MODULE_VERSION("1.0");
  2060. module_init(nvme_core_init);
  2061. module_exit(nvme_core_exit);