dm.h 3.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119
  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2012 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called LICENSE.
  16. *
  17. * Contact Information:
  18. * wlanfae <wlanfae@realtek.com>
  19. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20. * Hsinchu 300, Taiwan.
  21. *
  22. * Larry Finger <Larry.Finger@lwfinger.net>
  23. *
  24. *****************************************************************************/
  25. #ifndef __RTL92C_DM_H__
  26. #define __RTL92C_DM_H__
  27. #define HAL_DM_DIG_DISABLE BIT(0)
  28. #define HAL_DM_HIPWR_DISABLE BIT(1)
  29. #define OFDM_TABLE_LENGTH 37
  30. #define OFDM_TABLE_SIZE_92D 43
  31. #define CCK_TABLE_LENGTH 33
  32. #define CCK_TABLE_SIZE 33
  33. #define BW_AUTO_SWITCH_HIGH_LOW 25
  34. #define BW_AUTO_SWITCH_LOW_HIGH 30
  35. #define DM_DIG_FA_UPPER 0x32
  36. #define DM_DIG_FA_LOWER 0x20
  37. #define DM_DIG_FA_TH0 0x100
  38. #define DM_DIG_FA_TH1 0x400
  39. #define DM_DIG_FA_TH2 0x600
  40. #define RXPATHSELECTION_SS_TH_lOW 30
  41. #define RXPATHSELECTION_DIFF_TH 18
  42. #define DM_RATR_STA_INIT 0
  43. #define DM_RATR_STA_HIGH 1
  44. #define DM_RATR_STA_MIDDLE 2
  45. #define DM_RATR_STA_LOW 3
  46. #define CTS2SELF_THVAL 30
  47. #define REGC38_TH 20
  48. #define WAIOTTHVAL 25
  49. #define TXHIGHPWRLEVEL_NORMAL 0
  50. #define TXHIGHPWRLEVEL_LEVEL1 1
  51. #define TXHIGHPWRLEVEL_LEVEL2 2
  52. #define TXHIGHPWRLEVEL_BT1 3
  53. #define TXHIGHPWRLEVEL_BT2 4
  54. #define DM_TYPE_BYFW 0
  55. #define DM_TYPE_BYDRIVER 1
  56. #define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
  57. #define TX_POWER_NEAR_FIELD_THRESH_LVL1 67
  58. #define INDEX_MAPPING_NUM 13
  59. struct swat {
  60. u8 failure_cnt;
  61. u8 try_flag;
  62. u8 stop_trying;
  63. long pre_rssi;
  64. long trying_threshold;
  65. u8 cur_antenna;
  66. u8 pre_antenna;
  67. };
  68. enum tag_dynamic_init_gain_operation_type_definition {
  69. DIG_TYPE_THRESH_HIGH = 0,
  70. DIG_TYPE_THRESH_LOW = 1,
  71. DIG_TYPE_BACKOFF = 2,
  72. DIG_TYPE_RX_GAIN_MIN = 3,
  73. DIG_TYPE_RX_GAIN_MAX = 4,
  74. DIG_TYPE_ENABLE = 5,
  75. DIG_TYPE_DISABLE = 6,
  76. DIG_OP_TYPE_MAX
  77. };
  78. enum dm_1r_cca {
  79. CCA_1R = 0,
  80. CCA_2R = 1,
  81. CCA_MAX = 2,
  82. };
  83. enum dm_rf {
  84. RF_SAVE = 0,
  85. RF_NORMAL = 1,
  86. RF_MAX = 2,
  87. };
  88. enum dm_sw_ant_switch {
  89. ANS_ANTENNA_B = 1,
  90. ANS_ANTENNA_A = 2,
  91. ANS_ANTENNA_MAX = 3,
  92. };
  93. void rtl92d_dm_init(struct ieee80211_hw *hw);
  94. void rtl92d_dm_watchdog(struct ieee80211_hw *hw);
  95. void rtl92d_dm_init_edca_turbo(struct ieee80211_hw *hw);
  96. void rtl92d_dm_write_dig(struct ieee80211_hw *hw);
  97. void rtl92d_dm_check_txpower_tracking_thermal_meter(struct ieee80211_hw *hw);
  98. void rtl92d_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw);
  99. #endif