fw.c 22 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2013 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called LICENSE.
  16. *
  17. * Contact Information:
  18. * wlanfae <wlanfae@realtek.com>
  19. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20. * Hsinchu 300, Taiwan.
  21. *
  22. * Larry Finger <Larry.Finger@lwfinger.net>
  23. *
  24. *****************************************************************************/
  25. #include "../wifi.h"
  26. #include "../pci.h"
  27. #include "../base.h"
  28. #include "../core.h"
  29. #include "../efuse.h"
  30. #include "reg.h"
  31. #include "def.h"
  32. #include "fw.h"
  33. static void _rtl88e_enable_fw_download(struct ieee80211_hw *hw, bool enable)
  34. {
  35. struct rtl_priv *rtlpriv = rtl_priv(hw);
  36. u8 tmp;
  37. if (enable) {
  38. tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
  39. rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, tmp | 0x04);
  40. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL);
  41. rtl_write_byte(rtlpriv, REG_MCUFWDL, tmp | 0x01);
  42. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL + 2);
  43. rtl_write_byte(rtlpriv, REG_MCUFWDL + 2, tmp & 0xf7);
  44. } else {
  45. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL);
  46. rtl_write_byte(rtlpriv, REG_MCUFWDL, tmp & 0xfe);
  47. rtl_write_byte(rtlpriv, REG_MCUFWDL + 1, 0x00);
  48. }
  49. }
  50. static void _rtl88e_write_fw(struct ieee80211_hw *hw,
  51. enum version_8188e version, u8 *buffer, u32 size)
  52. {
  53. struct rtl_priv *rtlpriv = rtl_priv(hw);
  54. u8 *bufferptr = (u8 *)buffer;
  55. u32 pagenums, remainsize;
  56. u32 page, offset;
  57. RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "FW size is %d bytes,\n", size);
  58. rtl_fill_dummy(bufferptr, &size);
  59. pagenums = size / FW_8192C_PAGE_SIZE;
  60. remainsize = size % FW_8192C_PAGE_SIZE;
  61. if (pagenums > 8)
  62. pr_err("Page numbers should not greater then 8\n");
  63. for (page = 0; page < pagenums; page++) {
  64. offset = page * FW_8192C_PAGE_SIZE;
  65. rtl_fw_page_write(hw, page, (bufferptr + offset),
  66. FW_8192C_PAGE_SIZE);
  67. }
  68. if (remainsize) {
  69. offset = pagenums * FW_8192C_PAGE_SIZE;
  70. page = pagenums;
  71. rtl_fw_page_write(hw, page, (bufferptr + offset), remainsize);
  72. }
  73. }
  74. static int _rtl88e_fw_free_to_go(struct ieee80211_hw *hw)
  75. {
  76. struct rtl_priv *rtlpriv = rtl_priv(hw);
  77. int err = -EIO;
  78. u32 counter = 0;
  79. u32 value32;
  80. do {
  81. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  82. } while ((counter++ < FW_8192C_POLLING_TIMEOUT_COUNT) &&
  83. (!(value32 & FWDL_CHKSUM_RPT)));
  84. if (counter >= FW_8192C_POLLING_TIMEOUT_COUNT) {
  85. pr_err("chksum report fail! REG_MCUFWDL:0x%08x .\n",
  86. value32);
  87. goto exit;
  88. }
  89. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  90. value32 |= MCUFWDL_RDY;
  91. value32 &= ~WINTINI_RDY;
  92. rtl_write_dword(rtlpriv, REG_MCUFWDL, value32);
  93. rtl88e_firmware_selfreset(hw);
  94. counter = 0;
  95. do {
  96. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  97. if (value32 & WINTINI_RDY)
  98. return 0;
  99. udelay(FW_8192C_POLLING_DELAY);
  100. } while (counter++ < FW_8192C_POLLING_TIMEOUT_COUNT);
  101. pr_err("Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n",
  102. value32);
  103. exit:
  104. return err;
  105. }
  106. int rtl88e_download_fw(struct ieee80211_hw *hw,
  107. bool buse_wake_on_wlan_fw)
  108. {
  109. struct rtl_priv *rtlpriv = rtl_priv(hw);
  110. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  111. struct rtlwifi_firmware_header *pfwheader;
  112. u8 *pfwdata;
  113. u32 fwsize;
  114. int err;
  115. enum version_8188e version = rtlhal->version;
  116. if (!rtlhal->pfirmware)
  117. return 1;
  118. pfwheader = (struct rtlwifi_firmware_header *)rtlhal->pfirmware;
  119. pfwdata = rtlhal->pfirmware;
  120. fwsize = rtlhal->fwsize;
  121. RT_TRACE(rtlpriv, COMP_FW, DBG_DMESG,
  122. "normal Firmware SIZE %d\n", fwsize);
  123. if (IS_FW_HEADER_EXIST(pfwheader)) {
  124. RT_TRACE(rtlpriv, COMP_FW, DBG_DMESG,
  125. "Firmware Version(%d), Signature(%#x), Size(%d)\n",
  126. pfwheader->version, pfwheader->signature,
  127. (int)sizeof(struct rtlwifi_firmware_header));
  128. pfwdata = pfwdata + sizeof(struct rtlwifi_firmware_header);
  129. fwsize = fwsize - sizeof(struct rtlwifi_firmware_header);
  130. }
  131. if (rtl_read_byte(rtlpriv, REG_MCUFWDL) & BIT(7)) {
  132. rtl_write_byte(rtlpriv, REG_MCUFWDL, 0);
  133. rtl88e_firmware_selfreset(hw);
  134. }
  135. _rtl88e_enable_fw_download(hw, true);
  136. _rtl88e_write_fw(hw, version, pfwdata, fwsize);
  137. _rtl88e_enable_fw_download(hw, false);
  138. err = _rtl88e_fw_free_to_go(hw);
  139. if (err)
  140. pr_err("Firmware is not ready to run!\n");
  141. return 0;
  142. }
  143. static bool _rtl88e_check_fw_read_last_h2c(struct ieee80211_hw *hw, u8 boxnum)
  144. {
  145. struct rtl_priv *rtlpriv = rtl_priv(hw);
  146. u8 val_hmetfr;
  147. val_hmetfr = rtl_read_byte(rtlpriv, REG_HMETFR);
  148. if (((val_hmetfr >> boxnum) & BIT(0)) == 0)
  149. return true;
  150. return false;
  151. }
  152. static void _rtl88e_fill_h2c_command(struct ieee80211_hw *hw,
  153. u8 element_id, u32 cmd_len,
  154. u8 *cmd_b)
  155. {
  156. struct rtl_priv *rtlpriv = rtl_priv(hw);
  157. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  158. u8 boxnum;
  159. u16 box_reg = 0, box_extreg = 0;
  160. u8 u1b_tmp;
  161. bool isfw_read = false;
  162. u8 buf_index = 0;
  163. bool write_sucess = false;
  164. u8 wait_h2c_limmit = 100;
  165. u8 wait_writeh2c_limit = 100;
  166. u8 boxcontent[4], boxextcontent[4];
  167. u32 h2c_waitcounter = 0;
  168. unsigned long flag;
  169. u8 idx;
  170. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, "come in\n");
  171. while (true) {
  172. spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
  173. if (rtlhal->h2c_setinprogress) {
  174. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  175. "H2C set in progress! Wait to set..element_id(%d).\n",
  176. element_id);
  177. while (rtlhal->h2c_setinprogress) {
  178. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock,
  179. flag);
  180. h2c_waitcounter++;
  181. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  182. "Wait 100 us (%d times)...\n",
  183. h2c_waitcounter);
  184. udelay(100);
  185. if (h2c_waitcounter > 1000)
  186. return;
  187. spin_lock_irqsave(&rtlpriv->locks.h2c_lock,
  188. flag);
  189. }
  190. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  191. } else {
  192. rtlhal->h2c_setinprogress = true;
  193. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  194. break;
  195. }
  196. }
  197. while (!write_sucess) {
  198. wait_writeh2c_limit--;
  199. if (wait_writeh2c_limit == 0) {
  200. pr_err("Write H2C fail because no trigger for FW INT!\n");
  201. break;
  202. }
  203. boxnum = rtlhal->last_hmeboxnum;
  204. switch (boxnum) {
  205. case 0:
  206. box_reg = REG_HMEBOX_0;
  207. box_extreg = REG_HMEBOX_EXT_0;
  208. break;
  209. case 1:
  210. box_reg = REG_HMEBOX_1;
  211. box_extreg = REG_HMEBOX_EXT_1;
  212. break;
  213. case 2:
  214. box_reg = REG_HMEBOX_2;
  215. box_extreg = REG_HMEBOX_EXT_2;
  216. break;
  217. case 3:
  218. box_reg = REG_HMEBOX_3;
  219. box_extreg = REG_HMEBOX_EXT_3;
  220. break;
  221. default:
  222. RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
  223. "switch case %#x not processed\n", boxnum);
  224. break;
  225. }
  226. isfw_read = _rtl88e_check_fw_read_last_h2c(hw, boxnum);
  227. while (!isfw_read) {
  228. wait_h2c_limmit--;
  229. if (wait_h2c_limmit == 0) {
  230. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  231. "Waiting too long for FW read clear HMEBox(%d)!\n",
  232. boxnum);
  233. break;
  234. }
  235. udelay(10);
  236. isfw_read = _rtl88e_check_fw_read_last_h2c(hw, boxnum);
  237. u1b_tmp = rtl_read_byte(rtlpriv, 0x130);
  238. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  239. "Waiting for FW read clear HMEBox(%d)!!! 0x130 = %2x\n",
  240. boxnum, u1b_tmp);
  241. }
  242. if (!isfw_read) {
  243. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  244. "Write H2C register BOX[%d] fail!!!!! Fw do not read.\n",
  245. boxnum);
  246. break;
  247. }
  248. memset(boxcontent, 0, sizeof(boxcontent));
  249. memset(boxextcontent, 0, sizeof(boxextcontent));
  250. boxcontent[0] = element_id;
  251. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  252. "Write element_id box_reg(%4x) = %2x\n",
  253. box_reg, element_id);
  254. switch (cmd_len) {
  255. case 1:
  256. case 2:
  257. case 3:
  258. /*boxcontent[0] &= ~(BIT(7));*/
  259. memcpy((u8 *)(boxcontent) + 1,
  260. cmd_b + buf_index, cmd_len);
  261. for (idx = 0; idx < 4; idx++) {
  262. rtl_write_byte(rtlpriv, box_reg + idx,
  263. boxcontent[idx]);
  264. }
  265. break;
  266. case 4:
  267. case 5:
  268. case 6:
  269. case 7:
  270. /*boxcontent[0] |= (BIT(7));*/
  271. memcpy((u8 *)(boxextcontent),
  272. cmd_b + buf_index+3, cmd_len-3);
  273. memcpy((u8 *)(boxcontent) + 1,
  274. cmd_b + buf_index, 3);
  275. for (idx = 0; idx < 2; idx++) {
  276. rtl_write_byte(rtlpriv, box_extreg + idx,
  277. boxextcontent[idx]);
  278. }
  279. for (idx = 0; idx < 4; idx++) {
  280. rtl_write_byte(rtlpriv, box_reg + idx,
  281. boxcontent[idx]);
  282. }
  283. break;
  284. default:
  285. RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
  286. "switch case %#x not processed\n", cmd_len);
  287. break;
  288. }
  289. write_sucess = true;
  290. rtlhal->last_hmeboxnum = boxnum + 1;
  291. if (rtlhal->last_hmeboxnum == 4)
  292. rtlhal->last_hmeboxnum = 0;
  293. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  294. "pHalData->last_hmeboxnum = %d\n",
  295. rtlhal->last_hmeboxnum);
  296. }
  297. spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
  298. rtlhal->h2c_setinprogress = false;
  299. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  300. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, "go out\n");
  301. }
  302. void rtl88e_fill_h2c_cmd(struct ieee80211_hw *hw,
  303. u8 element_id, u32 cmd_len, u8 *cmdbuffer)
  304. {
  305. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  306. u32 tmp_cmdbuf[2];
  307. if (!rtlhal->fw_ready) {
  308. WARN_ONCE(true,
  309. "rtl8188ee: error H2C cmd because of Fw download fail!!!\n");
  310. return;
  311. }
  312. memset(tmp_cmdbuf, 0, 8);
  313. memcpy(tmp_cmdbuf, cmdbuffer, cmd_len);
  314. _rtl88e_fill_h2c_command(hw, element_id, cmd_len, (u8 *)&tmp_cmdbuf);
  315. return;
  316. }
  317. void rtl88e_firmware_selfreset(struct ieee80211_hw *hw)
  318. {
  319. u8 u1b_tmp;
  320. struct rtl_priv *rtlpriv = rtl_priv(hw);
  321. u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN+1);
  322. rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN+1, (u1b_tmp & (~BIT(2))));
  323. rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN+1, (u1b_tmp | BIT(2)));
  324. RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
  325. "8051Reset88E(): 8051 reset success\n");
  326. }
  327. void rtl88e_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode)
  328. {
  329. struct rtl_priv *rtlpriv = rtl_priv(hw);
  330. u8 u1_h2c_set_pwrmode[H2C_88E_PWEMODE_LENGTH] = { 0 };
  331. struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  332. u8 rlbm, power_state = 0;
  333. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, "FW LPS mode = %d\n", mode);
  334. SET_H2CCMD_PWRMODE_PARM_MODE(u1_h2c_set_pwrmode, ((mode) ? 1 : 0));
  335. rlbm = 0;/*YJ, temp, 120316. FW now not support RLBM=2.*/
  336. SET_H2CCMD_PWRMODE_PARM_RLBM(u1_h2c_set_pwrmode, rlbm);
  337. SET_H2CCMD_PWRMODE_PARM_SMART_PS(u1_h2c_set_pwrmode,
  338. (rtlpriv->mac80211.p2p) ? ppsc->smart_ps : 1);
  339. SET_H2CCMD_PWRMODE_PARM_AWAKE_INTERVAL(u1_h2c_set_pwrmode,
  340. ppsc->reg_max_lps_awakeintvl);
  341. SET_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(u1_h2c_set_pwrmode, 0);
  342. if (mode == FW_PS_ACTIVE_MODE)
  343. power_state |= FW_PWR_STATE_ACTIVE;
  344. else
  345. power_state |= FW_PWR_STATE_RF_OFF;
  346. SET_H2CCMD_PWRMODE_PARM_PWR_STATE(u1_h2c_set_pwrmode, power_state);
  347. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  348. "rtl92c_set_fw_pwrmode(): u1_h2c_set_pwrmode\n",
  349. u1_h2c_set_pwrmode, H2C_88E_PWEMODE_LENGTH);
  350. rtl88e_fill_h2c_cmd(hw, H2C_88E_SETPWRMODE,
  351. H2C_88E_PWEMODE_LENGTH, u1_h2c_set_pwrmode);
  352. }
  353. void rtl88e_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus)
  354. {
  355. u8 u1_joinbssrpt_parm[1] = { 0 };
  356. SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(u1_joinbssrpt_parm, mstatus);
  357. rtl88e_fill_h2c_cmd(hw, H2C_88E_JOINBSSRPT, 1, u1_joinbssrpt_parm);
  358. }
  359. void rtl88e_set_fw_ap_off_load_cmd(struct ieee80211_hw *hw,
  360. u8 ap_offload_enable)
  361. {
  362. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  363. u8 u1_apoffload_parm[H2C_88E_AP_OFFLOAD_LENGTH] = { 0 };
  364. SET_H2CCMD_AP_OFFLOAD_ON(u1_apoffload_parm, ap_offload_enable);
  365. SET_H2CCMD_AP_OFFLOAD_HIDDEN(u1_apoffload_parm, mac->hiddenssid);
  366. SET_H2CCMD_AP_OFFLOAD_DENYANY(u1_apoffload_parm, 0);
  367. rtl88e_fill_h2c_cmd(hw, H2C_88E_AP_OFFLOAD,
  368. H2C_88E_AP_OFFLOAD_LENGTH, u1_apoffload_parm);
  369. }
  370. #define BEACON_PG 0 /* ->1 */
  371. #define PSPOLL_PG 2
  372. #define NULL_PG 3
  373. #define PROBERSP_PG 4 /* ->5 */
  374. #define TOTAL_RESERVED_PKT_LEN 768
  375. static u8 reserved_page_packet[TOTAL_RESERVED_PKT_LEN] = {
  376. /* page 0 beacon */
  377. 0x80, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
  378. 0xFF, 0xFF, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  379. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x50, 0x08,
  380. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  381. 0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
  382. 0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
  383. 0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
  384. 0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
  385. 0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
  386. 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
  387. 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  388. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  389. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  390. 0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
  391. 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  392. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  393. /* page 1 beacon */
  394. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  395. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  396. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  397. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  398. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  399. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  400. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  401. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  402. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  403. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  404. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  405. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  406. 0x10, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x10, 0x00,
  407. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  408. 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  409. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  410. /* page 2 ps-poll */
  411. 0xA4, 0x10, 0x01, 0xC0, 0x00, 0x40, 0x10, 0x10,
  412. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  413. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  414. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  415. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  416. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  417. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  418. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  419. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  420. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  421. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  422. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  423. 0x18, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x00, 0x00,
  424. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
  425. 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  426. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  427. /* page 3 null */
  428. 0x48, 0x01, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
  429. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  430. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
  431. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  432. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  433. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  434. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  435. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  436. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  437. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  438. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  439. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  440. 0x72, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x00, 0x00,
  441. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
  442. 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  443. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  444. /* page 4 probe_resp */
  445. 0x50, 0x00, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
  446. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  447. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
  448. 0x9E, 0x46, 0x15, 0x32, 0x27, 0xF2, 0x2D, 0x00,
  449. 0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
  450. 0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
  451. 0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
  452. 0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
  453. 0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
  454. 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
  455. 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  456. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  457. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  458. 0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
  459. 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  460. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  461. /* page 5 probe_resp */
  462. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  463. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  464. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  465. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  466. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  467. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  468. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  469. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  470. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  471. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  472. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  473. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  474. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  475. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  476. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  477. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  478. };
  479. void rtl88e_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished)
  480. {
  481. struct rtl_priv *rtlpriv = rtl_priv(hw);
  482. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  483. struct sk_buff *skb = NULL;
  484. u32 totalpacketlen;
  485. bool rtstatus;
  486. u8 u1rsvdpageloc[5] = { 0 };
  487. bool b_dlok = false;
  488. u8 *beacon;
  489. u8 *p_pspoll;
  490. u8 *nullfunc;
  491. u8 *p_probersp;
  492. /*---------------------------------------------------------
  493. * (1) beacon
  494. *---------------------------------------------------------
  495. */
  496. beacon = &reserved_page_packet[BEACON_PG * 128];
  497. SET_80211_HDR_ADDRESS2(beacon, mac->mac_addr);
  498. SET_80211_HDR_ADDRESS3(beacon, mac->bssid);
  499. /*-------------------------------------------------------
  500. * (2) ps-poll
  501. *--------------------------------------------------------
  502. */
  503. p_pspoll = &reserved_page_packet[PSPOLL_PG * 128];
  504. SET_80211_PS_POLL_AID(p_pspoll, (mac->assoc_id | 0xc000));
  505. SET_80211_PS_POLL_BSSID(p_pspoll, mac->bssid);
  506. SET_80211_PS_POLL_TA(p_pspoll, mac->mac_addr);
  507. SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1rsvdpageloc, PSPOLL_PG);
  508. /*--------------------------------------------------------
  509. * (3) null data
  510. *---------------------------------------------------------
  511. */
  512. nullfunc = &reserved_page_packet[NULL_PG * 128];
  513. SET_80211_HDR_ADDRESS1(nullfunc, mac->bssid);
  514. SET_80211_HDR_ADDRESS2(nullfunc, mac->mac_addr);
  515. SET_80211_HDR_ADDRESS3(nullfunc, mac->bssid);
  516. SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1rsvdpageloc, NULL_PG);
  517. /*---------------------------------------------------------
  518. * (4) probe response
  519. *----------------------------------------------------------
  520. */
  521. p_probersp = &reserved_page_packet[PROBERSP_PG * 128];
  522. SET_80211_HDR_ADDRESS1(p_probersp, mac->bssid);
  523. SET_80211_HDR_ADDRESS2(p_probersp, mac->mac_addr);
  524. SET_80211_HDR_ADDRESS3(p_probersp, mac->bssid);
  525. SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(u1rsvdpageloc, PROBERSP_PG);
  526. totalpacketlen = TOTAL_RESERVED_PKT_LEN;
  527. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
  528. "rtl88e_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
  529. &reserved_page_packet[0], totalpacketlen);
  530. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  531. "rtl88e_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
  532. u1rsvdpageloc, 3);
  533. skb = dev_alloc_skb(totalpacketlen);
  534. memcpy(skb_put(skb, totalpacketlen),
  535. &reserved_page_packet, totalpacketlen);
  536. rtstatus = rtl_cmd_send_packet(hw, skb);
  537. if (rtstatus)
  538. b_dlok = true;
  539. if (b_dlok) {
  540. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  541. "Set RSVD page location to Fw.\n");
  542. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  543. "H2C_RSVDPAGE:\n", u1rsvdpageloc, 3);
  544. rtl88e_fill_h2c_cmd(hw, H2C_88E_RSVDPAGE,
  545. sizeof(u1rsvdpageloc), u1rsvdpageloc);
  546. } else
  547. RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
  548. "Set RSVD page location to Fw FAIL!!!!!!.\n");
  549. }
  550. /*Should check FW support p2p or not.*/
  551. static void rtl88e_set_p2p_ctw_period_cmd(struct ieee80211_hw *hw, u8 ctwindow)
  552. {
  553. u8 u1_ctwindow_period[1] = { ctwindow};
  554. rtl88e_fill_h2c_cmd(hw, H2C_88E_P2P_PS_CTW_CMD, 1, u1_ctwindow_period);
  555. }
  556. void rtl88e_set_p2p_ps_offload_cmd(struct ieee80211_hw *hw, u8 p2p_ps_state)
  557. {
  558. struct rtl_priv *rtlpriv = rtl_priv(hw);
  559. struct rtl_ps_ctl *rtlps = rtl_psc(rtl_priv(hw));
  560. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  561. struct rtl_p2p_ps_info *p2pinfo = &(rtlps->p2p_ps_info);
  562. struct p2p_ps_offload_t *p2p_ps_offload = &rtlhal->p2p_ps_offload;
  563. u8 i;
  564. u16 ctwindow;
  565. u32 start_time, tsf_low;
  566. switch (p2p_ps_state) {
  567. case P2P_PS_DISABLE:
  568. RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "P2P_PS_DISABLE\n");
  569. memset(p2p_ps_offload, 0, sizeof(*p2p_ps_offload));
  570. break;
  571. case P2P_PS_ENABLE:
  572. RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "P2P_PS_ENABLE\n");
  573. /* update CTWindow value. */
  574. if (p2pinfo->ctwindow > 0) {
  575. p2p_ps_offload->ctwindow_en = 1;
  576. ctwindow = p2pinfo->ctwindow;
  577. rtl88e_set_p2p_ctw_period_cmd(hw, ctwindow);
  578. }
  579. /* hw only support 2 set of NoA */
  580. for (i = 0 ; i < p2pinfo->noa_num; i++) {
  581. /* To control the register setting for which NOA*/
  582. rtl_write_byte(rtlpriv, 0x5cf, (i << 4));
  583. if (i == 0)
  584. p2p_ps_offload->noa0_en = 1;
  585. else
  586. p2p_ps_offload->noa1_en = 1;
  587. /* config P2P NoA Descriptor Register */
  588. rtl_write_dword(rtlpriv, 0x5E0,
  589. p2pinfo->noa_duration[i]);
  590. rtl_write_dword(rtlpriv, 0x5E4,
  591. p2pinfo->noa_interval[i]);
  592. /*Get Current TSF value */
  593. tsf_low = rtl_read_dword(rtlpriv, REG_TSFTR);
  594. start_time = p2pinfo->noa_start_time[i];
  595. if (p2pinfo->noa_count_type[i] != 1) {
  596. while (start_time <= (tsf_low+(50*1024))) {
  597. start_time += p2pinfo->noa_interval[i];
  598. if (p2pinfo->noa_count_type[i] != 255)
  599. p2pinfo->noa_count_type[i]--;
  600. }
  601. }
  602. rtl_write_dword(rtlpriv, 0x5E8, start_time);
  603. rtl_write_dword(rtlpriv, 0x5EC,
  604. p2pinfo->noa_count_type[i]);
  605. }
  606. if ((p2pinfo->opp_ps == 1) || (p2pinfo->noa_num > 0)) {
  607. /* rst p2p circuit */
  608. rtl_write_byte(rtlpriv, REG_DUAL_TSF_RST, BIT(4));
  609. p2p_ps_offload->offload_en = 1;
  610. if (P2P_ROLE_GO == rtlpriv->mac80211.p2p) {
  611. p2p_ps_offload->role = 1;
  612. p2p_ps_offload->allstasleep = -1;
  613. } else {
  614. p2p_ps_offload->role = 0;
  615. }
  616. p2p_ps_offload->discovery = 0;
  617. }
  618. break;
  619. case P2P_PS_SCAN:
  620. RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "P2P_PS_SCAN\n");
  621. p2p_ps_offload->discovery = 1;
  622. break;
  623. case P2P_PS_SCAN_DONE:
  624. RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "P2P_PS_SCAN_DONE\n");
  625. p2p_ps_offload->discovery = 0;
  626. p2pinfo->p2p_ps_state = P2P_PS_ENABLE;
  627. break;
  628. default:
  629. break;
  630. }
  631. rtl88e_fill_h2c_cmd(hw, H2C_88E_P2P_PS_OFFLOAD, 1,
  632. (u8 *)p2p_ps_offload);
  633. }