rt2x00queue.c 33 KB

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  1. /*
  2. Copyright (C) 2010 Willow Garage <http://www.willowgarage.com>
  3. Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
  4. Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
  5. <http://rt2x00.serialmonkey.com>
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, see <http://www.gnu.org/licenses/>.
  16. */
  17. /*
  18. Module: rt2x00lib
  19. Abstract: rt2x00 queue specific routines.
  20. */
  21. #include <linux/slab.h>
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/dma-mapping.h>
  25. #include "rt2x00.h"
  26. #include "rt2x00lib.h"
  27. struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry, gfp_t gfp)
  28. {
  29. struct data_queue *queue = entry->queue;
  30. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  31. struct sk_buff *skb;
  32. struct skb_frame_desc *skbdesc;
  33. unsigned int frame_size;
  34. unsigned int head_size = 0;
  35. unsigned int tail_size = 0;
  36. /*
  37. * The frame size includes descriptor size, because the
  38. * hardware directly receive the frame into the skbuffer.
  39. */
  40. frame_size = queue->data_size + queue->desc_size + queue->winfo_size;
  41. /*
  42. * The payload should be aligned to a 4-byte boundary,
  43. * this means we need at least 3 bytes for moving the frame
  44. * into the correct offset.
  45. */
  46. head_size = 4;
  47. /*
  48. * For IV/EIV/ICV assembly we must make sure there is
  49. * at least 8 bytes bytes available in headroom for IV/EIV
  50. * and 8 bytes for ICV data as tailroon.
  51. */
  52. if (rt2x00_has_cap_hw_crypto(rt2x00dev)) {
  53. head_size += 8;
  54. tail_size += 8;
  55. }
  56. /*
  57. * Allocate skbuffer.
  58. */
  59. skb = __dev_alloc_skb(frame_size + head_size + tail_size, gfp);
  60. if (!skb)
  61. return NULL;
  62. /*
  63. * Make sure we not have a frame with the requested bytes
  64. * available in the head and tail.
  65. */
  66. skb_reserve(skb, head_size);
  67. skb_put(skb, frame_size);
  68. /*
  69. * Populate skbdesc.
  70. */
  71. skbdesc = get_skb_frame_desc(skb);
  72. memset(skbdesc, 0, sizeof(*skbdesc));
  73. if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_DMA)) {
  74. dma_addr_t skb_dma;
  75. skb_dma = dma_map_single(rt2x00dev->dev, skb->data, skb->len,
  76. DMA_FROM_DEVICE);
  77. if (unlikely(dma_mapping_error(rt2x00dev->dev, skb_dma))) {
  78. dev_kfree_skb_any(skb);
  79. return NULL;
  80. }
  81. skbdesc->skb_dma = skb_dma;
  82. skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
  83. }
  84. return skb;
  85. }
  86. int rt2x00queue_map_txskb(struct queue_entry *entry)
  87. {
  88. struct device *dev = entry->queue->rt2x00dev->dev;
  89. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  90. skbdesc->skb_dma =
  91. dma_map_single(dev, entry->skb->data, entry->skb->len, DMA_TO_DEVICE);
  92. if (unlikely(dma_mapping_error(dev, skbdesc->skb_dma)))
  93. return -ENOMEM;
  94. skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
  95. return 0;
  96. }
  97. EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
  98. void rt2x00queue_unmap_skb(struct queue_entry *entry)
  99. {
  100. struct device *dev = entry->queue->rt2x00dev->dev;
  101. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  102. if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
  103. dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
  104. DMA_FROM_DEVICE);
  105. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
  106. } else if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
  107. dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
  108. DMA_TO_DEVICE);
  109. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
  110. }
  111. }
  112. EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb);
  113. void rt2x00queue_free_skb(struct queue_entry *entry)
  114. {
  115. if (!entry->skb)
  116. return;
  117. rt2x00queue_unmap_skb(entry);
  118. dev_kfree_skb_any(entry->skb);
  119. entry->skb = NULL;
  120. }
  121. void rt2x00queue_align_frame(struct sk_buff *skb)
  122. {
  123. unsigned int frame_length = skb->len;
  124. unsigned int align = ALIGN_SIZE(skb, 0);
  125. if (!align)
  126. return;
  127. skb_push(skb, align);
  128. memmove(skb->data, skb->data + align, frame_length);
  129. skb_trim(skb, frame_length);
  130. }
  131. /*
  132. * H/W needs L2 padding between the header and the paylod if header size
  133. * is not 4 bytes aligned.
  134. */
  135. void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int hdr_len)
  136. {
  137. unsigned int l2pad = (skb->len > hdr_len) ? L2PAD_SIZE(hdr_len) : 0;
  138. if (!l2pad)
  139. return;
  140. skb_push(skb, l2pad);
  141. memmove(skb->data, skb->data + l2pad, hdr_len);
  142. }
  143. void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int hdr_len)
  144. {
  145. unsigned int l2pad = (skb->len > hdr_len) ? L2PAD_SIZE(hdr_len) : 0;
  146. if (!l2pad)
  147. return;
  148. memmove(skb->data + l2pad, skb->data, hdr_len);
  149. skb_pull(skb, l2pad);
  150. }
  151. static void rt2x00queue_create_tx_descriptor_seq(struct rt2x00_dev *rt2x00dev,
  152. struct sk_buff *skb,
  153. struct txentry_desc *txdesc)
  154. {
  155. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  156. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  157. struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
  158. u16 seqno;
  159. if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ))
  160. return;
  161. __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  162. if (!rt2x00_has_cap_flag(rt2x00dev, REQUIRE_SW_SEQNO)) {
  163. /*
  164. * rt2800 has a H/W (or F/W) bug, device incorrectly increase
  165. * seqno on retransmited data (non-QOS) frames. To workaround
  166. * the problem let's generate seqno in software if QOS is
  167. * disabled.
  168. */
  169. if (test_bit(CONFIG_QOS_DISABLED, &rt2x00dev->flags))
  170. __clear_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  171. else
  172. /* H/W will generate sequence number */
  173. return;
  174. }
  175. /*
  176. * The hardware is not able to insert a sequence number. Assign a
  177. * software generated one here.
  178. *
  179. * This is wrong because beacons are not getting sequence
  180. * numbers assigned properly.
  181. *
  182. * A secondary problem exists for drivers that cannot toggle
  183. * sequence counting per-frame, since those will override the
  184. * sequence counter given by mac80211.
  185. */
  186. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  187. seqno = atomic_add_return(0x10, &intf->seqno);
  188. else
  189. seqno = atomic_read(&intf->seqno);
  190. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  191. hdr->seq_ctrl |= cpu_to_le16(seqno);
  192. }
  193. static void rt2x00queue_create_tx_descriptor_plcp(struct rt2x00_dev *rt2x00dev,
  194. struct sk_buff *skb,
  195. struct txentry_desc *txdesc,
  196. const struct rt2x00_rate *hwrate)
  197. {
  198. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  199. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  200. unsigned int data_length;
  201. unsigned int duration;
  202. unsigned int residual;
  203. /*
  204. * Determine with what IFS priority this frame should be send.
  205. * Set ifs to IFS_SIFS when the this is not the first fragment,
  206. * or this fragment came after RTS/CTS.
  207. */
  208. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  209. txdesc->u.plcp.ifs = IFS_BACKOFF;
  210. else
  211. txdesc->u.plcp.ifs = IFS_SIFS;
  212. /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
  213. data_length = skb->len + 4;
  214. data_length += rt2x00crypto_tx_overhead(rt2x00dev, skb);
  215. /*
  216. * PLCP setup
  217. * Length calculation depends on OFDM/CCK rate.
  218. */
  219. txdesc->u.plcp.signal = hwrate->plcp;
  220. txdesc->u.plcp.service = 0x04;
  221. if (hwrate->flags & DEV_RATE_OFDM) {
  222. txdesc->u.plcp.length_high = (data_length >> 6) & 0x3f;
  223. txdesc->u.plcp.length_low = data_length & 0x3f;
  224. } else {
  225. /*
  226. * Convert length to microseconds.
  227. */
  228. residual = GET_DURATION_RES(data_length, hwrate->bitrate);
  229. duration = GET_DURATION(data_length, hwrate->bitrate);
  230. if (residual != 0) {
  231. duration++;
  232. /*
  233. * Check if we need to set the Length Extension
  234. */
  235. if (hwrate->bitrate == 110 && residual <= 30)
  236. txdesc->u.plcp.service |= 0x80;
  237. }
  238. txdesc->u.plcp.length_high = (duration >> 8) & 0xff;
  239. txdesc->u.plcp.length_low = duration & 0xff;
  240. /*
  241. * When preamble is enabled we should set the
  242. * preamble bit for the signal.
  243. */
  244. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  245. txdesc->u.plcp.signal |= 0x08;
  246. }
  247. }
  248. static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev,
  249. struct sk_buff *skb,
  250. struct txentry_desc *txdesc,
  251. struct ieee80211_sta *sta,
  252. const struct rt2x00_rate *hwrate)
  253. {
  254. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  255. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  256. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  257. struct rt2x00_sta *sta_priv = NULL;
  258. u8 density = 0;
  259. if (sta) {
  260. sta_priv = sta_to_rt2x00_sta(sta);
  261. txdesc->u.ht.wcid = sta_priv->wcid;
  262. density = sta->ht_cap.ampdu_density;
  263. }
  264. /*
  265. * If IEEE80211_TX_RC_MCS is set txrate->idx just contains the
  266. * mcs rate to be used
  267. */
  268. if (txrate->flags & IEEE80211_TX_RC_MCS) {
  269. txdesc->u.ht.mcs = txrate->idx;
  270. /*
  271. * MIMO PS should be set to 1 for STA's using dynamic SM PS
  272. * when using more then one tx stream (>MCS7).
  273. */
  274. if (sta && txdesc->u.ht.mcs > 7 &&
  275. sta->smps_mode == IEEE80211_SMPS_DYNAMIC)
  276. __set_bit(ENTRY_TXD_HT_MIMO_PS, &txdesc->flags);
  277. } else {
  278. txdesc->u.ht.mcs = rt2x00_get_rate_mcs(hwrate->mcs);
  279. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  280. txdesc->u.ht.mcs |= 0x08;
  281. }
  282. if (test_bit(CONFIG_HT_DISABLED, &rt2x00dev->flags)) {
  283. if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT))
  284. txdesc->u.ht.txop = TXOP_SIFS;
  285. else
  286. txdesc->u.ht.txop = TXOP_BACKOFF;
  287. /* Left zero on all other settings. */
  288. return;
  289. }
  290. /*
  291. * Only one STBC stream is supported for now.
  292. */
  293. if (tx_info->flags & IEEE80211_TX_CTL_STBC)
  294. txdesc->u.ht.stbc = 1;
  295. /*
  296. * This frame is eligible for an AMPDU, however, don't aggregate
  297. * frames that are intended to probe a specific tx rate.
  298. */
  299. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU &&
  300. !(tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)) {
  301. __set_bit(ENTRY_TXD_HT_AMPDU, &txdesc->flags);
  302. txdesc->u.ht.mpdu_density = density;
  303. txdesc->u.ht.ba_size = 7; /* FIXME: What value is needed? */
  304. }
  305. /*
  306. * Set 40Mhz mode if necessary (for legacy rates this will
  307. * duplicate the frame to both channels).
  308. */
  309. if (txrate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH ||
  310. txrate->flags & IEEE80211_TX_RC_DUP_DATA)
  311. __set_bit(ENTRY_TXD_HT_BW_40, &txdesc->flags);
  312. if (txrate->flags & IEEE80211_TX_RC_SHORT_GI)
  313. __set_bit(ENTRY_TXD_HT_SHORT_GI, &txdesc->flags);
  314. /*
  315. * Determine IFS values
  316. * - Use TXOP_BACKOFF for management frames except beacons
  317. * - Use TXOP_SIFS for fragment bursts
  318. * - Use TXOP_HTTXOP for everything else
  319. *
  320. * Note: rt2800 devices won't use CTS protection (if used)
  321. * for frames not transmitted with TXOP_HTTXOP
  322. */
  323. if (ieee80211_is_mgmt(hdr->frame_control) &&
  324. !ieee80211_is_beacon(hdr->frame_control))
  325. txdesc->u.ht.txop = TXOP_BACKOFF;
  326. else if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT))
  327. txdesc->u.ht.txop = TXOP_SIFS;
  328. else
  329. txdesc->u.ht.txop = TXOP_HTTXOP;
  330. }
  331. static void rt2x00queue_create_tx_descriptor(struct rt2x00_dev *rt2x00dev,
  332. struct sk_buff *skb,
  333. struct txentry_desc *txdesc,
  334. struct ieee80211_sta *sta)
  335. {
  336. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  337. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  338. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  339. struct ieee80211_rate *rate;
  340. const struct rt2x00_rate *hwrate = NULL;
  341. memset(txdesc, 0, sizeof(*txdesc));
  342. /*
  343. * Header and frame information.
  344. */
  345. txdesc->length = skb->len;
  346. txdesc->header_length = ieee80211_get_hdrlen_from_skb(skb);
  347. /*
  348. * Check whether this frame is to be acked.
  349. */
  350. if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
  351. __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
  352. /*
  353. * Check if this is a RTS/CTS frame
  354. */
  355. if (ieee80211_is_rts(hdr->frame_control) ||
  356. ieee80211_is_cts(hdr->frame_control)) {
  357. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  358. if (ieee80211_is_rts(hdr->frame_control))
  359. __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
  360. else
  361. __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
  362. if (tx_info->control.rts_cts_rate_idx >= 0)
  363. rate =
  364. ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
  365. }
  366. /*
  367. * Determine retry information.
  368. */
  369. txdesc->retry_limit = tx_info->control.rates[0].count - 1;
  370. if (txdesc->retry_limit >= rt2x00dev->long_retry)
  371. __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
  372. /*
  373. * Check if more fragments are pending
  374. */
  375. if (ieee80211_has_morefrags(hdr->frame_control)) {
  376. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  377. __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
  378. }
  379. /*
  380. * Check if more frames (!= fragments) are pending
  381. */
  382. if (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)
  383. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  384. /*
  385. * Beacons and probe responses require the tsf timestamp
  386. * to be inserted into the frame.
  387. */
  388. if (ieee80211_is_beacon(hdr->frame_control) ||
  389. ieee80211_is_probe_resp(hdr->frame_control))
  390. __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
  391. if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
  392. !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags))
  393. __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
  394. /*
  395. * Determine rate modulation.
  396. */
  397. if (txrate->flags & IEEE80211_TX_RC_GREEN_FIELD)
  398. txdesc->rate_mode = RATE_MODE_HT_GREENFIELD;
  399. else if (txrate->flags & IEEE80211_TX_RC_MCS)
  400. txdesc->rate_mode = RATE_MODE_HT_MIX;
  401. else {
  402. rate = ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
  403. hwrate = rt2x00_get_rate(rate->hw_value);
  404. if (hwrate->flags & DEV_RATE_OFDM)
  405. txdesc->rate_mode = RATE_MODE_OFDM;
  406. else
  407. txdesc->rate_mode = RATE_MODE_CCK;
  408. }
  409. /*
  410. * Apply TX descriptor handling by components
  411. */
  412. rt2x00crypto_create_tx_descriptor(rt2x00dev, skb, txdesc);
  413. rt2x00queue_create_tx_descriptor_seq(rt2x00dev, skb, txdesc);
  414. if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_HT_TX_DESC))
  415. rt2x00queue_create_tx_descriptor_ht(rt2x00dev, skb, txdesc,
  416. sta, hwrate);
  417. else
  418. rt2x00queue_create_tx_descriptor_plcp(rt2x00dev, skb, txdesc,
  419. hwrate);
  420. }
  421. static int rt2x00queue_write_tx_data(struct queue_entry *entry,
  422. struct txentry_desc *txdesc)
  423. {
  424. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  425. /*
  426. * This should not happen, we already checked the entry
  427. * was ours. When the hardware disagrees there has been
  428. * a queue corruption!
  429. */
  430. if (unlikely(rt2x00dev->ops->lib->get_entry_state &&
  431. rt2x00dev->ops->lib->get_entry_state(entry))) {
  432. rt2x00_err(rt2x00dev,
  433. "Corrupt queue %d, accessing entry which is not ours\n"
  434. "Please file bug report to %s\n",
  435. entry->queue->qid, DRV_PROJECT);
  436. return -EINVAL;
  437. }
  438. /*
  439. * Add the requested extra tx headroom in front of the skb.
  440. */
  441. skb_push(entry->skb, rt2x00dev->extra_tx_headroom);
  442. memset(entry->skb->data, 0, rt2x00dev->extra_tx_headroom);
  443. /*
  444. * Call the driver's write_tx_data function, if it exists.
  445. */
  446. if (rt2x00dev->ops->lib->write_tx_data)
  447. rt2x00dev->ops->lib->write_tx_data(entry, txdesc);
  448. /*
  449. * Map the skb to DMA.
  450. */
  451. if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_DMA) &&
  452. rt2x00queue_map_txskb(entry))
  453. return -ENOMEM;
  454. return 0;
  455. }
  456. static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
  457. struct txentry_desc *txdesc)
  458. {
  459. struct data_queue *queue = entry->queue;
  460. queue->rt2x00dev->ops->lib->write_tx_desc(entry, txdesc);
  461. /*
  462. * All processing on the frame has been completed, this means
  463. * it is now ready to be dumped to userspace through debugfs.
  464. */
  465. rt2x00debug_dump_frame(queue->rt2x00dev, DUMP_FRAME_TX, entry);
  466. }
  467. static void rt2x00queue_kick_tx_queue(struct data_queue *queue,
  468. struct txentry_desc *txdesc)
  469. {
  470. /*
  471. * Check if we need to kick the queue, there are however a few rules
  472. * 1) Don't kick unless this is the last in frame in a burst.
  473. * When the burst flag is set, this frame is always followed
  474. * by another frame which in some way are related to eachother.
  475. * This is true for fragments, RTS or CTS-to-self frames.
  476. * 2) Rule 1 can be broken when the available entries
  477. * in the queue are less then a certain threshold.
  478. */
  479. if (rt2x00queue_threshold(queue) ||
  480. !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
  481. queue->rt2x00dev->ops->lib->kick_queue(queue);
  482. }
  483. static void rt2x00queue_bar_check(struct queue_entry *entry)
  484. {
  485. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  486. struct ieee80211_bar *bar = (void *) (entry->skb->data +
  487. rt2x00dev->extra_tx_headroom);
  488. struct rt2x00_bar_list_entry *bar_entry;
  489. if (likely(!ieee80211_is_back_req(bar->frame_control)))
  490. return;
  491. bar_entry = kmalloc(sizeof(*bar_entry), GFP_ATOMIC);
  492. /*
  493. * If the alloc fails we still send the BAR out but just don't track
  494. * it in our bar list. And as a result we will report it to mac80211
  495. * back as failed.
  496. */
  497. if (!bar_entry)
  498. return;
  499. bar_entry->entry = entry;
  500. bar_entry->block_acked = 0;
  501. /*
  502. * Copy the relevant parts of the 802.11 BAR into out check list
  503. * such that we can use RCU for less-overhead in the RX path since
  504. * sending BARs and processing the according BlockAck should be
  505. * the exception.
  506. */
  507. memcpy(bar_entry->ra, bar->ra, sizeof(bar->ra));
  508. memcpy(bar_entry->ta, bar->ta, sizeof(bar->ta));
  509. bar_entry->control = bar->control;
  510. bar_entry->start_seq_num = bar->start_seq_num;
  511. /*
  512. * Insert BAR into our BAR check list.
  513. */
  514. spin_lock_bh(&rt2x00dev->bar_list_lock);
  515. list_add_tail_rcu(&bar_entry->list, &rt2x00dev->bar_list);
  516. spin_unlock_bh(&rt2x00dev->bar_list_lock);
  517. }
  518. int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
  519. struct ieee80211_sta *sta, bool local)
  520. {
  521. struct ieee80211_tx_info *tx_info;
  522. struct queue_entry *entry;
  523. struct txentry_desc txdesc;
  524. struct skb_frame_desc *skbdesc;
  525. u8 rate_idx, rate_flags;
  526. int ret = 0;
  527. /*
  528. * Copy all TX descriptor information into txdesc,
  529. * after that we are free to use the skb->cb array
  530. * for our information.
  531. */
  532. rt2x00queue_create_tx_descriptor(queue->rt2x00dev, skb, &txdesc, sta);
  533. /*
  534. * All information is retrieved from the skb->cb array,
  535. * now we should claim ownership of the driver part of that
  536. * array, preserving the bitrate index and flags.
  537. */
  538. tx_info = IEEE80211_SKB_CB(skb);
  539. rate_idx = tx_info->control.rates[0].idx;
  540. rate_flags = tx_info->control.rates[0].flags;
  541. skbdesc = get_skb_frame_desc(skb);
  542. memset(skbdesc, 0, sizeof(*skbdesc));
  543. skbdesc->tx_rate_idx = rate_idx;
  544. skbdesc->tx_rate_flags = rate_flags;
  545. if (local)
  546. skbdesc->flags |= SKBDESC_NOT_MAC80211;
  547. /*
  548. * When hardware encryption is supported, and this frame
  549. * is to be encrypted, we should strip the IV/EIV data from
  550. * the frame so we can provide it to the driver separately.
  551. */
  552. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
  553. !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
  554. if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_COPY_IV))
  555. rt2x00crypto_tx_copy_iv(skb, &txdesc);
  556. else
  557. rt2x00crypto_tx_remove_iv(skb, &txdesc);
  558. }
  559. /*
  560. * When DMA allocation is required we should guarantee to the
  561. * driver that the DMA is aligned to a 4-byte boundary.
  562. * However some drivers require L2 padding to pad the payload
  563. * rather then the header. This could be a requirement for
  564. * PCI and USB devices, while header alignment only is valid
  565. * for PCI devices.
  566. */
  567. if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_L2PAD))
  568. rt2x00queue_insert_l2pad(skb, txdesc.header_length);
  569. else if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_DMA))
  570. rt2x00queue_align_frame(skb);
  571. /*
  572. * That function must be called with bh disabled.
  573. */
  574. spin_lock(&queue->tx_lock);
  575. if (unlikely(rt2x00queue_full(queue))) {
  576. rt2x00_err(queue->rt2x00dev, "Dropping frame due to full tx queue %d\n",
  577. queue->qid);
  578. ret = -ENOBUFS;
  579. goto out;
  580. }
  581. entry = rt2x00queue_get_entry(queue, Q_INDEX);
  582. if (unlikely(test_and_set_bit(ENTRY_OWNER_DEVICE_DATA,
  583. &entry->flags))) {
  584. rt2x00_err(queue->rt2x00dev,
  585. "Arrived at non-free entry in the non-full queue %d\n"
  586. "Please file bug report to %s\n",
  587. queue->qid, DRV_PROJECT);
  588. ret = -EINVAL;
  589. goto out;
  590. }
  591. entry->skb = skb;
  592. /*
  593. * It could be possible that the queue was corrupted and this
  594. * call failed. Since we always return NETDEV_TX_OK to mac80211,
  595. * this frame will simply be dropped.
  596. */
  597. if (unlikely(rt2x00queue_write_tx_data(entry, &txdesc))) {
  598. clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
  599. entry->skb = NULL;
  600. ret = -EIO;
  601. goto out;
  602. }
  603. /*
  604. * Put BlockAckReqs into our check list for driver BA processing.
  605. */
  606. rt2x00queue_bar_check(entry);
  607. set_bit(ENTRY_DATA_PENDING, &entry->flags);
  608. rt2x00queue_index_inc(entry, Q_INDEX);
  609. rt2x00queue_write_tx_descriptor(entry, &txdesc);
  610. rt2x00queue_kick_tx_queue(queue, &txdesc);
  611. out:
  612. spin_unlock(&queue->tx_lock);
  613. return ret;
  614. }
  615. int rt2x00queue_clear_beacon(struct rt2x00_dev *rt2x00dev,
  616. struct ieee80211_vif *vif)
  617. {
  618. struct rt2x00_intf *intf = vif_to_intf(vif);
  619. if (unlikely(!intf->beacon))
  620. return -ENOBUFS;
  621. /*
  622. * Clean up the beacon skb.
  623. */
  624. rt2x00queue_free_skb(intf->beacon);
  625. /*
  626. * Clear beacon (single bssid devices don't need to clear the beacon
  627. * since the beacon queue will get stopped anyway).
  628. */
  629. if (rt2x00dev->ops->lib->clear_beacon)
  630. rt2x00dev->ops->lib->clear_beacon(intf->beacon);
  631. return 0;
  632. }
  633. int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
  634. struct ieee80211_vif *vif)
  635. {
  636. struct rt2x00_intf *intf = vif_to_intf(vif);
  637. struct skb_frame_desc *skbdesc;
  638. struct txentry_desc txdesc;
  639. if (unlikely(!intf->beacon))
  640. return -ENOBUFS;
  641. /*
  642. * Clean up the beacon skb.
  643. */
  644. rt2x00queue_free_skb(intf->beacon);
  645. intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
  646. if (!intf->beacon->skb)
  647. return -ENOMEM;
  648. /*
  649. * Copy all TX descriptor information into txdesc,
  650. * after that we are free to use the skb->cb array
  651. * for our information.
  652. */
  653. rt2x00queue_create_tx_descriptor(rt2x00dev, intf->beacon->skb, &txdesc, NULL);
  654. /*
  655. * Fill in skb descriptor
  656. */
  657. skbdesc = get_skb_frame_desc(intf->beacon->skb);
  658. memset(skbdesc, 0, sizeof(*skbdesc));
  659. /*
  660. * Send beacon to hardware.
  661. */
  662. rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc);
  663. return 0;
  664. }
  665. bool rt2x00queue_for_each_entry(struct data_queue *queue,
  666. enum queue_index start,
  667. enum queue_index end,
  668. void *data,
  669. bool (*fn)(struct queue_entry *entry,
  670. void *data))
  671. {
  672. unsigned long irqflags;
  673. unsigned int index_start;
  674. unsigned int index_end;
  675. unsigned int i;
  676. if (unlikely(start >= Q_INDEX_MAX || end >= Q_INDEX_MAX)) {
  677. rt2x00_err(queue->rt2x00dev,
  678. "Entry requested from invalid index range (%d - %d)\n",
  679. start, end);
  680. return true;
  681. }
  682. /*
  683. * Only protect the range we are going to loop over,
  684. * if during our loop a extra entry is set to pending
  685. * it should not be kicked during this run, since it
  686. * is part of another TX operation.
  687. */
  688. spin_lock_irqsave(&queue->index_lock, irqflags);
  689. index_start = queue->index[start];
  690. index_end = queue->index[end];
  691. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  692. /*
  693. * Start from the TX done pointer, this guarantees that we will
  694. * send out all frames in the correct order.
  695. */
  696. if (index_start < index_end) {
  697. for (i = index_start; i < index_end; i++) {
  698. if (fn(&queue->entries[i], data))
  699. return true;
  700. }
  701. } else {
  702. for (i = index_start; i < queue->limit; i++) {
  703. if (fn(&queue->entries[i], data))
  704. return true;
  705. }
  706. for (i = 0; i < index_end; i++) {
  707. if (fn(&queue->entries[i], data))
  708. return true;
  709. }
  710. }
  711. return false;
  712. }
  713. EXPORT_SYMBOL_GPL(rt2x00queue_for_each_entry);
  714. struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
  715. enum queue_index index)
  716. {
  717. struct queue_entry *entry;
  718. unsigned long irqflags;
  719. if (unlikely(index >= Q_INDEX_MAX)) {
  720. rt2x00_err(queue->rt2x00dev, "Entry requested from invalid index type (%d)\n",
  721. index);
  722. return NULL;
  723. }
  724. spin_lock_irqsave(&queue->index_lock, irqflags);
  725. entry = &queue->entries[queue->index[index]];
  726. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  727. return entry;
  728. }
  729. EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
  730. void rt2x00queue_index_inc(struct queue_entry *entry, enum queue_index index)
  731. {
  732. struct data_queue *queue = entry->queue;
  733. unsigned long irqflags;
  734. if (unlikely(index >= Q_INDEX_MAX)) {
  735. rt2x00_err(queue->rt2x00dev,
  736. "Index change on invalid index type (%d)\n", index);
  737. return;
  738. }
  739. spin_lock_irqsave(&queue->index_lock, irqflags);
  740. queue->index[index]++;
  741. if (queue->index[index] >= queue->limit)
  742. queue->index[index] = 0;
  743. entry->last_action = jiffies;
  744. if (index == Q_INDEX) {
  745. queue->length++;
  746. } else if (index == Q_INDEX_DONE) {
  747. queue->length--;
  748. queue->count++;
  749. }
  750. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  751. }
  752. static void rt2x00queue_pause_queue_nocheck(struct data_queue *queue)
  753. {
  754. switch (queue->qid) {
  755. case QID_AC_VO:
  756. case QID_AC_VI:
  757. case QID_AC_BE:
  758. case QID_AC_BK:
  759. /*
  760. * For TX queues, we have to disable the queue
  761. * inside mac80211.
  762. */
  763. ieee80211_stop_queue(queue->rt2x00dev->hw, queue->qid);
  764. break;
  765. default:
  766. break;
  767. }
  768. }
  769. void rt2x00queue_pause_queue(struct data_queue *queue)
  770. {
  771. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  772. !test_bit(QUEUE_STARTED, &queue->flags) ||
  773. test_and_set_bit(QUEUE_PAUSED, &queue->flags))
  774. return;
  775. rt2x00queue_pause_queue_nocheck(queue);
  776. }
  777. EXPORT_SYMBOL_GPL(rt2x00queue_pause_queue);
  778. void rt2x00queue_unpause_queue(struct data_queue *queue)
  779. {
  780. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  781. !test_bit(QUEUE_STARTED, &queue->flags) ||
  782. !test_and_clear_bit(QUEUE_PAUSED, &queue->flags))
  783. return;
  784. switch (queue->qid) {
  785. case QID_AC_VO:
  786. case QID_AC_VI:
  787. case QID_AC_BE:
  788. case QID_AC_BK:
  789. /*
  790. * For TX queues, we have to enable the queue
  791. * inside mac80211.
  792. */
  793. ieee80211_wake_queue(queue->rt2x00dev->hw, queue->qid);
  794. break;
  795. case QID_RX:
  796. /*
  797. * For RX we need to kick the queue now in order to
  798. * receive frames.
  799. */
  800. queue->rt2x00dev->ops->lib->kick_queue(queue);
  801. default:
  802. break;
  803. }
  804. }
  805. EXPORT_SYMBOL_GPL(rt2x00queue_unpause_queue);
  806. void rt2x00queue_start_queue(struct data_queue *queue)
  807. {
  808. mutex_lock(&queue->status_lock);
  809. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  810. test_and_set_bit(QUEUE_STARTED, &queue->flags)) {
  811. mutex_unlock(&queue->status_lock);
  812. return;
  813. }
  814. set_bit(QUEUE_PAUSED, &queue->flags);
  815. queue->rt2x00dev->ops->lib->start_queue(queue);
  816. rt2x00queue_unpause_queue(queue);
  817. mutex_unlock(&queue->status_lock);
  818. }
  819. EXPORT_SYMBOL_GPL(rt2x00queue_start_queue);
  820. void rt2x00queue_stop_queue(struct data_queue *queue)
  821. {
  822. mutex_lock(&queue->status_lock);
  823. if (!test_and_clear_bit(QUEUE_STARTED, &queue->flags)) {
  824. mutex_unlock(&queue->status_lock);
  825. return;
  826. }
  827. rt2x00queue_pause_queue_nocheck(queue);
  828. queue->rt2x00dev->ops->lib->stop_queue(queue);
  829. mutex_unlock(&queue->status_lock);
  830. }
  831. EXPORT_SYMBOL_GPL(rt2x00queue_stop_queue);
  832. void rt2x00queue_flush_queue(struct data_queue *queue, bool drop)
  833. {
  834. bool tx_queue =
  835. (queue->qid == QID_AC_VO) ||
  836. (queue->qid == QID_AC_VI) ||
  837. (queue->qid == QID_AC_BE) ||
  838. (queue->qid == QID_AC_BK);
  839. /*
  840. * If we are not supposed to drop any pending
  841. * frames, this means we must force a start (=kick)
  842. * to the queue to make sure the hardware will
  843. * start transmitting.
  844. */
  845. if (!drop && tx_queue)
  846. queue->rt2x00dev->ops->lib->kick_queue(queue);
  847. /*
  848. * Check if driver supports flushing, if that is the case we can
  849. * defer the flushing to the driver. Otherwise we must use the
  850. * alternative which just waits for the queue to become empty.
  851. */
  852. if (likely(queue->rt2x00dev->ops->lib->flush_queue))
  853. queue->rt2x00dev->ops->lib->flush_queue(queue, drop);
  854. /*
  855. * The queue flush has failed...
  856. */
  857. if (unlikely(!rt2x00queue_empty(queue)))
  858. rt2x00_warn(queue->rt2x00dev, "Queue %d failed to flush\n",
  859. queue->qid);
  860. }
  861. EXPORT_SYMBOL_GPL(rt2x00queue_flush_queue);
  862. void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev)
  863. {
  864. struct data_queue *queue;
  865. /*
  866. * rt2x00queue_start_queue will call ieee80211_wake_queue
  867. * for each queue after is has been properly initialized.
  868. */
  869. tx_queue_for_each(rt2x00dev, queue)
  870. rt2x00queue_start_queue(queue);
  871. rt2x00queue_start_queue(rt2x00dev->rx);
  872. }
  873. EXPORT_SYMBOL_GPL(rt2x00queue_start_queues);
  874. void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
  875. {
  876. struct data_queue *queue;
  877. /*
  878. * rt2x00queue_stop_queue will call ieee80211_stop_queue
  879. * as well, but we are completely shutting doing everything
  880. * now, so it is much safer to stop all TX queues at once,
  881. * and use rt2x00queue_stop_queue for cleaning up.
  882. */
  883. ieee80211_stop_queues(rt2x00dev->hw);
  884. tx_queue_for_each(rt2x00dev, queue)
  885. rt2x00queue_stop_queue(queue);
  886. rt2x00queue_stop_queue(rt2x00dev->rx);
  887. }
  888. EXPORT_SYMBOL_GPL(rt2x00queue_stop_queues);
  889. void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop)
  890. {
  891. struct data_queue *queue;
  892. tx_queue_for_each(rt2x00dev, queue)
  893. rt2x00queue_flush_queue(queue, drop);
  894. rt2x00queue_flush_queue(rt2x00dev->rx, drop);
  895. }
  896. EXPORT_SYMBOL_GPL(rt2x00queue_flush_queues);
  897. static void rt2x00queue_reset(struct data_queue *queue)
  898. {
  899. unsigned long irqflags;
  900. unsigned int i;
  901. spin_lock_irqsave(&queue->index_lock, irqflags);
  902. queue->count = 0;
  903. queue->length = 0;
  904. for (i = 0; i < Q_INDEX_MAX; i++)
  905. queue->index[i] = 0;
  906. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  907. }
  908. void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
  909. {
  910. struct data_queue *queue;
  911. unsigned int i;
  912. queue_for_each(rt2x00dev, queue) {
  913. rt2x00queue_reset(queue);
  914. for (i = 0; i < queue->limit; i++)
  915. rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
  916. }
  917. }
  918. static int rt2x00queue_alloc_entries(struct data_queue *queue)
  919. {
  920. struct queue_entry *entries;
  921. unsigned int entry_size;
  922. unsigned int i;
  923. rt2x00queue_reset(queue);
  924. /*
  925. * Allocate all queue entries.
  926. */
  927. entry_size = sizeof(*entries) + queue->priv_size;
  928. entries = kcalloc(queue->limit, entry_size, GFP_KERNEL);
  929. if (!entries)
  930. return -ENOMEM;
  931. #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
  932. (((char *)(__base)) + ((__limit) * (__esize)) + \
  933. ((__index) * (__psize)))
  934. for (i = 0; i < queue->limit; i++) {
  935. entries[i].flags = 0;
  936. entries[i].queue = queue;
  937. entries[i].skb = NULL;
  938. entries[i].entry_idx = i;
  939. entries[i].priv_data =
  940. QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
  941. sizeof(*entries), queue->priv_size);
  942. }
  943. #undef QUEUE_ENTRY_PRIV_OFFSET
  944. queue->entries = entries;
  945. return 0;
  946. }
  947. static void rt2x00queue_free_skbs(struct data_queue *queue)
  948. {
  949. unsigned int i;
  950. if (!queue->entries)
  951. return;
  952. for (i = 0; i < queue->limit; i++) {
  953. rt2x00queue_free_skb(&queue->entries[i]);
  954. }
  955. }
  956. static int rt2x00queue_alloc_rxskbs(struct data_queue *queue)
  957. {
  958. unsigned int i;
  959. struct sk_buff *skb;
  960. for (i = 0; i < queue->limit; i++) {
  961. skb = rt2x00queue_alloc_rxskb(&queue->entries[i], GFP_KERNEL);
  962. if (!skb)
  963. return -ENOMEM;
  964. queue->entries[i].skb = skb;
  965. }
  966. return 0;
  967. }
  968. int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
  969. {
  970. struct data_queue *queue;
  971. int status;
  972. status = rt2x00queue_alloc_entries(rt2x00dev->rx);
  973. if (status)
  974. goto exit;
  975. tx_queue_for_each(rt2x00dev, queue) {
  976. status = rt2x00queue_alloc_entries(queue);
  977. if (status)
  978. goto exit;
  979. }
  980. status = rt2x00queue_alloc_entries(rt2x00dev->bcn);
  981. if (status)
  982. goto exit;
  983. if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_ATIM_QUEUE)) {
  984. status = rt2x00queue_alloc_entries(rt2x00dev->atim);
  985. if (status)
  986. goto exit;
  987. }
  988. status = rt2x00queue_alloc_rxskbs(rt2x00dev->rx);
  989. if (status)
  990. goto exit;
  991. return 0;
  992. exit:
  993. rt2x00_err(rt2x00dev, "Queue entries allocation failed\n");
  994. rt2x00queue_uninitialize(rt2x00dev);
  995. return status;
  996. }
  997. void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
  998. {
  999. struct data_queue *queue;
  1000. rt2x00queue_free_skbs(rt2x00dev->rx);
  1001. queue_for_each(rt2x00dev, queue) {
  1002. kfree(queue->entries);
  1003. queue->entries = NULL;
  1004. }
  1005. }
  1006. static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
  1007. struct data_queue *queue, enum data_queue_qid qid)
  1008. {
  1009. mutex_init(&queue->status_lock);
  1010. spin_lock_init(&queue->tx_lock);
  1011. spin_lock_init(&queue->index_lock);
  1012. queue->rt2x00dev = rt2x00dev;
  1013. queue->qid = qid;
  1014. queue->txop = 0;
  1015. queue->aifs = 2;
  1016. queue->cw_min = 5;
  1017. queue->cw_max = 10;
  1018. rt2x00dev->ops->queue_init(queue);
  1019. queue->threshold = DIV_ROUND_UP(queue->limit, 10);
  1020. }
  1021. int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
  1022. {
  1023. struct data_queue *queue;
  1024. enum data_queue_qid qid;
  1025. unsigned int req_atim =
  1026. rt2x00_has_cap_flag(rt2x00dev, REQUIRE_ATIM_QUEUE);
  1027. /*
  1028. * We need the following queues:
  1029. * RX: 1
  1030. * TX: ops->tx_queues
  1031. * Beacon: 1
  1032. * Atim: 1 (if required)
  1033. */
  1034. rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
  1035. queue = kcalloc(rt2x00dev->data_queues, sizeof(*queue), GFP_KERNEL);
  1036. if (!queue) {
  1037. rt2x00_err(rt2x00dev, "Queue allocation failed\n");
  1038. return -ENOMEM;
  1039. }
  1040. /*
  1041. * Initialize pointers
  1042. */
  1043. rt2x00dev->rx = queue;
  1044. rt2x00dev->tx = &queue[1];
  1045. rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
  1046. rt2x00dev->atim = req_atim ? &queue[2 + rt2x00dev->ops->tx_queues] : NULL;
  1047. /*
  1048. * Initialize queue parameters.
  1049. * RX: qid = QID_RX
  1050. * TX: qid = QID_AC_VO + index
  1051. * TX: cw_min: 2^5 = 32.
  1052. * TX: cw_max: 2^10 = 1024.
  1053. * BCN: qid = QID_BEACON
  1054. * ATIM: qid = QID_ATIM
  1055. */
  1056. rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
  1057. qid = QID_AC_VO;
  1058. tx_queue_for_each(rt2x00dev, queue)
  1059. rt2x00queue_init(rt2x00dev, queue, qid++);
  1060. rt2x00queue_init(rt2x00dev, rt2x00dev->bcn, QID_BEACON);
  1061. if (req_atim)
  1062. rt2x00queue_init(rt2x00dev, rt2x00dev->atim, QID_ATIM);
  1063. return 0;
  1064. }
  1065. void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
  1066. {
  1067. kfree(rt2x00dev->rx);
  1068. rt2x00dev->rx = NULL;
  1069. rt2x00dev->tx = NULL;
  1070. rt2x00dev->bcn = NULL;
  1071. }