wmi.c 272 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/skbuff.h>
  18. #include <linux/ctype.h>
  19. #include "core.h"
  20. #include "htc.h"
  21. #include "debug.h"
  22. #include "wmi.h"
  23. #include "wmi-tlv.h"
  24. #include "mac.h"
  25. #include "testmode.h"
  26. #include "wmi-ops.h"
  27. #include "p2p.h"
  28. #include "hw.h"
  29. #include "hif.h"
  30. #define ATH10K_WMI_BARRIER_ECHO_ID 0xBA991E9
  31. #define ATH10K_WMI_BARRIER_TIMEOUT_HZ (3 * HZ)
  32. /* MAIN WMI cmd track */
  33. static struct wmi_cmd_map wmi_cmd_map = {
  34. .init_cmdid = WMI_INIT_CMDID,
  35. .start_scan_cmdid = WMI_START_SCAN_CMDID,
  36. .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
  37. .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
  38. .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
  39. .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
  40. .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
  41. .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
  42. .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
  43. .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
  44. .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
  45. .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
  46. .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
  47. .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
  48. .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
  49. .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  50. .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
  51. .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
  52. .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
  53. .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
  54. .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
  55. .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
  56. .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
  57. .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
  58. .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
  59. .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
  60. .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
  61. .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
  62. .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
  63. .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
  64. .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
  65. .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
  66. .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
  67. .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
  68. .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
  69. .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
  70. .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
  71. .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
  72. .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
  73. .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
  74. .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
  75. .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
  76. .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
  77. .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
  78. .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
  79. .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
  80. .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
  81. .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
  82. .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
  83. .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
  84. .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
  85. .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
  86. .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
  87. .roam_scan_mode = WMI_ROAM_SCAN_MODE,
  88. .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
  89. .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
  90. .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  91. .roam_ap_profile = WMI_ROAM_AP_PROFILE,
  92. .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
  93. .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
  94. .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
  95. .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
  96. .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
  97. .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
  98. .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
  99. .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
  100. .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
  101. .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
  102. .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
  103. .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
  104. .wlan_profile_set_hist_intvl_cmdid =
  105. WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  106. .wlan_profile_get_profile_data_cmdid =
  107. WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  108. .wlan_profile_enable_profile_id_cmdid =
  109. WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  110. .wlan_profile_list_profile_id_cmdid =
  111. WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  112. .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
  113. .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
  114. .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
  115. .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
  116. .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
  117. .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
  118. .wow_enable_disable_wake_event_cmdid =
  119. WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  120. .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
  121. .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  122. .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
  123. .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
  124. .vdev_spectral_scan_configure_cmdid =
  125. WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  126. .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  127. .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
  128. .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
  129. .network_list_offload_config_cmdid =
  130. WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
  131. .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
  132. .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
  133. .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
  134. .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
  135. .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
  136. .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
  137. .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
  138. .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
  139. .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
  140. .echo_cmdid = WMI_ECHO_CMDID,
  141. .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
  142. .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
  143. .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
  144. .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
  145. .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
  146. .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
  147. .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
  148. .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
  149. .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
  150. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  151. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  152. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  153. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  154. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  155. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  156. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  157. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  158. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  159. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  160. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  161. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  162. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  163. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  164. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  165. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  166. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  167. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  168. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  169. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  170. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  171. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  172. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  173. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  174. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  175. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  176. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  177. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  178. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  179. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  180. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  181. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  182. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  183. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  184. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  185. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  186. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  187. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  188. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  189. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  190. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  191. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  192. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  193. .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
  194. };
  195. /* 10.X WMI cmd track */
  196. static struct wmi_cmd_map wmi_10x_cmd_map = {
  197. .init_cmdid = WMI_10X_INIT_CMDID,
  198. .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
  199. .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
  200. .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
  201. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  202. .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
  203. .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
  204. .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
  205. .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
  206. .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
  207. .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
  208. .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
  209. .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
  210. .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
  211. .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
  212. .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  213. .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
  214. .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
  215. .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
  216. .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
  217. .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
  218. .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
  219. .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
  220. .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
  221. .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
  222. .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
  223. .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
  224. .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
  225. .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
  226. .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
  227. .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
  228. .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
  229. .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
  230. .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
  231. .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
  232. .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
  233. .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
  234. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  235. .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
  236. .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
  237. .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
  238. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  239. .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
  240. .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
  241. .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
  242. .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
  243. .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
  244. .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
  245. .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
  246. .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
  247. .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
  248. .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
  249. .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
  250. .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
  251. .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
  252. .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
  253. .roam_scan_rssi_change_threshold =
  254. WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  255. .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
  256. .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
  257. .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
  258. .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
  259. .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
  260. .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
  261. .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
  262. .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
  263. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  264. .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
  265. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  266. .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
  267. .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
  268. .wlan_profile_set_hist_intvl_cmdid =
  269. WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  270. .wlan_profile_get_profile_data_cmdid =
  271. WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  272. .wlan_profile_enable_profile_id_cmdid =
  273. WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  274. .wlan_profile_list_profile_id_cmdid =
  275. WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  276. .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
  277. .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
  278. .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
  279. .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
  280. .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
  281. .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
  282. .wow_enable_disable_wake_event_cmdid =
  283. WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  284. .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
  285. .wow_hostwakeup_from_sleep_cmdid =
  286. WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  287. .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
  288. .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
  289. .vdev_spectral_scan_configure_cmdid =
  290. WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  291. .vdev_spectral_scan_enable_cmdid =
  292. WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  293. .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
  294. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  295. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  296. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  297. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  298. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  299. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  300. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  301. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  302. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  303. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  304. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  305. .echo_cmdid = WMI_10X_ECHO_CMDID,
  306. .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
  307. .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
  308. .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
  309. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  310. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  311. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  312. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  313. .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
  314. .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
  315. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  316. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  317. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  318. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  319. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  320. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  321. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  322. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  323. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  324. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  325. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  326. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  327. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  328. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  329. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  330. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  331. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  332. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  333. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  334. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  335. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  336. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  337. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  338. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  339. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  340. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  341. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  342. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  343. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  344. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  345. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  346. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  347. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  348. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  349. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  350. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  351. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  352. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  353. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  354. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  355. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  356. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  357. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  358. .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
  359. };
  360. /* 10.2.4 WMI cmd track */
  361. static struct wmi_cmd_map wmi_10_2_4_cmd_map = {
  362. .init_cmdid = WMI_10_2_INIT_CMDID,
  363. .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
  364. .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
  365. .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
  366. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  367. .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
  368. .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
  369. .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
  370. .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
  371. .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
  372. .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
  373. .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
  374. .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
  375. .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
  376. .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  377. .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
  378. .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
  379. .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
  380. .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
  381. .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
  382. .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
  383. .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
  384. .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
  385. .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
  386. .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
  387. .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
  388. .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
  389. .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
  390. .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
  391. .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
  392. .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
  393. .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
  394. .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
  395. .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
  396. .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
  397. .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
  398. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  399. .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
  400. .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
  401. .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
  402. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  403. .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
  404. .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
  405. .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
  406. .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
  407. .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
  408. .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
  409. .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
  410. .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
  411. .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
  412. .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
  413. .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
  414. .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
  415. .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
  416. .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
  417. .roam_scan_rssi_change_threshold =
  418. WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  419. .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
  420. .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
  421. .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
  422. .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
  423. .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
  424. .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
  425. .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
  426. .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
  427. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  428. .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
  429. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  430. .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
  431. .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
  432. .wlan_profile_set_hist_intvl_cmdid =
  433. WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  434. .wlan_profile_get_profile_data_cmdid =
  435. WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  436. .wlan_profile_enable_profile_id_cmdid =
  437. WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  438. .wlan_profile_list_profile_id_cmdid =
  439. WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  440. .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
  441. .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
  442. .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
  443. .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
  444. .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
  445. .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
  446. .wow_enable_disable_wake_event_cmdid =
  447. WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  448. .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
  449. .wow_hostwakeup_from_sleep_cmdid =
  450. WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  451. .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
  452. .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
  453. .vdev_spectral_scan_configure_cmdid =
  454. WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  455. .vdev_spectral_scan_enable_cmdid =
  456. WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  457. .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
  458. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  459. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  460. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  461. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  462. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  463. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  464. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  465. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  466. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  467. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  468. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  469. .echo_cmdid = WMI_10_2_ECHO_CMDID,
  470. .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
  471. .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
  472. .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
  473. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  474. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  475. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  476. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  477. .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
  478. .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
  479. .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
  480. .pdev_enable_adaptive_cca_cmdid = WMI_10_2_SET_CCA_PARAMS,
  481. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  482. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  483. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  484. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  485. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  486. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  487. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  488. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  489. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  490. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  491. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  492. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  493. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  494. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  495. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  496. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  497. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  498. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  499. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  500. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  501. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  502. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  503. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  504. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  505. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  506. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  507. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  508. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  509. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  510. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  511. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  512. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  513. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  514. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  515. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  516. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  517. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  518. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  519. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  520. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  521. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  522. .pdev_bss_chan_info_request_cmdid =
  523. WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
  524. };
  525. /* 10.4 WMI cmd track */
  526. static struct wmi_cmd_map wmi_10_4_cmd_map = {
  527. .init_cmdid = WMI_10_4_INIT_CMDID,
  528. .start_scan_cmdid = WMI_10_4_START_SCAN_CMDID,
  529. .stop_scan_cmdid = WMI_10_4_STOP_SCAN_CMDID,
  530. .scan_chan_list_cmdid = WMI_10_4_SCAN_CHAN_LIST_CMDID,
  531. .scan_sch_prio_tbl_cmdid = WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
  532. .pdev_set_regdomain_cmdid = WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
  533. .pdev_set_channel_cmdid = WMI_10_4_PDEV_SET_CHANNEL_CMDID,
  534. .pdev_set_param_cmdid = WMI_10_4_PDEV_SET_PARAM_CMDID,
  535. .pdev_pktlog_enable_cmdid = WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
  536. .pdev_pktlog_disable_cmdid = WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
  537. .pdev_set_wmm_params_cmdid = WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
  538. .pdev_set_ht_cap_ie_cmdid = WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
  539. .pdev_set_vht_cap_ie_cmdid = WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
  540. .pdev_set_dscp_tid_map_cmdid = WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
  541. .pdev_set_quiet_mode_cmdid = WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
  542. .pdev_green_ap_ps_enable_cmdid = WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  543. .pdev_get_tpc_config_cmdid = WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
  544. .pdev_set_base_macaddr_cmdid = WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
  545. .vdev_create_cmdid = WMI_10_4_VDEV_CREATE_CMDID,
  546. .vdev_delete_cmdid = WMI_10_4_VDEV_DELETE_CMDID,
  547. .vdev_start_request_cmdid = WMI_10_4_VDEV_START_REQUEST_CMDID,
  548. .vdev_restart_request_cmdid = WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
  549. .vdev_up_cmdid = WMI_10_4_VDEV_UP_CMDID,
  550. .vdev_stop_cmdid = WMI_10_4_VDEV_STOP_CMDID,
  551. .vdev_down_cmdid = WMI_10_4_VDEV_DOWN_CMDID,
  552. .vdev_set_param_cmdid = WMI_10_4_VDEV_SET_PARAM_CMDID,
  553. .vdev_install_key_cmdid = WMI_10_4_VDEV_INSTALL_KEY_CMDID,
  554. .peer_create_cmdid = WMI_10_4_PEER_CREATE_CMDID,
  555. .peer_delete_cmdid = WMI_10_4_PEER_DELETE_CMDID,
  556. .peer_flush_tids_cmdid = WMI_10_4_PEER_FLUSH_TIDS_CMDID,
  557. .peer_set_param_cmdid = WMI_10_4_PEER_SET_PARAM_CMDID,
  558. .peer_assoc_cmdid = WMI_10_4_PEER_ASSOC_CMDID,
  559. .peer_add_wds_entry_cmdid = WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
  560. .peer_remove_wds_entry_cmdid = WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
  561. .peer_mcast_group_cmdid = WMI_10_4_PEER_MCAST_GROUP_CMDID,
  562. .bcn_tx_cmdid = WMI_10_4_BCN_TX_CMDID,
  563. .pdev_send_bcn_cmdid = WMI_10_4_PDEV_SEND_BCN_CMDID,
  564. .bcn_tmpl_cmdid = WMI_10_4_BCN_PRB_TMPL_CMDID,
  565. .bcn_filter_rx_cmdid = WMI_10_4_BCN_FILTER_RX_CMDID,
  566. .prb_req_filter_rx_cmdid = WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
  567. .mgmt_tx_cmdid = WMI_10_4_MGMT_TX_CMDID,
  568. .prb_tmpl_cmdid = WMI_10_4_PRB_TMPL_CMDID,
  569. .addba_clear_resp_cmdid = WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
  570. .addba_send_cmdid = WMI_10_4_ADDBA_SEND_CMDID,
  571. .addba_status_cmdid = WMI_10_4_ADDBA_STATUS_CMDID,
  572. .delba_send_cmdid = WMI_10_4_DELBA_SEND_CMDID,
  573. .addba_set_resp_cmdid = WMI_10_4_ADDBA_SET_RESP_CMDID,
  574. .send_singleamsdu_cmdid = WMI_10_4_SEND_SINGLEAMSDU_CMDID,
  575. .sta_powersave_mode_cmdid = WMI_10_4_STA_POWERSAVE_MODE_CMDID,
  576. .sta_powersave_param_cmdid = WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
  577. .sta_mimo_ps_mode_cmdid = WMI_10_4_STA_MIMO_PS_MODE_CMDID,
  578. .pdev_dfs_enable_cmdid = WMI_10_4_PDEV_DFS_ENABLE_CMDID,
  579. .pdev_dfs_disable_cmdid = WMI_10_4_PDEV_DFS_DISABLE_CMDID,
  580. .roam_scan_mode = WMI_10_4_ROAM_SCAN_MODE,
  581. .roam_scan_rssi_threshold = WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
  582. .roam_scan_period = WMI_10_4_ROAM_SCAN_PERIOD,
  583. .roam_scan_rssi_change_threshold =
  584. WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  585. .roam_ap_profile = WMI_10_4_ROAM_AP_PROFILE,
  586. .ofl_scan_add_ap_profile = WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
  587. .ofl_scan_remove_ap_profile = WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
  588. .ofl_scan_period = WMI_10_4_OFL_SCAN_PERIOD,
  589. .p2p_dev_set_device_info = WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
  590. .p2p_dev_set_discoverability = WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
  591. .p2p_go_set_beacon_ie = WMI_10_4_P2P_GO_SET_BEACON_IE,
  592. .p2p_go_set_probe_resp_ie = WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
  593. .p2p_set_vendor_ie_data_cmdid = WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
  594. .ap_ps_peer_param_cmdid = WMI_10_4_AP_PS_PEER_PARAM_CMDID,
  595. .ap_ps_peer_uapsd_coex_cmdid = WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
  596. .peer_rate_retry_sched_cmdid = WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
  597. .wlan_profile_trigger_cmdid = WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
  598. .wlan_profile_set_hist_intvl_cmdid =
  599. WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  600. .wlan_profile_get_profile_data_cmdid =
  601. WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  602. .wlan_profile_enable_profile_id_cmdid =
  603. WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  604. .wlan_profile_list_profile_id_cmdid =
  605. WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  606. .pdev_suspend_cmdid = WMI_10_4_PDEV_SUSPEND_CMDID,
  607. .pdev_resume_cmdid = WMI_10_4_PDEV_RESUME_CMDID,
  608. .add_bcn_filter_cmdid = WMI_10_4_ADD_BCN_FILTER_CMDID,
  609. .rmv_bcn_filter_cmdid = WMI_10_4_RMV_BCN_FILTER_CMDID,
  610. .wow_add_wake_pattern_cmdid = WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
  611. .wow_del_wake_pattern_cmdid = WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
  612. .wow_enable_disable_wake_event_cmdid =
  613. WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  614. .wow_enable_cmdid = WMI_10_4_WOW_ENABLE_CMDID,
  615. .wow_hostwakeup_from_sleep_cmdid =
  616. WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  617. .rtt_measreq_cmdid = WMI_10_4_RTT_MEASREQ_CMDID,
  618. .rtt_tsf_cmdid = WMI_10_4_RTT_TSF_CMDID,
  619. .vdev_spectral_scan_configure_cmdid =
  620. WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  621. .vdev_spectral_scan_enable_cmdid =
  622. WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  623. .request_stats_cmdid = WMI_10_4_REQUEST_STATS_CMDID,
  624. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  625. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  626. .gtk_offload_cmdid = WMI_10_4_GTK_OFFLOAD_CMDID,
  627. .csa_offload_enable_cmdid = WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
  628. .csa_offload_chanswitch_cmdid = WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
  629. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  630. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  631. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  632. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  633. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  634. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  635. .echo_cmdid = WMI_10_4_ECHO_CMDID,
  636. .pdev_utf_cmdid = WMI_10_4_PDEV_UTF_CMDID,
  637. .dbglog_cfg_cmdid = WMI_10_4_DBGLOG_CFG_CMDID,
  638. .pdev_qvit_cmdid = WMI_10_4_PDEV_QVIT_CMDID,
  639. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  640. .vdev_set_keepalive_cmdid = WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
  641. .vdev_get_keepalive_cmdid = WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
  642. .force_fw_hang_cmdid = WMI_10_4_FORCE_FW_HANG_CMDID,
  643. .gpio_config_cmdid = WMI_10_4_GPIO_CONFIG_CMDID,
  644. .gpio_output_cmdid = WMI_10_4_GPIO_OUTPUT_CMDID,
  645. .pdev_get_temperature_cmdid = WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
  646. .vdev_set_wmm_params_cmdid = WMI_CMD_UNSUPPORTED,
  647. .tdls_set_state_cmdid = WMI_CMD_UNSUPPORTED,
  648. .tdls_peer_update_cmdid = WMI_CMD_UNSUPPORTED,
  649. .adaptive_qcs_cmdid = WMI_CMD_UNSUPPORTED,
  650. .scan_update_request_cmdid = WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
  651. .vdev_standby_response_cmdid = WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
  652. .vdev_resume_response_cmdid = WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
  653. .wlan_peer_caching_add_peer_cmdid =
  654. WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
  655. .wlan_peer_caching_evict_peer_cmdid =
  656. WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
  657. .wlan_peer_caching_restore_peer_cmdid =
  658. WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
  659. .wlan_peer_caching_print_all_peers_info_cmdid =
  660. WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
  661. .peer_update_wds_entry_cmdid = WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
  662. .peer_add_proxy_sta_entry_cmdid =
  663. WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
  664. .rtt_keepalive_cmdid = WMI_10_4_RTT_KEEPALIVE_CMDID,
  665. .oem_req_cmdid = WMI_10_4_OEM_REQ_CMDID,
  666. .nan_cmdid = WMI_10_4_NAN_CMDID,
  667. .vdev_ratemask_cmdid = WMI_10_4_VDEV_RATEMASK_CMDID,
  668. .qboost_cfg_cmdid = WMI_10_4_QBOOST_CFG_CMDID,
  669. .pdev_smart_ant_enable_cmdid = WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
  670. .pdev_smart_ant_set_rx_antenna_cmdid =
  671. WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
  672. .peer_smart_ant_set_tx_antenna_cmdid =
  673. WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
  674. .peer_smart_ant_set_train_info_cmdid =
  675. WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
  676. .peer_smart_ant_set_node_config_ops_cmdid =
  677. WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
  678. .pdev_set_antenna_switch_table_cmdid =
  679. WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
  680. .pdev_set_ctl_table_cmdid = WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
  681. .pdev_set_mimogain_table_cmdid = WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
  682. .pdev_ratepwr_table_cmdid = WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
  683. .pdev_ratepwr_chainmsk_table_cmdid =
  684. WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
  685. .pdev_fips_cmdid = WMI_10_4_PDEV_FIPS_CMDID,
  686. .tt_set_conf_cmdid = WMI_10_4_TT_SET_CONF_CMDID,
  687. .fwtest_cmdid = WMI_10_4_FWTEST_CMDID,
  688. .vdev_atf_request_cmdid = WMI_10_4_VDEV_ATF_REQUEST_CMDID,
  689. .peer_atf_request_cmdid = WMI_10_4_PEER_ATF_REQUEST_CMDID,
  690. .pdev_get_ani_cck_config_cmdid = WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
  691. .pdev_get_ani_ofdm_config_cmdid =
  692. WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
  693. .pdev_reserve_ast_entry_cmdid = WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
  694. .pdev_get_nfcal_power_cmdid = WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
  695. .pdev_get_tpc_cmdid = WMI_10_4_PDEV_GET_TPC_CMDID,
  696. .pdev_get_ast_info_cmdid = WMI_10_4_PDEV_GET_AST_INFO_CMDID,
  697. .vdev_set_dscp_tid_map_cmdid = WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
  698. .pdev_get_info_cmdid = WMI_10_4_PDEV_GET_INFO_CMDID,
  699. .vdev_get_info_cmdid = WMI_10_4_VDEV_GET_INFO_CMDID,
  700. .vdev_filter_neighbor_rx_packets_cmdid =
  701. WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
  702. .mu_cal_start_cmdid = WMI_10_4_MU_CAL_START_CMDID,
  703. .set_cca_params_cmdid = WMI_10_4_SET_CCA_PARAMS_CMDID,
  704. .pdev_bss_chan_info_request_cmdid =
  705. WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
  706. .ext_resource_cfg_cmdid = WMI_10_4_EXT_RESOURCE_CFG_CMDID,
  707. };
  708. /* MAIN WMI VDEV param map */
  709. static struct wmi_vdev_param_map wmi_vdev_param_map = {
  710. .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
  711. .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  712. .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
  713. .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
  714. .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
  715. .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
  716. .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
  717. .preamble = WMI_VDEV_PARAM_PREAMBLE,
  718. .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
  719. .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
  720. .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
  721. .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
  722. .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
  723. .wmi_vdev_oc_scheduler_air_time_limit =
  724. WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  725. .wds = WMI_VDEV_PARAM_WDS,
  726. .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
  727. .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
  728. .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
  729. .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
  730. .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
  731. .chwidth = WMI_VDEV_PARAM_CHWIDTH,
  732. .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
  733. .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
  734. .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
  735. .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
  736. .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
  737. .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
  738. .sgi = WMI_VDEV_PARAM_SGI,
  739. .ldpc = WMI_VDEV_PARAM_LDPC,
  740. .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
  741. .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
  742. .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
  743. .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
  744. .nss = WMI_VDEV_PARAM_NSS,
  745. .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
  746. .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
  747. .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
  748. .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
  749. .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  750. .ap_keepalive_min_idle_inactive_time_secs =
  751. WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  752. .ap_keepalive_max_idle_inactive_time_secs =
  753. WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  754. .ap_keepalive_max_unresponsive_time_secs =
  755. WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  756. .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
  757. .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
  758. .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
  759. .txbf = WMI_VDEV_PARAM_TXBF,
  760. .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
  761. .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
  762. .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
  763. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  764. WMI_VDEV_PARAM_UNSUPPORTED,
  765. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  766. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  767. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  768. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  769. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  770. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  771. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  772. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  773. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  774. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  775. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  776. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  777. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  778. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  779. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  780. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  781. };
  782. /* 10.X WMI VDEV param map */
  783. static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
  784. .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
  785. .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  786. .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
  787. .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
  788. .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
  789. .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
  790. .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
  791. .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
  792. .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
  793. .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
  794. .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
  795. .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
  796. .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
  797. .wmi_vdev_oc_scheduler_air_time_limit =
  798. WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  799. .wds = WMI_10X_VDEV_PARAM_WDS,
  800. .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
  801. .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
  802. .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  803. .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  804. .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
  805. .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
  806. .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
  807. .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
  808. .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
  809. .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
  810. .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
  811. .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
  812. .sgi = WMI_10X_VDEV_PARAM_SGI,
  813. .ldpc = WMI_10X_VDEV_PARAM_LDPC,
  814. .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
  815. .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
  816. .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
  817. .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
  818. .nss = WMI_10X_VDEV_PARAM_NSS,
  819. .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
  820. .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
  821. .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
  822. .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
  823. .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  824. .ap_keepalive_min_idle_inactive_time_secs =
  825. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  826. .ap_keepalive_max_idle_inactive_time_secs =
  827. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  828. .ap_keepalive_max_unresponsive_time_secs =
  829. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  830. .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
  831. .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
  832. .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
  833. .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
  834. .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
  835. .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
  836. .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  837. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  838. WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  839. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  840. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  841. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  842. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  843. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  844. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  845. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  846. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  847. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  848. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  849. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  850. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  851. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  852. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  853. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  854. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  855. };
  856. static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = {
  857. .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
  858. .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  859. .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
  860. .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
  861. .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
  862. .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
  863. .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
  864. .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
  865. .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
  866. .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
  867. .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
  868. .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
  869. .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
  870. .wmi_vdev_oc_scheduler_air_time_limit =
  871. WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  872. .wds = WMI_10X_VDEV_PARAM_WDS,
  873. .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
  874. .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
  875. .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  876. .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  877. .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
  878. .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
  879. .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
  880. .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
  881. .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
  882. .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
  883. .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
  884. .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
  885. .sgi = WMI_10X_VDEV_PARAM_SGI,
  886. .ldpc = WMI_10X_VDEV_PARAM_LDPC,
  887. .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
  888. .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
  889. .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
  890. .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
  891. .nss = WMI_10X_VDEV_PARAM_NSS,
  892. .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
  893. .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
  894. .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
  895. .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
  896. .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  897. .ap_keepalive_min_idle_inactive_time_secs =
  898. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  899. .ap_keepalive_max_idle_inactive_time_secs =
  900. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  901. .ap_keepalive_max_unresponsive_time_secs =
  902. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  903. .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
  904. .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
  905. .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
  906. .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
  907. .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
  908. .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
  909. .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  910. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  911. WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  912. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  913. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  914. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  915. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  916. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  917. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  918. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  919. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  920. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  921. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  922. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  923. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  924. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  925. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  926. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  927. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  928. };
  929. static struct wmi_vdev_param_map wmi_10_4_vdev_param_map = {
  930. .rts_threshold = WMI_10_4_VDEV_PARAM_RTS_THRESHOLD,
  931. .fragmentation_threshold = WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  932. .beacon_interval = WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
  933. .listen_interval = WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
  934. .multicast_rate = WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
  935. .mgmt_tx_rate = WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
  936. .slot_time = WMI_10_4_VDEV_PARAM_SLOT_TIME,
  937. .preamble = WMI_10_4_VDEV_PARAM_PREAMBLE,
  938. .swba_time = WMI_10_4_VDEV_PARAM_SWBA_TIME,
  939. .wmi_vdev_stats_update_period = WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
  940. .wmi_vdev_pwrsave_ageout_time = WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
  941. .wmi_vdev_host_swba_interval = WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
  942. .dtim_period = WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
  943. .wmi_vdev_oc_scheduler_air_time_limit =
  944. WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  945. .wds = WMI_10_4_VDEV_PARAM_WDS,
  946. .atim_window = WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
  947. .bmiss_count_max = WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
  948. .bmiss_first_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
  949. .bmiss_final_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
  950. .feature_wmm = WMI_10_4_VDEV_PARAM_FEATURE_WMM,
  951. .chwidth = WMI_10_4_VDEV_PARAM_CHWIDTH,
  952. .chextoffset = WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
  953. .disable_htprotection = WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
  954. .sta_quickkickout = WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
  955. .mgmt_rate = WMI_10_4_VDEV_PARAM_MGMT_RATE,
  956. .protection_mode = WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
  957. .fixed_rate = WMI_10_4_VDEV_PARAM_FIXED_RATE,
  958. .sgi = WMI_10_4_VDEV_PARAM_SGI,
  959. .ldpc = WMI_10_4_VDEV_PARAM_LDPC,
  960. .tx_stbc = WMI_10_4_VDEV_PARAM_TX_STBC,
  961. .rx_stbc = WMI_10_4_VDEV_PARAM_RX_STBC,
  962. .intra_bss_fwd = WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
  963. .def_keyid = WMI_10_4_VDEV_PARAM_DEF_KEYID,
  964. .nss = WMI_10_4_VDEV_PARAM_NSS,
  965. .bcast_data_rate = WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
  966. .mcast_data_rate = WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
  967. .mcast_indicate = WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
  968. .dhcp_indicate = WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
  969. .unknown_dest_indicate = WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  970. .ap_keepalive_min_idle_inactive_time_secs =
  971. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  972. .ap_keepalive_max_idle_inactive_time_secs =
  973. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  974. .ap_keepalive_max_unresponsive_time_secs =
  975. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  976. .ap_enable_nawds = WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
  977. .mcast2ucast_set = WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
  978. .enable_rtscts = WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
  979. .txbf = WMI_10_4_VDEV_PARAM_TXBF,
  980. .packet_powersave = WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
  981. .drop_unencry = WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
  982. .tx_encap_type = WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
  983. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  984. WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  985. .rc_num_retries = WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
  986. .cabq_maxdur = WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
  987. .mfptest_set = WMI_10_4_VDEV_PARAM_MFPTEST_SET,
  988. .rts_fixed_rate = WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
  989. .vht_sgimask = WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
  990. .vht80_ratemask = WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
  991. .early_rx_adjust_enable = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
  992. .early_rx_tgt_bmiss_num = WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
  993. .early_rx_bmiss_sample_cycle =
  994. WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
  995. .early_rx_slop_step = WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
  996. .early_rx_init_slop = WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
  997. .early_rx_adjust_pause = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
  998. .proxy_sta = WMI_10_4_VDEV_PARAM_PROXY_STA,
  999. .meru_vc = WMI_10_4_VDEV_PARAM_MERU_VC,
  1000. .rx_decap_type = WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
  1001. .bw_nss_ratemask = WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
  1002. .inc_tsf = WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
  1003. .dec_tsf = WMI_10_4_VDEV_PARAM_TSF_DECREMENT,
  1004. };
  1005. static struct wmi_pdev_param_map wmi_pdev_param_map = {
  1006. .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
  1007. .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
  1008. .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
  1009. .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
  1010. .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
  1011. .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
  1012. .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
  1013. .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1014. .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
  1015. .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
  1016. .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1017. .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
  1018. .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
  1019. .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1020. .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
  1021. .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1022. .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1023. .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1024. .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1025. .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1026. .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1027. .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
  1028. .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1029. .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
  1030. .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
  1031. .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
  1032. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1033. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1034. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
  1035. .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1036. .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1037. .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1038. .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1039. .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
  1040. .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
  1041. .dcs = WMI_PDEV_PARAM_DCS,
  1042. .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
  1043. .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
  1044. .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1045. .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
  1046. .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
  1047. .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
  1048. .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
  1049. .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
  1050. .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
  1051. .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1052. .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
  1053. .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1054. .cal_period = WMI_PDEV_PARAM_UNSUPPORTED,
  1055. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1056. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1057. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1058. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1059. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1060. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1061. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1062. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1063. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1064. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1065. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1066. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1067. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1068. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1069. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1070. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1071. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1072. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1073. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1074. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1075. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1076. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1077. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1078. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1079. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1080. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1081. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1082. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1083. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1084. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1085. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1086. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1087. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1088. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1089. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1090. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1091. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1092. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1093. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1094. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1095. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1096. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1097. .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
  1098. };
  1099. static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
  1100. .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
  1101. .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
  1102. .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
  1103. .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
  1104. .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
  1105. .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
  1106. .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
  1107. .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1108. .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
  1109. .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
  1110. .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1111. .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
  1112. .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
  1113. .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1114. .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
  1115. .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1116. .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1117. .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1118. .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1119. .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1120. .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1121. .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
  1122. .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1123. .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
  1124. .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
  1125. .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
  1126. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
  1127. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
  1128. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
  1129. .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1130. .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1131. .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1132. .bcnflt_stats_update_period =
  1133. WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1134. .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
  1135. .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
  1136. .dcs = WMI_10X_PDEV_PARAM_DCS,
  1137. .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
  1138. .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
  1139. .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1140. .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
  1141. .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
  1142. .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
  1143. .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
  1144. .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
  1145. .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
  1146. .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
  1147. .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
  1148. .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
  1149. .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
  1150. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1151. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1152. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1153. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1154. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1155. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1156. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1157. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1158. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1159. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1160. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1161. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1162. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1163. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1164. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1165. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1166. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1167. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1168. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1169. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1170. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1171. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1172. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1173. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1174. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1175. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1176. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1177. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1178. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1179. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1180. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1181. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1182. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1183. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1184. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1185. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1186. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1187. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1188. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1189. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1190. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1191. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1192. .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
  1193. };
  1194. static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = {
  1195. .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
  1196. .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
  1197. .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
  1198. .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
  1199. .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
  1200. .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
  1201. .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
  1202. .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1203. .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
  1204. .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
  1205. .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1206. .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
  1207. .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
  1208. .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1209. .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
  1210. .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1211. .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1212. .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1213. .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1214. .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1215. .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1216. .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
  1217. .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1218. .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
  1219. .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
  1220. .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
  1221. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
  1222. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
  1223. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
  1224. .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1225. .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1226. .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1227. .bcnflt_stats_update_period =
  1228. WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1229. .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
  1230. .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
  1231. .dcs = WMI_10X_PDEV_PARAM_DCS,
  1232. .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
  1233. .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
  1234. .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1235. .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
  1236. .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
  1237. .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
  1238. .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
  1239. .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
  1240. .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
  1241. .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
  1242. .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
  1243. .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
  1244. .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
  1245. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1246. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1247. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1248. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1249. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1250. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1251. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1252. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1253. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1254. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1255. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1256. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1257. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1258. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1259. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1260. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1261. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1262. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1263. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1264. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1265. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1266. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1267. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1268. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1269. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1270. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1271. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1272. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1273. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1274. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1275. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1276. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1277. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1278. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1279. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1280. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1281. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1282. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1283. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1284. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1285. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1286. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1287. .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
  1288. };
  1289. /* firmware 10.2 specific mappings */
  1290. static struct wmi_cmd_map wmi_10_2_cmd_map = {
  1291. .init_cmdid = WMI_10_2_INIT_CMDID,
  1292. .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
  1293. .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
  1294. .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
  1295. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  1296. .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
  1297. .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
  1298. .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
  1299. .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
  1300. .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
  1301. .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
  1302. .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
  1303. .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
  1304. .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
  1305. .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  1306. .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
  1307. .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
  1308. .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
  1309. .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
  1310. .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
  1311. .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
  1312. .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
  1313. .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
  1314. .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
  1315. .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
  1316. .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
  1317. .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
  1318. .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
  1319. .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
  1320. .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
  1321. .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
  1322. .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
  1323. .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
  1324. .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
  1325. .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
  1326. .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
  1327. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  1328. .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
  1329. .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
  1330. .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
  1331. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  1332. .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
  1333. .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
  1334. .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
  1335. .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
  1336. .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
  1337. .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
  1338. .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
  1339. .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
  1340. .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
  1341. .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
  1342. .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
  1343. .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
  1344. .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
  1345. .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
  1346. .roam_scan_rssi_change_threshold =
  1347. WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  1348. .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
  1349. .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
  1350. .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
  1351. .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
  1352. .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
  1353. .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
  1354. .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
  1355. .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
  1356. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  1357. .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
  1358. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  1359. .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
  1360. .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
  1361. .wlan_profile_set_hist_intvl_cmdid =
  1362. WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  1363. .wlan_profile_get_profile_data_cmdid =
  1364. WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  1365. .wlan_profile_enable_profile_id_cmdid =
  1366. WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  1367. .wlan_profile_list_profile_id_cmdid =
  1368. WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  1369. .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
  1370. .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
  1371. .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
  1372. .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
  1373. .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
  1374. .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
  1375. .wow_enable_disable_wake_event_cmdid =
  1376. WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  1377. .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
  1378. .wow_hostwakeup_from_sleep_cmdid =
  1379. WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  1380. .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
  1381. .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
  1382. .vdev_spectral_scan_configure_cmdid =
  1383. WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  1384. .vdev_spectral_scan_enable_cmdid =
  1385. WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  1386. .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
  1387. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  1388. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  1389. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  1390. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  1391. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  1392. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  1393. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  1394. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  1395. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  1396. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  1397. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  1398. .echo_cmdid = WMI_10_2_ECHO_CMDID,
  1399. .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
  1400. .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
  1401. .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
  1402. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  1403. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1404. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1405. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  1406. .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
  1407. .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
  1408. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  1409. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  1410. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  1411. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  1412. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  1413. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1414. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1415. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1416. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  1417. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1418. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1419. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1420. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  1421. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  1422. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  1423. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  1424. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  1425. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  1426. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  1427. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  1428. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  1429. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  1430. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  1431. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  1432. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  1433. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  1434. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  1435. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  1436. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  1437. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  1438. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  1439. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  1440. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  1441. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1442. };
  1443. static struct wmi_pdev_param_map wmi_10_4_pdev_param_map = {
  1444. .tx_chain_mask = WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK,
  1445. .rx_chain_mask = WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
  1446. .txpower_limit2g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
  1447. .txpower_limit5g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
  1448. .txpower_scale = WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
  1449. .beacon_gen_mode = WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
  1450. .beacon_tx_mode = WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
  1451. .resmgr_offchan_mode = WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1452. .protection_mode = WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
  1453. .dynamic_bw = WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
  1454. .non_agg_sw_retry_th = WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1455. .agg_sw_retry_th = WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
  1456. .sta_kickout_th = WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
  1457. .ac_aggrsize_scaling = WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1458. .ltr_enable = WMI_10_4_PDEV_PARAM_LTR_ENABLE,
  1459. .ltr_ac_latency_be = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1460. .ltr_ac_latency_bk = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1461. .ltr_ac_latency_vi = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1462. .ltr_ac_latency_vo = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1463. .ltr_ac_latency_timeout = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1464. .ltr_sleep_override = WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1465. .ltr_rx_override = WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
  1466. .ltr_tx_activity_timeout = WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1467. .l1ss_enable = WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
  1468. .dsleep_enable = WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
  1469. .pcielp_txbuf_flush = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
  1470. .pcielp_txbuf_watermark = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
  1471. .pcielp_txbuf_tmo_en = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1472. .pcielp_txbuf_tmo_value = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
  1473. .pdev_stats_update_period =
  1474. WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1475. .vdev_stats_update_period =
  1476. WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1477. .peer_stats_update_period =
  1478. WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1479. .bcnflt_stats_update_period =
  1480. WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1481. .pmf_qos = WMI_10_4_PDEV_PARAM_PMF_QOS,
  1482. .arp_ac_override = WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
  1483. .dcs = WMI_10_4_PDEV_PARAM_DCS,
  1484. .ani_enable = WMI_10_4_PDEV_PARAM_ANI_ENABLE,
  1485. .ani_poll_period = WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
  1486. .ani_listen_period = WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1487. .ani_ofdm_level = WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
  1488. .ani_cck_level = WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
  1489. .dyntxchain = WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
  1490. .proxy_sta = WMI_10_4_PDEV_PARAM_PROXY_STA,
  1491. .idle_ps_config = WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
  1492. .power_gating_sleep = WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
  1493. .fast_channel_reset = WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
  1494. .burst_dur = WMI_10_4_PDEV_PARAM_BURST_DUR,
  1495. .burst_enable = WMI_10_4_PDEV_PARAM_BURST_ENABLE,
  1496. .cal_period = WMI_10_4_PDEV_PARAM_CAL_PERIOD,
  1497. .aggr_burst = WMI_10_4_PDEV_PARAM_AGGR_BURST,
  1498. .rx_decap_mode = WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
  1499. .smart_antenna_default_antenna =
  1500. WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
  1501. .igmpmld_override = WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
  1502. .igmpmld_tid = WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
  1503. .antenna_gain = WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
  1504. .rx_filter = WMI_10_4_PDEV_PARAM_RX_FILTER,
  1505. .set_mcast_to_ucast_tid = WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
  1506. .proxy_sta_mode = WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
  1507. .set_mcast2ucast_mode = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
  1508. .set_mcast2ucast_buffer = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
  1509. .remove_mcast2ucast_buffer =
  1510. WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
  1511. .peer_sta_ps_statechg_enable =
  1512. WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
  1513. .igmpmld_ac_override = WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
  1514. .block_interbss = WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
  1515. .set_disable_reset_cmdid = WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
  1516. .set_msdu_ttl_cmdid = WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
  1517. .set_ppdu_duration_cmdid = WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
  1518. .txbf_sound_period_cmdid = WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
  1519. .set_promisc_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
  1520. .set_burst_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
  1521. .en_stats = WMI_10_4_PDEV_PARAM_EN_STATS,
  1522. .mu_group_policy = WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
  1523. .noise_detection = WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
  1524. .noise_threshold = WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
  1525. .dpd_enable = WMI_10_4_PDEV_PARAM_DPD_ENABLE,
  1526. .set_mcast_bcast_echo = WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
  1527. .atf_strict_sch = WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
  1528. .atf_sched_duration = WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
  1529. .ant_plzn = WMI_10_4_PDEV_PARAM_ANT_PLZN,
  1530. .mgmt_retry_limit = WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
  1531. .sensitivity_level = WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
  1532. .signed_txpower_2g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
  1533. .signed_txpower_5g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
  1534. .enable_per_tid_amsdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
  1535. .enable_per_tid_ampdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
  1536. .cca_threshold = WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
  1537. .rts_fixed_rate = WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
  1538. .pdev_reset = WMI_10_4_PDEV_PARAM_PDEV_RESET,
  1539. .wapi_mbssid_offset = WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
  1540. .arp_srcaddr = WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
  1541. .arp_dstaddr = WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
  1542. .enable_btcoex = WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
  1543. };
  1544. static const struct wmi_peer_flags_map wmi_peer_flags_map = {
  1545. .auth = WMI_PEER_AUTH,
  1546. .qos = WMI_PEER_QOS,
  1547. .need_ptk_4_way = WMI_PEER_NEED_PTK_4_WAY,
  1548. .need_gtk_2_way = WMI_PEER_NEED_GTK_2_WAY,
  1549. .apsd = WMI_PEER_APSD,
  1550. .ht = WMI_PEER_HT,
  1551. .bw40 = WMI_PEER_40MHZ,
  1552. .stbc = WMI_PEER_STBC,
  1553. .ldbc = WMI_PEER_LDPC,
  1554. .dyn_mimops = WMI_PEER_DYN_MIMOPS,
  1555. .static_mimops = WMI_PEER_STATIC_MIMOPS,
  1556. .spatial_mux = WMI_PEER_SPATIAL_MUX,
  1557. .vht = WMI_PEER_VHT,
  1558. .bw80 = WMI_PEER_80MHZ,
  1559. .vht_2g = WMI_PEER_VHT_2G,
  1560. .pmf = WMI_PEER_PMF,
  1561. .bw160 = WMI_PEER_160MHZ,
  1562. };
  1563. static const struct wmi_peer_flags_map wmi_10x_peer_flags_map = {
  1564. .auth = WMI_10X_PEER_AUTH,
  1565. .qos = WMI_10X_PEER_QOS,
  1566. .need_ptk_4_way = WMI_10X_PEER_NEED_PTK_4_WAY,
  1567. .need_gtk_2_way = WMI_10X_PEER_NEED_GTK_2_WAY,
  1568. .apsd = WMI_10X_PEER_APSD,
  1569. .ht = WMI_10X_PEER_HT,
  1570. .bw40 = WMI_10X_PEER_40MHZ,
  1571. .stbc = WMI_10X_PEER_STBC,
  1572. .ldbc = WMI_10X_PEER_LDPC,
  1573. .dyn_mimops = WMI_10X_PEER_DYN_MIMOPS,
  1574. .static_mimops = WMI_10X_PEER_STATIC_MIMOPS,
  1575. .spatial_mux = WMI_10X_PEER_SPATIAL_MUX,
  1576. .vht = WMI_10X_PEER_VHT,
  1577. .bw80 = WMI_10X_PEER_80MHZ,
  1578. .bw160 = WMI_10X_PEER_160MHZ,
  1579. };
  1580. static const struct wmi_peer_flags_map wmi_10_2_peer_flags_map = {
  1581. .auth = WMI_10_2_PEER_AUTH,
  1582. .qos = WMI_10_2_PEER_QOS,
  1583. .need_ptk_4_way = WMI_10_2_PEER_NEED_PTK_4_WAY,
  1584. .need_gtk_2_way = WMI_10_2_PEER_NEED_GTK_2_WAY,
  1585. .apsd = WMI_10_2_PEER_APSD,
  1586. .ht = WMI_10_2_PEER_HT,
  1587. .bw40 = WMI_10_2_PEER_40MHZ,
  1588. .stbc = WMI_10_2_PEER_STBC,
  1589. .ldbc = WMI_10_2_PEER_LDPC,
  1590. .dyn_mimops = WMI_10_2_PEER_DYN_MIMOPS,
  1591. .static_mimops = WMI_10_2_PEER_STATIC_MIMOPS,
  1592. .spatial_mux = WMI_10_2_PEER_SPATIAL_MUX,
  1593. .vht = WMI_10_2_PEER_VHT,
  1594. .bw80 = WMI_10_2_PEER_80MHZ,
  1595. .vht_2g = WMI_10_2_PEER_VHT_2G,
  1596. .pmf = WMI_10_2_PEER_PMF,
  1597. .bw160 = WMI_10_2_PEER_160MHZ,
  1598. };
  1599. void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
  1600. const struct wmi_channel_arg *arg)
  1601. {
  1602. u32 flags = 0;
  1603. memset(ch, 0, sizeof(*ch));
  1604. if (arg->passive)
  1605. flags |= WMI_CHAN_FLAG_PASSIVE;
  1606. if (arg->allow_ibss)
  1607. flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
  1608. if (arg->allow_ht)
  1609. flags |= WMI_CHAN_FLAG_ALLOW_HT;
  1610. if (arg->allow_vht)
  1611. flags |= WMI_CHAN_FLAG_ALLOW_VHT;
  1612. if (arg->ht40plus)
  1613. flags |= WMI_CHAN_FLAG_HT40_PLUS;
  1614. if (arg->chan_radar)
  1615. flags |= WMI_CHAN_FLAG_DFS;
  1616. ch->mhz = __cpu_to_le32(arg->freq);
  1617. ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1);
  1618. if (arg->mode == MODE_11AC_VHT80_80)
  1619. ch->band_center_freq2 = __cpu_to_le32(arg->band_center_freq2);
  1620. else
  1621. ch->band_center_freq2 = 0;
  1622. ch->min_power = arg->min_power;
  1623. ch->max_power = arg->max_power;
  1624. ch->reg_power = arg->max_reg_power;
  1625. ch->antenna_max = arg->max_antenna_gain;
  1626. ch->max_tx_power = arg->max_power;
  1627. /* mode & flags share storage */
  1628. ch->mode = arg->mode;
  1629. ch->flags |= __cpu_to_le32(flags);
  1630. }
  1631. int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
  1632. {
  1633. unsigned long time_left;
  1634. time_left = wait_for_completion_timeout(&ar->wmi.service_ready,
  1635. WMI_SERVICE_READY_TIMEOUT_HZ);
  1636. if (!time_left)
  1637. return -ETIMEDOUT;
  1638. return 0;
  1639. }
  1640. int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
  1641. {
  1642. unsigned long time_left;
  1643. time_left = wait_for_completion_timeout(&ar->wmi.unified_ready,
  1644. WMI_UNIFIED_READY_TIMEOUT_HZ);
  1645. if (!time_left)
  1646. return -ETIMEDOUT;
  1647. return 0;
  1648. }
  1649. struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
  1650. {
  1651. struct sk_buff *skb;
  1652. u32 round_len = roundup(len, 4);
  1653. skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
  1654. if (!skb)
  1655. return NULL;
  1656. skb_reserve(skb, WMI_SKB_HEADROOM);
  1657. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  1658. ath10k_warn(ar, "Unaligned WMI skb\n");
  1659. skb_put(skb, round_len);
  1660. memset(skb->data, 0, round_len);
  1661. return skb;
  1662. }
  1663. static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
  1664. {
  1665. dev_kfree_skb(skb);
  1666. }
  1667. int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
  1668. u32 cmd_id)
  1669. {
  1670. struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
  1671. struct wmi_cmd_hdr *cmd_hdr;
  1672. int ret;
  1673. u32 cmd = 0;
  1674. if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  1675. return -ENOMEM;
  1676. cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
  1677. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  1678. cmd_hdr->cmd_id = __cpu_to_le32(cmd);
  1679. memset(skb_cb, 0, sizeof(*skb_cb));
  1680. ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
  1681. trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len, ret);
  1682. if (ret)
  1683. goto err_pull;
  1684. return 0;
  1685. err_pull:
  1686. skb_pull(skb, sizeof(struct wmi_cmd_hdr));
  1687. return ret;
  1688. }
  1689. static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
  1690. {
  1691. struct ath10k *ar = arvif->ar;
  1692. struct ath10k_skb_cb *cb;
  1693. struct sk_buff *bcn;
  1694. bool dtim_zero;
  1695. bool deliver_cab;
  1696. int ret;
  1697. spin_lock_bh(&ar->data_lock);
  1698. bcn = arvif->beacon;
  1699. if (!bcn)
  1700. goto unlock;
  1701. cb = ATH10K_SKB_CB(bcn);
  1702. switch (arvif->beacon_state) {
  1703. case ATH10K_BEACON_SENDING:
  1704. case ATH10K_BEACON_SENT:
  1705. break;
  1706. case ATH10K_BEACON_SCHEDULED:
  1707. arvif->beacon_state = ATH10K_BEACON_SENDING;
  1708. spin_unlock_bh(&ar->data_lock);
  1709. dtim_zero = !!(cb->flags & ATH10K_SKB_F_DTIM_ZERO);
  1710. deliver_cab = !!(cb->flags & ATH10K_SKB_F_DELIVER_CAB);
  1711. ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar,
  1712. arvif->vdev_id,
  1713. bcn->data, bcn->len,
  1714. cb->paddr,
  1715. dtim_zero,
  1716. deliver_cab);
  1717. spin_lock_bh(&ar->data_lock);
  1718. if (ret == 0)
  1719. arvif->beacon_state = ATH10K_BEACON_SENT;
  1720. else
  1721. arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
  1722. }
  1723. unlock:
  1724. spin_unlock_bh(&ar->data_lock);
  1725. }
  1726. static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
  1727. struct ieee80211_vif *vif)
  1728. {
  1729. struct ath10k_vif *arvif = (void *)vif->drv_priv;
  1730. ath10k_wmi_tx_beacon_nowait(arvif);
  1731. }
  1732. static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
  1733. {
  1734. ieee80211_iterate_active_interfaces_atomic(ar->hw,
  1735. IEEE80211_IFACE_ITER_NORMAL,
  1736. ath10k_wmi_tx_beacons_iter,
  1737. NULL);
  1738. }
  1739. static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
  1740. {
  1741. /* try to send pending beacons first. they take priority */
  1742. ath10k_wmi_tx_beacons_nowait(ar);
  1743. wake_up(&ar->wmi.tx_credits_wq);
  1744. }
  1745. int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
  1746. {
  1747. int ret = -EOPNOTSUPP;
  1748. might_sleep();
  1749. if (cmd_id == WMI_CMD_UNSUPPORTED) {
  1750. ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
  1751. cmd_id);
  1752. return ret;
  1753. }
  1754. wait_event_timeout(ar->wmi.tx_credits_wq, ({
  1755. /* try to send pending beacons first. they take priority */
  1756. ath10k_wmi_tx_beacons_nowait(ar);
  1757. ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
  1758. if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
  1759. ret = -ESHUTDOWN;
  1760. (ret != -EAGAIN);
  1761. }), 3 * HZ);
  1762. if (ret)
  1763. dev_kfree_skb_any(skb);
  1764. return ret;
  1765. }
  1766. static struct sk_buff *
  1767. ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu)
  1768. {
  1769. struct ath10k_skb_cb *cb = ATH10K_SKB_CB(msdu);
  1770. struct ath10k_vif *arvif;
  1771. struct wmi_mgmt_tx_cmd *cmd;
  1772. struct ieee80211_hdr *hdr;
  1773. struct sk_buff *skb;
  1774. int len;
  1775. u32 vdev_id;
  1776. u32 buf_len = msdu->len;
  1777. u16 fc;
  1778. hdr = (struct ieee80211_hdr *)msdu->data;
  1779. fc = le16_to_cpu(hdr->frame_control);
  1780. if (cb->vif) {
  1781. arvif = (void *)cb->vif->drv_priv;
  1782. vdev_id = arvif->vdev_id;
  1783. } else {
  1784. vdev_id = 0;
  1785. }
  1786. if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
  1787. return ERR_PTR(-EINVAL);
  1788. len = sizeof(cmd->hdr) + msdu->len;
  1789. if ((ieee80211_is_action(hdr->frame_control) ||
  1790. ieee80211_is_deauth(hdr->frame_control) ||
  1791. ieee80211_is_disassoc(hdr->frame_control)) &&
  1792. ieee80211_has_protected(hdr->frame_control)) {
  1793. len += IEEE80211_CCMP_MIC_LEN;
  1794. buf_len += IEEE80211_CCMP_MIC_LEN;
  1795. }
  1796. len = round_up(len, 4);
  1797. skb = ath10k_wmi_alloc_skb(ar, len);
  1798. if (!skb)
  1799. return ERR_PTR(-ENOMEM);
  1800. cmd = (struct wmi_mgmt_tx_cmd *)skb->data;
  1801. cmd->hdr.vdev_id = __cpu_to_le32(vdev_id);
  1802. cmd->hdr.tx_rate = 0;
  1803. cmd->hdr.tx_power = 0;
  1804. cmd->hdr.buf_len = __cpu_to_le32(buf_len);
  1805. ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
  1806. memcpy(cmd->buf, msdu->data, msdu->len);
  1807. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %pK len %d ftype %02x stype %02x\n",
  1808. msdu, skb->len, fc & IEEE80211_FCTL_FTYPE,
  1809. fc & IEEE80211_FCTL_STYPE);
  1810. trace_ath10k_tx_hdr(ar, skb->data, skb->len);
  1811. trace_ath10k_tx_payload(ar, skb->data, skb->len);
  1812. return skb;
  1813. }
  1814. static void ath10k_wmi_event_scan_started(struct ath10k *ar)
  1815. {
  1816. lockdep_assert_held(&ar->data_lock);
  1817. switch (ar->scan.state) {
  1818. case ATH10K_SCAN_IDLE:
  1819. case ATH10K_SCAN_RUNNING:
  1820. case ATH10K_SCAN_ABORTING:
  1821. ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
  1822. ath10k_scan_state_str(ar->scan.state),
  1823. ar->scan.state);
  1824. break;
  1825. case ATH10K_SCAN_STARTING:
  1826. ar->scan.state = ATH10K_SCAN_RUNNING;
  1827. if (ar->scan.is_roc)
  1828. ieee80211_ready_on_channel(ar->hw);
  1829. complete(&ar->scan.started);
  1830. break;
  1831. }
  1832. }
  1833. static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar)
  1834. {
  1835. lockdep_assert_held(&ar->data_lock);
  1836. switch (ar->scan.state) {
  1837. case ATH10K_SCAN_IDLE:
  1838. case ATH10K_SCAN_RUNNING:
  1839. case ATH10K_SCAN_ABORTING:
  1840. ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n",
  1841. ath10k_scan_state_str(ar->scan.state),
  1842. ar->scan.state);
  1843. break;
  1844. case ATH10K_SCAN_STARTING:
  1845. complete(&ar->scan.started);
  1846. __ath10k_scan_finish(ar);
  1847. break;
  1848. }
  1849. }
  1850. static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
  1851. {
  1852. lockdep_assert_held(&ar->data_lock);
  1853. switch (ar->scan.state) {
  1854. case ATH10K_SCAN_IDLE:
  1855. case ATH10K_SCAN_STARTING:
  1856. /* One suspected reason scan can be completed while starting is
  1857. * if firmware fails to deliver all scan events to the host,
  1858. * e.g. when transport pipe is full. This has been observed
  1859. * with spectral scan phyerr events starving wmi transport
  1860. * pipe. In such case the "scan completed" event should be (and
  1861. * is) ignored by the host as it may be just firmware's scan
  1862. * state machine recovering.
  1863. */
  1864. ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
  1865. ath10k_scan_state_str(ar->scan.state),
  1866. ar->scan.state);
  1867. break;
  1868. case ATH10K_SCAN_RUNNING:
  1869. case ATH10K_SCAN_ABORTING:
  1870. __ath10k_scan_finish(ar);
  1871. break;
  1872. }
  1873. }
  1874. static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
  1875. {
  1876. lockdep_assert_held(&ar->data_lock);
  1877. switch (ar->scan.state) {
  1878. case ATH10K_SCAN_IDLE:
  1879. case ATH10K_SCAN_STARTING:
  1880. ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
  1881. ath10k_scan_state_str(ar->scan.state),
  1882. ar->scan.state);
  1883. break;
  1884. case ATH10K_SCAN_RUNNING:
  1885. case ATH10K_SCAN_ABORTING:
  1886. ar->scan_channel = NULL;
  1887. break;
  1888. }
  1889. }
  1890. static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
  1891. {
  1892. lockdep_assert_held(&ar->data_lock);
  1893. switch (ar->scan.state) {
  1894. case ATH10K_SCAN_IDLE:
  1895. case ATH10K_SCAN_STARTING:
  1896. ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
  1897. ath10k_scan_state_str(ar->scan.state),
  1898. ar->scan.state);
  1899. break;
  1900. case ATH10K_SCAN_RUNNING:
  1901. case ATH10K_SCAN_ABORTING:
  1902. ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
  1903. if (ar->scan.is_roc && ar->scan.roc_freq == freq)
  1904. complete(&ar->scan.on_channel);
  1905. break;
  1906. }
  1907. }
  1908. static const char *
  1909. ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
  1910. enum wmi_scan_completion_reason reason)
  1911. {
  1912. switch (type) {
  1913. case WMI_SCAN_EVENT_STARTED:
  1914. return "started";
  1915. case WMI_SCAN_EVENT_COMPLETED:
  1916. switch (reason) {
  1917. case WMI_SCAN_REASON_COMPLETED:
  1918. return "completed";
  1919. case WMI_SCAN_REASON_CANCELLED:
  1920. return "completed [cancelled]";
  1921. case WMI_SCAN_REASON_PREEMPTED:
  1922. return "completed [preempted]";
  1923. case WMI_SCAN_REASON_TIMEDOUT:
  1924. return "completed [timedout]";
  1925. case WMI_SCAN_REASON_INTERNAL_FAILURE:
  1926. return "completed [internal err]";
  1927. case WMI_SCAN_REASON_MAX:
  1928. break;
  1929. }
  1930. return "completed [unknown]";
  1931. case WMI_SCAN_EVENT_BSS_CHANNEL:
  1932. return "bss channel";
  1933. case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
  1934. return "foreign channel";
  1935. case WMI_SCAN_EVENT_DEQUEUED:
  1936. return "dequeued";
  1937. case WMI_SCAN_EVENT_PREEMPTED:
  1938. return "preempted";
  1939. case WMI_SCAN_EVENT_START_FAILED:
  1940. return "start failed";
  1941. case WMI_SCAN_EVENT_RESTARTED:
  1942. return "restarted";
  1943. case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
  1944. return "foreign channel exit";
  1945. default:
  1946. return "unknown";
  1947. }
  1948. }
  1949. static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb,
  1950. struct wmi_scan_ev_arg *arg)
  1951. {
  1952. struct wmi_scan_event *ev = (void *)skb->data;
  1953. if (skb->len < sizeof(*ev))
  1954. return -EPROTO;
  1955. skb_pull(skb, sizeof(*ev));
  1956. arg->event_type = ev->event_type;
  1957. arg->reason = ev->reason;
  1958. arg->channel_freq = ev->channel_freq;
  1959. arg->scan_req_id = ev->scan_req_id;
  1960. arg->scan_id = ev->scan_id;
  1961. arg->vdev_id = ev->vdev_id;
  1962. return 0;
  1963. }
  1964. int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
  1965. {
  1966. struct wmi_scan_ev_arg arg = {};
  1967. enum wmi_scan_event_type event_type;
  1968. enum wmi_scan_completion_reason reason;
  1969. u32 freq;
  1970. u32 req_id;
  1971. u32 scan_id;
  1972. u32 vdev_id;
  1973. int ret;
  1974. ret = ath10k_wmi_pull_scan(ar, skb, &arg);
  1975. if (ret) {
  1976. ath10k_warn(ar, "failed to parse scan event: %d\n", ret);
  1977. return ret;
  1978. }
  1979. event_type = __le32_to_cpu(arg.event_type);
  1980. reason = __le32_to_cpu(arg.reason);
  1981. freq = __le32_to_cpu(arg.channel_freq);
  1982. req_id = __le32_to_cpu(arg.scan_req_id);
  1983. scan_id = __le32_to_cpu(arg.scan_id);
  1984. vdev_id = __le32_to_cpu(arg.vdev_id);
  1985. spin_lock_bh(&ar->data_lock);
  1986. ath10k_dbg(ar, ATH10K_DBG_WMI,
  1987. "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
  1988. ath10k_wmi_event_scan_type_str(event_type, reason),
  1989. event_type, reason, freq, req_id, scan_id, vdev_id,
  1990. ath10k_scan_state_str(ar->scan.state), ar->scan.state);
  1991. switch (event_type) {
  1992. case WMI_SCAN_EVENT_STARTED:
  1993. ath10k_wmi_event_scan_started(ar);
  1994. break;
  1995. case WMI_SCAN_EVENT_COMPLETED:
  1996. ath10k_wmi_event_scan_completed(ar);
  1997. break;
  1998. case WMI_SCAN_EVENT_BSS_CHANNEL:
  1999. ath10k_wmi_event_scan_bss_chan(ar);
  2000. break;
  2001. case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
  2002. ath10k_wmi_event_scan_foreign_chan(ar, freq);
  2003. break;
  2004. case WMI_SCAN_EVENT_START_FAILED:
  2005. ath10k_warn(ar, "received scan start failure event\n");
  2006. ath10k_wmi_event_scan_start_failed(ar);
  2007. break;
  2008. case WMI_SCAN_EVENT_DEQUEUED:
  2009. case WMI_SCAN_EVENT_PREEMPTED:
  2010. case WMI_SCAN_EVENT_RESTARTED:
  2011. case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
  2012. default:
  2013. break;
  2014. }
  2015. spin_unlock_bh(&ar->data_lock);
  2016. return 0;
  2017. }
  2018. /* If keys are configured, HW decrypts all frames
  2019. * with protected bit set. Mark such frames as decrypted.
  2020. */
  2021. static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar,
  2022. struct sk_buff *skb,
  2023. struct ieee80211_rx_status *status)
  2024. {
  2025. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2026. unsigned int hdrlen;
  2027. bool peer_key;
  2028. u8 *addr, keyidx;
  2029. if (!ieee80211_is_auth(hdr->frame_control) ||
  2030. !ieee80211_has_protected(hdr->frame_control))
  2031. return;
  2032. hdrlen = ieee80211_hdrlen(hdr->frame_control);
  2033. if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN))
  2034. return;
  2035. keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT;
  2036. addr = ieee80211_get_SA(hdr);
  2037. spin_lock_bh(&ar->data_lock);
  2038. peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx);
  2039. spin_unlock_bh(&ar->data_lock);
  2040. if (peer_key) {
  2041. ath10k_dbg(ar, ATH10K_DBG_MAC,
  2042. "mac wep key present for peer %pM\n", addr);
  2043. status->flag |= RX_FLAG_DECRYPTED;
  2044. }
  2045. }
  2046. static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb,
  2047. struct wmi_mgmt_rx_ev_arg *arg)
  2048. {
  2049. struct wmi_mgmt_rx_event_v1 *ev_v1;
  2050. struct wmi_mgmt_rx_event_v2 *ev_v2;
  2051. struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
  2052. struct wmi_mgmt_rx_ext_info *ext_info;
  2053. size_t pull_len;
  2054. u32 msdu_len;
  2055. u32 len;
  2056. if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX,
  2057. ar->running_fw->fw_file.fw_features)) {
  2058. ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
  2059. ev_hdr = &ev_v2->hdr.v1;
  2060. pull_len = sizeof(*ev_v2);
  2061. } else {
  2062. ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
  2063. ev_hdr = &ev_v1->hdr;
  2064. pull_len = sizeof(*ev_v1);
  2065. }
  2066. if (skb->len < pull_len)
  2067. return -EPROTO;
  2068. skb_pull(skb, pull_len);
  2069. arg->channel = ev_hdr->channel;
  2070. arg->buf_len = ev_hdr->buf_len;
  2071. arg->status = ev_hdr->status;
  2072. arg->snr = ev_hdr->snr;
  2073. arg->phy_mode = ev_hdr->phy_mode;
  2074. arg->rate = ev_hdr->rate;
  2075. msdu_len = __le32_to_cpu(arg->buf_len);
  2076. if (skb->len < msdu_len)
  2077. return -EPROTO;
  2078. if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
  2079. len = ALIGN(le32_to_cpu(arg->buf_len), 4);
  2080. ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
  2081. memcpy(&arg->ext_info, ext_info,
  2082. sizeof(struct wmi_mgmt_rx_ext_info));
  2083. }
  2084. /* the WMI buffer might've ended up being padded to 4 bytes due to HTC
  2085. * trailer with credit update. Trim the excess garbage.
  2086. */
  2087. skb_trim(skb, msdu_len);
  2088. return 0;
  2089. }
  2090. static int ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k *ar,
  2091. struct sk_buff *skb,
  2092. struct wmi_mgmt_rx_ev_arg *arg)
  2093. {
  2094. struct wmi_10_4_mgmt_rx_event *ev;
  2095. struct wmi_10_4_mgmt_rx_hdr *ev_hdr;
  2096. size_t pull_len;
  2097. u32 msdu_len;
  2098. struct wmi_mgmt_rx_ext_info *ext_info;
  2099. u32 len;
  2100. ev = (struct wmi_10_4_mgmt_rx_event *)skb->data;
  2101. ev_hdr = &ev->hdr;
  2102. pull_len = sizeof(*ev);
  2103. if (skb->len < pull_len)
  2104. return -EPROTO;
  2105. skb_pull(skb, pull_len);
  2106. arg->channel = ev_hdr->channel;
  2107. arg->buf_len = ev_hdr->buf_len;
  2108. arg->status = ev_hdr->status;
  2109. arg->snr = ev_hdr->snr;
  2110. arg->phy_mode = ev_hdr->phy_mode;
  2111. arg->rate = ev_hdr->rate;
  2112. msdu_len = __le32_to_cpu(arg->buf_len);
  2113. if (skb->len < msdu_len)
  2114. return -EPROTO;
  2115. if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
  2116. len = ALIGN(le32_to_cpu(arg->buf_len), 4);
  2117. ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
  2118. memcpy(&arg->ext_info, ext_info,
  2119. sizeof(struct wmi_mgmt_rx_ext_info));
  2120. }
  2121. /* Make sure bytes added for padding are removed. */
  2122. skb_trim(skb, msdu_len);
  2123. return 0;
  2124. }
  2125. static bool ath10k_wmi_rx_is_decrypted(struct ath10k *ar,
  2126. struct ieee80211_hdr *hdr)
  2127. {
  2128. if (!ieee80211_has_protected(hdr->frame_control))
  2129. return false;
  2130. /* FW delivers WEP Shared Auth frame with Protected Bit set and
  2131. * encrypted payload. However in case of PMF it delivers decrypted
  2132. * frames with Protected Bit set.
  2133. */
  2134. if (ieee80211_is_auth(hdr->frame_control))
  2135. return false;
  2136. /* qca99x0 based FW delivers broadcast or multicast management frames
  2137. * (ex: group privacy action frames in mesh) as encrypted payload.
  2138. */
  2139. if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) &&
  2140. ar->hw_params.sw_decrypt_mcast_mgmt)
  2141. return false;
  2142. return true;
  2143. }
  2144. int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
  2145. {
  2146. struct wmi_mgmt_rx_ev_arg arg = {};
  2147. struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
  2148. struct ieee80211_hdr *hdr;
  2149. struct ieee80211_supported_band *sband;
  2150. u32 rx_status;
  2151. u32 channel;
  2152. u32 phy_mode;
  2153. u32 snr;
  2154. u32 rate;
  2155. u32 buf_len;
  2156. u16 fc;
  2157. int ret;
  2158. ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg);
  2159. if (ret) {
  2160. ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret);
  2161. dev_kfree_skb(skb);
  2162. return ret;
  2163. }
  2164. channel = __le32_to_cpu(arg.channel);
  2165. buf_len = __le32_to_cpu(arg.buf_len);
  2166. rx_status = __le32_to_cpu(arg.status);
  2167. snr = __le32_to_cpu(arg.snr);
  2168. phy_mode = __le32_to_cpu(arg.phy_mode);
  2169. rate = __le32_to_cpu(arg.rate);
  2170. memset(status, 0, sizeof(*status));
  2171. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2172. "event mgmt rx status %08x\n", rx_status);
  2173. if ((test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) ||
  2174. (rx_status & (WMI_RX_STATUS_ERR_DECRYPT |
  2175. WMI_RX_STATUS_ERR_KEY_CACHE_MISS | WMI_RX_STATUS_ERR_CRC))) {
  2176. dev_kfree_skb(skb);
  2177. return 0;
  2178. }
  2179. if (rx_status & WMI_RX_STATUS_ERR_MIC)
  2180. status->flag |= RX_FLAG_MMIC_ERROR;
  2181. if (rx_status & WMI_RX_STATUS_EXT_INFO) {
  2182. status->mactime =
  2183. __le64_to_cpu(arg.ext_info.rx_mac_timestamp);
  2184. status->flag |= RX_FLAG_MACTIME_END;
  2185. }
  2186. /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to
  2187. * MODE_11B. This means phy_mode is not a reliable source for the band
  2188. * of mgmt rx.
  2189. */
  2190. if (channel >= 1 && channel <= 14) {
  2191. status->band = NL80211_BAND_2GHZ;
  2192. } else if (channel >= 36 && channel <= 169) {
  2193. status->band = NL80211_BAND_5GHZ;
  2194. } else {
  2195. /* Shouldn't happen unless list of advertised channels to
  2196. * mac80211 has been changed.
  2197. */
  2198. WARN_ON_ONCE(1);
  2199. dev_kfree_skb(skb);
  2200. return 0;
  2201. }
  2202. if (phy_mode == MODE_11B && status->band == NL80211_BAND_5GHZ)
  2203. ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
  2204. sband = &ar->mac.sbands[status->band];
  2205. status->freq = ieee80211_channel_to_frequency(channel, status->band);
  2206. status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
  2207. status->rate_idx = ath10k_mac_bitrate_to_idx(sband, rate / 100);
  2208. hdr = (struct ieee80211_hdr *)skb->data;
  2209. fc = le16_to_cpu(hdr->frame_control);
  2210. /* Firmware is guaranteed to report all essential management frames via
  2211. * WMI while it can deliver some extra via HTT. Since there can be
  2212. * duplicates split the reporting wrt monitor/sniffing.
  2213. */
  2214. status->flag |= RX_FLAG_SKIP_MONITOR;
  2215. ath10k_wmi_handle_wep_reauth(ar, skb, status);
  2216. if (ath10k_wmi_rx_is_decrypted(ar, hdr)) {
  2217. status->flag |= RX_FLAG_DECRYPTED;
  2218. if (!ieee80211_is_action(hdr->frame_control) &&
  2219. !ieee80211_is_deauth(hdr->frame_control) &&
  2220. !ieee80211_is_disassoc(hdr->frame_control)) {
  2221. status->flag |= RX_FLAG_IV_STRIPPED |
  2222. RX_FLAG_MMIC_STRIPPED;
  2223. hdr->frame_control = __cpu_to_le16(fc &
  2224. ~IEEE80211_FCTL_PROTECTED);
  2225. }
  2226. }
  2227. if (ieee80211_is_beacon(hdr->frame_control))
  2228. ath10k_mac_handle_beacon(ar, skb);
  2229. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2230. "event mgmt rx skb %pK len %d ftype %02x stype %02x\n",
  2231. skb, skb->len,
  2232. fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
  2233. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2234. "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
  2235. status->freq, status->band, status->signal,
  2236. status->rate_idx);
  2237. ieee80211_rx(ar->hw, skb);
  2238. return 0;
  2239. }
  2240. static int freq_to_idx(struct ath10k *ar, int freq)
  2241. {
  2242. struct ieee80211_supported_band *sband;
  2243. int band, ch, idx = 0;
  2244. for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
  2245. sband = ar->hw->wiphy->bands[band];
  2246. if (!sband)
  2247. continue;
  2248. for (ch = 0; ch < sband->n_channels; ch++, idx++)
  2249. if (sband->channels[ch].center_freq == freq)
  2250. goto exit;
  2251. }
  2252. exit:
  2253. return idx;
  2254. }
  2255. static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb,
  2256. struct wmi_ch_info_ev_arg *arg)
  2257. {
  2258. struct wmi_chan_info_event *ev = (void *)skb->data;
  2259. if (skb->len < sizeof(*ev))
  2260. return -EPROTO;
  2261. skb_pull(skb, sizeof(*ev));
  2262. arg->err_code = ev->err_code;
  2263. arg->freq = ev->freq;
  2264. arg->cmd_flags = ev->cmd_flags;
  2265. arg->noise_floor = ev->noise_floor;
  2266. arg->rx_clear_count = ev->rx_clear_count;
  2267. arg->cycle_count = ev->cycle_count;
  2268. return 0;
  2269. }
  2270. static int ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k *ar,
  2271. struct sk_buff *skb,
  2272. struct wmi_ch_info_ev_arg *arg)
  2273. {
  2274. struct wmi_10_4_chan_info_event *ev = (void *)skb->data;
  2275. if (skb->len < sizeof(*ev))
  2276. return -EPROTO;
  2277. skb_pull(skb, sizeof(*ev));
  2278. arg->err_code = ev->err_code;
  2279. arg->freq = ev->freq;
  2280. arg->cmd_flags = ev->cmd_flags;
  2281. arg->noise_floor = ev->noise_floor;
  2282. arg->rx_clear_count = ev->rx_clear_count;
  2283. arg->cycle_count = ev->cycle_count;
  2284. arg->chan_tx_pwr_range = ev->chan_tx_pwr_range;
  2285. arg->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
  2286. arg->rx_frame_count = ev->rx_frame_count;
  2287. return 0;
  2288. }
  2289. void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
  2290. {
  2291. struct wmi_ch_info_ev_arg arg = {};
  2292. struct survey_info *survey;
  2293. u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
  2294. int idx, ret;
  2295. ret = ath10k_wmi_pull_ch_info(ar, skb, &arg);
  2296. if (ret) {
  2297. ath10k_warn(ar, "failed to parse chan info event: %d\n", ret);
  2298. return;
  2299. }
  2300. err_code = __le32_to_cpu(arg.err_code);
  2301. freq = __le32_to_cpu(arg.freq);
  2302. cmd_flags = __le32_to_cpu(arg.cmd_flags);
  2303. noise_floor = __le32_to_cpu(arg.noise_floor);
  2304. rx_clear_count = __le32_to_cpu(arg.rx_clear_count);
  2305. cycle_count = __le32_to_cpu(arg.cycle_count);
  2306. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2307. "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
  2308. err_code, freq, cmd_flags, noise_floor, rx_clear_count,
  2309. cycle_count);
  2310. spin_lock_bh(&ar->data_lock);
  2311. switch (ar->scan.state) {
  2312. case ATH10K_SCAN_IDLE:
  2313. case ATH10K_SCAN_STARTING:
  2314. ath10k_warn(ar, "received chan info event without a scan request, ignoring\n");
  2315. goto exit;
  2316. case ATH10K_SCAN_RUNNING:
  2317. case ATH10K_SCAN_ABORTING:
  2318. break;
  2319. }
  2320. idx = freq_to_idx(ar, freq);
  2321. if (idx >= ARRAY_SIZE(ar->survey)) {
  2322. ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
  2323. freq, idx);
  2324. goto exit;
  2325. }
  2326. if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
  2327. if (ar->ch_info_can_report_survey) {
  2328. survey = &ar->survey[idx];
  2329. survey->noise = noise_floor;
  2330. survey->filled = SURVEY_INFO_NOISE_DBM;
  2331. ath10k_hw_fill_survey_time(ar,
  2332. survey,
  2333. cycle_count,
  2334. rx_clear_count,
  2335. ar->survey_last_cycle_count,
  2336. ar->survey_last_rx_clear_count);
  2337. }
  2338. ar->ch_info_can_report_survey = false;
  2339. } else {
  2340. ar->ch_info_can_report_survey = true;
  2341. }
  2342. if (!(cmd_flags & WMI_CHAN_INFO_FLAG_PRE_COMPLETE)) {
  2343. ar->survey_last_rx_clear_count = rx_clear_count;
  2344. ar->survey_last_cycle_count = cycle_count;
  2345. }
  2346. exit:
  2347. spin_unlock_bh(&ar->data_lock);
  2348. }
  2349. void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
  2350. {
  2351. struct wmi_echo_ev_arg arg = {};
  2352. int ret;
  2353. ret = ath10k_wmi_pull_echo_ev(ar, skb, &arg);
  2354. if (ret) {
  2355. ath10k_warn(ar, "failed to parse echo: %d\n", ret);
  2356. return;
  2357. }
  2358. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2359. "wmi event echo value 0x%08x\n",
  2360. le32_to_cpu(arg.value));
  2361. if (le32_to_cpu(arg.value) == ATH10K_WMI_BARRIER_ECHO_ID)
  2362. complete(&ar->wmi.barrier);
  2363. }
  2364. int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
  2365. {
  2366. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
  2367. skb->len);
  2368. trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
  2369. return 0;
  2370. }
  2371. void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
  2372. struct ath10k_fw_stats_pdev *dst)
  2373. {
  2374. dst->ch_noise_floor = __le32_to_cpu(src->chan_nf);
  2375. dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
  2376. dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
  2377. dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
  2378. dst->cycle_count = __le32_to_cpu(src->cycle_count);
  2379. dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
  2380. dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
  2381. }
  2382. void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
  2383. struct ath10k_fw_stats_pdev *dst)
  2384. {
  2385. dst->comp_queued = __le32_to_cpu(src->comp_queued);
  2386. dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
  2387. dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
  2388. dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
  2389. dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
  2390. dst->local_enqued = __le32_to_cpu(src->local_enqued);
  2391. dst->local_freed = __le32_to_cpu(src->local_freed);
  2392. dst->hw_queued = __le32_to_cpu(src->hw_queued);
  2393. dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
  2394. dst->underrun = __le32_to_cpu(src->underrun);
  2395. dst->tx_abort = __le32_to_cpu(src->tx_abort);
  2396. dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
  2397. dst->tx_ko = __le32_to_cpu(src->tx_ko);
  2398. dst->data_rc = __le32_to_cpu(src->data_rc);
  2399. dst->self_triggers = __le32_to_cpu(src->self_triggers);
  2400. dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
  2401. dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
  2402. dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
  2403. dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
  2404. dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
  2405. dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
  2406. dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
  2407. }
  2408. static void
  2409. ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx *src,
  2410. struct ath10k_fw_stats_pdev *dst)
  2411. {
  2412. dst->comp_queued = __le32_to_cpu(src->comp_queued);
  2413. dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
  2414. dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
  2415. dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
  2416. dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
  2417. dst->local_enqued = __le32_to_cpu(src->local_enqued);
  2418. dst->local_freed = __le32_to_cpu(src->local_freed);
  2419. dst->hw_queued = __le32_to_cpu(src->hw_queued);
  2420. dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
  2421. dst->underrun = __le32_to_cpu(src->underrun);
  2422. dst->tx_abort = __le32_to_cpu(src->tx_abort);
  2423. dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
  2424. dst->tx_ko = __le32_to_cpu(src->tx_ko);
  2425. dst->data_rc = __le32_to_cpu(src->data_rc);
  2426. dst->self_triggers = __le32_to_cpu(src->self_triggers);
  2427. dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
  2428. dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
  2429. dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
  2430. dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
  2431. dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
  2432. dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
  2433. dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
  2434. dst->hw_paused = __le32_to_cpu(src->hw_paused);
  2435. dst->seq_posted = __le32_to_cpu(src->seq_posted);
  2436. dst->seq_failed_queueing =
  2437. __le32_to_cpu(src->seq_failed_queueing);
  2438. dst->seq_completed = __le32_to_cpu(src->seq_completed);
  2439. dst->seq_restarted = __le32_to_cpu(src->seq_restarted);
  2440. dst->mu_seq_posted = __le32_to_cpu(src->mu_seq_posted);
  2441. dst->mpdus_sw_flush = __le32_to_cpu(src->mpdus_sw_flush);
  2442. dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
  2443. dst->mpdus_truncated = __le32_to_cpu(src->mpdus_truncated);
  2444. dst->mpdus_ack_failed = __le32_to_cpu(src->mpdus_ack_failed);
  2445. dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
  2446. dst->mpdus_expired = __le32_to_cpu(src->mpdus_expired);
  2447. }
  2448. void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
  2449. struct ath10k_fw_stats_pdev *dst)
  2450. {
  2451. dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change);
  2452. dst->status_rcvd = __le32_to_cpu(src->status_rcvd);
  2453. dst->r0_frags = __le32_to_cpu(src->r0_frags);
  2454. dst->r1_frags = __le32_to_cpu(src->r1_frags);
  2455. dst->r2_frags = __le32_to_cpu(src->r2_frags);
  2456. dst->r3_frags = __le32_to_cpu(src->r3_frags);
  2457. dst->htt_msdus = __le32_to_cpu(src->htt_msdus);
  2458. dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus);
  2459. dst->loc_msdus = __le32_to_cpu(src->loc_msdus);
  2460. dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus);
  2461. dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu);
  2462. dst->phy_errs = __le32_to_cpu(src->phy_errs);
  2463. dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop);
  2464. dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs);
  2465. }
  2466. void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
  2467. struct ath10k_fw_stats_pdev *dst)
  2468. {
  2469. dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad);
  2470. dst->rts_bad = __le32_to_cpu(src->rts_bad);
  2471. dst->rts_good = __le32_to_cpu(src->rts_good);
  2472. dst->fcs_bad = __le32_to_cpu(src->fcs_bad);
  2473. dst->no_beacons = __le32_to_cpu(src->no_beacons);
  2474. dst->mib_int_count = __le32_to_cpu(src->mib_int_count);
  2475. }
  2476. void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
  2477. struct ath10k_fw_stats_peer *dst)
  2478. {
  2479. ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
  2480. dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
  2481. dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
  2482. }
  2483. static void
  2484. ath10k_wmi_10_4_pull_peer_stats(const struct wmi_10_4_peer_stats *src,
  2485. struct ath10k_fw_stats_peer *dst)
  2486. {
  2487. ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
  2488. dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
  2489. dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
  2490. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2491. }
  2492. static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar,
  2493. struct sk_buff *skb,
  2494. struct ath10k_fw_stats *stats)
  2495. {
  2496. const struct wmi_stats_event *ev = (void *)skb->data;
  2497. u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
  2498. int i;
  2499. if (!skb_pull(skb, sizeof(*ev)))
  2500. return -EPROTO;
  2501. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2502. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2503. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2504. for (i = 0; i < num_pdev_stats; i++) {
  2505. const struct wmi_pdev_stats *src;
  2506. struct ath10k_fw_stats_pdev *dst;
  2507. src = (void *)skb->data;
  2508. if (!skb_pull(skb, sizeof(*src)))
  2509. return -EPROTO;
  2510. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2511. if (!dst)
  2512. continue;
  2513. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2514. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2515. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2516. list_add_tail(&dst->list, &stats->pdevs);
  2517. }
  2518. /* fw doesn't implement vdev stats */
  2519. for (i = 0; i < num_peer_stats; i++) {
  2520. const struct wmi_peer_stats *src;
  2521. struct ath10k_fw_stats_peer *dst;
  2522. src = (void *)skb->data;
  2523. if (!skb_pull(skb, sizeof(*src)))
  2524. return -EPROTO;
  2525. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2526. if (!dst)
  2527. continue;
  2528. ath10k_wmi_pull_peer_stats(src, dst);
  2529. list_add_tail(&dst->list, &stats->peers);
  2530. }
  2531. return 0;
  2532. }
  2533. static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar,
  2534. struct sk_buff *skb,
  2535. struct ath10k_fw_stats *stats)
  2536. {
  2537. const struct wmi_stats_event *ev = (void *)skb->data;
  2538. u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
  2539. int i;
  2540. if (!skb_pull(skb, sizeof(*ev)))
  2541. return -EPROTO;
  2542. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2543. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2544. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2545. for (i = 0; i < num_pdev_stats; i++) {
  2546. const struct wmi_10x_pdev_stats *src;
  2547. struct ath10k_fw_stats_pdev *dst;
  2548. src = (void *)skb->data;
  2549. if (!skb_pull(skb, sizeof(*src)))
  2550. return -EPROTO;
  2551. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2552. if (!dst)
  2553. continue;
  2554. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2555. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2556. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2557. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2558. list_add_tail(&dst->list, &stats->pdevs);
  2559. }
  2560. /* fw doesn't implement vdev stats */
  2561. for (i = 0; i < num_peer_stats; i++) {
  2562. const struct wmi_10x_peer_stats *src;
  2563. struct ath10k_fw_stats_peer *dst;
  2564. src = (void *)skb->data;
  2565. if (!skb_pull(skb, sizeof(*src)))
  2566. return -EPROTO;
  2567. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2568. if (!dst)
  2569. continue;
  2570. ath10k_wmi_pull_peer_stats(&src->old, dst);
  2571. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2572. list_add_tail(&dst->list, &stats->peers);
  2573. }
  2574. return 0;
  2575. }
  2576. static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar,
  2577. struct sk_buff *skb,
  2578. struct ath10k_fw_stats *stats)
  2579. {
  2580. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2581. u32 num_pdev_stats;
  2582. u32 num_pdev_ext_stats;
  2583. u32 num_vdev_stats;
  2584. u32 num_peer_stats;
  2585. int i;
  2586. if (!skb_pull(skb, sizeof(*ev)))
  2587. return -EPROTO;
  2588. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2589. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2590. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2591. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2592. for (i = 0; i < num_pdev_stats; i++) {
  2593. const struct wmi_10_2_pdev_stats *src;
  2594. struct ath10k_fw_stats_pdev *dst;
  2595. src = (void *)skb->data;
  2596. if (!skb_pull(skb, sizeof(*src)))
  2597. return -EPROTO;
  2598. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2599. if (!dst)
  2600. continue;
  2601. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2602. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2603. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2604. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2605. /* FIXME: expose 10.2 specific values */
  2606. list_add_tail(&dst->list, &stats->pdevs);
  2607. }
  2608. for (i = 0; i < num_pdev_ext_stats; i++) {
  2609. const struct wmi_10_2_pdev_ext_stats *src;
  2610. src = (void *)skb->data;
  2611. if (!skb_pull(skb, sizeof(*src)))
  2612. return -EPROTO;
  2613. /* FIXME: expose values to userspace
  2614. *
  2615. * Note: Even though this loop seems to do nothing it is
  2616. * required to parse following sub-structures properly.
  2617. */
  2618. }
  2619. /* fw doesn't implement vdev stats */
  2620. for (i = 0; i < num_peer_stats; i++) {
  2621. const struct wmi_10_2_peer_stats *src;
  2622. struct ath10k_fw_stats_peer *dst;
  2623. src = (void *)skb->data;
  2624. if (!skb_pull(skb, sizeof(*src)))
  2625. return -EPROTO;
  2626. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2627. if (!dst)
  2628. continue;
  2629. ath10k_wmi_pull_peer_stats(&src->old, dst);
  2630. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2631. /* FIXME: expose 10.2 specific values */
  2632. list_add_tail(&dst->list, &stats->peers);
  2633. }
  2634. return 0;
  2635. }
  2636. static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar,
  2637. struct sk_buff *skb,
  2638. struct ath10k_fw_stats *stats)
  2639. {
  2640. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2641. u32 num_pdev_stats;
  2642. u32 num_pdev_ext_stats;
  2643. u32 num_vdev_stats;
  2644. u32 num_peer_stats;
  2645. int i;
  2646. if (!skb_pull(skb, sizeof(*ev)))
  2647. return -EPROTO;
  2648. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2649. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2650. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2651. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2652. for (i = 0; i < num_pdev_stats; i++) {
  2653. const struct wmi_10_2_pdev_stats *src;
  2654. struct ath10k_fw_stats_pdev *dst;
  2655. src = (void *)skb->data;
  2656. if (!skb_pull(skb, sizeof(*src)))
  2657. return -EPROTO;
  2658. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2659. if (!dst)
  2660. continue;
  2661. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2662. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2663. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2664. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2665. /* FIXME: expose 10.2 specific values */
  2666. list_add_tail(&dst->list, &stats->pdevs);
  2667. }
  2668. for (i = 0; i < num_pdev_ext_stats; i++) {
  2669. const struct wmi_10_2_pdev_ext_stats *src;
  2670. src = (void *)skb->data;
  2671. if (!skb_pull(skb, sizeof(*src)))
  2672. return -EPROTO;
  2673. /* FIXME: expose values to userspace
  2674. *
  2675. * Note: Even though this loop seems to do nothing it is
  2676. * required to parse following sub-structures properly.
  2677. */
  2678. }
  2679. /* fw doesn't implement vdev stats */
  2680. for (i = 0; i < num_peer_stats; i++) {
  2681. const struct wmi_10_2_4_ext_peer_stats *src;
  2682. struct ath10k_fw_stats_peer *dst;
  2683. int stats_len;
  2684. if (test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
  2685. stats_len = sizeof(struct wmi_10_2_4_ext_peer_stats);
  2686. else
  2687. stats_len = sizeof(struct wmi_10_2_4_peer_stats);
  2688. src = (void *)skb->data;
  2689. if (!skb_pull(skb, stats_len))
  2690. return -EPROTO;
  2691. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2692. if (!dst)
  2693. continue;
  2694. ath10k_wmi_pull_peer_stats(&src->common.old, dst);
  2695. dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate);
  2696. if (ath10k_peer_stats_enabled(ar))
  2697. dst->rx_duration = __le32_to_cpu(src->rx_duration);
  2698. /* FIXME: expose 10.2 specific values */
  2699. list_add_tail(&dst->list, &stats->peers);
  2700. }
  2701. return 0;
  2702. }
  2703. static int ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k *ar,
  2704. struct sk_buff *skb,
  2705. struct ath10k_fw_stats *stats)
  2706. {
  2707. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2708. u32 num_pdev_stats;
  2709. u32 num_pdev_ext_stats;
  2710. u32 num_vdev_stats;
  2711. u32 num_peer_stats;
  2712. u32 num_bcnflt_stats;
  2713. u32 stats_id;
  2714. int i;
  2715. if (!skb_pull(skb, sizeof(*ev)))
  2716. return -EPROTO;
  2717. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2718. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2719. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2720. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2721. num_bcnflt_stats = __le32_to_cpu(ev->num_bcnflt_stats);
  2722. stats_id = __le32_to_cpu(ev->stats_id);
  2723. for (i = 0; i < num_pdev_stats; i++) {
  2724. const struct wmi_10_4_pdev_stats *src;
  2725. struct ath10k_fw_stats_pdev *dst;
  2726. src = (void *)skb->data;
  2727. if (!skb_pull(skb, sizeof(*src)))
  2728. return -EPROTO;
  2729. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2730. if (!dst)
  2731. continue;
  2732. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2733. ath10k_wmi_10_4_pull_pdev_stats_tx(&src->tx, dst);
  2734. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2735. dst->rx_ovfl_errs = __le32_to_cpu(src->rx_ovfl_errs);
  2736. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2737. list_add_tail(&dst->list, &stats->pdevs);
  2738. }
  2739. for (i = 0; i < num_pdev_ext_stats; i++) {
  2740. const struct wmi_10_2_pdev_ext_stats *src;
  2741. src = (void *)skb->data;
  2742. if (!skb_pull(skb, sizeof(*src)))
  2743. return -EPROTO;
  2744. /* FIXME: expose values to userspace
  2745. *
  2746. * Note: Even though this loop seems to do nothing it is
  2747. * required to parse following sub-structures properly.
  2748. */
  2749. }
  2750. /* fw doesn't implement vdev stats */
  2751. for (i = 0; i < num_peer_stats; i++) {
  2752. const struct wmi_10_4_peer_stats *src;
  2753. struct ath10k_fw_stats_peer *dst;
  2754. src = (void *)skb->data;
  2755. if (!skb_pull(skb, sizeof(*src)))
  2756. return -EPROTO;
  2757. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2758. if (!dst)
  2759. continue;
  2760. ath10k_wmi_10_4_pull_peer_stats(src, dst);
  2761. list_add_tail(&dst->list, &stats->peers);
  2762. }
  2763. for (i = 0; i < num_bcnflt_stats; i++) {
  2764. const struct wmi_10_4_bss_bcn_filter_stats *src;
  2765. src = (void *)skb->data;
  2766. if (!skb_pull(skb, sizeof(*src)))
  2767. return -EPROTO;
  2768. /* FIXME: expose values to userspace
  2769. *
  2770. * Note: Even though this loop seems to do nothing it is
  2771. * required to parse following sub-structures properly.
  2772. */
  2773. }
  2774. if ((stats_id & WMI_10_4_STAT_PEER_EXTD) == 0)
  2775. return 0;
  2776. stats->extended = true;
  2777. for (i = 0; i < num_peer_stats; i++) {
  2778. const struct wmi_10_4_peer_extd_stats *src;
  2779. struct ath10k_fw_extd_stats_peer *dst;
  2780. src = (void *)skb->data;
  2781. if (!skb_pull(skb, sizeof(*src)))
  2782. return -EPROTO;
  2783. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2784. if (!dst)
  2785. continue;
  2786. ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
  2787. dst->rx_duration = __le32_to_cpu(src->rx_duration);
  2788. list_add_tail(&dst->list, &stats->peers_extd);
  2789. }
  2790. return 0;
  2791. }
  2792. void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb)
  2793. {
  2794. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
  2795. ath10k_debug_fw_stats_process(ar, skb);
  2796. }
  2797. static int
  2798. ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb,
  2799. struct wmi_vdev_start_ev_arg *arg)
  2800. {
  2801. struct wmi_vdev_start_response_event *ev = (void *)skb->data;
  2802. if (skb->len < sizeof(*ev))
  2803. return -EPROTO;
  2804. skb_pull(skb, sizeof(*ev));
  2805. arg->vdev_id = ev->vdev_id;
  2806. arg->req_id = ev->req_id;
  2807. arg->resp_type = ev->resp_type;
  2808. arg->status = ev->status;
  2809. return 0;
  2810. }
  2811. void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb)
  2812. {
  2813. struct wmi_vdev_start_ev_arg arg = {};
  2814. int ret;
  2815. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
  2816. ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg);
  2817. if (ret) {
  2818. ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret);
  2819. return;
  2820. }
  2821. if (WARN_ON(__le32_to_cpu(arg.status)))
  2822. return;
  2823. complete(&ar->vdev_setup_done);
  2824. }
  2825. void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb)
  2826. {
  2827. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
  2828. complete(&ar->vdev_setup_done);
  2829. }
  2830. static int
  2831. ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb,
  2832. struct wmi_peer_kick_ev_arg *arg)
  2833. {
  2834. struct wmi_peer_sta_kickout_event *ev = (void *)skb->data;
  2835. if (skb->len < sizeof(*ev))
  2836. return -EPROTO;
  2837. skb_pull(skb, sizeof(*ev));
  2838. arg->mac_addr = ev->peer_macaddr.addr;
  2839. return 0;
  2840. }
  2841. void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb)
  2842. {
  2843. struct wmi_peer_kick_ev_arg arg = {};
  2844. struct ieee80211_sta *sta;
  2845. int ret;
  2846. ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg);
  2847. if (ret) {
  2848. ath10k_warn(ar, "failed to parse peer kickout event: %d\n",
  2849. ret);
  2850. return;
  2851. }
  2852. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
  2853. arg.mac_addr);
  2854. rcu_read_lock();
  2855. sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL);
  2856. if (!sta) {
  2857. ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
  2858. arg.mac_addr);
  2859. goto exit;
  2860. }
  2861. ieee80211_report_low_ack(sta, 10);
  2862. exit:
  2863. rcu_read_unlock();
  2864. }
  2865. /*
  2866. * FIXME
  2867. *
  2868. * We don't report to mac80211 sleep state of connected
  2869. * stations. Due to this mac80211 can't fill in TIM IE
  2870. * correctly.
  2871. *
  2872. * I know of no way of getting nullfunc frames that contain
  2873. * sleep transition from connected stations - these do not
  2874. * seem to be sent from the target to the host. There also
  2875. * doesn't seem to be a dedicated event for that. So the
  2876. * only way left to do this would be to read tim_bitmap
  2877. * during SWBA.
  2878. *
  2879. * We could probably try using tim_bitmap from SWBA to tell
  2880. * mac80211 which stations are asleep and which are not. The
  2881. * problem here is calling mac80211 functions so many times
  2882. * could take too long and make us miss the time to submit
  2883. * the beacon to the target.
  2884. *
  2885. * So as a workaround we try to extend the TIM IE if there
  2886. * is unicast buffered for stations with aid > 7 and fill it
  2887. * in ourselves.
  2888. */
  2889. static void ath10k_wmi_update_tim(struct ath10k *ar,
  2890. struct ath10k_vif *arvif,
  2891. struct sk_buff *bcn,
  2892. const struct wmi_tim_info_arg *tim_info)
  2893. {
  2894. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
  2895. struct ieee80211_tim_ie *tim;
  2896. u8 *ies, *ie;
  2897. u8 ie_len, pvm_len;
  2898. __le32 t;
  2899. u32 v, tim_len;
  2900. /* When FW reports 0 in tim_len, ensure atleast first byte
  2901. * in tim_bitmap is considered for pvm calculation.
  2902. */
  2903. tim_len = tim_info->tim_len ? __le32_to_cpu(tim_info->tim_len) : 1;
  2904. /* if next SWBA has no tim_changed the tim_bitmap is garbage.
  2905. * we must copy the bitmap upon change and reuse it later */
  2906. if (__le32_to_cpu(tim_info->tim_changed)) {
  2907. int i;
  2908. if (sizeof(arvif->u.ap.tim_bitmap) < tim_len) {
  2909. ath10k_warn(ar, "SWBA TIM field is too big (%u), truncated it to %zu",
  2910. tim_len, sizeof(arvif->u.ap.tim_bitmap));
  2911. tim_len = sizeof(arvif->u.ap.tim_bitmap);
  2912. }
  2913. for (i = 0; i < tim_len; i++) {
  2914. t = tim_info->tim_bitmap[i / 4];
  2915. v = __le32_to_cpu(t);
  2916. arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
  2917. }
  2918. /* FW reports either length 0 or length based on max supported
  2919. * station. so we calculate this on our own
  2920. */
  2921. arvif->u.ap.tim_len = 0;
  2922. for (i = 0; i < tim_len; i++)
  2923. if (arvif->u.ap.tim_bitmap[i])
  2924. arvif->u.ap.tim_len = i;
  2925. arvif->u.ap.tim_len++;
  2926. }
  2927. ies = bcn->data;
  2928. ies += ieee80211_hdrlen(hdr->frame_control);
  2929. ies += 12; /* fixed parameters */
  2930. ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
  2931. (u8 *)skb_tail_pointer(bcn) - ies);
  2932. if (!ie) {
  2933. if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
  2934. ath10k_warn(ar, "no tim ie found;\n");
  2935. return;
  2936. }
  2937. tim = (void *)ie + 2;
  2938. ie_len = ie[1];
  2939. pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
  2940. if (pvm_len < arvif->u.ap.tim_len) {
  2941. int expand_size = tim_len - pvm_len;
  2942. int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
  2943. void *next_ie = ie + 2 + ie_len;
  2944. if (skb_put(bcn, expand_size)) {
  2945. memmove(next_ie + expand_size, next_ie, move_size);
  2946. ie[1] += expand_size;
  2947. ie_len += expand_size;
  2948. pvm_len += expand_size;
  2949. } else {
  2950. ath10k_warn(ar, "tim expansion failed\n");
  2951. }
  2952. }
  2953. if (pvm_len > tim_len) {
  2954. ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
  2955. return;
  2956. }
  2957. tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast);
  2958. memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
  2959. if (tim->dtim_count == 0) {
  2960. ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DTIM_ZERO;
  2961. if (__le32_to_cpu(tim_info->tim_mcast) == 1)
  2962. ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DELIVER_CAB;
  2963. }
  2964. ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
  2965. tim->dtim_count, tim->dtim_period,
  2966. tim->bitmap_ctrl, pvm_len);
  2967. }
  2968. static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
  2969. struct sk_buff *bcn,
  2970. const struct wmi_p2p_noa_info *noa)
  2971. {
  2972. if (!arvif->vif->p2p)
  2973. return;
  2974. ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
  2975. if (noa->changed & WMI_P2P_NOA_CHANGED_BIT)
  2976. ath10k_p2p_noa_update(arvif, noa);
  2977. if (arvif->u.ap.noa_data)
  2978. if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
  2979. memcpy(skb_put(bcn, arvif->u.ap.noa_len),
  2980. arvif->u.ap.noa_data,
  2981. arvif->u.ap.noa_len);
  2982. }
  2983. static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb,
  2984. struct wmi_swba_ev_arg *arg)
  2985. {
  2986. struct wmi_host_swba_event *ev = (void *)skb->data;
  2987. u32 map;
  2988. size_t i;
  2989. if (skb->len < sizeof(*ev))
  2990. return -EPROTO;
  2991. skb_pull(skb, sizeof(*ev));
  2992. arg->vdev_map = ev->vdev_map;
  2993. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  2994. if (!(map & BIT(0)))
  2995. continue;
  2996. /* If this happens there were some changes in firmware and
  2997. * ath10k should update the max size of tim_info array.
  2998. */
  2999. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  3000. break;
  3001. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  3002. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  3003. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  3004. return -EPROTO;
  3005. }
  3006. arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
  3007. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  3008. arg->tim_info[i].tim_bitmap =
  3009. ev->bcn_info[i].tim_info.tim_bitmap;
  3010. arg->tim_info[i].tim_changed =
  3011. ev->bcn_info[i].tim_info.tim_changed;
  3012. arg->tim_info[i].tim_num_ps_pending =
  3013. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  3014. arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info;
  3015. i++;
  3016. }
  3017. return 0;
  3018. }
  3019. static int ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k *ar,
  3020. struct sk_buff *skb,
  3021. struct wmi_swba_ev_arg *arg)
  3022. {
  3023. struct wmi_10_2_4_host_swba_event *ev = (void *)skb->data;
  3024. u32 map;
  3025. size_t i;
  3026. if (skb->len < sizeof(*ev))
  3027. return -EPROTO;
  3028. skb_pull(skb, sizeof(*ev));
  3029. arg->vdev_map = ev->vdev_map;
  3030. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  3031. if (!(map & BIT(0)))
  3032. continue;
  3033. /* If this happens there were some changes in firmware and
  3034. * ath10k should update the max size of tim_info array.
  3035. */
  3036. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  3037. break;
  3038. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  3039. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  3040. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  3041. return -EPROTO;
  3042. }
  3043. arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
  3044. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  3045. arg->tim_info[i].tim_bitmap =
  3046. ev->bcn_info[i].tim_info.tim_bitmap;
  3047. arg->tim_info[i].tim_changed =
  3048. ev->bcn_info[i].tim_info.tim_changed;
  3049. arg->tim_info[i].tim_num_ps_pending =
  3050. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  3051. i++;
  3052. }
  3053. return 0;
  3054. }
  3055. static int ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k *ar,
  3056. struct sk_buff *skb,
  3057. struct wmi_swba_ev_arg *arg)
  3058. {
  3059. struct wmi_10_4_host_swba_event *ev = (void *)skb->data;
  3060. u32 map, tim_len;
  3061. size_t i;
  3062. if (skb->len < sizeof(*ev))
  3063. return -EPROTO;
  3064. skb_pull(skb, sizeof(*ev));
  3065. arg->vdev_map = ev->vdev_map;
  3066. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  3067. if (!(map & BIT(0)))
  3068. continue;
  3069. /* If this happens there were some changes in firmware and
  3070. * ath10k should update the max size of tim_info array.
  3071. */
  3072. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  3073. break;
  3074. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  3075. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  3076. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  3077. return -EPROTO;
  3078. }
  3079. tim_len = __le32_to_cpu(ev->bcn_info[i].tim_info.tim_len);
  3080. if (tim_len) {
  3081. /* Exclude 4 byte guard length */
  3082. tim_len -= 4;
  3083. arg->tim_info[i].tim_len = __cpu_to_le32(tim_len);
  3084. } else {
  3085. arg->tim_info[i].tim_len = 0;
  3086. }
  3087. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  3088. arg->tim_info[i].tim_bitmap =
  3089. ev->bcn_info[i].tim_info.tim_bitmap;
  3090. arg->tim_info[i].tim_changed =
  3091. ev->bcn_info[i].tim_info.tim_changed;
  3092. arg->tim_info[i].tim_num_ps_pending =
  3093. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  3094. /* 10.4 firmware doesn't have p2p support. notice of absence
  3095. * info can be ignored for now.
  3096. */
  3097. i++;
  3098. }
  3099. return 0;
  3100. }
  3101. static enum wmi_txbf_conf ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k *ar)
  3102. {
  3103. return WMI_TXBF_CONF_BEFORE_ASSOC;
  3104. }
  3105. void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
  3106. {
  3107. struct wmi_swba_ev_arg arg = {};
  3108. u32 map;
  3109. int i = -1;
  3110. const struct wmi_tim_info_arg *tim_info;
  3111. const struct wmi_p2p_noa_info *noa_info;
  3112. struct ath10k_vif *arvif;
  3113. struct sk_buff *bcn;
  3114. dma_addr_t paddr;
  3115. int ret, vdev_id = 0;
  3116. ret = ath10k_wmi_pull_swba(ar, skb, &arg);
  3117. if (ret) {
  3118. ath10k_warn(ar, "failed to parse swba event: %d\n", ret);
  3119. return;
  3120. }
  3121. map = __le32_to_cpu(arg.vdev_map);
  3122. ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
  3123. map);
  3124. for (; map; map >>= 1, vdev_id++) {
  3125. if (!(map & 0x1))
  3126. continue;
  3127. i++;
  3128. if (i >= WMI_MAX_AP_VDEV) {
  3129. ath10k_warn(ar, "swba has corrupted vdev map\n");
  3130. break;
  3131. }
  3132. tim_info = &arg.tim_info[i];
  3133. noa_info = arg.noa_info[i];
  3134. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  3135. "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
  3136. i,
  3137. __le32_to_cpu(tim_info->tim_len),
  3138. __le32_to_cpu(tim_info->tim_mcast),
  3139. __le32_to_cpu(tim_info->tim_changed),
  3140. __le32_to_cpu(tim_info->tim_num_ps_pending),
  3141. __le32_to_cpu(tim_info->tim_bitmap[3]),
  3142. __le32_to_cpu(tim_info->tim_bitmap[2]),
  3143. __le32_to_cpu(tim_info->tim_bitmap[1]),
  3144. __le32_to_cpu(tim_info->tim_bitmap[0]));
  3145. /* TODO: Only first 4 word from tim_bitmap is dumped.
  3146. * Extend debug code to dump full tim_bitmap.
  3147. */
  3148. arvif = ath10k_get_arvif(ar, vdev_id);
  3149. if (arvif == NULL) {
  3150. ath10k_warn(ar, "no vif for vdev_id %d found\n",
  3151. vdev_id);
  3152. continue;
  3153. }
  3154. /* mac80211 would have already asked us to stop beaconing and
  3155. * bring the vdev down, so continue in that case
  3156. */
  3157. if (!arvif->is_up)
  3158. continue;
  3159. /* There are no completions for beacons so wait for next SWBA
  3160. * before telling mac80211 to decrement CSA counter
  3161. *
  3162. * Once CSA counter is completed stop sending beacons until
  3163. * actual channel switch is done */
  3164. if (arvif->vif->csa_active &&
  3165. ieee80211_csa_is_complete(arvif->vif)) {
  3166. ieee80211_csa_finish(arvif->vif);
  3167. continue;
  3168. }
  3169. bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
  3170. if (!bcn) {
  3171. ath10k_warn(ar, "could not get mac80211 beacon\n");
  3172. continue;
  3173. }
  3174. ath10k_tx_h_seq_no(arvif->vif, bcn);
  3175. ath10k_wmi_update_tim(ar, arvif, bcn, tim_info);
  3176. ath10k_wmi_update_noa(ar, arvif, bcn, noa_info);
  3177. spin_lock_bh(&ar->data_lock);
  3178. if (arvif->beacon) {
  3179. switch (arvif->beacon_state) {
  3180. case ATH10K_BEACON_SENT:
  3181. break;
  3182. case ATH10K_BEACON_SCHEDULED:
  3183. ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n",
  3184. arvif->vdev_id);
  3185. break;
  3186. case ATH10K_BEACON_SENDING:
  3187. ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n",
  3188. arvif->vdev_id);
  3189. dev_kfree_skb(bcn);
  3190. goto skip;
  3191. }
  3192. ath10k_mac_vif_beacon_free(arvif);
  3193. }
  3194. if (!arvif->beacon_buf) {
  3195. paddr = dma_map_single(arvif->ar->dev, bcn->data,
  3196. bcn->len, DMA_TO_DEVICE);
  3197. ret = dma_mapping_error(arvif->ar->dev, paddr);
  3198. if (ret) {
  3199. ath10k_warn(ar, "failed to map beacon: %d\n",
  3200. ret);
  3201. dev_kfree_skb_any(bcn);
  3202. goto skip;
  3203. }
  3204. ATH10K_SKB_CB(bcn)->paddr = paddr;
  3205. } else {
  3206. if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
  3207. ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
  3208. bcn->len, IEEE80211_MAX_FRAME_LEN);
  3209. skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
  3210. }
  3211. memcpy(arvif->beacon_buf, bcn->data, bcn->len);
  3212. ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
  3213. }
  3214. arvif->beacon = bcn;
  3215. arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
  3216. trace_ath10k_tx_hdr(ar, bcn->data, bcn->len);
  3217. trace_ath10k_tx_payload(ar, bcn->data, bcn->len);
  3218. skip:
  3219. spin_unlock_bh(&ar->data_lock);
  3220. }
  3221. ath10k_wmi_tx_beacons_nowait(ar);
  3222. }
  3223. void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb)
  3224. {
  3225. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
  3226. }
  3227. static void ath10k_dfs_radar_report(struct ath10k *ar,
  3228. struct wmi_phyerr_ev_arg *phyerr,
  3229. const struct phyerr_radar_report *rr,
  3230. u64 tsf)
  3231. {
  3232. u32 reg0, reg1, tsf32l;
  3233. struct ieee80211_channel *ch;
  3234. struct pulse_event pe;
  3235. u64 tsf64;
  3236. u8 rssi, width;
  3237. reg0 = __le32_to_cpu(rr->reg0);
  3238. reg1 = __le32_to_cpu(rr->reg1);
  3239. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3240. "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
  3241. MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
  3242. MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
  3243. MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
  3244. MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
  3245. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3246. "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
  3247. MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
  3248. MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
  3249. MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
  3250. MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
  3251. MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
  3252. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3253. "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
  3254. MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
  3255. MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
  3256. if (!ar->dfs_detector)
  3257. return;
  3258. spin_lock_bh(&ar->data_lock);
  3259. ch = ar->rx_channel;
  3260. spin_unlock_bh(&ar->data_lock);
  3261. if (!ch) {
  3262. ath10k_warn(ar, "failed to derive channel for radar pulse, treating as radar\n");
  3263. goto radar_detected;
  3264. }
  3265. /* report event to DFS pattern detector */
  3266. tsf32l = phyerr->tsf_timestamp;
  3267. tsf64 = tsf & (~0xFFFFFFFFULL);
  3268. tsf64 |= tsf32l;
  3269. width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
  3270. rssi = phyerr->rssi_combined;
  3271. /* hardware store this as 8 bit signed value,
  3272. * set to zero if negative number
  3273. */
  3274. if (rssi & 0x80)
  3275. rssi = 0;
  3276. pe.ts = tsf64;
  3277. pe.freq = ch->center_freq;
  3278. pe.width = width;
  3279. pe.rssi = rssi;
  3280. pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0);
  3281. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3282. "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
  3283. pe.freq, pe.width, pe.rssi, pe.ts);
  3284. ATH10K_DFS_STAT_INC(ar, pulses_detected);
  3285. if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
  3286. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3287. "dfs no pulse pattern detected, yet\n");
  3288. return;
  3289. }
  3290. radar_detected:
  3291. ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
  3292. ATH10K_DFS_STAT_INC(ar, radar_detected);
  3293. /* Control radar events reporting in debugfs file
  3294. dfs_block_radar_events */
  3295. if (ar->dfs_block_radar_events) {
  3296. ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
  3297. return;
  3298. }
  3299. ieee80211_radar_detected(ar->hw);
  3300. }
  3301. static int ath10k_dfs_fft_report(struct ath10k *ar,
  3302. struct wmi_phyerr_ev_arg *phyerr,
  3303. const struct phyerr_fft_report *fftr,
  3304. u64 tsf)
  3305. {
  3306. u32 reg0, reg1;
  3307. u8 rssi, peak_mag;
  3308. reg0 = __le32_to_cpu(fftr->reg0);
  3309. reg1 = __le32_to_cpu(fftr->reg1);
  3310. rssi = phyerr->rssi_combined;
  3311. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3312. "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
  3313. MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
  3314. MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
  3315. MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
  3316. MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
  3317. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3318. "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
  3319. MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
  3320. MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
  3321. MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
  3322. MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
  3323. peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
  3324. /* false event detection */
  3325. if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
  3326. peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
  3327. ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
  3328. ATH10K_DFS_STAT_INC(ar, pulses_discarded);
  3329. return -EINVAL;
  3330. }
  3331. return 0;
  3332. }
  3333. void ath10k_wmi_event_dfs(struct ath10k *ar,
  3334. struct wmi_phyerr_ev_arg *phyerr,
  3335. u64 tsf)
  3336. {
  3337. int buf_len, tlv_len, res, i = 0;
  3338. const struct phyerr_tlv *tlv;
  3339. const struct phyerr_radar_report *rr;
  3340. const struct phyerr_fft_report *fftr;
  3341. const u8 *tlv_buf;
  3342. buf_len = phyerr->buf_len;
  3343. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3344. "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
  3345. phyerr->phy_err_code, phyerr->rssi_combined,
  3346. phyerr->tsf_timestamp, tsf, buf_len);
  3347. /* Skip event if DFS disabled */
  3348. if (!IS_ENABLED(CONFIG_ATH10K_DFS_CERTIFIED))
  3349. return;
  3350. ATH10K_DFS_STAT_INC(ar, pulses_total);
  3351. while (i < buf_len) {
  3352. if (i + sizeof(*tlv) > buf_len) {
  3353. ath10k_warn(ar, "too short buf for tlv header (%d)\n",
  3354. i);
  3355. return;
  3356. }
  3357. tlv = (struct phyerr_tlv *)&phyerr->buf[i];
  3358. tlv_len = __le16_to_cpu(tlv->len);
  3359. tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
  3360. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3361. "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
  3362. tlv_len, tlv->tag, tlv->sig);
  3363. switch (tlv->tag) {
  3364. case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
  3365. if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
  3366. ath10k_warn(ar, "too short radar pulse summary (%d)\n",
  3367. i);
  3368. return;
  3369. }
  3370. rr = (struct phyerr_radar_report *)tlv_buf;
  3371. ath10k_dfs_radar_report(ar, phyerr, rr, tsf);
  3372. break;
  3373. case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
  3374. if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
  3375. ath10k_warn(ar, "too short fft report (%d)\n",
  3376. i);
  3377. return;
  3378. }
  3379. fftr = (struct phyerr_fft_report *)tlv_buf;
  3380. res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf);
  3381. if (res)
  3382. return;
  3383. break;
  3384. }
  3385. i += sizeof(*tlv) + tlv_len;
  3386. }
  3387. }
  3388. void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
  3389. struct wmi_phyerr_ev_arg *phyerr,
  3390. u64 tsf)
  3391. {
  3392. int buf_len, tlv_len, res, i = 0;
  3393. struct phyerr_tlv *tlv;
  3394. const void *tlv_buf;
  3395. const struct phyerr_fft_report *fftr;
  3396. size_t fftr_len;
  3397. buf_len = phyerr->buf_len;
  3398. while (i < buf_len) {
  3399. if (i + sizeof(*tlv) > buf_len) {
  3400. ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
  3401. i);
  3402. return;
  3403. }
  3404. tlv = (struct phyerr_tlv *)&phyerr->buf[i];
  3405. tlv_len = __le16_to_cpu(tlv->len);
  3406. tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
  3407. if (i + sizeof(*tlv) + tlv_len > buf_len) {
  3408. ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
  3409. i);
  3410. return;
  3411. }
  3412. switch (tlv->tag) {
  3413. case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
  3414. if (sizeof(*fftr) > tlv_len) {
  3415. ath10k_warn(ar, "failed to parse fft report at byte %d\n",
  3416. i);
  3417. return;
  3418. }
  3419. fftr_len = tlv_len - sizeof(*fftr);
  3420. fftr = tlv_buf;
  3421. res = ath10k_spectral_process_fft(ar, phyerr,
  3422. fftr, fftr_len,
  3423. tsf);
  3424. if (res < 0) {
  3425. ath10k_dbg(ar, ATH10K_DBG_WMI, "failed to process fft report: %d\n",
  3426. res);
  3427. return;
  3428. }
  3429. break;
  3430. }
  3431. i += sizeof(*tlv) + tlv_len;
  3432. }
  3433. }
  3434. static int ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k *ar,
  3435. struct sk_buff *skb,
  3436. struct wmi_phyerr_hdr_arg *arg)
  3437. {
  3438. struct wmi_phyerr_event *ev = (void *)skb->data;
  3439. if (skb->len < sizeof(*ev))
  3440. return -EPROTO;
  3441. arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs);
  3442. arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
  3443. arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
  3444. arg->buf_len = skb->len - sizeof(*ev);
  3445. arg->phyerrs = ev->phyerrs;
  3446. return 0;
  3447. }
  3448. static int ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k *ar,
  3449. struct sk_buff *skb,
  3450. struct wmi_phyerr_hdr_arg *arg)
  3451. {
  3452. struct wmi_10_4_phyerr_event *ev = (void *)skb->data;
  3453. if (skb->len < sizeof(*ev))
  3454. return -EPROTO;
  3455. /* 10.4 firmware always reports only one phyerr */
  3456. arg->num_phyerrs = 1;
  3457. arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
  3458. arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
  3459. arg->buf_len = skb->len;
  3460. arg->phyerrs = skb->data;
  3461. return 0;
  3462. }
  3463. int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar,
  3464. const void *phyerr_buf,
  3465. int left_len,
  3466. struct wmi_phyerr_ev_arg *arg)
  3467. {
  3468. const struct wmi_phyerr *phyerr = phyerr_buf;
  3469. int i;
  3470. if (left_len < sizeof(*phyerr)) {
  3471. ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
  3472. left_len, sizeof(*phyerr));
  3473. return -EINVAL;
  3474. }
  3475. arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
  3476. arg->freq1 = __le16_to_cpu(phyerr->freq1);
  3477. arg->freq2 = __le16_to_cpu(phyerr->freq2);
  3478. arg->rssi_combined = phyerr->rssi_combined;
  3479. arg->chan_width_mhz = phyerr->chan_width_mhz;
  3480. arg->buf_len = __le32_to_cpu(phyerr->buf_len);
  3481. arg->buf = phyerr->buf;
  3482. arg->hdr_len = sizeof(*phyerr);
  3483. for (i = 0; i < 4; i++)
  3484. arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
  3485. switch (phyerr->phy_err_code) {
  3486. case PHY_ERROR_GEN_SPECTRAL_SCAN:
  3487. arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
  3488. break;
  3489. case PHY_ERROR_GEN_FALSE_RADAR_EXT:
  3490. arg->phy_err_code = PHY_ERROR_FALSE_RADAR_EXT;
  3491. break;
  3492. case PHY_ERROR_GEN_RADAR:
  3493. arg->phy_err_code = PHY_ERROR_RADAR;
  3494. break;
  3495. default:
  3496. arg->phy_err_code = PHY_ERROR_UNKNOWN;
  3497. break;
  3498. }
  3499. return 0;
  3500. }
  3501. static int ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k *ar,
  3502. const void *phyerr_buf,
  3503. int left_len,
  3504. struct wmi_phyerr_ev_arg *arg)
  3505. {
  3506. const struct wmi_10_4_phyerr_event *phyerr = phyerr_buf;
  3507. u32 phy_err_mask;
  3508. int i;
  3509. if (left_len < sizeof(*phyerr)) {
  3510. ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
  3511. left_len, sizeof(*phyerr));
  3512. return -EINVAL;
  3513. }
  3514. arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
  3515. arg->freq1 = __le16_to_cpu(phyerr->freq1);
  3516. arg->freq2 = __le16_to_cpu(phyerr->freq2);
  3517. arg->rssi_combined = phyerr->rssi_combined;
  3518. arg->chan_width_mhz = phyerr->chan_width_mhz;
  3519. arg->buf_len = __le32_to_cpu(phyerr->buf_len);
  3520. arg->buf = phyerr->buf;
  3521. arg->hdr_len = sizeof(*phyerr);
  3522. for (i = 0; i < 4; i++)
  3523. arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
  3524. phy_err_mask = __le32_to_cpu(phyerr->phy_err_mask[0]);
  3525. if (phy_err_mask & PHY_ERROR_10_4_SPECTRAL_SCAN_MASK)
  3526. arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
  3527. else if (phy_err_mask & PHY_ERROR_10_4_RADAR_MASK)
  3528. arg->phy_err_code = PHY_ERROR_RADAR;
  3529. else
  3530. arg->phy_err_code = PHY_ERROR_UNKNOWN;
  3531. return 0;
  3532. }
  3533. void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
  3534. {
  3535. struct wmi_phyerr_hdr_arg hdr_arg = {};
  3536. struct wmi_phyerr_ev_arg phyerr_arg = {};
  3537. const void *phyerr;
  3538. u32 count, i, buf_len, phy_err_code;
  3539. u64 tsf;
  3540. int left_len, ret;
  3541. ATH10K_DFS_STAT_INC(ar, phy_errors);
  3542. ret = ath10k_wmi_pull_phyerr_hdr(ar, skb, &hdr_arg);
  3543. if (ret) {
  3544. ath10k_warn(ar, "failed to parse phyerr event hdr: %d\n", ret);
  3545. return;
  3546. }
  3547. /* Check number of included events */
  3548. count = hdr_arg.num_phyerrs;
  3549. left_len = hdr_arg.buf_len;
  3550. tsf = hdr_arg.tsf_u32;
  3551. tsf <<= 32;
  3552. tsf |= hdr_arg.tsf_l32;
  3553. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3554. "wmi event phyerr count %d tsf64 0x%llX\n",
  3555. count, tsf);
  3556. phyerr = hdr_arg.phyerrs;
  3557. for (i = 0; i < count; i++) {
  3558. ret = ath10k_wmi_pull_phyerr(ar, phyerr, left_len, &phyerr_arg);
  3559. if (ret) {
  3560. ath10k_warn(ar, "failed to parse phyerr event (%d)\n",
  3561. i);
  3562. return;
  3563. }
  3564. left_len -= phyerr_arg.hdr_len;
  3565. buf_len = phyerr_arg.buf_len;
  3566. phy_err_code = phyerr_arg.phy_err_code;
  3567. if (left_len < buf_len) {
  3568. ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
  3569. return;
  3570. }
  3571. left_len -= buf_len;
  3572. switch (phy_err_code) {
  3573. case PHY_ERROR_RADAR:
  3574. ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
  3575. break;
  3576. case PHY_ERROR_SPECTRAL_SCAN:
  3577. ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
  3578. break;
  3579. case PHY_ERROR_FALSE_RADAR_EXT:
  3580. ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
  3581. ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
  3582. break;
  3583. default:
  3584. break;
  3585. }
  3586. phyerr = phyerr + phyerr_arg.hdr_len + buf_len;
  3587. }
  3588. }
  3589. void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
  3590. {
  3591. struct wmi_roam_ev_arg arg = {};
  3592. int ret;
  3593. u32 vdev_id;
  3594. u32 reason;
  3595. s32 rssi;
  3596. ret = ath10k_wmi_pull_roam_ev(ar, skb, &arg);
  3597. if (ret) {
  3598. ath10k_warn(ar, "failed to parse roam event: %d\n", ret);
  3599. return;
  3600. }
  3601. vdev_id = __le32_to_cpu(arg.vdev_id);
  3602. reason = __le32_to_cpu(arg.reason);
  3603. rssi = __le32_to_cpu(arg.rssi);
  3604. rssi += WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT;
  3605. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3606. "wmi roam event vdev %u reason 0x%08x rssi %d\n",
  3607. vdev_id, reason, rssi);
  3608. if (reason >= WMI_ROAM_REASON_MAX)
  3609. ath10k_warn(ar, "ignoring unknown roam event reason %d on vdev %i\n",
  3610. reason, vdev_id);
  3611. switch (reason) {
  3612. case WMI_ROAM_REASON_BEACON_MISS:
  3613. ath10k_mac_handle_beacon_miss(ar, vdev_id);
  3614. break;
  3615. case WMI_ROAM_REASON_BETTER_AP:
  3616. case WMI_ROAM_REASON_LOW_RSSI:
  3617. case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
  3618. case WMI_ROAM_REASON_HO_FAILED:
  3619. ath10k_warn(ar, "ignoring not implemented roam event reason %d on vdev %i\n",
  3620. reason, vdev_id);
  3621. break;
  3622. }
  3623. }
  3624. void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb)
  3625. {
  3626. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
  3627. }
  3628. void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb)
  3629. {
  3630. char buf[101], c;
  3631. int i;
  3632. for (i = 0; i < sizeof(buf) - 1; i++) {
  3633. if (i >= skb->len)
  3634. break;
  3635. c = skb->data[i];
  3636. if (c == '\0')
  3637. break;
  3638. if (isascii(c) && isprint(c))
  3639. buf[i] = c;
  3640. else
  3641. buf[i] = '.';
  3642. }
  3643. if (i == sizeof(buf) - 1)
  3644. ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
  3645. /* for some reason the debug prints end with \n, remove that */
  3646. if (skb->data[i - 1] == '\n')
  3647. i--;
  3648. /* the last byte is always reserved for the null character */
  3649. buf[i] = '\0';
  3650. ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf);
  3651. }
  3652. void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
  3653. {
  3654. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
  3655. }
  3656. void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb)
  3657. {
  3658. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
  3659. }
  3660. void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
  3661. struct sk_buff *skb)
  3662. {
  3663. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
  3664. }
  3665. void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
  3666. struct sk_buff *skb)
  3667. {
  3668. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
  3669. }
  3670. void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb)
  3671. {
  3672. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
  3673. }
  3674. void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb)
  3675. {
  3676. struct wmi_wow_ev_arg ev = {};
  3677. int ret;
  3678. complete(&ar->wow.wakeup_completed);
  3679. ret = ath10k_wmi_pull_wow_event(ar, skb, &ev);
  3680. if (ret) {
  3681. ath10k_warn(ar, "failed to parse wow wakeup event: %d\n", ret);
  3682. return;
  3683. }
  3684. ath10k_dbg(ar, ATH10K_DBG_WMI, "wow wakeup host reason %s\n",
  3685. wow_reason(ev.wake_reason));
  3686. }
  3687. void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb)
  3688. {
  3689. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
  3690. }
  3691. static u8 ath10k_tpc_config_get_rate(struct ath10k *ar,
  3692. struct wmi_pdev_tpc_config_event *ev,
  3693. u32 rate_idx, u32 num_chains,
  3694. u32 rate_code, u8 type)
  3695. {
  3696. u8 tpc, num_streams, preamble, ch, stm_idx;
  3697. num_streams = ATH10K_HW_NSS(rate_code);
  3698. preamble = ATH10K_HW_PREAMBLE(rate_code);
  3699. ch = num_chains - 1;
  3700. tpc = min_t(u8, ev->rates_array[rate_idx], ev->max_reg_allow_pow[ch]);
  3701. if (__le32_to_cpu(ev->num_tx_chain) <= 1)
  3702. goto out;
  3703. if (preamble == WMI_RATE_PREAMBLE_CCK)
  3704. goto out;
  3705. stm_idx = num_streams - 1;
  3706. if (num_chains <= num_streams)
  3707. goto out;
  3708. switch (type) {
  3709. case WMI_TPC_TABLE_TYPE_STBC:
  3710. tpc = min_t(u8, tpc,
  3711. ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx]);
  3712. break;
  3713. case WMI_TPC_TABLE_TYPE_TXBF:
  3714. tpc = min_t(u8, tpc,
  3715. ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx]);
  3716. break;
  3717. case WMI_TPC_TABLE_TYPE_CDD:
  3718. tpc = min_t(u8, tpc,
  3719. ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx]);
  3720. break;
  3721. default:
  3722. ath10k_warn(ar, "unknown wmi tpc table type: %d\n", type);
  3723. tpc = 0;
  3724. break;
  3725. }
  3726. out:
  3727. return tpc;
  3728. }
  3729. static void ath10k_tpc_config_disp_tables(struct ath10k *ar,
  3730. struct wmi_pdev_tpc_config_event *ev,
  3731. struct ath10k_tpc_stats *tpc_stats,
  3732. u8 *rate_code, u16 *pream_table, u8 type)
  3733. {
  3734. u32 i, j, pream_idx, flags;
  3735. u8 tpc[WMI_TPC_TX_N_CHAIN];
  3736. char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
  3737. char buff[WMI_TPC_BUF_SIZE];
  3738. flags = __le32_to_cpu(ev->flags);
  3739. switch (type) {
  3740. case WMI_TPC_TABLE_TYPE_CDD:
  3741. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
  3742. ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
  3743. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  3744. return;
  3745. }
  3746. break;
  3747. case WMI_TPC_TABLE_TYPE_STBC:
  3748. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
  3749. ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
  3750. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  3751. return;
  3752. }
  3753. break;
  3754. case WMI_TPC_TABLE_TYPE_TXBF:
  3755. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
  3756. ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
  3757. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  3758. return;
  3759. }
  3760. break;
  3761. default:
  3762. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3763. "invalid table type in wmi tpc event: %d\n", type);
  3764. return;
  3765. }
  3766. pream_idx = 0;
  3767. for (i = 0; i < __le32_to_cpu(ev->rate_max); i++) {
  3768. memset(tpc_value, 0, sizeof(tpc_value));
  3769. memset(buff, 0, sizeof(buff));
  3770. if (i == pream_table[pream_idx])
  3771. pream_idx++;
  3772. for (j = 0; j < WMI_TPC_TX_N_CHAIN; j++) {
  3773. if (j >= __le32_to_cpu(ev->num_tx_chain))
  3774. break;
  3775. tpc[j] = ath10k_tpc_config_get_rate(ar, ev, i, j + 1,
  3776. rate_code[i],
  3777. type);
  3778. snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
  3779. strncat(tpc_value, buff, strlen(buff));
  3780. }
  3781. tpc_stats->tpc_table[type].pream_idx[i] = pream_idx;
  3782. tpc_stats->tpc_table[type].rate_code[i] = rate_code[i];
  3783. memcpy(tpc_stats->tpc_table[type].tpc_value[i],
  3784. tpc_value, sizeof(tpc_value));
  3785. }
  3786. }
  3787. void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb)
  3788. {
  3789. u32 i, j, pream_idx, num_tx_chain;
  3790. u8 rate_code[WMI_TPC_RATE_MAX], rate_idx;
  3791. u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
  3792. struct wmi_pdev_tpc_config_event *ev;
  3793. struct ath10k_tpc_stats *tpc_stats;
  3794. ev = (struct wmi_pdev_tpc_config_event *)skb->data;
  3795. tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
  3796. if (!tpc_stats)
  3797. return;
  3798. /* Create the rate code table based on the chains supported */
  3799. rate_idx = 0;
  3800. pream_idx = 0;
  3801. /* Fill CCK rate code */
  3802. for (i = 0; i < 4; i++) {
  3803. rate_code[rate_idx] =
  3804. ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_CCK);
  3805. rate_idx++;
  3806. }
  3807. pream_table[pream_idx] = rate_idx;
  3808. pream_idx++;
  3809. /* Fill OFDM rate code */
  3810. for (i = 0; i < 8; i++) {
  3811. rate_code[rate_idx] =
  3812. ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_OFDM);
  3813. rate_idx++;
  3814. }
  3815. pream_table[pream_idx] = rate_idx;
  3816. pream_idx++;
  3817. num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
  3818. /* Fill HT20 rate code */
  3819. for (i = 0; i < num_tx_chain; i++) {
  3820. for (j = 0; j < 8; j++) {
  3821. rate_code[rate_idx] =
  3822. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
  3823. rate_idx++;
  3824. }
  3825. }
  3826. pream_table[pream_idx] = rate_idx;
  3827. pream_idx++;
  3828. /* Fill HT40 rate code */
  3829. for (i = 0; i < num_tx_chain; i++) {
  3830. for (j = 0; j < 8; j++) {
  3831. rate_code[rate_idx] =
  3832. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
  3833. rate_idx++;
  3834. }
  3835. }
  3836. pream_table[pream_idx] = rate_idx;
  3837. pream_idx++;
  3838. /* Fill VHT20 rate code */
  3839. for (i = 0; i < __le32_to_cpu(ev->num_tx_chain); i++) {
  3840. for (j = 0; j < 10; j++) {
  3841. rate_code[rate_idx] =
  3842. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  3843. rate_idx++;
  3844. }
  3845. }
  3846. pream_table[pream_idx] = rate_idx;
  3847. pream_idx++;
  3848. /* Fill VHT40 rate code */
  3849. for (i = 0; i < num_tx_chain; i++) {
  3850. for (j = 0; j < 10; j++) {
  3851. rate_code[rate_idx] =
  3852. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  3853. rate_idx++;
  3854. }
  3855. }
  3856. pream_table[pream_idx] = rate_idx;
  3857. pream_idx++;
  3858. /* Fill VHT80 rate code */
  3859. for (i = 0; i < num_tx_chain; i++) {
  3860. for (j = 0; j < 10; j++) {
  3861. rate_code[rate_idx] =
  3862. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  3863. rate_idx++;
  3864. }
  3865. }
  3866. pream_table[pream_idx] = rate_idx;
  3867. pream_idx++;
  3868. rate_code[rate_idx++] =
  3869. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
  3870. rate_code[rate_idx++] =
  3871. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  3872. rate_code[rate_idx++] =
  3873. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
  3874. rate_code[rate_idx++] =
  3875. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  3876. rate_code[rate_idx++] =
  3877. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  3878. pream_table[pream_idx] = ATH10K_TPC_PREAM_TABLE_END;
  3879. tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
  3880. tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
  3881. tpc_stats->ctl = __le32_to_cpu(ev->ctl);
  3882. tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
  3883. tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
  3884. tpc_stats->twice_antenna_reduction =
  3885. __le32_to_cpu(ev->twice_antenna_reduction);
  3886. tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
  3887. tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
  3888. tpc_stats->num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
  3889. tpc_stats->rate_max = __le32_to_cpu(ev->rate_max);
  3890. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  3891. rate_code, pream_table,
  3892. WMI_TPC_TABLE_TYPE_CDD);
  3893. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  3894. rate_code, pream_table,
  3895. WMI_TPC_TABLE_TYPE_STBC);
  3896. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  3897. rate_code, pream_table,
  3898. WMI_TPC_TABLE_TYPE_TXBF);
  3899. ath10k_debug_tpc_stats_process(ar, tpc_stats);
  3900. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3901. "wmi event tpc config channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
  3902. __le32_to_cpu(ev->chan_freq),
  3903. __le32_to_cpu(ev->phy_mode),
  3904. __le32_to_cpu(ev->ctl),
  3905. __le32_to_cpu(ev->reg_domain),
  3906. a_sle32_to_cpu(ev->twice_antenna_gain),
  3907. __le32_to_cpu(ev->twice_antenna_reduction),
  3908. __le32_to_cpu(ev->power_limit),
  3909. __le32_to_cpu(ev->twice_max_rd_power) / 2,
  3910. __le32_to_cpu(ev->num_tx_chain),
  3911. __le32_to_cpu(ev->rate_max));
  3912. }
  3913. void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb)
  3914. {
  3915. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
  3916. }
  3917. void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb)
  3918. {
  3919. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
  3920. }
  3921. void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb)
  3922. {
  3923. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
  3924. }
  3925. void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb)
  3926. {
  3927. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
  3928. }
  3929. void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb)
  3930. {
  3931. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
  3932. }
  3933. void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
  3934. struct sk_buff *skb)
  3935. {
  3936. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
  3937. }
  3938. void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb)
  3939. {
  3940. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
  3941. }
  3942. void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb)
  3943. {
  3944. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
  3945. }
  3946. void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb)
  3947. {
  3948. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
  3949. }
  3950. static int ath10k_wmi_alloc_chunk(struct ath10k *ar, u32 req_id,
  3951. u32 num_units, u32 unit_len)
  3952. {
  3953. dma_addr_t paddr;
  3954. u32 pool_size = 0;
  3955. int idx = ar->wmi.num_mem_chunks;
  3956. void *vaddr = NULL;
  3957. if (ar->wmi.num_mem_chunks == ARRAY_SIZE(ar->wmi.mem_chunks))
  3958. return -ENOMEM;
  3959. while (!vaddr && num_units) {
  3960. pool_size = num_units * round_up(unit_len, 4);
  3961. if (!pool_size)
  3962. return -EINVAL;
  3963. vaddr = kzalloc(pool_size, GFP_KERNEL | __GFP_NOWARN);
  3964. if (!vaddr)
  3965. num_units /= 2;
  3966. }
  3967. if (!num_units)
  3968. return -ENOMEM;
  3969. paddr = dma_map_single(ar->dev, vaddr, pool_size, DMA_BIDIRECTIONAL);
  3970. if (dma_mapping_error(ar->dev, paddr)) {
  3971. kfree(vaddr);
  3972. return -ENOMEM;
  3973. }
  3974. ar->wmi.mem_chunks[idx].vaddr = vaddr;
  3975. ar->wmi.mem_chunks[idx].paddr = paddr;
  3976. ar->wmi.mem_chunks[idx].len = pool_size;
  3977. ar->wmi.mem_chunks[idx].req_id = req_id;
  3978. ar->wmi.num_mem_chunks++;
  3979. return num_units;
  3980. }
  3981. static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
  3982. u32 num_units, u32 unit_len)
  3983. {
  3984. int ret;
  3985. while (num_units) {
  3986. ret = ath10k_wmi_alloc_chunk(ar, req_id, num_units, unit_len);
  3987. if (ret < 0)
  3988. return ret;
  3989. num_units -= ret;
  3990. }
  3991. return 0;
  3992. }
  3993. static bool
  3994. ath10k_wmi_is_host_mem_allocated(struct ath10k *ar,
  3995. const struct wlan_host_mem_req **mem_reqs,
  3996. u32 num_mem_reqs)
  3997. {
  3998. u32 req_id, num_units, unit_size, num_unit_info;
  3999. u32 pool_size;
  4000. int i, j;
  4001. bool found;
  4002. if (ar->wmi.num_mem_chunks != num_mem_reqs)
  4003. return false;
  4004. for (i = 0; i < num_mem_reqs; ++i) {
  4005. req_id = __le32_to_cpu(mem_reqs[i]->req_id);
  4006. num_units = __le32_to_cpu(mem_reqs[i]->num_units);
  4007. unit_size = __le32_to_cpu(mem_reqs[i]->unit_size);
  4008. num_unit_info = __le32_to_cpu(mem_reqs[i]->num_unit_info);
  4009. if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
  4010. if (ar->num_active_peers)
  4011. num_units = ar->num_active_peers + 1;
  4012. else
  4013. num_units = ar->max_num_peers + 1;
  4014. } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
  4015. num_units = ar->max_num_peers + 1;
  4016. } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
  4017. num_units = ar->max_num_vdevs + 1;
  4018. }
  4019. found = false;
  4020. for (j = 0; j < ar->wmi.num_mem_chunks; j++) {
  4021. if (ar->wmi.mem_chunks[j].req_id == req_id) {
  4022. pool_size = num_units * round_up(unit_size, 4);
  4023. if (ar->wmi.mem_chunks[j].len == pool_size) {
  4024. found = true;
  4025. break;
  4026. }
  4027. }
  4028. }
  4029. if (!found)
  4030. return false;
  4031. }
  4032. return true;
  4033. }
  4034. static int
  4035. ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4036. struct wmi_svc_rdy_ev_arg *arg)
  4037. {
  4038. struct wmi_service_ready_event *ev;
  4039. size_t i, n;
  4040. if (skb->len < sizeof(*ev))
  4041. return -EPROTO;
  4042. ev = (void *)skb->data;
  4043. skb_pull(skb, sizeof(*ev));
  4044. arg->min_tx_power = ev->hw_min_tx_power;
  4045. arg->max_tx_power = ev->hw_max_tx_power;
  4046. arg->ht_cap = ev->ht_cap_info;
  4047. arg->vht_cap = ev->vht_cap_info;
  4048. arg->sw_ver0 = ev->sw_version;
  4049. arg->sw_ver1 = ev->sw_version_1;
  4050. arg->phy_capab = ev->phy_capability;
  4051. arg->num_rf_chains = ev->num_rf_chains;
  4052. arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
  4053. arg->num_mem_reqs = ev->num_mem_reqs;
  4054. arg->service_map = ev->wmi_service_bitmap;
  4055. arg->service_map_len = sizeof(ev->wmi_service_bitmap);
  4056. n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
  4057. ARRAY_SIZE(arg->mem_reqs));
  4058. for (i = 0; i < n; i++)
  4059. arg->mem_reqs[i] = &ev->mem_reqs[i];
  4060. if (skb->len <
  4061. __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
  4062. return -EPROTO;
  4063. return 0;
  4064. }
  4065. static int
  4066. ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4067. struct wmi_svc_rdy_ev_arg *arg)
  4068. {
  4069. struct wmi_10x_service_ready_event *ev;
  4070. int i, n;
  4071. if (skb->len < sizeof(*ev))
  4072. return -EPROTO;
  4073. ev = (void *)skb->data;
  4074. skb_pull(skb, sizeof(*ev));
  4075. arg->min_tx_power = ev->hw_min_tx_power;
  4076. arg->max_tx_power = ev->hw_max_tx_power;
  4077. arg->ht_cap = ev->ht_cap_info;
  4078. arg->vht_cap = ev->vht_cap_info;
  4079. arg->sw_ver0 = ev->sw_version;
  4080. arg->phy_capab = ev->phy_capability;
  4081. arg->num_rf_chains = ev->num_rf_chains;
  4082. arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
  4083. arg->num_mem_reqs = ev->num_mem_reqs;
  4084. arg->service_map = ev->wmi_service_bitmap;
  4085. arg->service_map_len = sizeof(ev->wmi_service_bitmap);
  4086. n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
  4087. ARRAY_SIZE(arg->mem_reqs));
  4088. for (i = 0; i < n; i++)
  4089. arg->mem_reqs[i] = &ev->mem_reqs[i];
  4090. if (skb->len <
  4091. __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
  4092. return -EPROTO;
  4093. return 0;
  4094. }
  4095. static void ath10k_wmi_event_service_ready_work(struct work_struct *work)
  4096. {
  4097. struct ath10k *ar = container_of(work, struct ath10k, svc_rdy_work);
  4098. struct sk_buff *skb = ar->svc_rdy_skb;
  4099. struct wmi_svc_rdy_ev_arg arg = {};
  4100. u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
  4101. int ret;
  4102. bool allocated;
  4103. if (!skb) {
  4104. ath10k_warn(ar, "invalid service ready event skb\n");
  4105. return;
  4106. }
  4107. ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg);
  4108. if (ret) {
  4109. ath10k_warn(ar, "failed to parse service ready: %d\n", ret);
  4110. return;
  4111. }
  4112. memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map));
  4113. ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map,
  4114. arg.service_map_len);
  4115. ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power);
  4116. ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power);
  4117. ar->ht_cap_info = __le32_to_cpu(arg.ht_cap);
  4118. ar->vht_cap_info = __le32_to_cpu(arg.vht_cap);
  4119. ar->fw_version_major =
  4120. (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24;
  4121. ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff);
  4122. ar->fw_version_release =
  4123. (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16;
  4124. ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff);
  4125. ar->phy_capability = __le32_to_cpu(arg.phy_capab);
  4126. ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
  4127. ar->hw_eeprom_rd = __le32_to_cpu(arg.eeprom_rd);
  4128. ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
  4129. arg.service_map, arg.service_map_len);
  4130. if (ar->num_rf_chains > ar->max_spatial_stream) {
  4131. ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
  4132. ar->num_rf_chains, ar->max_spatial_stream);
  4133. ar->num_rf_chains = ar->max_spatial_stream;
  4134. }
  4135. if (!ar->cfg_tx_chainmask) {
  4136. ar->cfg_tx_chainmask = (1 << ar->num_rf_chains) - 1;
  4137. ar->cfg_rx_chainmask = (1 << ar->num_rf_chains) - 1;
  4138. }
  4139. if (strlen(ar->hw->wiphy->fw_version) == 0) {
  4140. snprintf(ar->hw->wiphy->fw_version,
  4141. sizeof(ar->hw->wiphy->fw_version),
  4142. "%u.%u.%u.%u",
  4143. ar->fw_version_major,
  4144. ar->fw_version_minor,
  4145. ar->fw_version_release,
  4146. ar->fw_version_build);
  4147. }
  4148. num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs);
  4149. if (num_mem_reqs > WMI_MAX_MEM_REQS) {
  4150. ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
  4151. num_mem_reqs);
  4152. return;
  4153. }
  4154. if (test_bit(WMI_SERVICE_PEER_CACHING, ar->wmi.svc_map)) {
  4155. if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
  4156. ar->running_fw->fw_file.fw_features))
  4157. ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS_PFC +
  4158. ar->max_num_vdevs;
  4159. else
  4160. ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS +
  4161. ar->max_num_vdevs;
  4162. ar->max_num_peers = TARGET_10_4_NUM_QCACHE_PEERS_MAX +
  4163. ar->max_num_vdevs;
  4164. ar->num_tids = ar->num_active_peers * 2;
  4165. ar->max_num_stations = TARGET_10_4_NUM_QCACHE_PEERS_MAX;
  4166. }
  4167. /* TODO: Adjust max peer count for cases like WMI_SERVICE_RATECTRL_CACHE
  4168. * and WMI_SERVICE_IRAM_TIDS, etc.
  4169. */
  4170. allocated = ath10k_wmi_is_host_mem_allocated(ar, arg.mem_reqs,
  4171. num_mem_reqs);
  4172. if (allocated)
  4173. goto skip_mem_alloc;
  4174. /* Either this event is received during boot time or there is a change
  4175. * in memory requirement from firmware when compared to last request.
  4176. * Free any old memory and do a fresh allocation based on the current
  4177. * memory requirement.
  4178. */
  4179. ath10k_wmi_free_host_mem(ar);
  4180. for (i = 0; i < num_mem_reqs; ++i) {
  4181. req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id);
  4182. num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units);
  4183. unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size);
  4184. num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info);
  4185. if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
  4186. if (ar->num_active_peers)
  4187. num_units = ar->num_active_peers + 1;
  4188. else
  4189. num_units = ar->max_num_peers + 1;
  4190. } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
  4191. /* number of units to allocate is number of
  4192. * peers, 1 extra for self peer on target */
  4193. /* this needs to be tied, host and target
  4194. * can get out of sync */
  4195. num_units = ar->max_num_peers + 1;
  4196. } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
  4197. num_units = ar->max_num_vdevs + 1;
  4198. }
  4199. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4200. "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
  4201. req_id,
  4202. __le32_to_cpu(arg.mem_reqs[i]->num_units),
  4203. num_unit_info,
  4204. unit_size,
  4205. num_units);
  4206. ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
  4207. unit_size);
  4208. if (ret)
  4209. return;
  4210. }
  4211. skip_mem_alloc:
  4212. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4213. "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n",
  4214. __le32_to_cpu(arg.min_tx_power),
  4215. __le32_to_cpu(arg.max_tx_power),
  4216. __le32_to_cpu(arg.ht_cap),
  4217. __le32_to_cpu(arg.vht_cap),
  4218. __le32_to_cpu(arg.sw_ver0),
  4219. __le32_to_cpu(arg.sw_ver1),
  4220. __le32_to_cpu(arg.fw_build),
  4221. __le32_to_cpu(arg.phy_capab),
  4222. __le32_to_cpu(arg.num_rf_chains),
  4223. __le32_to_cpu(arg.eeprom_rd),
  4224. __le32_to_cpu(arg.num_mem_reqs));
  4225. dev_kfree_skb(skb);
  4226. ar->svc_rdy_skb = NULL;
  4227. complete(&ar->wmi.service_ready);
  4228. }
  4229. void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb)
  4230. {
  4231. ar->svc_rdy_skb = skb;
  4232. queue_work(ar->workqueue_aux, &ar->svc_rdy_work);
  4233. }
  4234. static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4235. struct wmi_rdy_ev_arg *arg)
  4236. {
  4237. struct wmi_ready_event *ev = (void *)skb->data;
  4238. if (skb->len < sizeof(*ev))
  4239. return -EPROTO;
  4240. skb_pull(skb, sizeof(*ev));
  4241. arg->sw_version = ev->sw_version;
  4242. arg->abi_version = ev->abi_version;
  4243. arg->status = ev->status;
  4244. arg->mac_addr = ev->mac_addr.addr;
  4245. return 0;
  4246. }
  4247. static int ath10k_wmi_op_pull_roam_ev(struct ath10k *ar, struct sk_buff *skb,
  4248. struct wmi_roam_ev_arg *arg)
  4249. {
  4250. struct wmi_roam_ev *ev = (void *)skb->data;
  4251. if (skb->len < sizeof(*ev))
  4252. return -EPROTO;
  4253. skb_pull(skb, sizeof(*ev));
  4254. arg->vdev_id = ev->vdev_id;
  4255. arg->reason = ev->reason;
  4256. return 0;
  4257. }
  4258. static int ath10k_wmi_op_pull_echo_ev(struct ath10k *ar,
  4259. struct sk_buff *skb,
  4260. struct wmi_echo_ev_arg *arg)
  4261. {
  4262. struct wmi_echo_event *ev = (void *)skb->data;
  4263. arg->value = ev->value;
  4264. return 0;
  4265. }
  4266. int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb)
  4267. {
  4268. struct wmi_rdy_ev_arg arg = {};
  4269. int ret;
  4270. ret = ath10k_wmi_pull_rdy(ar, skb, &arg);
  4271. if (ret) {
  4272. ath10k_warn(ar, "failed to parse ready event: %d\n", ret);
  4273. return ret;
  4274. }
  4275. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4276. "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n",
  4277. __le32_to_cpu(arg.sw_version),
  4278. __le32_to_cpu(arg.abi_version),
  4279. arg.mac_addr,
  4280. __le32_to_cpu(arg.status));
  4281. ether_addr_copy(ar->mac_addr, arg.mac_addr);
  4282. complete(&ar->wmi.unified_ready);
  4283. return 0;
  4284. }
  4285. static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb)
  4286. {
  4287. const struct wmi_pdev_temperature_event *ev;
  4288. ev = (struct wmi_pdev_temperature_event *)skb->data;
  4289. if (WARN_ON(skb->len < sizeof(*ev)))
  4290. return -EPROTO;
  4291. ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature));
  4292. return 0;
  4293. }
  4294. static int ath10k_wmi_event_pdev_bss_chan_info(struct ath10k *ar,
  4295. struct sk_buff *skb)
  4296. {
  4297. struct wmi_pdev_bss_chan_info_event *ev;
  4298. struct survey_info *survey;
  4299. u64 busy, total, tx, rx, rx_bss;
  4300. u32 freq, noise_floor;
  4301. u32 cc_freq_hz = ar->hw_params.channel_counters_freq_hz;
  4302. int idx;
  4303. ev = (struct wmi_pdev_bss_chan_info_event *)skb->data;
  4304. if (WARN_ON(skb->len < sizeof(*ev)))
  4305. return -EPROTO;
  4306. freq = __le32_to_cpu(ev->freq);
  4307. noise_floor = __le32_to_cpu(ev->noise_floor);
  4308. busy = __le64_to_cpu(ev->cycle_busy);
  4309. total = __le64_to_cpu(ev->cycle_total);
  4310. tx = __le64_to_cpu(ev->cycle_tx);
  4311. rx = __le64_to_cpu(ev->cycle_rx);
  4312. rx_bss = __le64_to_cpu(ev->cycle_rx_bss);
  4313. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4314. "wmi event pdev bss chan info:\n freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n",
  4315. freq, noise_floor, busy, total, tx, rx, rx_bss);
  4316. spin_lock_bh(&ar->data_lock);
  4317. idx = freq_to_idx(ar, freq);
  4318. if (idx >= ARRAY_SIZE(ar->survey)) {
  4319. ath10k_warn(ar, "bss chan info: invalid frequency %d (idx %d out of bounds)\n",
  4320. freq, idx);
  4321. goto exit;
  4322. }
  4323. survey = &ar->survey[idx];
  4324. survey->noise = noise_floor;
  4325. survey->time = div_u64(total, cc_freq_hz);
  4326. survey->time_busy = div_u64(busy, cc_freq_hz);
  4327. survey->time_rx = div_u64(rx_bss, cc_freq_hz);
  4328. survey->time_tx = div_u64(tx, cc_freq_hz);
  4329. survey->filled |= (SURVEY_INFO_NOISE_DBM |
  4330. SURVEY_INFO_TIME |
  4331. SURVEY_INFO_TIME_BUSY |
  4332. SURVEY_INFO_TIME_RX |
  4333. SURVEY_INFO_TIME_TX);
  4334. exit:
  4335. spin_unlock_bh(&ar->data_lock);
  4336. complete(&ar->bss_survey_done);
  4337. return 0;
  4338. }
  4339. static inline void ath10k_wmi_queue_set_coverage_class_work(struct ath10k *ar)
  4340. {
  4341. if (ar->hw_params.hw_ops->set_coverage_class) {
  4342. spin_lock_bh(&ar->data_lock);
  4343. /* This call only ensures that the modified coverage class
  4344. * persists in case the firmware sets the registers back to
  4345. * their default value. So calling it is only necessary if the
  4346. * coverage class has a non-zero value.
  4347. */
  4348. if (ar->fw_coverage.coverage_class)
  4349. queue_work(ar->workqueue, &ar->set_coverage_class_work);
  4350. spin_unlock_bh(&ar->data_lock);
  4351. }
  4352. }
  4353. static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4354. {
  4355. struct wmi_cmd_hdr *cmd_hdr;
  4356. enum wmi_event_id id;
  4357. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4358. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4359. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  4360. goto out;
  4361. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4362. switch (id) {
  4363. case WMI_MGMT_RX_EVENTID:
  4364. ath10k_wmi_event_mgmt_rx(ar, skb);
  4365. /* mgmt_rx() owns the skb now! */
  4366. return;
  4367. case WMI_SCAN_EVENTID:
  4368. ath10k_wmi_event_scan(ar, skb);
  4369. ath10k_wmi_queue_set_coverage_class_work(ar);
  4370. break;
  4371. case WMI_CHAN_INFO_EVENTID:
  4372. ath10k_wmi_event_chan_info(ar, skb);
  4373. break;
  4374. case WMI_ECHO_EVENTID:
  4375. ath10k_wmi_event_echo(ar, skb);
  4376. break;
  4377. case WMI_DEBUG_MESG_EVENTID:
  4378. ath10k_wmi_event_debug_mesg(ar, skb);
  4379. ath10k_wmi_queue_set_coverage_class_work(ar);
  4380. break;
  4381. case WMI_UPDATE_STATS_EVENTID:
  4382. ath10k_wmi_event_update_stats(ar, skb);
  4383. break;
  4384. case WMI_VDEV_START_RESP_EVENTID:
  4385. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4386. ath10k_wmi_queue_set_coverage_class_work(ar);
  4387. break;
  4388. case WMI_VDEV_STOPPED_EVENTID:
  4389. ath10k_wmi_event_vdev_stopped(ar, skb);
  4390. ath10k_wmi_queue_set_coverage_class_work(ar);
  4391. break;
  4392. case WMI_PEER_STA_KICKOUT_EVENTID:
  4393. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  4394. break;
  4395. case WMI_HOST_SWBA_EVENTID:
  4396. ath10k_wmi_event_host_swba(ar, skb);
  4397. break;
  4398. case WMI_TBTTOFFSET_UPDATE_EVENTID:
  4399. ath10k_wmi_event_tbttoffset_update(ar, skb);
  4400. break;
  4401. case WMI_PHYERR_EVENTID:
  4402. ath10k_wmi_event_phyerr(ar, skb);
  4403. break;
  4404. case WMI_ROAM_EVENTID:
  4405. ath10k_wmi_event_roam(ar, skb);
  4406. ath10k_wmi_queue_set_coverage_class_work(ar);
  4407. break;
  4408. case WMI_PROFILE_MATCH:
  4409. ath10k_wmi_event_profile_match(ar, skb);
  4410. break;
  4411. case WMI_DEBUG_PRINT_EVENTID:
  4412. ath10k_wmi_event_debug_print(ar, skb);
  4413. ath10k_wmi_queue_set_coverage_class_work(ar);
  4414. break;
  4415. case WMI_PDEV_QVIT_EVENTID:
  4416. ath10k_wmi_event_pdev_qvit(ar, skb);
  4417. break;
  4418. case WMI_WLAN_PROFILE_DATA_EVENTID:
  4419. ath10k_wmi_event_wlan_profile_data(ar, skb);
  4420. break;
  4421. case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
  4422. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  4423. break;
  4424. case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
  4425. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  4426. break;
  4427. case WMI_RTT_ERROR_REPORT_EVENTID:
  4428. ath10k_wmi_event_rtt_error_report(ar, skb);
  4429. break;
  4430. case WMI_WOW_WAKEUP_HOST_EVENTID:
  4431. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  4432. break;
  4433. case WMI_DCS_INTERFERENCE_EVENTID:
  4434. ath10k_wmi_event_dcs_interference(ar, skb);
  4435. break;
  4436. case WMI_PDEV_TPC_CONFIG_EVENTID:
  4437. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  4438. break;
  4439. case WMI_PDEV_FTM_INTG_EVENTID:
  4440. ath10k_wmi_event_pdev_ftm_intg(ar, skb);
  4441. break;
  4442. case WMI_GTK_OFFLOAD_STATUS_EVENTID:
  4443. ath10k_wmi_event_gtk_offload_status(ar, skb);
  4444. break;
  4445. case WMI_GTK_REKEY_FAIL_EVENTID:
  4446. ath10k_wmi_event_gtk_rekey_fail(ar, skb);
  4447. break;
  4448. case WMI_TX_DELBA_COMPLETE_EVENTID:
  4449. ath10k_wmi_event_delba_complete(ar, skb);
  4450. break;
  4451. case WMI_TX_ADDBA_COMPLETE_EVENTID:
  4452. ath10k_wmi_event_addba_complete(ar, skb);
  4453. break;
  4454. case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
  4455. ath10k_wmi_event_vdev_install_key_complete(ar, skb);
  4456. break;
  4457. case WMI_SERVICE_READY_EVENTID:
  4458. ath10k_wmi_event_service_ready(ar, skb);
  4459. return;
  4460. case WMI_READY_EVENTID:
  4461. ath10k_wmi_event_ready(ar, skb);
  4462. ath10k_wmi_queue_set_coverage_class_work(ar);
  4463. break;
  4464. default:
  4465. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  4466. break;
  4467. }
  4468. out:
  4469. dev_kfree_skb(skb);
  4470. }
  4471. static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4472. {
  4473. struct wmi_cmd_hdr *cmd_hdr;
  4474. enum wmi_10x_event_id id;
  4475. bool consumed;
  4476. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4477. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4478. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  4479. goto out;
  4480. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4481. consumed = ath10k_tm_event_wmi(ar, id, skb);
  4482. /* Ready event must be handled normally also in UTF mode so that we
  4483. * know the UTF firmware has booted, others we are just bypass WMI
  4484. * events to testmode.
  4485. */
  4486. if (consumed && id != WMI_10X_READY_EVENTID) {
  4487. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4488. "wmi testmode consumed 0x%x\n", id);
  4489. goto out;
  4490. }
  4491. switch (id) {
  4492. case WMI_10X_MGMT_RX_EVENTID:
  4493. ath10k_wmi_event_mgmt_rx(ar, skb);
  4494. /* mgmt_rx() owns the skb now! */
  4495. return;
  4496. case WMI_10X_SCAN_EVENTID:
  4497. ath10k_wmi_event_scan(ar, skb);
  4498. ath10k_wmi_queue_set_coverage_class_work(ar);
  4499. break;
  4500. case WMI_10X_CHAN_INFO_EVENTID:
  4501. ath10k_wmi_event_chan_info(ar, skb);
  4502. break;
  4503. case WMI_10X_ECHO_EVENTID:
  4504. ath10k_wmi_event_echo(ar, skb);
  4505. break;
  4506. case WMI_10X_DEBUG_MESG_EVENTID:
  4507. ath10k_wmi_event_debug_mesg(ar, skb);
  4508. ath10k_wmi_queue_set_coverage_class_work(ar);
  4509. break;
  4510. case WMI_10X_UPDATE_STATS_EVENTID:
  4511. ath10k_wmi_event_update_stats(ar, skb);
  4512. break;
  4513. case WMI_10X_VDEV_START_RESP_EVENTID:
  4514. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4515. ath10k_wmi_queue_set_coverage_class_work(ar);
  4516. break;
  4517. case WMI_10X_VDEV_STOPPED_EVENTID:
  4518. ath10k_wmi_event_vdev_stopped(ar, skb);
  4519. ath10k_wmi_queue_set_coverage_class_work(ar);
  4520. break;
  4521. case WMI_10X_PEER_STA_KICKOUT_EVENTID:
  4522. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  4523. break;
  4524. case WMI_10X_HOST_SWBA_EVENTID:
  4525. ath10k_wmi_event_host_swba(ar, skb);
  4526. break;
  4527. case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
  4528. ath10k_wmi_event_tbttoffset_update(ar, skb);
  4529. break;
  4530. case WMI_10X_PHYERR_EVENTID:
  4531. ath10k_wmi_event_phyerr(ar, skb);
  4532. break;
  4533. case WMI_10X_ROAM_EVENTID:
  4534. ath10k_wmi_event_roam(ar, skb);
  4535. ath10k_wmi_queue_set_coverage_class_work(ar);
  4536. break;
  4537. case WMI_10X_PROFILE_MATCH:
  4538. ath10k_wmi_event_profile_match(ar, skb);
  4539. break;
  4540. case WMI_10X_DEBUG_PRINT_EVENTID:
  4541. ath10k_wmi_event_debug_print(ar, skb);
  4542. ath10k_wmi_queue_set_coverage_class_work(ar);
  4543. break;
  4544. case WMI_10X_PDEV_QVIT_EVENTID:
  4545. ath10k_wmi_event_pdev_qvit(ar, skb);
  4546. break;
  4547. case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
  4548. ath10k_wmi_event_wlan_profile_data(ar, skb);
  4549. break;
  4550. case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
  4551. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  4552. break;
  4553. case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
  4554. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  4555. break;
  4556. case WMI_10X_RTT_ERROR_REPORT_EVENTID:
  4557. ath10k_wmi_event_rtt_error_report(ar, skb);
  4558. break;
  4559. case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
  4560. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  4561. break;
  4562. case WMI_10X_DCS_INTERFERENCE_EVENTID:
  4563. ath10k_wmi_event_dcs_interference(ar, skb);
  4564. break;
  4565. case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
  4566. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  4567. break;
  4568. case WMI_10X_INST_RSSI_STATS_EVENTID:
  4569. ath10k_wmi_event_inst_rssi_stats(ar, skb);
  4570. break;
  4571. case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
  4572. ath10k_wmi_event_vdev_standby_req(ar, skb);
  4573. break;
  4574. case WMI_10X_VDEV_RESUME_REQ_EVENTID:
  4575. ath10k_wmi_event_vdev_resume_req(ar, skb);
  4576. break;
  4577. case WMI_10X_SERVICE_READY_EVENTID:
  4578. ath10k_wmi_event_service_ready(ar, skb);
  4579. return;
  4580. case WMI_10X_READY_EVENTID:
  4581. ath10k_wmi_event_ready(ar, skb);
  4582. ath10k_wmi_queue_set_coverage_class_work(ar);
  4583. break;
  4584. case WMI_10X_PDEV_UTF_EVENTID:
  4585. /* ignore utf events */
  4586. break;
  4587. default:
  4588. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  4589. break;
  4590. }
  4591. out:
  4592. dev_kfree_skb(skb);
  4593. }
  4594. static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4595. {
  4596. struct wmi_cmd_hdr *cmd_hdr;
  4597. enum wmi_10_2_event_id id;
  4598. bool consumed;
  4599. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4600. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4601. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  4602. goto out;
  4603. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4604. consumed = ath10k_tm_event_wmi(ar, id, skb);
  4605. /* Ready event must be handled normally also in UTF mode so that we
  4606. * know the UTF firmware has booted, others we are just bypass WMI
  4607. * events to testmode.
  4608. */
  4609. if (consumed && id != WMI_10_2_READY_EVENTID) {
  4610. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4611. "wmi testmode consumed 0x%x\n", id);
  4612. goto out;
  4613. }
  4614. switch (id) {
  4615. case WMI_10_2_MGMT_RX_EVENTID:
  4616. ath10k_wmi_event_mgmt_rx(ar, skb);
  4617. /* mgmt_rx() owns the skb now! */
  4618. return;
  4619. case WMI_10_2_SCAN_EVENTID:
  4620. ath10k_wmi_event_scan(ar, skb);
  4621. ath10k_wmi_queue_set_coverage_class_work(ar);
  4622. break;
  4623. case WMI_10_2_CHAN_INFO_EVENTID:
  4624. ath10k_wmi_event_chan_info(ar, skb);
  4625. break;
  4626. case WMI_10_2_ECHO_EVENTID:
  4627. ath10k_wmi_event_echo(ar, skb);
  4628. break;
  4629. case WMI_10_2_DEBUG_MESG_EVENTID:
  4630. ath10k_wmi_event_debug_mesg(ar, skb);
  4631. ath10k_wmi_queue_set_coverage_class_work(ar);
  4632. break;
  4633. case WMI_10_2_UPDATE_STATS_EVENTID:
  4634. ath10k_wmi_event_update_stats(ar, skb);
  4635. break;
  4636. case WMI_10_2_VDEV_START_RESP_EVENTID:
  4637. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4638. ath10k_wmi_queue_set_coverage_class_work(ar);
  4639. break;
  4640. case WMI_10_2_VDEV_STOPPED_EVENTID:
  4641. ath10k_wmi_event_vdev_stopped(ar, skb);
  4642. ath10k_wmi_queue_set_coverage_class_work(ar);
  4643. break;
  4644. case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
  4645. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  4646. break;
  4647. case WMI_10_2_HOST_SWBA_EVENTID:
  4648. ath10k_wmi_event_host_swba(ar, skb);
  4649. break;
  4650. case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
  4651. ath10k_wmi_event_tbttoffset_update(ar, skb);
  4652. break;
  4653. case WMI_10_2_PHYERR_EVENTID:
  4654. ath10k_wmi_event_phyerr(ar, skb);
  4655. break;
  4656. case WMI_10_2_ROAM_EVENTID:
  4657. ath10k_wmi_event_roam(ar, skb);
  4658. ath10k_wmi_queue_set_coverage_class_work(ar);
  4659. break;
  4660. case WMI_10_2_PROFILE_MATCH:
  4661. ath10k_wmi_event_profile_match(ar, skb);
  4662. break;
  4663. case WMI_10_2_DEBUG_PRINT_EVENTID:
  4664. ath10k_wmi_event_debug_print(ar, skb);
  4665. ath10k_wmi_queue_set_coverage_class_work(ar);
  4666. break;
  4667. case WMI_10_2_PDEV_QVIT_EVENTID:
  4668. ath10k_wmi_event_pdev_qvit(ar, skb);
  4669. break;
  4670. case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
  4671. ath10k_wmi_event_wlan_profile_data(ar, skb);
  4672. break;
  4673. case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
  4674. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  4675. break;
  4676. case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
  4677. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  4678. break;
  4679. case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
  4680. ath10k_wmi_event_rtt_error_report(ar, skb);
  4681. break;
  4682. case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
  4683. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  4684. break;
  4685. case WMI_10_2_DCS_INTERFERENCE_EVENTID:
  4686. ath10k_wmi_event_dcs_interference(ar, skb);
  4687. break;
  4688. case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
  4689. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  4690. break;
  4691. case WMI_10_2_INST_RSSI_STATS_EVENTID:
  4692. ath10k_wmi_event_inst_rssi_stats(ar, skb);
  4693. break;
  4694. case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
  4695. ath10k_wmi_event_vdev_standby_req(ar, skb);
  4696. ath10k_wmi_queue_set_coverage_class_work(ar);
  4697. break;
  4698. case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
  4699. ath10k_wmi_event_vdev_resume_req(ar, skb);
  4700. ath10k_wmi_queue_set_coverage_class_work(ar);
  4701. break;
  4702. case WMI_10_2_SERVICE_READY_EVENTID:
  4703. ath10k_wmi_event_service_ready(ar, skb);
  4704. return;
  4705. case WMI_10_2_READY_EVENTID:
  4706. ath10k_wmi_event_ready(ar, skb);
  4707. ath10k_wmi_queue_set_coverage_class_work(ar);
  4708. break;
  4709. case WMI_10_2_PDEV_TEMPERATURE_EVENTID:
  4710. ath10k_wmi_event_temperature(ar, skb);
  4711. break;
  4712. case WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID:
  4713. ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
  4714. break;
  4715. case WMI_10_2_RTT_KEEPALIVE_EVENTID:
  4716. case WMI_10_2_GPIO_INPUT_EVENTID:
  4717. case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
  4718. case WMI_10_2_GENERIC_BUFFER_EVENTID:
  4719. case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
  4720. case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
  4721. case WMI_10_2_WDS_PEER_EVENTID:
  4722. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4723. "received event id %d not implemented\n", id);
  4724. break;
  4725. default:
  4726. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  4727. break;
  4728. }
  4729. out:
  4730. dev_kfree_skb(skb);
  4731. }
  4732. static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4733. {
  4734. struct wmi_cmd_hdr *cmd_hdr;
  4735. enum wmi_10_4_event_id id;
  4736. bool consumed;
  4737. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4738. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4739. if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
  4740. goto out;
  4741. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4742. consumed = ath10k_tm_event_wmi(ar, id, skb);
  4743. /* Ready event must be handled normally also in UTF mode so that we
  4744. * know the UTF firmware has booted, others we are just bypass WMI
  4745. * events to testmode.
  4746. */
  4747. if (consumed && id != WMI_10_4_READY_EVENTID) {
  4748. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4749. "wmi testmode consumed 0x%x\n", id);
  4750. goto out;
  4751. }
  4752. switch (id) {
  4753. case WMI_10_4_MGMT_RX_EVENTID:
  4754. ath10k_wmi_event_mgmt_rx(ar, skb);
  4755. /* mgmt_rx() owns the skb now! */
  4756. return;
  4757. case WMI_10_4_ECHO_EVENTID:
  4758. ath10k_wmi_event_echo(ar, skb);
  4759. break;
  4760. case WMI_10_4_DEBUG_MESG_EVENTID:
  4761. ath10k_wmi_event_debug_mesg(ar, skb);
  4762. ath10k_wmi_queue_set_coverage_class_work(ar);
  4763. break;
  4764. case WMI_10_4_SERVICE_READY_EVENTID:
  4765. ath10k_wmi_event_service_ready(ar, skb);
  4766. return;
  4767. case WMI_10_4_SCAN_EVENTID:
  4768. ath10k_wmi_event_scan(ar, skb);
  4769. ath10k_wmi_queue_set_coverage_class_work(ar);
  4770. break;
  4771. case WMI_10_4_CHAN_INFO_EVENTID:
  4772. ath10k_wmi_event_chan_info(ar, skb);
  4773. break;
  4774. case WMI_10_4_PHYERR_EVENTID:
  4775. ath10k_wmi_event_phyerr(ar, skb);
  4776. break;
  4777. case WMI_10_4_READY_EVENTID:
  4778. ath10k_wmi_event_ready(ar, skb);
  4779. ath10k_wmi_queue_set_coverage_class_work(ar);
  4780. break;
  4781. case WMI_10_4_PEER_STA_KICKOUT_EVENTID:
  4782. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  4783. break;
  4784. case WMI_10_4_ROAM_EVENTID:
  4785. ath10k_wmi_event_roam(ar, skb);
  4786. ath10k_wmi_queue_set_coverage_class_work(ar);
  4787. break;
  4788. case WMI_10_4_HOST_SWBA_EVENTID:
  4789. ath10k_wmi_event_host_swba(ar, skb);
  4790. break;
  4791. case WMI_10_4_TBTTOFFSET_UPDATE_EVENTID:
  4792. ath10k_wmi_event_tbttoffset_update(ar, skb);
  4793. break;
  4794. case WMI_10_4_DEBUG_PRINT_EVENTID:
  4795. ath10k_wmi_event_debug_print(ar, skb);
  4796. ath10k_wmi_queue_set_coverage_class_work(ar);
  4797. break;
  4798. case WMI_10_4_VDEV_START_RESP_EVENTID:
  4799. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4800. ath10k_wmi_queue_set_coverage_class_work(ar);
  4801. break;
  4802. case WMI_10_4_VDEV_STOPPED_EVENTID:
  4803. ath10k_wmi_event_vdev_stopped(ar, skb);
  4804. ath10k_wmi_queue_set_coverage_class_work(ar);
  4805. break;
  4806. case WMI_10_4_WOW_WAKEUP_HOST_EVENTID:
  4807. case WMI_10_4_PEER_RATECODE_LIST_EVENTID:
  4808. case WMI_10_4_WDS_PEER_EVENTID:
  4809. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4810. "received event id %d not implemented\n", id);
  4811. break;
  4812. case WMI_10_4_UPDATE_STATS_EVENTID:
  4813. ath10k_wmi_event_update_stats(ar, skb);
  4814. break;
  4815. case WMI_10_4_PDEV_TEMPERATURE_EVENTID:
  4816. ath10k_wmi_event_temperature(ar, skb);
  4817. break;
  4818. case WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID:
  4819. ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
  4820. break;
  4821. case WMI_10_4_PDEV_TPC_CONFIG_EVENTID:
  4822. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  4823. break;
  4824. default:
  4825. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  4826. break;
  4827. }
  4828. out:
  4829. dev_kfree_skb(skb);
  4830. }
  4831. static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
  4832. {
  4833. int ret;
  4834. ret = ath10k_wmi_rx(ar, skb);
  4835. if (ret)
  4836. ath10k_warn(ar, "failed to process wmi rx: %d\n", ret);
  4837. }
  4838. int ath10k_wmi_connect(struct ath10k *ar)
  4839. {
  4840. int status;
  4841. struct ath10k_htc_svc_conn_req conn_req;
  4842. struct ath10k_htc_svc_conn_resp conn_resp;
  4843. memset(&conn_req, 0, sizeof(conn_req));
  4844. memset(&conn_resp, 0, sizeof(conn_resp));
  4845. /* these fields are the same for all service endpoints */
  4846. conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
  4847. conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
  4848. conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
  4849. /* connect to control service */
  4850. conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
  4851. status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
  4852. if (status) {
  4853. ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
  4854. status);
  4855. return status;
  4856. }
  4857. ar->wmi.eid = conn_resp.eid;
  4858. return 0;
  4859. }
  4860. static struct sk_buff *
  4861. ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g,
  4862. u16 ctl2g, u16 ctl5g,
  4863. enum wmi_dfs_region dfs_reg)
  4864. {
  4865. struct wmi_pdev_set_regdomain_cmd *cmd;
  4866. struct sk_buff *skb;
  4867. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4868. if (!skb)
  4869. return ERR_PTR(-ENOMEM);
  4870. cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
  4871. cmd->reg_domain = __cpu_to_le32(rd);
  4872. cmd->reg_domain_2G = __cpu_to_le32(rd2g);
  4873. cmd->reg_domain_5G = __cpu_to_le32(rd5g);
  4874. cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
  4875. cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
  4876. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4877. "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
  4878. rd, rd2g, rd5g, ctl2g, ctl5g);
  4879. return skb;
  4880. }
  4881. static struct sk_buff *
  4882. ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16
  4883. rd5g, u16 ctl2g, u16 ctl5g,
  4884. enum wmi_dfs_region dfs_reg)
  4885. {
  4886. struct wmi_pdev_set_regdomain_cmd_10x *cmd;
  4887. struct sk_buff *skb;
  4888. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4889. if (!skb)
  4890. return ERR_PTR(-ENOMEM);
  4891. cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
  4892. cmd->reg_domain = __cpu_to_le32(rd);
  4893. cmd->reg_domain_2G = __cpu_to_le32(rd2g);
  4894. cmd->reg_domain_5G = __cpu_to_le32(rd5g);
  4895. cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
  4896. cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
  4897. cmd->dfs_domain = __cpu_to_le32(dfs_reg);
  4898. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4899. "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
  4900. rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
  4901. return skb;
  4902. }
  4903. static struct sk_buff *
  4904. ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt)
  4905. {
  4906. struct wmi_pdev_suspend_cmd *cmd;
  4907. struct sk_buff *skb;
  4908. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4909. if (!skb)
  4910. return ERR_PTR(-ENOMEM);
  4911. cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
  4912. cmd->suspend_opt = __cpu_to_le32(suspend_opt);
  4913. return skb;
  4914. }
  4915. static struct sk_buff *
  4916. ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar)
  4917. {
  4918. struct sk_buff *skb;
  4919. skb = ath10k_wmi_alloc_skb(ar, 0);
  4920. if (!skb)
  4921. return ERR_PTR(-ENOMEM);
  4922. return skb;
  4923. }
  4924. static struct sk_buff *
  4925. ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
  4926. {
  4927. struct wmi_pdev_set_param_cmd *cmd;
  4928. struct sk_buff *skb;
  4929. if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
  4930. ath10k_warn(ar, "pdev param %d not supported by firmware\n",
  4931. id);
  4932. return ERR_PTR(-EOPNOTSUPP);
  4933. }
  4934. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4935. if (!skb)
  4936. return ERR_PTR(-ENOMEM);
  4937. cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
  4938. cmd->param_id = __cpu_to_le32(id);
  4939. cmd->param_value = __cpu_to_le32(value);
  4940. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
  4941. id, value);
  4942. return skb;
  4943. }
  4944. void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
  4945. struct wmi_host_mem_chunks *chunks)
  4946. {
  4947. struct host_memory_chunk *chunk;
  4948. int i;
  4949. chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks);
  4950. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  4951. chunk = &chunks->items[i];
  4952. chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
  4953. chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len);
  4954. chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
  4955. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4956. "wmi chunk %d len %d requested, addr 0x%llx\n",
  4957. i,
  4958. ar->wmi.mem_chunks[i].len,
  4959. (unsigned long long)ar->wmi.mem_chunks[i].paddr);
  4960. }
  4961. }
  4962. static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar)
  4963. {
  4964. struct wmi_init_cmd *cmd;
  4965. struct sk_buff *buf;
  4966. struct wmi_resource_config config = {};
  4967. u32 len, val;
  4968. config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
  4969. config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS);
  4970. config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
  4971. config.num_offload_reorder_bufs =
  4972. __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
  4973. config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
  4974. config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
  4975. config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
  4976. config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
  4977. config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
  4978. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  4979. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  4980. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  4981. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
  4982. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  4983. config.scan_max_pending_reqs =
  4984. __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
  4985. config.bmiss_offload_max_vdev =
  4986. __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
  4987. config.roam_offload_max_vdev =
  4988. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
  4989. config.roam_offload_max_ap_profiles =
  4990. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
  4991. config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
  4992. config.num_mcast_table_elems =
  4993. __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
  4994. config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
  4995. config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
  4996. config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
  4997. config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
  4998. config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
  4999. val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  5000. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  5001. config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
  5002. config.gtk_offload_max_vdev =
  5003. __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
  5004. config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
  5005. config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
  5006. len = sizeof(*cmd) +
  5007. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5008. buf = ath10k_wmi_alloc_skb(ar, len);
  5009. if (!buf)
  5010. return ERR_PTR(-ENOMEM);
  5011. cmd = (struct wmi_init_cmd *)buf->data;
  5012. memcpy(&cmd->resource_config, &config, sizeof(config));
  5013. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5014. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
  5015. return buf;
  5016. }
  5017. static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar)
  5018. {
  5019. struct wmi_init_cmd_10x *cmd;
  5020. struct sk_buff *buf;
  5021. struct wmi_resource_config_10x config = {};
  5022. u32 len, val;
  5023. config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
  5024. config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
  5025. config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
  5026. config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
  5027. config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
  5028. config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
  5029. config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
  5030. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5031. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5032. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5033. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
  5034. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5035. config.scan_max_pending_reqs =
  5036. __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
  5037. config.bmiss_offload_max_vdev =
  5038. __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
  5039. config.roam_offload_max_vdev =
  5040. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
  5041. config.roam_offload_max_ap_profiles =
  5042. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
  5043. config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
  5044. config.num_mcast_table_elems =
  5045. __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
  5046. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
  5047. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
  5048. config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
  5049. config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
  5050. config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
  5051. val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  5052. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  5053. config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
  5054. config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
  5055. config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
  5056. len = sizeof(*cmd) +
  5057. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5058. buf = ath10k_wmi_alloc_skb(ar, len);
  5059. if (!buf)
  5060. return ERR_PTR(-ENOMEM);
  5061. cmd = (struct wmi_init_cmd_10x *)buf->data;
  5062. memcpy(&cmd->resource_config, &config, sizeof(config));
  5063. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5064. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
  5065. return buf;
  5066. }
  5067. static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar)
  5068. {
  5069. struct wmi_init_cmd_10_2 *cmd;
  5070. struct sk_buff *buf;
  5071. struct wmi_resource_config_10x config = {};
  5072. u32 len, val, features;
  5073. config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
  5074. config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
  5075. if (ath10k_peer_stats_enabled(ar)) {
  5076. config.num_peers = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_PEERS);
  5077. config.num_tids = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_TIDS);
  5078. } else {
  5079. config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
  5080. config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
  5081. }
  5082. config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
  5083. config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
  5084. config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
  5085. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5086. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5087. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5088. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
  5089. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5090. config.scan_max_pending_reqs =
  5091. __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
  5092. config.bmiss_offload_max_vdev =
  5093. __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
  5094. config.roam_offload_max_vdev =
  5095. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
  5096. config.roam_offload_max_ap_profiles =
  5097. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
  5098. config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
  5099. config.num_mcast_table_elems =
  5100. __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
  5101. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
  5102. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
  5103. config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
  5104. config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE);
  5105. config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
  5106. val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  5107. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  5108. config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
  5109. config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
  5110. config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
  5111. len = sizeof(*cmd) +
  5112. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5113. buf = ath10k_wmi_alloc_skb(ar, len);
  5114. if (!buf)
  5115. return ERR_PTR(-ENOMEM);
  5116. cmd = (struct wmi_init_cmd_10_2 *)buf->data;
  5117. features = WMI_10_2_RX_BATCH_MODE;
  5118. if (test_bit(ATH10K_FLAG_BTCOEX, &ar->dev_flags) &&
  5119. test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map))
  5120. features |= WMI_10_2_COEX_GPIO;
  5121. if (ath10k_peer_stats_enabled(ar))
  5122. features |= WMI_10_2_PEER_STATS;
  5123. if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
  5124. features |= WMI_10_2_BSS_CHAN_INFO;
  5125. cmd->resource_config.feature_mask = __cpu_to_le32(features);
  5126. memcpy(&cmd->resource_config.common, &config, sizeof(config));
  5127. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5128. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
  5129. return buf;
  5130. }
  5131. static struct sk_buff *ath10k_wmi_10_4_op_gen_init(struct ath10k *ar)
  5132. {
  5133. struct wmi_init_cmd_10_4 *cmd;
  5134. struct sk_buff *buf;
  5135. struct wmi_resource_config_10_4 config = {};
  5136. u32 len;
  5137. config.num_vdevs = __cpu_to_le32(ar->max_num_vdevs);
  5138. config.num_peers = __cpu_to_le32(ar->max_num_peers);
  5139. config.num_active_peers = __cpu_to_le32(ar->num_active_peers);
  5140. config.num_tids = __cpu_to_le32(ar->num_tids);
  5141. config.num_offload_peers = __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_PEERS);
  5142. config.num_offload_reorder_buffs =
  5143. __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_REORDER_BUFFS);
  5144. config.num_peer_keys = __cpu_to_le32(TARGET_10_4_NUM_PEER_KEYS);
  5145. config.ast_skid_limit = __cpu_to_le32(TARGET_10_4_AST_SKID_LIMIT);
  5146. config.tx_chain_mask = __cpu_to_le32(ar->hw_params.tx_chain_mask);
  5147. config.rx_chain_mask = __cpu_to_le32(ar->hw_params.rx_chain_mask);
  5148. config.rx_timeout_pri[0] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  5149. config.rx_timeout_pri[1] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  5150. config.rx_timeout_pri[2] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  5151. config.rx_timeout_pri[3] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_HI_PRI);
  5152. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5153. config.scan_max_pending_req = __cpu_to_le32(TARGET_10_4_SCAN_MAX_REQS);
  5154. config.bmiss_offload_max_vdev =
  5155. __cpu_to_le32(TARGET_10_4_BMISS_OFFLOAD_MAX_VDEV);
  5156. config.roam_offload_max_vdev =
  5157. __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_VDEV);
  5158. config.roam_offload_max_ap_profiles =
  5159. __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_PROFILES);
  5160. config.num_mcast_groups = __cpu_to_le32(TARGET_10_4_NUM_MCAST_GROUPS);
  5161. config.num_mcast_table_elems =
  5162. __cpu_to_le32(TARGET_10_4_NUM_MCAST_TABLE_ELEMS);
  5163. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10_4_MCAST2UCAST_MODE);
  5164. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10_4_TX_DBG_LOG_SIZE);
  5165. config.num_wds_entries = __cpu_to_le32(TARGET_10_4_NUM_WDS_ENTRIES);
  5166. config.dma_burst_size = __cpu_to_le32(TARGET_10_4_DMA_BURST_SIZE);
  5167. config.mac_aggr_delim = __cpu_to_le32(TARGET_10_4_MAC_AGGR_DELIM);
  5168. config.rx_skip_defrag_timeout_dup_detection_check =
  5169. __cpu_to_le32(TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK);
  5170. config.vow_config = __cpu_to_le32(TARGET_10_4_VOW_CONFIG);
  5171. config.gtk_offload_max_vdev =
  5172. __cpu_to_le32(TARGET_10_4_GTK_OFFLOAD_MAX_VDEV);
  5173. config.num_msdu_desc = __cpu_to_le32(ar->htt.max_num_pending_tx);
  5174. config.max_frag_entries = __cpu_to_le32(TARGET_10_4_11AC_TX_MAX_FRAGS);
  5175. config.max_peer_ext_stats =
  5176. __cpu_to_le32(TARGET_10_4_MAX_PEER_EXT_STATS);
  5177. config.smart_ant_cap = __cpu_to_le32(TARGET_10_4_SMART_ANT_CAP);
  5178. config.bk_minfree = __cpu_to_le32(TARGET_10_4_BK_MIN_FREE);
  5179. config.be_minfree = __cpu_to_le32(TARGET_10_4_BE_MIN_FREE);
  5180. config.vi_minfree = __cpu_to_le32(TARGET_10_4_VI_MIN_FREE);
  5181. config.vo_minfree = __cpu_to_le32(TARGET_10_4_VO_MIN_FREE);
  5182. config.rx_batchmode = __cpu_to_le32(TARGET_10_4_RX_BATCH_MODE);
  5183. config.tt_support =
  5184. __cpu_to_le32(TARGET_10_4_THERMAL_THROTTLING_CONFIG);
  5185. config.atf_config = __cpu_to_le32(TARGET_10_4_ATF_CONFIG);
  5186. config.iphdr_pad_config = __cpu_to_le32(TARGET_10_4_IPHDR_PAD_CONFIG);
  5187. config.qwrap_config = __cpu_to_le32(TARGET_10_4_QWRAP_CONFIG);
  5188. len = sizeof(*cmd) +
  5189. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5190. buf = ath10k_wmi_alloc_skb(ar, len);
  5191. if (!buf)
  5192. return ERR_PTR(-ENOMEM);
  5193. cmd = (struct wmi_init_cmd_10_4 *)buf->data;
  5194. memcpy(&cmd->resource_config, &config, sizeof(config));
  5195. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5196. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.4\n");
  5197. return buf;
  5198. }
  5199. int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg)
  5200. {
  5201. if (arg->ie_len && !arg->ie)
  5202. return -EINVAL;
  5203. if (arg->n_channels && !arg->channels)
  5204. return -EINVAL;
  5205. if (arg->n_ssids && !arg->ssids)
  5206. return -EINVAL;
  5207. if (arg->n_bssids && !arg->bssids)
  5208. return -EINVAL;
  5209. if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
  5210. return -EINVAL;
  5211. if (arg->n_channels > ARRAY_SIZE(arg->channels))
  5212. return -EINVAL;
  5213. if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
  5214. return -EINVAL;
  5215. if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
  5216. return -EINVAL;
  5217. return 0;
  5218. }
  5219. static size_t
  5220. ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg)
  5221. {
  5222. int len = 0;
  5223. if (arg->ie_len) {
  5224. len += sizeof(struct wmi_ie_data);
  5225. len += roundup(arg->ie_len, 4);
  5226. }
  5227. if (arg->n_channels) {
  5228. len += sizeof(struct wmi_chan_list);
  5229. len += sizeof(__le32) * arg->n_channels;
  5230. }
  5231. if (arg->n_ssids) {
  5232. len += sizeof(struct wmi_ssid_list);
  5233. len += sizeof(struct wmi_ssid) * arg->n_ssids;
  5234. }
  5235. if (arg->n_bssids) {
  5236. len += sizeof(struct wmi_bssid_list);
  5237. len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  5238. }
  5239. return len;
  5240. }
  5241. void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
  5242. const struct wmi_start_scan_arg *arg)
  5243. {
  5244. u32 scan_id;
  5245. u32 scan_req_id;
  5246. scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
  5247. scan_id |= arg->scan_id;
  5248. scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  5249. scan_req_id |= arg->scan_req_id;
  5250. cmn->scan_id = __cpu_to_le32(scan_id);
  5251. cmn->scan_req_id = __cpu_to_le32(scan_req_id);
  5252. cmn->vdev_id = __cpu_to_le32(arg->vdev_id);
  5253. cmn->scan_priority = __cpu_to_le32(arg->scan_priority);
  5254. cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
  5255. cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
  5256. cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
  5257. cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time);
  5258. cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time);
  5259. cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
  5260. cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
  5261. cmn->idle_time = __cpu_to_le32(arg->idle_time);
  5262. cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time);
  5263. cmn->probe_delay = __cpu_to_le32(arg->probe_delay);
  5264. cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
  5265. }
  5266. static void
  5267. ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs,
  5268. const struct wmi_start_scan_arg *arg)
  5269. {
  5270. struct wmi_ie_data *ie;
  5271. struct wmi_chan_list *channels;
  5272. struct wmi_ssid_list *ssids;
  5273. struct wmi_bssid_list *bssids;
  5274. void *ptr = tlvs->tlvs;
  5275. int i;
  5276. if (arg->n_channels) {
  5277. channels = ptr;
  5278. channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
  5279. channels->num_chan = __cpu_to_le32(arg->n_channels);
  5280. for (i = 0; i < arg->n_channels; i++)
  5281. channels->channel_list[i].freq =
  5282. __cpu_to_le16(arg->channels[i]);
  5283. ptr += sizeof(*channels);
  5284. ptr += sizeof(__le32) * arg->n_channels;
  5285. }
  5286. if (arg->n_ssids) {
  5287. ssids = ptr;
  5288. ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
  5289. ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
  5290. for (i = 0; i < arg->n_ssids; i++) {
  5291. ssids->ssids[i].ssid_len =
  5292. __cpu_to_le32(arg->ssids[i].len);
  5293. memcpy(&ssids->ssids[i].ssid,
  5294. arg->ssids[i].ssid,
  5295. arg->ssids[i].len);
  5296. }
  5297. ptr += sizeof(*ssids);
  5298. ptr += sizeof(struct wmi_ssid) * arg->n_ssids;
  5299. }
  5300. if (arg->n_bssids) {
  5301. bssids = ptr;
  5302. bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
  5303. bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
  5304. for (i = 0; i < arg->n_bssids; i++)
  5305. ether_addr_copy(bssids->bssid_list[i].addr,
  5306. arg->bssids[i].bssid);
  5307. ptr += sizeof(*bssids);
  5308. ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  5309. }
  5310. if (arg->ie_len) {
  5311. ie = ptr;
  5312. ie->tag = __cpu_to_le32(WMI_IE_TAG);
  5313. ie->ie_len = __cpu_to_le32(arg->ie_len);
  5314. memcpy(ie->ie_data, arg->ie, arg->ie_len);
  5315. ptr += sizeof(*ie);
  5316. ptr += roundup(arg->ie_len, 4);
  5317. }
  5318. }
  5319. static struct sk_buff *
  5320. ath10k_wmi_op_gen_start_scan(struct ath10k *ar,
  5321. const struct wmi_start_scan_arg *arg)
  5322. {
  5323. struct wmi_start_scan_cmd *cmd;
  5324. struct sk_buff *skb;
  5325. size_t len;
  5326. int ret;
  5327. ret = ath10k_wmi_start_scan_verify(arg);
  5328. if (ret)
  5329. return ERR_PTR(ret);
  5330. len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
  5331. skb = ath10k_wmi_alloc_skb(ar, len);
  5332. if (!skb)
  5333. return ERR_PTR(-ENOMEM);
  5334. cmd = (struct wmi_start_scan_cmd *)skb->data;
  5335. ath10k_wmi_put_start_scan_common(&cmd->common, arg);
  5336. ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
  5337. cmd->burst_duration_ms = __cpu_to_le32(0);
  5338. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
  5339. return skb;
  5340. }
  5341. static struct sk_buff *
  5342. ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar,
  5343. const struct wmi_start_scan_arg *arg)
  5344. {
  5345. struct wmi_10x_start_scan_cmd *cmd;
  5346. struct sk_buff *skb;
  5347. size_t len;
  5348. int ret;
  5349. ret = ath10k_wmi_start_scan_verify(arg);
  5350. if (ret)
  5351. return ERR_PTR(ret);
  5352. len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
  5353. skb = ath10k_wmi_alloc_skb(ar, len);
  5354. if (!skb)
  5355. return ERR_PTR(-ENOMEM);
  5356. cmd = (struct wmi_10x_start_scan_cmd *)skb->data;
  5357. ath10k_wmi_put_start_scan_common(&cmd->common, arg);
  5358. ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
  5359. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n");
  5360. return skb;
  5361. }
  5362. void ath10k_wmi_start_scan_init(struct ath10k *ar,
  5363. struct wmi_start_scan_arg *arg)
  5364. {
  5365. /* setup commonly used values */
  5366. arg->scan_req_id = 1;
  5367. arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
  5368. arg->dwell_time_active = 50;
  5369. arg->dwell_time_passive = 150;
  5370. arg->min_rest_time = 50;
  5371. arg->max_rest_time = 500;
  5372. arg->repeat_probe_time = 0;
  5373. arg->probe_spacing_time = 0;
  5374. arg->idle_time = 0;
  5375. arg->max_scan_time = 20000;
  5376. arg->probe_delay = 5;
  5377. arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
  5378. | WMI_SCAN_EVENT_COMPLETED
  5379. | WMI_SCAN_EVENT_BSS_CHANNEL
  5380. | WMI_SCAN_EVENT_FOREIGN_CHANNEL
  5381. | WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT
  5382. | WMI_SCAN_EVENT_DEQUEUED;
  5383. arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
  5384. arg->n_bssids = 1;
  5385. arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
  5386. }
  5387. static struct sk_buff *
  5388. ath10k_wmi_op_gen_stop_scan(struct ath10k *ar,
  5389. const struct wmi_stop_scan_arg *arg)
  5390. {
  5391. struct wmi_stop_scan_cmd *cmd;
  5392. struct sk_buff *skb;
  5393. u32 scan_id;
  5394. u32 req_id;
  5395. if (arg->req_id > 0xFFF)
  5396. return ERR_PTR(-EINVAL);
  5397. if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
  5398. return ERR_PTR(-EINVAL);
  5399. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5400. if (!skb)
  5401. return ERR_PTR(-ENOMEM);
  5402. scan_id = arg->u.scan_id;
  5403. scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
  5404. req_id = arg->req_id;
  5405. req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  5406. cmd = (struct wmi_stop_scan_cmd *)skb->data;
  5407. cmd->req_type = __cpu_to_le32(arg->req_type);
  5408. cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
  5409. cmd->scan_id = __cpu_to_le32(scan_id);
  5410. cmd->scan_req_id = __cpu_to_le32(req_id);
  5411. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5412. "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
  5413. arg->req_id, arg->req_type, arg->u.scan_id);
  5414. return skb;
  5415. }
  5416. static struct sk_buff *
  5417. ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id,
  5418. enum wmi_vdev_type type,
  5419. enum wmi_vdev_subtype subtype,
  5420. const u8 macaddr[ETH_ALEN])
  5421. {
  5422. struct wmi_vdev_create_cmd *cmd;
  5423. struct sk_buff *skb;
  5424. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5425. if (!skb)
  5426. return ERR_PTR(-ENOMEM);
  5427. cmd = (struct wmi_vdev_create_cmd *)skb->data;
  5428. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5429. cmd->vdev_type = __cpu_to_le32(type);
  5430. cmd->vdev_subtype = __cpu_to_le32(subtype);
  5431. ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
  5432. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5433. "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
  5434. vdev_id, type, subtype, macaddr);
  5435. return skb;
  5436. }
  5437. static struct sk_buff *
  5438. ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id)
  5439. {
  5440. struct wmi_vdev_delete_cmd *cmd;
  5441. struct sk_buff *skb;
  5442. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5443. if (!skb)
  5444. return ERR_PTR(-ENOMEM);
  5445. cmd = (struct wmi_vdev_delete_cmd *)skb->data;
  5446. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5447. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5448. "WMI vdev delete id %d\n", vdev_id);
  5449. return skb;
  5450. }
  5451. static struct sk_buff *
  5452. ath10k_wmi_op_gen_vdev_start(struct ath10k *ar,
  5453. const struct wmi_vdev_start_request_arg *arg,
  5454. bool restart)
  5455. {
  5456. struct wmi_vdev_start_request_cmd *cmd;
  5457. struct sk_buff *skb;
  5458. const char *cmdname;
  5459. u32 flags = 0;
  5460. if (WARN_ON(arg->hidden_ssid && !arg->ssid))
  5461. return ERR_PTR(-EINVAL);
  5462. if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
  5463. return ERR_PTR(-EINVAL);
  5464. if (restart)
  5465. cmdname = "restart";
  5466. else
  5467. cmdname = "start";
  5468. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5469. if (!skb)
  5470. return ERR_PTR(-ENOMEM);
  5471. if (arg->hidden_ssid)
  5472. flags |= WMI_VDEV_START_HIDDEN_SSID;
  5473. if (arg->pmf_enabled)
  5474. flags |= WMI_VDEV_START_PMF_ENABLED;
  5475. cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
  5476. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  5477. cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
  5478. cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
  5479. cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
  5480. cmd->flags = __cpu_to_le32(flags);
  5481. cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
  5482. cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
  5483. if (arg->ssid) {
  5484. cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
  5485. memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
  5486. }
  5487. ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel);
  5488. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5489. "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
  5490. cmdname, arg->vdev_id,
  5491. flags, arg->channel.freq, arg->channel.mode,
  5492. cmd->chan.flags, arg->channel.max_power);
  5493. return skb;
  5494. }
  5495. static struct sk_buff *
  5496. ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id)
  5497. {
  5498. struct wmi_vdev_stop_cmd *cmd;
  5499. struct sk_buff *skb;
  5500. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5501. if (!skb)
  5502. return ERR_PTR(-ENOMEM);
  5503. cmd = (struct wmi_vdev_stop_cmd *)skb->data;
  5504. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5505. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
  5506. return skb;
  5507. }
  5508. static struct sk_buff *
  5509. ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid,
  5510. const u8 *bssid)
  5511. {
  5512. struct wmi_vdev_up_cmd *cmd;
  5513. struct sk_buff *skb;
  5514. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5515. if (!skb)
  5516. return ERR_PTR(-ENOMEM);
  5517. cmd = (struct wmi_vdev_up_cmd *)skb->data;
  5518. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5519. cmd->vdev_assoc_id = __cpu_to_le32(aid);
  5520. ether_addr_copy(cmd->vdev_bssid.addr, bssid);
  5521. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5522. "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
  5523. vdev_id, aid, bssid);
  5524. return skb;
  5525. }
  5526. static struct sk_buff *
  5527. ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id)
  5528. {
  5529. struct wmi_vdev_down_cmd *cmd;
  5530. struct sk_buff *skb;
  5531. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5532. if (!skb)
  5533. return ERR_PTR(-ENOMEM);
  5534. cmd = (struct wmi_vdev_down_cmd *)skb->data;
  5535. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5536. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5537. "wmi mgmt vdev down id 0x%x\n", vdev_id);
  5538. return skb;
  5539. }
  5540. static struct sk_buff *
  5541. ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id,
  5542. u32 param_id, u32 param_value)
  5543. {
  5544. struct wmi_vdev_set_param_cmd *cmd;
  5545. struct sk_buff *skb;
  5546. if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
  5547. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5548. "vdev param %d not supported by firmware\n",
  5549. param_id);
  5550. return ERR_PTR(-EOPNOTSUPP);
  5551. }
  5552. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5553. if (!skb)
  5554. return ERR_PTR(-ENOMEM);
  5555. cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
  5556. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5557. cmd->param_id = __cpu_to_le32(param_id);
  5558. cmd->param_value = __cpu_to_le32(param_value);
  5559. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5560. "wmi vdev id 0x%x set param %d value %d\n",
  5561. vdev_id, param_id, param_value);
  5562. return skb;
  5563. }
  5564. static struct sk_buff *
  5565. ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar,
  5566. const struct wmi_vdev_install_key_arg *arg)
  5567. {
  5568. struct wmi_vdev_install_key_cmd *cmd;
  5569. struct sk_buff *skb;
  5570. if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
  5571. return ERR_PTR(-EINVAL);
  5572. if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
  5573. return ERR_PTR(-EINVAL);
  5574. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
  5575. if (!skb)
  5576. return ERR_PTR(-ENOMEM);
  5577. cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
  5578. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  5579. cmd->key_idx = __cpu_to_le32(arg->key_idx);
  5580. cmd->key_flags = __cpu_to_le32(arg->key_flags);
  5581. cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
  5582. cmd->key_len = __cpu_to_le32(arg->key_len);
  5583. cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
  5584. cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
  5585. if (arg->macaddr)
  5586. ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
  5587. if (arg->key_data)
  5588. memcpy(cmd->key_data, arg->key_data, arg->key_len);
  5589. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5590. "wmi vdev install key idx %d cipher %d len %d\n",
  5591. arg->key_idx, arg->key_cipher, arg->key_len);
  5592. return skb;
  5593. }
  5594. static struct sk_buff *
  5595. ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar,
  5596. const struct wmi_vdev_spectral_conf_arg *arg)
  5597. {
  5598. struct wmi_vdev_spectral_conf_cmd *cmd;
  5599. struct sk_buff *skb;
  5600. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5601. if (!skb)
  5602. return ERR_PTR(-ENOMEM);
  5603. cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
  5604. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  5605. cmd->scan_count = __cpu_to_le32(arg->scan_count);
  5606. cmd->scan_period = __cpu_to_le32(arg->scan_period);
  5607. cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
  5608. cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
  5609. cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
  5610. cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
  5611. cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
  5612. cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
  5613. cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
  5614. cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
  5615. cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
  5616. cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
  5617. cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
  5618. cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
  5619. cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
  5620. cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
  5621. cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
  5622. cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
  5623. return skb;
  5624. }
  5625. static struct sk_buff *
  5626. ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id,
  5627. u32 trigger, u32 enable)
  5628. {
  5629. struct wmi_vdev_spectral_enable_cmd *cmd;
  5630. struct sk_buff *skb;
  5631. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5632. if (!skb)
  5633. return ERR_PTR(-ENOMEM);
  5634. cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
  5635. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5636. cmd->trigger_cmd = __cpu_to_le32(trigger);
  5637. cmd->enable_cmd = __cpu_to_le32(enable);
  5638. return skb;
  5639. }
  5640. static struct sk_buff *
  5641. ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id,
  5642. const u8 peer_addr[ETH_ALEN],
  5643. enum wmi_peer_type peer_type)
  5644. {
  5645. struct wmi_peer_create_cmd *cmd;
  5646. struct sk_buff *skb;
  5647. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5648. if (!skb)
  5649. return ERR_PTR(-ENOMEM);
  5650. cmd = (struct wmi_peer_create_cmd *)skb->data;
  5651. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5652. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  5653. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5654. "wmi peer create vdev_id %d peer_addr %pM\n",
  5655. vdev_id, peer_addr);
  5656. return skb;
  5657. }
  5658. static struct sk_buff *
  5659. ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id,
  5660. const u8 peer_addr[ETH_ALEN])
  5661. {
  5662. struct wmi_peer_delete_cmd *cmd;
  5663. struct sk_buff *skb;
  5664. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5665. if (!skb)
  5666. return ERR_PTR(-ENOMEM);
  5667. cmd = (struct wmi_peer_delete_cmd *)skb->data;
  5668. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5669. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  5670. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5671. "wmi peer delete vdev_id %d peer_addr %pM\n",
  5672. vdev_id, peer_addr);
  5673. return skb;
  5674. }
  5675. static struct sk_buff *
  5676. ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id,
  5677. const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
  5678. {
  5679. struct wmi_peer_flush_tids_cmd *cmd;
  5680. struct sk_buff *skb;
  5681. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5682. if (!skb)
  5683. return ERR_PTR(-ENOMEM);
  5684. cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
  5685. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5686. cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
  5687. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  5688. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5689. "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
  5690. vdev_id, peer_addr, tid_bitmap);
  5691. return skb;
  5692. }
  5693. static struct sk_buff *
  5694. ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id,
  5695. const u8 *peer_addr,
  5696. enum wmi_peer_param param_id,
  5697. u32 param_value)
  5698. {
  5699. struct wmi_peer_set_param_cmd *cmd;
  5700. struct sk_buff *skb;
  5701. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5702. if (!skb)
  5703. return ERR_PTR(-ENOMEM);
  5704. cmd = (struct wmi_peer_set_param_cmd *)skb->data;
  5705. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5706. cmd->param_id = __cpu_to_le32(param_id);
  5707. cmd->param_value = __cpu_to_le32(param_value);
  5708. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  5709. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5710. "wmi vdev %d peer 0x%pM set param %d value %d\n",
  5711. vdev_id, peer_addr, param_id, param_value);
  5712. return skb;
  5713. }
  5714. static struct sk_buff *
  5715. ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
  5716. enum wmi_sta_ps_mode psmode)
  5717. {
  5718. struct wmi_sta_powersave_mode_cmd *cmd;
  5719. struct sk_buff *skb;
  5720. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5721. if (!skb)
  5722. return ERR_PTR(-ENOMEM);
  5723. cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
  5724. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5725. cmd->sta_ps_mode = __cpu_to_le32(psmode);
  5726. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5727. "wmi set powersave id 0x%x mode %d\n",
  5728. vdev_id, psmode);
  5729. return skb;
  5730. }
  5731. static struct sk_buff *
  5732. ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id,
  5733. enum wmi_sta_powersave_param param_id,
  5734. u32 value)
  5735. {
  5736. struct wmi_sta_powersave_param_cmd *cmd;
  5737. struct sk_buff *skb;
  5738. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5739. if (!skb)
  5740. return ERR_PTR(-ENOMEM);
  5741. cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
  5742. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5743. cmd->param_id = __cpu_to_le32(param_id);
  5744. cmd->param_value = __cpu_to_le32(value);
  5745. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5746. "wmi sta ps param vdev_id 0x%x param %d value %d\n",
  5747. vdev_id, param_id, value);
  5748. return skb;
  5749. }
  5750. static struct sk_buff *
  5751. ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  5752. enum wmi_ap_ps_peer_param param_id, u32 value)
  5753. {
  5754. struct wmi_ap_ps_peer_cmd *cmd;
  5755. struct sk_buff *skb;
  5756. if (!mac)
  5757. return ERR_PTR(-EINVAL);
  5758. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5759. if (!skb)
  5760. return ERR_PTR(-ENOMEM);
  5761. cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
  5762. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5763. cmd->param_id = __cpu_to_le32(param_id);
  5764. cmd->param_value = __cpu_to_le32(value);
  5765. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  5766. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5767. "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
  5768. vdev_id, param_id, value, mac);
  5769. return skb;
  5770. }
  5771. static struct sk_buff *
  5772. ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar,
  5773. const struct wmi_scan_chan_list_arg *arg)
  5774. {
  5775. struct wmi_scan_chan_list_cmd *cmd;
  5776. struct sk_buff *skb;
  5777. struct wmi_channel_arg *ch;
  5778. struct wmi_channel *ci;
  5779. int len;
  5780. int i;
  5781. len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
  5782. skb = ath10k_wmi_alloc_skb(ar, len);
  5783. if (!skb)
  5784. return ERR_PTR(-EINVAL);
  5785. cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
  5786. cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
  5787. for (i = 0; i < arg->n_channels; i++) {
  5788. ch = &arg->channels[i];
  5789. ci = &cmd->chan_info[i];
  5790. ath10k_wmi_put_wmi_channel(ci, ch);
  5791. }
  5792. return skb;
  5793. }
  5794. static void
  5795. ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
  5796. const struct wmi_peer_assoc_complete_arg *arg)
  5797. {
  5798. struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
  5799. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  5800. cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
  5801. cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
  5802. cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
  5803. cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
  5804. cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
  5805. cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
  5806. cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
  5807. cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
  5808. cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
  5809. cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
  5810. cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
  5811. cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
  5812. ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
  5813. cmd->peer_legacy_rates.num_rates =
  5814. __cpu_to_le32(arg->peer_legacy_rates.num_rates);
  5815. memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
  5816. arg->peer_legacy_rates.num_rates);
  5817. cmd->peer_ht_rates.num_rates =
  5818. __cpu_to_le32(arg->peer_ht_rates.num_rates);
  5819. memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
  5820. arg->peer_ht_rates.num_rates);
  5821. cmd->peer_vht_rates.rx_max_rate =
  5822. __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
  5823. cmd->peer_vht_rates.rx_mcs_set =
  5824. __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
  5825. cmd->peer_vht_rates.tx_max_rate =
  5826. __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
  5827. cmd->peer_vht_rates.tx_mcs_set =
  5828. __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
  5829. }
  5830. static void
  5831. ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
  5832. const struct wmi_peer_assoc_complete_arg *arg)
  5833. {
  5834. struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
  5835. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  5836. memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
  5837. }
  5838. static void
  5839. ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
  5840. const struct wmi_peer_assoc_complete_arg *arg)
  5841. {
  5842. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  5843. }
  5844. static void
  5845. ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
  5846. const struct wmi_peer_assoc_complete_arg *arg)
  5847. {
  5848. struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
  5849. int max_mcs, max_nss;
  5850. u32 info0;
  5851. /* TODO: Is using max values okay with firmware? */
  5852. max_mcs = 0xf;
  5853. max_nss = 0xf;
  5854. info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
  5855. SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
  5856. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  5857. cmd->info0 = __cpu_to_le32(info0);
  5858. }
  5859. static void
  5860. ath10k_wmi_peer_assoc_fill_10_4(struct ath10k *ar, void *buf,
  5861. const struct wmi_peer_assoc_complete_arg *arg)
  5862. {
  5863. struct wmi_10_4_peer_assoc_complete_cmd *cmd = buf;
  5864. ath10k_wmi_peer_assoc_fill_10_2(ar, buf, arg);
  5865. cmd->peer_bw_rxnss_override = 0;
  5866. }
  5867. static int
  5868. ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg)
  5869. {
  5870. if (arg->peer_mpdu_density > 16)
  5871. return -EINVAL;
  5872. if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
  5873. return -EINVAL;
  5874. if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
  5875. return -EINVAL;
  5876. return 0;
  5877. }
  5878. static struct sk_buff *
  5879. ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar,
  5880. const struct wmi_peer_assoc_complete_arg *arg)
  5881. {
  5882. size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
  5883. struct sk_buff *skb;
  5884. int ret;
  5885. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  5886. if (ret)
  5887. return ERR_PTR(ret);
  5888. skb = ath10k_wmi_alloc_skb(ar, len);
  5889. if (!skb)
  5890. return ERR_PTR(-ENOMEM);
  5891. ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
  5892. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5893. "wmi peer assoc vdev %d addr %pM (%s)\n",
  5894. arg->vdev_id, arg->addr,
  5895. arg->peer_reassoc ? "reassociate" : "new");
  5896. return skb;
  5897. }
  5898. static struct sk_buff *
  5899. ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar,
  5900. const struct wmi_peer_assoc_complete_arg *arg)
  5901. {
  5902. size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
  5903. struct sk_buff *skb;
  5904. int ret;
  5905. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  5906. if (ret)
  5907. return ERR_PTR(ret);
  5908. skb = ath10k_wmi_alloc_skb(ar, len);
  5909. if (!skb)
  5910. return ERR_PTR(-ENOMEM);
  5911. ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
  5912. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5913. "wmi peer assoc vdev %d addr %pM (%s)\n",
  5914. arg->vdev_id, arg->addr,
  5915. arg->peer_reassoc ? "reassociate" : "new");
  5916. return skb;
  5917. }
  5918. static struct sk_buff *
  5919. ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar,
  5920. const struct wmi_peer_assoc_complete_arg *arg)
  5921. {
  5922. size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
  5923. struct sk_buff *skb;
  5924. int ret;
  5925. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  5926. if (ret)
  5927. return ERR_PTR(ret);
  5928. skb = ath10k_wmi_alloc_skb(ar, len);
  5929. if (!skb)
  5930. return ERR_PTR(-ENOMEM);
  5931. ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
  5932. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5933. "wmi peer assoc vdev %d addr %pM (%s)\n",
  5934. arg->vdev_id, arg->addr,
  5935. arg->peer_reassoc ? "reassociate" : "new");
  5936. return skb;
  5937. }
  5938. static struct sk_buff *
  5939. ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k *ar,
  5940. const struct wmi_peer_assoc_complete_arg *arg)
  5941. {
  5942. size_t len = sizeof(struct wmi_10_4_peer_assoc_complete_cmd);
  5943. struct sk_buff *skb;
  5944. int ret;
  5945. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  5946. if (ret)
  5947. return ERR_PTR(ret);
  5948. skb = ath10k_wmi_alloc_skb(ar, len);
  5949. if (!skb)
  5950. return ERR_PTR(-ENOMEM);
  5951. ath10k_wmi_peer_assoc_fill_10_4(ar, skb->data, arg);
  5952. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5953. "wmi peer assoc vdev %d addr %pM (%s)\n",
  5954. arg->vdev_id, arg->addr,
  5955. arg->peer_reassoc ? "reassociate" : "new");
  5956. return skb;
  5957. }
  5958. static struct sk_buff *
  5959. ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar)
  5960. {
  5961. struct sk_buff *skb;
  5962. skb = ath10k_wmi_alloc_skb(ar, 0);
  5963. if (!skb)
  5964. return ERR_PTR(-ENOMEM);
  5965. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n");
  5966. return skb;
  5967. }
  5968. static struct sk_buff *
  5969. ath10k_wmi_10_2_op_gen_pdev_bss_chan_info(struct ath10k *ar,
  5970. enum wmi_bss_survey_req_type type)
  5971. {
  5972. struct wmi_pdev_chan_info_req_cmd *cmd;
  5973. struct sk_buff *skb;
  5974. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5975. if (!skb)
  5976. return ERR_PTR(-ENOMEM);
  5977. cmd = (struct wmi_pdev_chan_info_req_cmd *)skb->data;
  5978. cmd->type = __cpu_to_le32(type);
  5979. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5980. "wmi pdev bss info request type %d\n", type);
  5981. return skb;
  5982. }
  5983. /* This function assumes the beacon is already DMA mapped */
  5984. static struct sk_buff *
  5985. ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn,
  5986. size_t bcn_len, u32 bcn_paddr, bool dtim_zero,
  5987. bool deliver_cab)
  5988. {
  5989. struct wmi_bcn_tx_ref_cmd *cmd;
  5990. struct sk_buff *skb;
  5991. struct ieee80211_hdr *hdr;
  5992. u16 fc;
  5993. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5994. if (!skb)
  5995. return ERR_PTR(-ENOMEM);
  5996. hdr = (struct ieee80211_hdr *)bcn;
  5997. fc = le16_to_cpu(hdr->frame_control);
  5998. cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
  5999. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6000. cmd->data_len = __cpu_to_le32(bcn_len);
  6001. cmd->data_ptr = __cpu_to_le32(bcn_paddr);
  6002. cmd->msdu_id = 0;
  6003. cmd->frame_control = __cpu_to_le32(fc);
  6004. cmd->flags = 0;
  6005. cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
  6006. if (dtim_zero)
  6007. cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
  6008. if (deliver_cab)
  6009. cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
  6010. return skb;
  6011. }
  6012. void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
  6013. const struct wmi_wmm_params_arg *arg)
  6014. {
  6015. params->cwmin = __cpu_to_le32(arg->cwmin);
  6016. params->cwmax = __cpu_to_le32(arg->cwmax);
  6017. params->aifs = __cpu_to_le32(arg->aifs);
  6018. params->txop = __cpu_to_le32(arg->txop);
  6019. params->acm = __cpu_to_le32(arg->acm);
  6020. params->no_ack = __cpu_to_le32(arg->no_ack);
  6021. }
  6022. static struct sk_buff *
  6023. ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar,
  6024. const struct wmi_wmm_params_all_arg *arg)
  6025. {
  6026. struct wmi_pdev_set_wmm_params *cmd;
  6027. struct sk_buff *skb;
  6028. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6029. if (!skb)
  6030. return ERR_PTR(-ENOMEM);
  6031. cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
  6032. ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be);
  6033. ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
  6034. ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
  6035. ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
  6036. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
  6037. return skb;
  6038. }
  6039. static struct sk_buff *
  6040. ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask)
  6041. {
  6042. struct wmi_request_stats_cmd *cmd;
  6043. struct sk_buff *skb;
  6044. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6045. if (!skb)
  6046. return ERR_PTR(-ENOMEM);
  6047. cmd = (struct wmi_request_stats_cmd *)skb->data;
  6048. cmd->stats_id = __cpu_to_le32(stats_mask);
  6049. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n",
  6050. stats_mask);
  6051. return skb;
  6052. }
  6053. static struct sk_buff *
  6054. ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar,
  6055. enum wmi_force_fw_hang_type type, u32 delay_ms)
  6056. {
  6057. struct wmi_force_fw_hang_cmd *cmd;
  6058. struct sk_buff *skb;
  6059. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6060. if (!skb)
  6061. return ERR_PTR(-ENOMEM);
  6062. cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
  6063. cmd->type = __cpu_to_le32(type);
  6064. cmd->delay_ms = __cpu_to_le32(delay_ms);
  6065. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
  6066. type, delay_ms);
  6067. return skb;
  6068. }
  6069. static struct sk_buff *
  6070. ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
  6071. u32 log_level)
  6072. {
  6073. struct wmi_dbglog_cfg_cmd *cmd;
  6074. struct sk_buff *skb;
  6075. u32 cfg;
  6076. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6077. if (!skb)
  6078. return ERR_PTR(-ENOMEM);
  6079. cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
  6080. if (module_enable) {
  6081. cfg = SM(log_level,
  6082. ATH10K_DBGLOG_CFG_LOG_LVL);
  6083. } else {
  6084. /* set back defaults, all modules with WARN level */
  6085. cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
  6086. ATH10K_DBGLOG_CFG_LOG_LVL);
  6087. module_enable = ~0;
  6088. }
  6089. cmd->module_enable = __cpu_to_le32(module_enable);
  6090. cmd->module_valid = __cpu_to_le32(~0);
  6091. cmd->config_enable = __cpu_to_le32(cfg);
  6092. cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
  6093. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6094. "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
  6095. __le32_to_cpu(cmd->module_enable),
  6096. __le32_to_cpu(cmd->module_valid),
  6097. __le32_to_cpu(cmd->config_enable),
  6098. __le32_to_cpu(cmd->config_valid));
  6099. return skb;
  6100. }
  6101. static struct sk_buff *
  6102. ath10k_wmi_10_4_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
  6103. u32 log_level)
  6104. {
  6105. struct wmi_10_4_dbglog_cfg_cmd *cmd;
  6106. struct sk_buff *skb;
  6107. u32 cfg;
  6108. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6109. if (!skb)
  6110. return ERR_PTR(-ENOMEM);
  6111. cmd = (struct wmi_10_4_dbglog_cfg_cmd *)skb->data;
  6112. if (module_enable) {
  6113. cfg = SM(log_level,
  6114. ATH10K_DBGLOG_CFG_LOG_LVL);
  6115. } else {
  6116. /* set back defaults, all modules with WARN level */
  6117. cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
  6118. ATH10K_DBGLOG_CFG_LOG_LVL);
  6119. module_enable = ~0;
  6120. }
  6121. cmd->module_enable = __cpu_to_le64(module_enable);
  6122. cmd->module_valid = __cpu_to_le64(~0);
  6123. cmd->config_enable = __cpu_to_le32(cfg);
  6124. cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
  6125. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6126. "wmi dbglog cfg modules 0x%016llx 0x%016llx config %08x %08x\n",
  6127. __le64_to_cpu(cmd->module_enable),
  6128. __le64_to_cpu(cmd->module_valid),
  6129. __le32_to_cpu(cmd->config_enable),
  6130. __le32_to_cpu(cmd->config_valid));
  6131. return skb;
  6132. }
  6133. static struct sk_buff *
  6134. ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap)
  6135. {
  6136. struct wmi_pdev_pktlog_enable_cmd *cmd;
  6137. struct sk_buff *skb;
  6138. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6139. if (!skb)
  6140. return ERR_PTR(-ENOMEM);
  6141. ev_bitmap &= ATH10K_PKTLOG_ANY;
  6142. cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data;
  6143. cmd->ev_bitmap = __cpu_to_le32(ev_bitmap);
  6144. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n",
  6145. ev_bitmap);
  6146. return skb;
  6147. }
  6148. static struct sk_buff *
  6149. ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar)
  6150. {
  6151. struct sk_buff *skb;
  6152. skb = ath10k_wmi_alloc_skb(ar, 0);
  6153. if (!skb)
  6154. return ERR_PTR(-ENOMEM);
  6155. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n");
  6156. return skb;
  6157. }
  6158. static struct sk_buff *
  6159. ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period,
  6160. u32 duration, u32 next_offset,
  6161. u32 enabled)
  6162. {
  6163. struct wmi_pdev_set_quiet_cmd *cmd;
  6164. struct sk_buff *skb;
  6165. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6166. if (!skb)
  6167. return ERR_PTR(-ENOMEM);
  6168. cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data;
  6169. cmd->period = __cpu_to_le32(period);
  6170. cmd->duration = __cpu_to_le32(duration);
  6171. cmd->next_start = __cpu_to_le32(next_offset);
  6172. cmd->enabled = __cpu_to_le32(enabled);
  6173. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6174. "wmi quiet param: period %u duration %u enabled %d\n",
  6175. period, duration, enabled);
  6176. return skb;
  6177. }
  6178. static struct sk_buff *
  6179. ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id,
  6180. const u8 *mac)
  6181. {
  6182. struct wmi_addba_clear_resp_cmd *cmd;
  6183. struct sk_buff *skb;
  6184. if (!mac)
  6185. return ERR_PTR(-EINVAL);
  6186. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6187. if (!skb)
  6188. return ERR_PTR(-ENOMEM);
  6189. cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
  6190. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6191. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6192. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6193. "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
  6194. vdev_id, mac);
  6195. return skb;
  6196. }
  6197. static struct sk_buff *
  6198. ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6199. u32 tid, u32 buf_size)
  6200. {
  6201. struct wmi_addba_send_cmd *cmd;
  6202. struct sk_buff *skb;
  6203. if (!mac)
  6204. return ERR_PTR(-EINVAL);
  6205. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6206. if (!skb)
  6207. return ERR_PTR(-ENOMEM);
  6208. cmd = (struct wmi_addba_send_cmd *)skb->data;
  6209. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6210. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6211. cmd->tid = __cpu_to_le32(tid);
  6212. cmd->buffersize = __cpu_to_le32(buf_size);
  6213. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6214. "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
  6215. vdev_id, mac, tid, buf_size);
  6216. return skb;
  6217. }
  6218. static struct sk_buff *
  6219. ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6220. u32 tid, u32 status)
  6221. {
  6222. struct wmi_addba_setresponse_cmd *cmd;
  6223. struct sk_buff *skb;
  6224. if (!mac)
  6225. return ERR_PTR(-EINVAL);
  6226. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6227. if (!skb)
  6228. return ERR_PTR(-ENOMEM);
  6229. cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
  6230. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6231. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6232. cmd->tid = __cpu_to_le32(tid);
  6233. cmd->statuscode = __cpu_to_le32(status);
  6234. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6235. "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
  6236. vdev_id, mac, tid, status);
  6237. return skb;
  6238. }
  6239. static struct sk_buff *
  6240. ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6241. u32 tid, u32 initiator, u32 reason)
  6242. {
  6243. struct wmi_delba_send_cmd *cmd;
  6244. struct sk_buff *skb;
  6245. if (!mac)
  6246. return ERR_PTR(-EINVAL);
  6247. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6248. if (!skb)
  6249. return ERR_PTR(-ENOMEM);
  6250. cmd = (struct wmi_delba_send_cmd *)skb->data;
  6251. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6252. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6253. cmd->tid = __cpu_to_le32(tid);
  6254. cmd->initiator = __cpu_to_le32(initiator);
  6255. cmd->reasoncode = __cpu_to_le32(reason);
  6256. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6257. "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
  6258. vdev_id, mac, tid, initiator, reason);
  6259. return skb;
  6260. }
  6261. static struct sk_buff *
  6262. ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k *ar, u32 param)
  6263. {
  6264. struct wmi_pdev_get_tpc_config_cmd *cmd;
  6265. struct sk_buff *skb;
  6266. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6267. if (!skb)
  6268. return ERR_PTR(-ENOMEM);
  6269. cmd = (struct wmi_pdev_get_tpc_config_cmd *)skb->data;
  6270. cmd->param = __cpu_to_le32(param);
  6271. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6272. "wmi pdev get tcp config param:%d\n", param);
  6273. return skb;
  6274. }
  6275. size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head)
  6276. {
  6277. struct ath10k_fw_stats_peer *i;
  6278. size_t num = 0;
  6279. list_for_each_entry(i, head, list)
  6280. ++num;
  6281. return num;
  6282. }
  6283. size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head)
  6284. {
  6285. struct ath10k_fw_stats_vdev *i;
  6286. size_t num = 0;
  6287. list_for_each_entry(i, head, list)
  6288. ++num;
  6289. return num;
  6290. }
  6291. static void
  6292. ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6293. char *buf, u32 *length)
  6294. {
  6295. u32 len = *length;
  6296. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6297. len += scnprintf(buf + len, buf_len - len, "\n");
  6298. len += scnprintf(buf + len, buf_len - len, "%30s\n",
  6299. "ath10k PDEV stats");
  6300. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6301. "=================");
  6302. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6303. "Channel noise floor", pdev->ch_noise_floor);
  6304. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6305. "Channel TX power", pdev->chan_tx_power);
  6306. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6307. "TX frame count", pdev->tx_frame_count);
  6308. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6309. "RX frame count", pdev->rx_frame_count);
  6310. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6311. "RX clear count", pdev->rx_clear_count);
  6312. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6313. "Cycle count", pdev->cycle_count);
  6314. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6315. "PHY error count", pdev->phy_err_count);
  6316. *length = len;
  6317. }
  6318. static void
  6319. ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6320. char *buf, u32 *length)
  6321. {
  6322. u32 len = *length;
  6323. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6324. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6325. "RTS bad count", pdev->rts_bad);
  6326. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6327. "RTS good count", pdev->rts_good);
  6328. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6329. "FCS bad count", pdev->fcs_bad);
  6330. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6331. "No beacon count", pdev->no_beacons);
  6332. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6333. "MIB int count", pdev->mib_int_count);
  6334. len += scnprintf(buf + len, buf_len - len, "\n");
  6335. *length = len;
  6336. }
  6337. static void
  6338. ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6339. char *buf, u32 *length)
  6340. {
  6341. u32 len = *length;
  6342. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6343. len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
  6344. "ath10k PDEV TX stats");
  6345. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6346. "=================");
  6347. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6348. "HTT cookies queued", pdev->comp_queued);
  6349. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6350. "HTT cookies disp.", pdev->comp_delivered);
  6351. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6352. "MSDU queued", pdev->msdu_enqued);
  6353. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6354. "MPDU queued", pdev->mpdu_enqued);
  6355. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6356. "MSDUs dropped", pdev->wmm_drop);
  6357. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6358. "Local enqued", pdev->local_enqued);
  6359. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6360. "Local freed", pdev->local_freed);
  6361. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6362. "HW queued", pdev->hw_queued);
  6363. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6364. "PPDUs reaped", pdev->hw_reaped);
  6365. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6366. "Num underruns", pdev->underrun);
  6367. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6368. "PPDUs cleaned", pdev->tx_abort);
  6369. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6370. "MPDUs requed", pdev->mpdus_requed);
  6371. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6372. "Excessive retries", pdev->tx_ko);
  6373. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6374. "HW rate", pdev->data_rc);
  6375. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6376. "Sched self tiggers", pdev->self_triggers);
  6377. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6378. "Dropped due to SW retries",
  6379. pdev->sw_retry_failure);
  6380. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6381. "Illegal rate phy errors",
  6382. pdev->illgl_rate_phy_err);
  6383. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6384. "Pdev continuous xretry", pdev->pdev_cont_xretry);
  6385. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6386. "TX timeout", pdev->pdev_tx_timeout);
  6387. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6388. "PDEV resets", pdev->pdev_resets);
  6389. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6390. "PHY underrun", pdev->phy_underrun);
  6391. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6392. "MPDU is more than txop limit", pdev->txop_ovf);
  6393. *length = len;
  6394. }
  6395. static void
  6396. ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6397. char *buf, u32 *length)
  6398. {
  6399. u32 len = *length;
  6400. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6401. len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
  6402. "ath10k PDEV RX stats");
  6403. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6404. "=================");
  6405. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6406. "Mid PPDU route change",
  6407. pdev->mid_ppdu_route_change);
  6408. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6409. "Tot. number of statuses", pdev->status_rcvd);
  6410. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6411. "Extra frags on rings 0", pdev->r0_frags);
  6412. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6413. "Extra frags on rings 1", pdev->r1_frags);
  6414. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6415. "Extra frags on rings 2", pdev->r2_frags);
  6416. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6417. "Extra frags on rings 3", pdev->r3_frags);
  6418. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6419. "MSDUs delivered to HTT", pdev->htt_msdus);
  6420. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6421. "MPDUs delivered to HTT", pdev->htt_mpdus);
  6422. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6423. "MSDUs delivered to stack", pdev->loc_msdus);
  6424. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6425. "MPDUs delivered to stack", pdev->loc_mpdus);
  6426. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6427. "Oversized AMSUs", pdev->oversize_amsdu);
  6428. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6429. "PHY errors", pdev->phy_errs);
  6430. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6431. "PHY errors drops", pdev->phy_err_drop);
  6432. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6433. "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs);
  6434. *length = len;
  6435. }
  6436. static void
  6437. ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev *vdev,
  6438. char *buf, u32 *length)
  6439. {
  6440. u32 len = *length;
  6441. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6442. int i;
  6443. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6444. "vdev id", vdev->vdev_id);
  6445. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6446. "beacon snr", vdev->beacon_snr);
  6447. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6448. "data snr", vdev->data_snr);
  6449. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6450. "num rx frames", vdev->num_rx_frames);
  6451. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6452. "num rts fail", vdev->num_rts_fail);
  6453. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6454. "num rts success", vdev->num_rts_success);
  6455. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6456. "num rx err", vdev->num_rx_err);
  6457. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6458. "num rx discard", vdev->num_rx_discard);
  6459. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6460. "num tx not acked", vdev->num_tx_not_acked);
  6461. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames); i++)
  6462. len += scnprintf(buf + len, buf_len - len,
  6463. "%25s [%02d] %u\n",
  6464. "num tx frames", i,
  6465. vdev->num_tx_frames[i]);
  6466. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_retries); i++)
  6467. len += scnprintf(buf + len, buf_len - len,
  6468. "%25s [%02d] %u\n",
  6469. "num tx frames retries", i,
  6470. vdev->num_tx_frames_retries[i]);
  6471. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_failures); i++)
  6472. len += scnprintf(buf + len, buf_len - len,
  6473. "%25s [%02d] %u\n",
  6474. "num tx frames failures", i,
  6475. vdev->num_tx_frames_failures[i]);
  6476. for (i = 0 ; i < ARRAY_SIZE(vdev->tx_rate_history); i++)
  6477. len += scnprintf(buf + len, buf_len - len,
  6478. "%25s [%02d] 0x%08x\n",
  6479. "tx rate history", i,
  6480. vdev->tx_rate_history[i]);
  6481. for (i = 0 ; i < ARRAY_SIZE(vdev->beacon_rssi_history); i++)
  6482. len += scnprintf(buf + len, buf_len - len,
  6483. "%25s [%02d] %u\n",
  6484. "beacon rssi history", i,
  6485. vdev->beacon_rssi_history[i]);
  6486. len += scnprintf(buf + len, buf_len - len, "\n");
  6487. *length = len;
  6488. }
  6489. static void
  6490. ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer *peer,
  6491. char *buf, u32 *length)
  6492. {
  6493. u32 len = *length;
  6494. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6495. len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
  6496. "Peer MAC address", peer->peer_macaddr);
  6497. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6498. "Peer RSSI", peer->peer_rssi);
  6499. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6500. "Peer TX rate", peer->peer_tx_rate);
  6501. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6502. "Peer RX rate", peer->peer_rx_rate);
  6503. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6504. "Peer RX duration", peer->rx_duration);
  6505. len += scnprintf(buf + len, buf_len - len, "\n");
  6506. *length = len;
  6507. }
  6508. void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
  6509. struct ath10k_fw_stats *fw_stats,
  6510. char *buf)
  6511. {
  6512. u32 len = 0;
  6513. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6514. const struct ath10k_fw_stats_pdev *pdev;
  6515. const struct ath10k_fw_stats_vdev *vdev;
  6516. const struct ath10k_fw_stats_peer *peer;
  6517. size_t num_peers;
  6518. size_t num_vdevs;
  6519. spin_lock_bh(&ar->data_lock);
  6520. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  6521. struct ath10k_fw_stats_pdev, list);
  6522. if (!pdev) {
  6523. ath10k_warn(ar, "failed to get pdev stats\n");
  6524. goto unlock;
  6525. }
  6526. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  6527. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  6528. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  6529. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  6530. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  6531. len += scnprintf(buf + len, buf_len - len, "\n");
  6532. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6533. "ath10k VDEV stats", num_vdevs);
  6534. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6535. "=================");
  6536. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  6537. ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
  6538. }
  6539. len += scnprintf(buf + len, buf_len - len, "\n");
  6540. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6541. "ath10k PEER stats", num_peers);
  6542. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6543. "=================");
  6544. list_for_each_entry(peer, &fw_stats->peers, list) {
  6545. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
  6546. }
  6547. unlock:
  6548. spin_unlock_bh(&ar->data_lock);
  6549. if (len >= buf_len)
  6550. buf[len - 1] = 0;
  6551. else
  6552. buf[len] = 0;
  6553. }
  6554. void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
  6555. struct ath10k_fw_stats *fw_stats,
  6556. char *buf)
  6557. {
  6558. unsigned int len = 0;
  6559. unsigned int buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6560. const struct ath10k_fw_stats_pdev *pdev;
  6561. const struct ath10k_fw_stats_vdev *vdev;
  6562. const struct ath10k_fw_stats_peer *peer;
  6563. size_t num_peers;
  6564. size_t num_vdevs;
  6565. spin_lock_bh(&ar->data_lock);
  6566. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  6567. struct ath10k_fw_stats_pdev, list);
  6568. if (!pdev) {
  6569. ath10k_warn(ar, "failed to get pdev stats\n");
  6570. goto unlock;
  6571. }
  6572. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  6573. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  6574. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  6575. ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
  6576. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  6577. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  6578. len += scnprintf(buf + len, buf_len - len, "\n");
  6579. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6580. "ath10k VDEV stats", num_vdevs);
  6581. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6582. "=================");
  6583. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  6584. ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
  6585. }
  6586. len += scnprintf(buf + len, buf_len - len, "\n");
  6587. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6588. "ath10k PEER stats", num_peers);
  6589. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6590. "=================");
  6591. list_for_each_entry(peer, &fw_stats->peers, list) {
  6592. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
  6593. }
  6594. unlock:
  6595. spin_unlock_bh(&ar->data_lock);
  6596. if (len >= buf_len)
  6597. buf[len - 1] = 0;
  6598. else
  6599. buf[len] = 0;
  6600. }
  6601. static struct sk_buff *
  6602. ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k *ar, u8 enable,
  6603. u32 detect_level, u32 detect_margin)
  6604. {
  6605. struct wmi_pdev_set_adaptive_cca_params *cmd;
  6606. struct sk_buff *skb;
  6607. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6608. if (!skb)
  6609. return ERR_PTR(-ENOMEM);
  6610. cmd = (struct wmi_pdev_set_adaptive_cca_params *)skb->data;
  6611. cmd->enable = __cpu_to_le32(enable);
  6612. cmd->cca_detect_level = __cpu_to_le32(detect_level);
  6613. cmd->cca_detect_margin = __cpu_to_le32(detect_margin);
  6614. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6615. "wmi pdev set adaptive cca params enable:%d detection level:%d detection margin:%d\n",
  6616. enable, detect_level, detect_margin);
  6617. return skb;
  6618. }
  6619. void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
  6620. struct ath10k_fw_stats *fw_stats,
  6621. char *buf)
  6622. {
  6623. u32 len = 0;
  6624. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6625. const struct ath10k_fw_stats_pdev *pdev;
  6626. const struct ath10k_fw_stats_vdev *vdev;
  6627. const struct ath10k_fw_stats_peer *peer;
  6628. size_t num_peers;
  6629. size_t num_vdevs;
  6630. spin_lock_bh(&ar->data_lock);
  6631. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  6632. struct ath10k_fw_stats_pdev, list);
  6633. if (!pdev) {
  6634. ath10k_warn(ar, "failed to get pdev stats\n");
  6635. goto unlock;
  6636. }
  6637. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  6638. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  6639. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  6640. ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
  6641. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  6642. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6643. "HW paused", pdev->hw_paused);
  6644. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6645. "Seqs posted", pdev->seq_posted);
  6646. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6647. "Seqs failed queueing", pdev->seq_failed_queueing);
  6648. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6649. "Seqs completed", pdev->seq_completed);
  6650. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6651. "Seqs restarted", pdev->seq_restarted);
  6652. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6653. "MU Seqs posted", pdev->mu_seq_posted);
  6654. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6655. "MPDUs SW flushed", pdev->mpdus_sw_flush);
  6656. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6657. "MPDUs HW filtered", pdev->mpdus_hw_filter);
  6658. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6659. "MPDUs truncated", pdev->mpdus_truncated);
  6660. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6661. "MPDUs receive no ACK", pdev->mpdus_ack_failed);
  6662. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6663. "MPDUs expired", pdev->mpdus_expired);
  6664. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  6665. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6666. "Num Rx Overflow errors", pdev->rx_ovfl_errs);
  6667. len += scnprintf(buf + len, buf_len - len, "\n");
  6668. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6669. "ath10k VDEV stats", num_vdevs);
  6670. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6671. "=================");
  6672. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  6673. ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
  6674. }
  6675. len += scnprintf(buf + len, buf_len - len, "\n");
  6676. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6677. "ath10k PEER stats", num_peers);
  6678. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6679. "=================");
  6680. list_for_each_entry(peer, &fw_stats->peers, list) {
  6681. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
  6682. }
  6683. unlock:
  6684. spin_unlock_bh(&ar->data_lock);
  6685. if (len >= buf_len)
  6686. buf[len - 1] = 0;
  6687. else
  6688. buf[len] = 0;
  6689. }
  6690. int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
  6691. enum wmi_vdev_subtype subtype)
  6692. {
  6693. switch (subtype) {
  6694. case WMI_VDEV_SUBTYPE_NONE:
  6695. return WMI_VDEV_SUBTYPE_LEGACY_NONE;
  6696. case WMI_VDEV_SUBTYPE_P2P_DEVICE:
  6697. return WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV;
  6698. case WMI_VDEV_SUBTYPE_P2P_CLIENT:
  6699. return WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI;
  6700. case WMI_VDEV_SUBTYPE_P2P_GO:
  6701. return WMI_VDEV_SUBTYPE_LEGACY_P2P_GO;
  6702. case WMI_VDEV_SUBTYPE_PROXY_STA:
  6703. return WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA;
  6704. case WMI_VDEV_SUBTYPE_MESH_11S:
  6705. case WMI_VDEV_SUBTYPE_MESH_NON_11S:
  6706. return -ENOTSUPP;
  6707. }
  6708. return -ENOTSUPP;
  6709. }
  6710. static int ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k *ar,
  6711. enum wmi_vdev_subtype subtype)
  6712. {
  6713. switch (subtype) {
  6714. case WMI_VDEV_SUBTYPE_NONE:
  6715. return WMI_VDEV_SUBTYPE_10_2_4_NONE;
  6716. case WMI_VDEV_SUBTYPE_P2P_DEVICE:
  6717. return WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV;
  6718. case WMI_VDEV_SUBTYPE_P2P_CLIENT:
  6719. return WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI;
  6720. case WMI_VDEV_SUBTYPE_P2P_GO:
  6721. return WMI_VDEV_SUBTYPE_10_2_4_P2P_GO;
  6722. case WMI_VDEV_SUBTYPE_PROXY_STA:
  6723. return WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA;
  6724. case WMI_VDEV_SUBTYPE_MESH_11S:
  6725. return WMI_VDEV_SUBTYPE_10_2_4_MESH_11S;
  6726. case WMI_VDEV_SUBTYPE_MESH_NON_11S:
  6727. return -ENOTSUPP;
  6728. }
  6729. return -ENOTSUPP;
  6730. }
  6731. static int ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k *ar,
  6732. enum wmi_vdev_subtype subtype)
  6733. {
  6734. switch (subtype) {
  6735. case WMI_VDEV_SUBTYPE_NONE:
  6736. return WMI_VDEV_SUBTYPE_10_4_NONE;
  6737. case WMI_VDEV_SUBTYPE_P2P_DEVICE:
  6738. return WMI_VDEV_SUBTYPE_10_4_P2P_DEV;
  6739. case WMI_VDEV_SUBTYPE_P2P_CLIENT:
  6740. return WMI_VDEV_SUBTYPE_10_4_P2P_CLI;
  6741. case WMI_VDEV_SUBTYPE_P2P_GO:
  6742. return WMI_VDEV_SUBTYPE_10_4_P2P_GO;
  6743. case WMI_VDEV_SUBTYPE_PROXY_STA:
  6744. return WMI_VDEV_SUBTYPE_10_4_PROXY_STA;
  6745. case WMI_VDEV_SUBTYPE_MESH_11S:
  6746. return WMI_VDEV_SUBTYPE_10_4_MESH_11S;
  6747. case WMI_VDEV_SUBTYPE_MESH_NON_11S:
  6748. return WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S;
  6749. }
  6750. return -ENOTSUPP;
  6751. }
  6752. static struct sk_buff *
  6753. ath10k_wmi_10_4_ext_resource_config(struct ath10k *ar,
  6754. enum wmi_host_platform_type type,
  6755. u32 fw_feature_bitmap)
  6756. {
  6757. struct wmi_ext_resource_config_10_4_cmd *cmd;
  6758. struct sk_buff *skb;
  6759. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6760. if (!skb)
  6761. return ERR_PTR(-ENOMEM);
  6762. cmd = (struct wmi_ext_resource_config_10_4_cmd *)skb->data;
  6763. cmd->host_platform_config = __cpu_to_le32(type);
  6764. cmd->fw_feature_bitmap = __cpu_to_le32(fw_feature_bitmap);
  6765. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6766. "wmi ext resource config host type %d firmware feature bitmap %08x\n",
  6767. type, fw_feature_bitmap);
  6768. return skb;
  6769. }
  6770. static struct sk_buff *
  6771. ath10k_wmi_op_gen_echo(struct ath10k *ar, u32 value)
  6772. {
  6773. struct wmi_echo_cmd *cmd;
  6774. struct sk_buff *skb;
  6775. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6776. if (!skb)
  6777. return ERR_PTR(-ENOMEM);
  6778. cmd = (struct wmi_echo_cmd *)skb->data;
  6779. cmd->value = cpu_to_le32(value);
  6780. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6781. "wmi echo value 0x%08x\n", value);
  6782. return skb;
  6783. }
  6784. int
  6785. ath10k_wmi_barrier(struct ath10k *ar)
  6786. {
  6787. int ret;
  6788. int time_left;
  6789. spin_lock_bh(&ar->data_lock);
  6790. reinit_completion(&ar->wmi.barrier);
  6791. spin_unlock_bh(&ar->data_lock);
  6792. ret = ath10k_wmi_echo(ar, ATH10K_WMI_BARRIER_ECHO_ID);
  6793. if (ret) {
  6794. ath10k_warn(ar, "failed to submit wmi echo: %d\n", ret);
  6795. return ret;
  6796. }
  6797. time_left = wait_for_completion_timeout(&ar->wmi.barrier,
  6798. ATH10K_WMI_BARRIER_TIMEOUT_HZ);
  6799. if (!time_left)
  6800. return -ETIMEDOUT;
  6801. return 0;
  6802. }
  6803. static const struct wmi_ops wmi_ops = {
  6804. .rx = ath10k_wmi_op_rx,
  6805. .map_svc = wmi_main_svc_map,
  6806. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  6807. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  6808. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  6809. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  6810. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  6811. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  6812. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  6813. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  6814. .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
  6815. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  6816. .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats,
  6817. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  6818. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  6819. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  6820. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  6821. .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd,
  6822. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  6823. .gen_init = ath10k_wmi_op_gen_init,
  6824. .gen_start_scan = ath10k_wmi_op_gen_start_scan,
  6825. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  6826. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  6827. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  6828. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  6829. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  6830. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  6831. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  6832. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  6833. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  6834. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  6835. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  6836. /* .gen_vdev_wmm_conf not implemented */
  6837. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  6838. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  6839. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  6840. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  6841. .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc,
  6842. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  6843. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  6844. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  6845. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  6846. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  6847. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  6848. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  6849. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  6850. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  6851. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  6852. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  6853. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  6854. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  6855. /* .gen_pdev_get_temperature not implemented */
  6856. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  6857. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  6858. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  6859. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  6860. .fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill,
  6861. .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  6862. .gen_echo = ath10k_wmi_op_gen_echo,
  6863. /* .gen_bcn_tmpl not implemented */
  6864. /* .gen_prb_tmpl not implemented */
  6865. /* .gen_p2p_go_bcn_ie not implemented */
  6866. /* .gen_adaptive_qcs not implemented */
  6867. /* .gen_pdev_enable_adaptive_cca not implemented */
  6868. };
  6869. static const struct wmi_ops wmi_10_1_ops = {
  6870. .rx = ath10k_wmi_10_1_op_rx,
  6871. .map_svc = wmi_10x_svc_map,
  6872. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  6873. .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats,
  6874. .gen_init = ath10k_wmi_10_1_op_gen_init,
  6875. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  6876. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  6877. .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc,
  6878. /* .gen_pdev_get_temperature not implemented */
  6879. /* shared with main branch */
  6880. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  6881. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  6882. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  6883. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  6884. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  6885. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  6886. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  6887. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  6888. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  6889. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  6890. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  6891. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  6892. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  6893. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  6894. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  6895. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  6896. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  6897. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  6898. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  6899. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  6900. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  6901. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  6902. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  6903. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  6904. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  6905. /* .gen_vdev_wmm_conf not implemented */
  6906. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  6907. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  6908. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  6909. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  6910. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  6911. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  6912. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  6913. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  6914. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  6915. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  6916. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  6917. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  6918. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  6919. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  6920. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  6921. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  6922. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  6923. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  6924. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  6925. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  6926. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  6927. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  6928. .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  6929. .gen_echo = ath10k_wmi_op_gen_echo,
  6930. /* .gen_bcn_tmpl not implemented */
  6931. /* .gen_prb_tmpl not implemented */
  6932. /* .gen_p2p_go_bcn_ie not implemented */
  6933. /* .gen_adaptive_qcs not implemented */
  6934. /* .gen_pdev_enable_adaptive_cca not implemented */
  6935. };
  6936. static const struct wmi_ops wmi_10_2_ops = {
  6937. .rx = ath10k_wmi_10_2_op_rx,
  6938. .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats,
  6939. .gen_init = ath10k_wmi_10_2_op_gen_init,
  6940. .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
  6941. /* .gen_pdev_get_temperature not implemented */
  6942. /* shared with 10.1 */
  6943. .map_svc = wmi_10x_svc_map,
  6944. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  6945. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  6946. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  6947. .gen_echo = ath10k_wmi_op_gen_echo,
  6948. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  6949. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  6950. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  6951. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  6952. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  6953. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  6954. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  6955. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  6956. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  6957. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  6958. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  6959. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  6960. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  6961. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  6962. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  6963. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  6964. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  6965. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  6966. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  6967. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  6968. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  6969. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  6970. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  6971. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  6972. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  6973. /* .gen_vdev_wmm_conf not implemented */
  6974. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  6975. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  6976. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  6977. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  6978. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  6979. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  6980. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  6981. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  6982. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  6983. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  6984. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  6985. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  6986. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  6987. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  6988. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  6989. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  6990. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  6991. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  6992. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  6993. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  6994. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  6995. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  6996. .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  6997. /* .gen_pdev_enable_adaptive_cca not implemented */
  6998. };
  6999. static const struct wmi_ops wmi_10_2_4_ops = {
  7000. .rx = ath10k_wmi_10_2_op_rx,
  7001. .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats,
  7002. .gen_init = ath10k_wmi_10_2_op_gen_init,
  7003. .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
  7004. .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
  7005. .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
  7006. /* shared with 10.1 */
  7007. .map_svc = wmi_10x_svc_map,
  7008. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  7009. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7010. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  7011. .gen_echo = ath10k_wmi_op_gen_echo,
  7012. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7013. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  7014. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  7015. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7016. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7017. .pull_swba = ath10k_wmi_10_2_4_op_pull_swba_ev,
  7018. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  7019. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  7020. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7021. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7022. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7023. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7024. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7025. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7026. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7027. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7028. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7029. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7030. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7031. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7032. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7033. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7034. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7035. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7036. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7037. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7038. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7039. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7040. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7041. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7042. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7043. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7044. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7045. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7046. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7047. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7048. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7049. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7050. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  7051. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7052. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7053. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7054. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7055. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7056. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7057. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7058. .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
  7059. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  7060. .gen_pdev_enable_adaptive_cca =
  7061. ath10k_wmi_op_gen_pdev_enable_adaptive_cca,
  7062. .get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype,
  7063. /* .gen_bcn_tmpl not implemented */
  7064. /* .gen_prb_tmpl not implemented */
  7065. /* .gen_p2p_go_bcn_ie not implemented */
  7066. /* .gen_adaptive_qcs not implemented */
  7067. };
  7068. static const struct wmi_ops wmi_10_4_ops = {
  7069. .rx = ath10k_wmi_10_4_op_rx,
  7070. .map_svc = wmi_10_4_svc_map,
  7071. .pull_fw_stats = ath10k_wmi_10_4_op_pull_fw_stats,
  7072. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7073. .pull_mgmt_rx = ath10k_wmi_10_4_op_pull_mgmt_rx_ev,
  7074. .pull_ch_info = ath10k_wmi_10_4_op_pull_ch_info_ev,
  7075. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7076. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7077. .pull_swba = ath10k_wmi_10_4_op_pull_swba_ev,
  7078. .pull_phyerr_hdr = ath10k_wmi_10_4_op_pull_phyerr_ev_hdr,
  7079. .pull_phyerr = ath10k_wmi_10_4_op_pull_phyerr_ev,
  7080. .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
  7081. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7082. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7083. .get_txbf_conf_scheme = ath10k_wmi_10_4_txbf_conf_scheme,
  7084. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7085. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7086. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7087. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7088. .gen_init = ath10k_wmi_10_4_op_gen_init,
  7089. .gen_start_scan = ath10k_wmi_op_gen_start_scan,
  7090. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7091. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7092. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7093. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7094. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7095. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7096. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7097. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7098. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7099. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7100. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7101. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7102. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7103. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7104. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7105. .gen_peer_assoc = ath10k_wmi_10_4_op_gen_peer_assoc,
  7106. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7107. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7108. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7109. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7110. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7111. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7112. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7113. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7114. .gen_dbglog_cfg = ath10k_wmi_10_4_op_gen_dbglog_cfg,
  7115. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7116. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7117. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7118. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7119. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7120. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7121. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7122. .fw_stats_fill = ath10k_wmi_10_4_op_fw_stats_fill,
  7123. .ext_resource_config = ath10k_wmi_10_4_ext_resource_config,
  7124. /* shared with 10.2 */
  7125. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7126. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7127. .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
  7128. .get_vdev_subtype = ath10k_wmi_10_4_op_get_vdev_subtype,
  7129. .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
  7130. .gen_echo = ath10k_wmi_op_gen_echo,
  7131. .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
  7132. };
  7133. int ath10k_wmi_attach(struct ath10k *ar)
  7134. {
  7135. switch (ar->running_fw->fw_file.wmi_op_version) {
  7136. case ATH10K_FW_WMI_OP_VERSION_10_4:
  7137. ar->wmi.ops = &wmi_10_4_ops;
  7138. ar->wmi.cmd = &wmi_10_4_cmd_map;
  7139. ar->wmi.vdev_param = &wmi_10_4_vdev_param_map;
  7140. ar->wmi.pdev_param = &wmi_10_4_pdev_param_map;
  7141. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  7142. break;
  7143. case ATH10K_FW_WMI_OP_VERSION_10_2_4:
  7144. ar->wmi.cmd = &wmi_10_2_4_cmd_map;
  7145. ar->wmi.ops = &wmi_10_2_4_ops;
  7146. ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map;
  7147. ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map;
  7148. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  7149. break;
  7150. case ATH10K_FW_WMI_OP_VERSION_10_2:
  7151. ar->wmi.cmd = &wmi_10_2_cmd_map;
  7152. ar->wmi.ops = &wmi_10_2_ops;
  7153. ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
  7154. ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
  7155. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  7156. break;
  7157. case ATH10K_FW_WMI_OP_VERSION_10_1:
  7158. ar->wmi.cmd = &wmi_10x_cmd_map;
  7159. ar->wmi.ops = &wmi_10_1_ops;
  7160. ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
  7161. ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
  7162. ar->wmi.peer_flags = &wmi_10x_peer_flags_map;
  7163. break;
  7164. case ATH10K_FW_WMI_OP_VERSION_MAIN:
  7165. ar->wmi.cmd = &wmi_cmd_map;
  7166. ar->wmi.ops = &wmi_ops;
  7167. ar->wmi.vdev_param = &wmi_vdev_param_map;
  7168. ar->wmi.pdev_param = &wmi_pdev_param_map;
  7169. ar->wmi.peer_flags = &wmi_peer_flags_map;
  7170. break;
  7171. case ATH10K_FW_WMI_OP_VERSION_TLV:
  7172. ath10k_wmi_tlv_attach(ar);
  7173. break;
  7174. case ATH10K_FW_WMI_OP_VERSION_UNSET:
  7175. case ATH10K_FW_WMI_OP_VERSION_MAX:
  7176. ath10k_err(ar, "unsupported WMI op version: %d\n",
  7177. ar->running_fw->fw_file.wmi_op_version);
  7178. return -EINVAL;
  7179. }
  7180. init_completion(&ar->wmi.service_ready);
  7181. init_completion(&ar->wmi.unified_ready);
  7182. init_completion(&ar->wmi.barrier);
  7183. INIT_WORK(&ar->svc_rdy_work, ath10k_wmi_event_service_ready_work);
  7184. return 0;
  7185. }
  7186. void ath10k_wmi_free_host_mem(struct ath10k *ar)
  7187. {
  7188. int i;
  7189. /* free the host memory chunks requested by firmware */
  7190. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  7191. dma_unmap_single(ar->dev,
  7192. ar->wmi.mem_chunks[i].paddr,
  7193. ar->wmi.mem_chunks[i].len,
  7194. DMA_BIDIRECTIONAL);
  7195. kfree(ar->wmi.mem_chunks[i].vaddr);
  7196. }
  7197. ar->wmi.num_mem_chunks = 0;
  7198. }
  7199. void ath10k_wmi_detach(struct ath10k *ar)
  7200. {
  7201. cancel_work_sync(&ar->svc_rdy_work);
  7202. if (ar->svc_rdy_skb)
  7203. dev_kfree_skb(ar->svc_rdy_skb);
  7204. }