htt_rx.c 70 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include "core.h"
  18. #include "htc.h"
  19. #include "htt.h"
  20. #include "txrx.h"
  21. #include "debug.h"
  22. #include "trace.h"
  23. #include "mac.h"
  24. #include <linux/log2.h>
  25. #define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX
  26. #define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1)
  27. /* when under memory pressure rx ring refill may fail and needs a retry */
  28. #define HTT_RX_RING_REFILL_RETRY_MS 50
  29. #define HTT_RX_RING_REFILL_RESCHED_MS 5
  30. static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
  31. static struct sk_buff *
  32. ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u32 paddr)
  33. {
  34. struct ath10k_skb_rxcb *rxcb;
  35. hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr)
  36. if (rxcb->paddr == paddr)
  37. return ATH10K_RXCB_SKB(rxcb);
  38. WARN_ON_ONCE(1);
  39. return NULL;
  40. }
  41. static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
  42. {
  43. struct sk_buff *skb;
  44. struct ath10k_skb_rxcb *rxcb;
  45. struct hlist_node *n;
  46. int i;
  47. if (htt->rx_ring.in_ord_rx) {
  48. hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) {
  49. skb = ATH10K_RXCB_SKB(rxcb);
  50. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  51. skb->len + skb_tailroom(skb),
  52. DMA_FROM_DEVICE);
  53. hash_del(&rxcb->hlist);
  54. dev_kfree_skb_any(skb);
  55. }
  56. } else {
  57. for (i = 0; i < htt->rx_ring.size; i++) {
  58. skb = htt->rx_ring.netbufs_ring[i];
  59. if (!skb)
  60. continue;
  61. rxcb = ATH10K_SKB_RXCB(skb);
  62. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  63. skb->len + skb_tailroom(skb),
  64. DMA_FROM_DEVICE);
  65. dev_kfree_skb_any(skb);
  66. }
  67. }
  68. htt->rx_ring.fill_cnt = 0;
  69. hash_init(htt->rx_ring.skb_table);
  70. memset(htt->rx_ring.netbufs_ring, 0,
  71. htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0]));
  72. }
  73. static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  74. {
  75. struct htt_rx_desc *rx_desc;
  76. struct ath10k_skb_rxcb *rxcb;
  77. struct sk_buff *skb;
  78. dma_addr_t paddr;
  79. int ret = 0, idx;
  80. /* The Full Rx Reorder firmware has no way of telling the host
  81. * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring.
  82. * To keep things simple make sure ring is always half empty. This
  83. * guarantees there'll be no replenishment overruns possible.
  84. */
  85. BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2);
  86. idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
  87. while (num > 0) {
  88. skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
  89. if (!skb) {
  90. ret = -ENOMEM;
  91. goto fail;
  92. }
  93. if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
  94. skb_pull(skb,
  95. PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
  96. skb->data);
  97. /* Clear rx_desc attention word before posting to Rx ring */
  98. rx_desc = (struct htt_rx_desc *)skb->data;
  99. rx_desc->attention.flags = __cpu_to_le32(0);
  100. paddr = dma_map_single(htt->ar->dev, skb->data,
  101. skb->len + skb_tailroom(skb),
  102. DMA_FROM_DEVICE);
  103. if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
  104. dev_kfree_skb_any(skb);
  105. ret = -ENOMEM;
  106. goto fail;
  107. }
  108. rxcb = ATH10K_SKB_RXCB(skb);
  109. rxcb->paddr = paddr;
  110. htt->rx_ring.netbufs_ring[idx] = skb;
  111. htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
  112. htt->rx_ring.fill_cnt++;
  113. if (htt->rx_ring.in_ord_rx) {
  114. hash_add(htt->rx_ring.skb_table,
  115. &ATH10K_SKB_RXCB(skb)->hlist,
  116. (u32)paddr);
  117. }
  118. num--;
  119. idx++;
  120. idx &= htt->rx_ring.size_mask;
  121. }
  122. fail:
  123. /*
  124. * Make sure the rx buffer is updated before available buffer
  125. * index to avoid any potential rx ring corruption.
  126. */
  127. mb();
  128. *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx);
  129. return ret;
  130. }
  131. static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  132. {
  133. lockdep_assert_held(&htt->rx_ring.lock);
  134. return __ath10k_htt_rx_ring_fill_n(htt, num);
  135. }
  136. static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
  137. {
  138. int ret, num_deficit, num_to_fill;
  139. /* Refilling the whole RX ring buffer proves to be a bad idea. The
  140. * reason is RX may take up significant amount of CPU cycles and starve
  141. * other tasks, e.g. TX on an ethernet device while acting as a bridge
  142. * with ath10k wlan interface. This ended up with very poor performance
  143. * once CPU the host system was overwhelmed with RX on ath10k.
  144. *
  145. * By limiting the number of refills the replenishing occurs
  146. * progressively. This in turns makes use of the fact tasklets are
  147. * processed in FIFO order. This means actual RX processing can starve
  148. * out refilling. If there's not enough buffers on RX ring FW will not
  149. * report RX until it is refilled with enough buffers. This
  150. * automatically balances load wrt to CPU power.
  151. *
  152. * This probably comes at a cost of lower maximum throughput but
  153. * improves the average and stability. */
  154. spin_lock_bh(&htt->rx_ring.lock);
  155. num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
  156. num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
  157. num_deficit -= num_to_fill;
  158. ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
  159. if (ret == -ENOMEM) {
  160. /*
  161. * Failed to fill it to the desired level -
  162. * we'll start a timer and try again next time.
  163. * As long as enough buffers are left in the ring for
  164. * another A-MPDU rx, no special recovery is needed.
  165. */
  166. mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
  167. msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
  168. } else if (num_deficit > 0) {
  169. mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
  170. msecs_to_jiffies(HTT_RX_RING_REFILL_RESCHED_MS));
  171. }
  172. spin_unlock_bh(&htt->rx_ring.lock);
  173. }
  174. static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
  175. {
  176. struct ath10k_htt *htt = (struct ath10k_htt *)arg;
  177. ath10k_htt_rx_msdu_buff_replenish(htt);
  178. }
  179. int ath10k_htt_rx_ring_refill(struct ath10k *ar)
  180. {
  181. struct ath10k_htt *htt = &ar->htt;
  182. int ret;
  183. spin_lock_bh(&htt->rx_ring.lock);
  184. ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level -
  185. htt->rx_ring.fill_cnt));
  186. spin_unlock_bh(&htt->rx_ring.lock);
  187. if (ret)
  188. ath10k_htt_rx_ring_free(htt);
  189. return ret;
  190. }
  191. void ath10k_htt_rx_free(struct ath10k_htt *htt)
  192. {
  193. del_timer_sync(&htt->rx_ring.refill_retry_timer);
  194. skb_queue_purge(&htt->rx_compl_q);
  195. skb_queue_purge(&htt->rx_in_ord_compl_q);
  196. skb_queue_purge(&htt->tx_fetch_ind_q);
  197. ath10k_htt_rx_ring_free(htt);
  198. dma_free_coherent(htt->ar->dev,
  199. (htt->rx_ring.size *
  200. sizeof(htt->rx_ring.paddrs_ring)),
  201. htt->rx_ring.paddrs_ring,
  202. htt->rx_ring.base_paddr);
  203. dma_free_coherent(htt->ar->dev,
  204. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  205. htt->rx_ring.alloc_idx.vaddr,
  206. htt->rx_ring.alloc_idx.paddr);
  207. kfree(htt->rx_ring.netbufs_ring);
  208. }
  209. static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
  210. {
  211. struct ath10k *ar = htt->ar;
  212. int idx;
  213. struct sk_buff *msdu;
  214. lockdep_assert_held(&htt->rx_ring.lock);
  215. if (htt->rx_ring.fill_cnt == 0) {
  216. ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
  217. return NULL;
  218. }
  219. idx = htt->rx_ring.sw_rd_idx.msdu_payld;
  220. msdu = htt->rx_ring.netbufs_ring[idx];
  221. htt->rx_ring.netbufs_ring[idx] = NULL;
  222. htt->rx_ring.paddrs_ring[idx] = 0;
  223. idx++;
  224. idx &= htt->rx_ring.size_mask;
  225. htt->rx_ring.sw_rd_idx.msdu_payld = idx;
  226. htt->rx_ring.fill_cnt--;
  227. dma_unmap_single(htt->ar->dev,
  228. ATH10K_SKB_RXCB(msdu)->paddr,
  229. msdu->len + skb_tailroom(msdu),
  230. DMA_FROM_DEVICE);
  231. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
  232. msdu->data, msdu->len + skb_tailroom(msdu));
  233. return msdu;
  234. }
  235. /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
  236. static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
  237. struct sk_buff_head *amsdu)
  238. {
  239. struct ath10k *ar = htt->ar;
  240. int msdu_len, msdu_chaining = 0;
  241. struct sk_buff *msdu;
  242. struct htt_rx_desc *rx_desc;
  243. lockdep_assert_held(&htt->rx_ring.lock);
  244. for (;;) {
  245. int last_msdu, msdu_len_invalid, msdu_chained;
  246. msdu = ath10k_htt_rx_netbuf_pop(htt);
  247. if (!msdu) {
  248. __skb_queue_purge(amsdu);
  249. return -ENOENT;
  250. }
  251. __skb_queue_tail(amsdu, msdu);
  252. rx_desc = (struct htt_rx_desc *)msdu->data;
  253. /* FIXME: we must report msdu payload since this is what caller
  254. * expects now */
  255. skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  256. skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  257. /*
  258. * Sanity check - confirm the HW is finished filling in the
  259. * rx data.
  260. * If the HW and SW are working correctly, then it's guaranteed
  261. * that the HW's MAC DMA is done before this point in the SW.
  262. * To prevent the case that we handle a stale Rx descriptor,
  263. * just assert for now until we have a way to recover.
  264. */
  265. if (!(__le32_to_cpu(rx_desc->attention.flags)
  266. & RX_ATTENTION_FLAGS_MSDU_DONE)) {
  267. __skb_queue_purge(amsdu);
  268. return -EIO;
  269. }
  270. msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
  271. & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
  272. RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
  273. msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.common.info0),
  274. RX_MSDU_START_INFO0_MSDU_LENGTH);
  275. msdu_chained = rx_desc->frag_info.ring2_more_count;
  276. if (msdu_len_invalid)
  277. msdu_len = 0;
  278. skb_trim(msdu, 0);
  279. skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
  280. msdu_len -= msdu->len;
  281. /* Note: Chained buffers do not contain rx descriptor */
  282. while (msdu_chained--) {
  283. msdu = ath10k_htt_rx_netbuf_pop(htt);
  284. if (!msdu) {
  285. __skb_queue_purge(amsdu);
  286. return -ENOENT;
  287. }
  288. __skb_queue_tail(amsdu, msdu);
  289. skb_trim(msdu, 0);
  290. skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE));
  291. msdu_len -= msdu->len;
  292. msdu_chaining = 1;
  293. }
  294. last_msdu = __le32_to_cpu(rx_desc->msdu_end.common.info0) &
  295. RX_MSDU_END_INFO0_LAST_MSDU;
  296. trace_ath10k_htt_rx_desc(ar, &rx_desc->attention,
  297. sizeof(*rx_desc) - sizeof(u32));
  298. if (last_msdu)
  299. break;
  300. }
  301. if (skb_queue_empty(amsdu))
  302. msdu_chaining = -1;
  303. /*
  304. * Don't refill the ring yet.
  305. *
  306. * First, the elements popped here are still in use - it is not
  307. * safe to overwrite them until the matching call to
  308. * mpdu_desc_list_next. Second, for efficiency it is preferable to
  309. * refill the rx ring with 1 PPDU's worth of rx buffers (something
  310. * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
  311. * (something like 3 buffers). Consequently, we'll rely on the txrx
  312. * SW to tell us when it is done pulling all the PPDU's rx buffers
  313. * out of the rx ring, and then refill it just once.
  314. */
  315. return msdu_chaining;
  316. }
  317. static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt,
  318. u32 paddr)
  319. {
  320. struct ath10k *ar = htt->ar;
  321. struct ath10k_skb_rxcb *rxcb;
  322. struct sk_buff *msdu;
  323. lockdep_assert_held(&htt->rx_ring.lock);
  324. msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr);
  325. if (!msdu)
  326. return NULL;
  327. rxcb = ATH10K_SKB_RXCB(msdu);
  328. hash_del(&rxcb->hlist);
  329. htt->rx_ring.fill_cnt--;
  330. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  331. msdu->len + skb_tailroom(msdu),
  332. DMA_FROM_DEVICE);
  333. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
  334. msdu->data, msdu->len + skb_tailroom(msdu));
  335. return msdu;
  336. }
  337. static int ath10k_htt_rx_pop_paddr_list(struct ath10k_htt *htt,
  338. struct htt_rx_in_ord_ind *ev,
  339. struct sk_buff_head *list)
  340. {
  341. struct ath10k *ar = htt->ar;
  342. struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs;
  343. struct htt_rx_desc *rxd;
  344. struct sk_buff *msdu;
  345. int msdu_count;
  346. bool is_offload;
  347. u32 paddr;
  348. lockdep_assert_held(&htt->rx_ring.lock);
  349. msdu_count = __le16_to_cpu(ev->msdu_count);
  350. is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
  351. while (msdu_count--) {
  352. paddr = __le32_to_cpu(msdu_desc->msdu_paddr);
  353. msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
  354. if (!msdu) {
  355. __skb_queue_purge(list);
  356. return -ENOENT;
  357. }
  358. __skb_queue_tail(list, msdu);
  359. if (!is_offload) {
  360. rxd = (void *)msdu->data;
  361. trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd));
  362. skb_put(msdu, sizeof(*rxd));
  363. skb_pull(msdu, sizeof(*rxd));
  364. skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
  365. if (!(__le32_to_cpu(rxd->attention.flags) &
  366. RX_ATTENTION_FLAGS_MSDU_DONE)) {
  367. ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
  368. return -EIO;
  369. }
  370. }
  371. msdu_desc++;
  372. }
  373. return 0;
  374. }
  375. int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
  376. {
  377. struct ath10k *ar = htt->ar;
  378. dma_addr_t paddr;
  379. void *vaddr;
  380. size_t size;
  381. struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
  382. htt->rx_confused = false;
  383. /* XXX: The fill level could be changed during runtime in response to
  384. * the host processing latency. Is this really worth it?
  385. */
  386. htt->rx_ring.size = HTT_RX_RING_SIZE;
  387. htt->rx_ring.size_mask = htt->rx_ring.size - 1;
  388. htt->rx_ring.fill_level = HTT_RX_RING_FILL_LEVEL;
  389. if (!is_power_of_2(htt->rx_ring.size)) {
  390. ath10k_warn(ar, "htt rx ring size is not power of 2\n");
  391. return -EINVAL;
  392. }
  393. htt->rx_ring.netbufs_ring =
  394. kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
  395. GFP_KERNEL);
  396. if (!htt->rx_ring.netbufs_ring)
  397. goto err_netbuf;
  398. size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring);
  399. vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_KERNEL);
  400. if (!vaddr)
  401. goto err_dma_ring;
  402. htt->rx_ring.paddrs_ring = vaddr;
  403. htt->rx_ring.base_paddr = paddr;
  404. vaddr = dma_alloc_coherent(htt->ar->dev,
  405. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  406. &paddr, GFP_KERNEL);
  407. if (!vaddr)
  408. goto err_dma_idx;
  409. htt->rx_ring.alloc_idx.vaddr = vaddr;
  410. htt->rx_ring.alloc_idx.paddr = paddr;
  411. htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask;
  412. *htt->rx_ring.alloc_idx.vaddr = 0;
  413. /* Initialize the Rx refill retry timer */
  414. setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
  415. spin_lock_init(&htt->rx_ring.lock);
  416. htt->rx_ring.fill_cnt = 0;
  417. htt->rx_ring.sw_rd_idx.msdu_payld = 0;
  418. hash_init(htt->rx_ring.skb_table);
  419. skb_queue_head_init(&htt->rx_compl_q);
  420. skb_queue_head_init(&htt->rx_in_ord_compl_q);
  421. skb_queue_head_init(&htt->tx_fetch_ind_q);
  422. atomic_set(&htt->num_mpdus_ready, 0);
  423. ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
  424. htt->rx_ring.size, htt->rx_ring.fill_level);
  425. return 0;
  426. err_dma_idx:
  427. dma_free_coherent(htt->ar->dev,
  428. (htt->rx_ring.size *
  429. sizeof(htt->rx_ring.paddrs_ring)),
  430. htt->rx_ring.paddrs_ring,
  431. htt->rx_ring.base_paddr);
  432. err_dma_ring:
  433. kfree(htt->rx_ring.netbufs_ring);
  434. err_netbuf:
  435. return -ENOMEM;
  436. }
  437. static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
  438. enum htt_rx_mpdu_encrypt_type type)
  439. {
  440. switch (type) {
  441. case HTT_RX_MPDU_ENCRYPT_NONE:
  442. return 0;
  443. case HTT_RX_MPDU_ENCRYPT_WEP40:
  444. case HTT_RX_MPDU_ENCRYPT_WEP104:
  445. return IEEE80211_WEP_IV_LEN;
  446. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  447. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  448. return IEEE80211_TKIP_IV_LEN;
  449. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  450. return IEEE80211_CCMP_HDR_LEN;
  451. case HTT_RX_MPDU_ENCRYPT_WEP128:
  452. case HTT_RX_MPDU_ENCRYPT_WAPI:
  453. break;
  454. }
  455. ath10k_warn(ar, "unsupported encryption type %d\n", type);
  456. return 0;
  457. }
  458. #define MICHAEL_MIC_LEN 8
  459. static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar,
  460. enum htt_rx_mpdu_encrypt_type type)
  461. {
  462. switch (type) {
  463. case HTT_RX_MPDU_ENCRYPT_NONE:
  464. return 0;
  465. case HTT_RX_MPDU_ENCRYPT_WEP40:
  466. case HTT_RX_MPDU_ENCRYPT_WEP104:
  467. return IEEE80211_WEP_ICV_LEN;
  468. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  469. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  470. return IEEE80211_TKIP_ICV_LEN;
  471. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  472. return IEEE80211_CCMP_MIC_LEN;
  473. case HTT_RX_MPDU_ENCRYPT_WEP128:
  474. case HTT_RX_MPDU_ENCRYPT_WAPI:
  475. break;
  476. }
  477. ath10k_warn(ar, "unsupported encryption type %d\n", type);
  478. return 0;
  479. }
  480. struct amsdu_subframe_hdr {
  481. u8 dst[ETH_ALEN];
  482. u8 src[ETH_ALEN];
  483. __be16 len;
  484. } __packed;
  485. #define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63)
  486. static void ath10k_htt_rx_h_rates(struct ath10k *ar,
  487. struct ieee80211_rx_status *status,
  488. struct htt_rx_desc *rxd)
  489. {
  490. struct ieee80211_supported_band *sband;
  491. u8 cck, rate, bw, sgi, mcs, nss;
  492. u8 preamble = 0;
  493. u8 group_id;
  494. u32 info1, info2, info3;
  495. info1 = __le32_to_cpu(rxd->ppdu_start.info1);
  496. info2 = __le32_to_cpu(rxd->ppdu_start.info2);
  497. info3 = __le32_to_cpu(rxd->ppdu_start.info3);
  498. preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE);
  499. switch (preamble) {
  500. case HTT_RX_LEGACY:
  501. /* To get legacy rate index band is required. Since band can't
  502. * be undefined check if freq is non-zero.
  503. */
  504. if (!status->freq)
  505. return;
  506. cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT;
  507. rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE);
  508. rate &= ~RX_PPDU_START_RATE_FLAG;
  509. sband = &ar->mac.sbands[status->band];
  510. status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate, cck);
  511. break;
  512. case HTT_RX_HT:
  513. case HTT_RX_HT_WITH_TXBF:
  514. /* HT-SIG - Table 20-11 in info2 and info3 */
  515. mcs = info2 & 0x1F;
  516. nss = mcs >> 3;
  517. bw = (info2 >> 7) & 1;
  518. sgi = (info3 >> 7) & 1;
  519. status->rate_idx = mcs;
  520. status->flag |= RX_FLAG_HT;
  521. if (sgi)
  522. status->flag |= RX_FLAG_SHORT_GI;
  523. if (bw)
  524. status->flag |= RX_FLAG_40MHZ;
  525. break;
  526. case HTT_RX_VHT:
  527. case HTT_RX_VHT_WITH_TXBF:
  528. /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3
  529. TODO check this */
  530. bw = info2 & 3;
  531. sgi = info3 & 1;
  532. group_id = (info2 >> 4) & 0x3F;
  533. if (GROUP_ID_IS_SU_MIMO(group_id)) {
  534. mcs = (info3 >> 4) & 0x0F;
  535. nss = ((info2 >> 10) & 0x07) + 1;
  536. } else {
  537. /* Hardware doesn't decode VHT-SIG-B into Rx descriptor
  538. * so it's impossible to decode MCS. Also since
  539. * firmware consumes Group Id Management frames host
  540. * has no knowledge regarding group/user position
  541. * mapping so it's impossible to pick the correct Nsts
  542. * from VHT-SIG-A1.
  543. *
  544. * Bandwidth and SGI are valid so report the rateinfo
  545. * on best-effort basis.
  546. */
  547. mcs = 0;
  548. nss = 1;
  549. }
  550. if (mcs > 0x09) {
  551. ath10k_warn(ar, "invalid MCS received %u\n", mcs);
  552. ath10k_warn(ar, "rxd %08x mpdu start %08x %08x msdu start %08x %08x ppdu start %08x %08x %08x %08x %08x\n",
  553. __le32_to_cpu(rxd->attention.flags),
  554. __le32_to_cpu(rxd->mpdu_start.info0),
  555. __le32_to_cpu(rxd->mpdu_start.info1),
  556. __le32_to_cpu(rxd->msdu_start.common.info0),
  557. __le32_to_cpu(rxd->msdu_start.common.info1),
  558. rxd->ppdu_start.info0,
  559. __le32_to_cpu(rxd->ppdu_start.info1),
  560. __le32_to_cpu(rxd->ppdu_start.info2),
  561. __le32_to_cpu(rxd->ppdu_start.info3),
  562. __le32_to_cpu(rxd->ppdu_start.info4));
  563. ath10k_warn(ar, "msdu end %08x mpdu end %08x\n",
  564. __le32_to_cpu(rxd->msdu_end.common.info0),
  565. __le32_to_cpu(rxd->mpdu_end.info0));
  566. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL,
  567. "rx desc msdu payload: ",
  568. rxd->msdu_payload, 50);
  569. }
  570. status->rate_idx = mcs;
  571. status->vht_nss = nss;
  572. if (sgi)
  573. status->flag |= RX_FLAG_SHORT_GI;
  574. switch (bw) {
  575. /* 20MHZ */
  576. case 0:
  577. break;
  578. /* 40MHZ */
  579. case 1:
  580. status->flag |= RX_FLAG_40MHZ;
  581. break;
  582. /* 80MHZ */
  583. case 2:
  584. status->vht_flag |= RX_VHT_FLAG_80MHZ;
  585. break;
  586. case 3:
  587. status->vht_flag |= RX_VHT_FLAG_160MHZ;
  588. break;
  589. }
  590. status->flag |= RX_FLAG_VHT;
  591. break;
  592. default:
  593. break;
  594. }
  595. }
  596. static struct ieee80211_channel *
  597. ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd)
  598. {
  599. struct ath10k_peer *peer;
  600. struct ath10k_vif *arvif;
  601. struct cfg80211_chan_def def;
  602. u16 peer_id;
  603. lockdep_assert_held(&ar->data_lock);
  604. if (!rxd)
  605. return NULL;
  606. if (rxd->attention.flags &
  607. __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID))
  608. return NULL;
  609. if (!(rxd->msdu_end.common.info0 &
  610. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)))
  611. return NULL;
  612. peer_id = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  613. RX_MPDU_START_INFO0_PEER_IDX);
  614. peer = ath10k_peer_find_by_id(ar, peer_id);
  615. if (!peer)
  616. return NULL;
  617. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  618. if (WARN_ON_ONCE(!arvif))
  619. return NULL;
  620. if (ath10k_mac_vif_chan(arvif->vif, &def))
  621. return NULL;
  622. return def.chan;
  623. }
  624. static struct ieee80211_channel *
  625. ath10k_htt_rx_h_vdev_channel(struct ath10k *ar, u32 vdev_id)
  626. {
  627. struct ath10k_vif *arvif;
  628. struct cfg80211_chan_def def;
  629. lockdep_assert_held(&ar->data_lock);
  630. list_for_each_entry(arvif, &ar->arvifs, list) {
  631. if (arvif->vdev_id == vdev_id &&
  632. ath10k_mac_vif_chan(arvif->vif, &def) == 0)
  633. return def.chan;
  634. }
  635. return NULL;
  636. }
  637. static void
  638. ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw *hw,
  639. struct ieee80211_chanctx_conf *conf,
  640. void *data)
  641. {
  642. struct cfg80211_chan_def *def = data;
  643. *def = conf->def;
  644. }
  645. static struct ieee80211_channel *
  646. ath10k_htt_rx_h_any_channel(struct ath10k *ar)
  647. {
  648. struct cfg80211_chan_def def = {};
  649. ieee80211_iter_chan_contexts_atomic(ar->hw,
  650. ath10k_htt_rx_h_any_chan_iter,
  651. &def);
  652. return def.chan;
  653. }
  654. static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
  655. struct ieee80211_rx_status *status,
  656. struct htt_rx_desc *rxd,
  657. u32 vdev_id)
  658. {
  659. struct ieee80211_channel *ch;
  660. spin_lock_bh(&ar->data_lock);
  661. ch = ar->scan_channel;
  662. if (!ch)
  663. ch = ar->rx_channel;
  664. if (!ch)
  665. ch = ath10k_htt_rx_h_peer_channel(ar, rxd);
  666. if (!ch)
  667. ch = ath10k_htt_rx_h_vdev_channel(ar, vdev_id);
  668. if (!ch)
  669. ch = ath10k_htt_rx_h_any_channel(ar);
  670. if (!ch)
  671. ch = ar->tgt_oper_chan;
  672. spin_unlock_bh(&ar->data_lock);
  673. if (!ch)
  674. return false;
  675. status->band = ch->band;
  676. status->freq = ch->center_freq;
  677. return true;
  678. }
  679. static void ath10k_htt_rx_h_signal(struct ath10k *ar,
  680. struct ieee80211_rx_status *status,
  681. struct htt_rx_desc *rxd)
  682. {
  683. /* FIXME: Get real NF */
  684. status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
  685. rxd->ppdu_start.rssi_comb;
  686. status->flag &= ~RX_FLAG_NO_SIGNAL_VAL;
  687. }
  688. static void ath10k_htt_rx_h_mactime(struct ath10k *ar,
  689. struct ieee80211_rx_status *status,
  690. struct htt_rx_desc *rxd)
  691. {
  692. /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This
  693. * means all prior MSDUs in a PPDU are reported to mac80211 without the
  694. * TSF. Is it worth holding frames until end of PPDU is known?
  695. *
  696. * FIXME: Can we get/compute 64bit TSF?
  697. */
  698. status->mactime = __le32_to_cpu(rxd->ppdu_end.common.tsf_timestamp);
  699. status->flag |= RX_FLAG_MACTIME_END;
  700. }
  701. static void ath10k_htt_rx_h_ppdu(struct ath10k *ar,
  702. struct sk_buff_head *amsdu,
  703. struct ieee80211_rx_status *status,
  704. u32 vdev_id)
  705. {
  706. struct sk_buff *first;
  707. struct htt_rx_desc *rxd;
  708. bool is_first_ppdu;
  709. bool is_last_ppdu;
  710. if (skb_queue_empty(amsdu))
  711. return;
  712. first = skb_peek(amsdu);
  713. rxd = (void *)first->data - sizeof(*rxd);
  714. is_first_ppdu = !!(rxd->attention.flags &
  715. __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU));
  716. is_last_ppdu = !!(rxd->attention.flags &
  717. __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU));
  718. if (is_first_ppdu) {
  719. /* New PPDU starts so clear out the old per-PPDU status. */
  720. status->freq = 0;
  721. status->rate_idx = 0;
  722. status->vht_nss = 0;
  723. status->vht_flag &= ~RX_VHT_FLAG_80MHZ;
  724. status->flag &= ~(RX_FLAG_HT |
  725. RX_FLAG_VHT |
  726. RX_FLAG_SHORT_GI |
  727. RX_FLAG_40MHZ |
  728. RX_FLAG_MACTIME_END);
  729. status->flag |= RX_FLAG_NO_SIGNAL_VAL;
  730. ath10k_htt_rx_h_signal(ar, status, rxd);
  731. ath10k_htt_rx_h_channel(ar, status, rxd, vdev_id);
  732. ath10k_htt_rx_h_rates(ar, status, rxd);
  733. }
  734. if (is_last_ppdu)
  735. ath10k_htt_rx_h_mactime(ar, status, rxd);
  736. }
  737. static const char * const tid_to_ac[] = {
  738. "BE",
  739. "BK",
  740. "BK",
  741. "BE",
  742. "VI",
  743. "VI",
  744. "VO",
  745. "VO",
  746. };
  747. static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
  748. {
  749. u8 *qc;
  750. int tid;
  751. if (!ieee80211_is_data_qos(hdr->frame_control))
  752. return "";
  753. qc = ieee80211_get_qos_ctl(hdr);
  754. tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
  755. if (tid < 8)
  756. snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
  757. else
  758. snprintf(out, size, "tid %d", tid);
  759. return out;
  760. }
  761. static void ath10k_process_rx(struct ath10k *ar,
  762. struct ieee80211_rx_status *rx_status,
  763. struct sk_buff *skb)
  764. {
  765. struct ieee80211_rx_status *status;
  766. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  767. char tid[32];
  768. status = IEEE80211_SKB_RXCB(skb);
  769. *status = *rx_status;
  770. ath10k_dbg(ar, ATH10K_DBG_DATA,
  771. "rx skb %pK len %u peer %pM %s %s sn %u %s%s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%llx fcs-err %i mic-err %i amsdu-more %i\n",
  772. skb,
  773. skb->len,
  774. ieee80211_get_SA(hdr),
  775. ath10k_get_tid(hdr, tid, sizeof(tid)),
  776. is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
  777. "mcast" : "ucast",
  778. (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
  779. (status->flag & (RX_FLAG_HT | RX_FLAG_VHT)) == 0 ?
  780. "legacy" : "",
  781. status->flag & RX_FLAG_HT ? "ht" : "",
  782. status->flag & RX_FLAG_VHT ? "vht" : "",
  783. status->flag & RX_FLAG_40MHZ ? "40" : "",
  784. status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
  785. status->vht_flag & RX_VHT_FLAG_160MHZ ? "160" : "",
  786. status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
  787. status->rate_idx,
  788. status->vht_nss,
  789. status->freq,
  790. status->band, status->flag,
  791. !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
  792. !!(status->flag & RX_FLAG_MMIC_ERROR),
  793. !!(status->flag & RX_FLAG_AMSDU_MORE));
  794. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
  795. skb->data, skb->len);
  796. trace_ath10k_rx_hdr(ar, skb->data, skb->len);
  797. trace_ath10k_rx_payload(ar, skb->data, skb->len);
  798. ieee80211_rx_napi(ar->hw, NULL, skb, &ar->napi);
  799. }
  800. static int ath10k_htt_rx_nwifi_hdrlen(struct ath10k *ar,
  801. struct ieee80211_hdr *hdr)
  802. {
  803. int len = ieee80211_hdrlen(hdr->frame_control);
  804. if (!test_bit(ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING,
  805. ar->running_fw->fw_file.fw_features))
  806. len = round_up(len, 4);
  807. return len;
  808. }
  809. static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar,
  810. struct sk_buff *msdu,
  811. struct ieee80211_rx_status *status,
  812. enum htt_rx_mpdu_encrypt_type enctype,
  813. bool is_decrypted)
  814. {
  815. struct ieee80211_hdr *hdr;
  816. struct htt_rx_desc *rxd;
  817. size_t hdr_len;
  818. size_t crypto_len;
  819. bool is_first;
  820. bool is_last;
  821. rxd = (void *)msdu->data - sizeof(*rxd);
  822. is_first = !!(rxd->msdu_end.common.info0 &
  823. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
  824. is_last = !!(rxd->msdu_end.common.info0 &
  825. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
  826. /* Delivered decapped frame:
  827. * [802.11 header]
  828. * [crypto param] <-- can be trimmed if !fcs_err &&
  829. * !decrypt_err && !peer_idx_invalid
  830. * [amsdu header] <-- only if A-MSDU
  831. * [rfc1042/llc]
  832. * [payload]
  833. * [FCS] <-- at end, needs to be trimmed
  834. */
  835. /* This probably shouldn't happen but warn just in case */
  836. if (unlikely(WARN_ON_ONCE(!is_first)))
  837. return;
  838. /* This probably shouldn't happen but warn just in case */
  839. if (unlikely(WARN_ON_ONCE(!(is_first && is_last))))
  840. return;
  841. skb_trim(msdu, msdu->len - FCS_LEN);
  842. /* In most cases this will be true for sniffed frames. It makes sense
  843. * to deliver them as-is without stripping the crypto param. This is
  844. * necessary for software based decryption.
  845. *
  846. * If there's no error then the frame is decrypted. At least that is
  847. * the case for frames that come in via fragmented rx indication.
  848. */
  849. if (!is_decrypted)
  850. return;
  851. /* The payload is decrypted so strip crypto params. Start from tail
  852. * since hdr is used to compute some stuff.
  853. */
  854. hdr = (void *)msdu->data;
  855. /* Tail */
  856. if (status->flag & RX_FLAG_IV_STRIPPED)
  857. skb_trim(msdu, msdu->len -
  858. ath10k_htt_rx_crypto_tail_len(ar, enctype));
  859. /* MMIC */
  860. if ((status->flag & RX_FLAG_MMIC_STRIPPED) &&
  861. !ieee80211_has_morefrags(hdr->frame_control) &&
  862. enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
  863. skb_trim(msdu, msdu->len - 8);
  864. /* Head */
  865. if (status->flag & RX_FLAG_IV_STRIPPED) {
  866. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  867. crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
  868. memmove((void *)msdu->data + crypto_len,
  869. (void *)msdu->data, hdr_len);
  870. skb_pull(msdu, crypto_len);
  871. }
  872. }
  873. static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar,
  874. struct sk_buff *msdu,
  875. struct ieee80211_rx_status *status,
  876. const u8 first_hdr[64])
  877. {
  878. struct ieee80211_hdr *hdr;
  879. struct htt_rx_desc *rxd;
  880. size_t hdr_len;
  881. u8 da[ETH_ALEN];
  882. u8 sa[ETH_ALEN];
  883. int l3_pad_bytes;
  884. /* Delivered decapped frame:
  885. * [nwifi 802.11 header] <-- replaced with 802.11 hdr
  886. * [rfc1042/llc]
  887. *
  888. * Note: The nwifi header doesn't have QoS Control and is
  889. * (always?) a 3addr frame.
  890. *
  891. * Note2: There's no A-MSDU subframe header. Even if it's part
  892. * of an A-MSDU.
  893. */
  894. /* pull decapped header and copy SA & DA */
  895. rxd = (void *)msdu->data - sizeof(*rxd);
  896. l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd);
  897. skb_put(msdu, l3_pad_bytes);
  898. hdr = (struct ieee80211_hdr *)(msdu->data + l3_pad_bytes);
  899. hdr_len = ath10k_htt_rx_nwifi_hdrlen(ar, hdr);
  900. ether_addr_copy(da, ieee80211_get_DA(hdr));
  901. ether_addr_copy(sa, ieee80211_get_SA(hdr));
  902. skb_pull(msdu, hdr_len);
  903. /* push original 802.11 header */
  904. hdr = (struct ieee80211_hdr *)first_hdr;
  905. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  906. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  907. /* original 802.11 header has a different DA and in
  908. * case of 4addr it may also have different SA
  909. */
  910. hdr = (struct ieee80211_hdr *)msdu->data;
  911. ether_addr_copy(ieee80211_get_DA(hdr), da);
  912. ether_addr_copy(ieee80211_get_SA(hdr), sa);
  913. }
  914. static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
  915. struct sk_buff *msdu,
  916. enum htt_rx_mpdu_encrypt_type enctype)
  917. {
  918. struct ieee80211_hdr *hdr;
  919. struct htt_rx_desc *rxd;
  920. size_t hdr_len, crypto_len;
  921. void *rfc1042;
  922. bool is_first, is_last, is_amsdu;
  923. int bytes_aligned = ar->hw_params.decap_align_bytes;
  924. rxd = (void *)msdu->data - sizeof(*rxd);
  925. hdr = (void *)rxd->rx_hdr_status;
  926. is_first = !!(rxd->msdu_end.common.info0 &
  927. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
  928. is_last = !!(rxd->msdu_end.common.info0 &
  929. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
  930. is_amsdu = !(is_first && is_last);
  931. rfc1042 = hdr;
  932. if (is_first) {
  933. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  934. crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
  935. rfc1042 += round_up(hdr_len, bytes_aligned) +
  936. round_up(crypto_len, bytes_aligned);
  937. }
  938. if (is_amsdu)
  939. rfc1042 += sizeof(struct amsdu_subframe_hdr);
  940. return rfc1042;
  941. }
  942. static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar,
  943. struct sk_buff *msdu,
  944. struct ieee80211_rx_status *status,
  945. const u8 first_hdr[64],
  946. enum htt_rx_mpdu_encrypt_type enctype)
  947. {
  948. struct ieee80211_hdr *hdr;
  949. struct ethhdr *eth;
  950. size_t hdr_len;
  951. void *rfc1042;
  952. u8 da[ETH_ALEN];
  953. u8 sa[ETH_ALEN];
  954. int l3_pad_bytes;
  955. struct htt_rx_desc *rxd;
  956. /* Delivered decapped frame:
  957. * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc
  958. * [payload]
  959. */
  960. rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype);
  961. if (WARN_ON_ONCE(!rfc1042))
  962. return;
  963. rxd = (void *)msdu->data - sizeof(*rxd);
  964. l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd);
  965. skb_put(msdu, l3_pad_bytes);
  966. skb_pull(msdu, l3_pad_bytes);
  967. /* pull decapped header and copy SA & DA */
  968. eth = (struct ethhdr *)msdu->data;
  969. ether_addr_copy(da, eth->h_dest);
  970. ether_addr_copy(sa, eth->h_source);
  971. skb_pull(msdu, sizeof(struct ethhdr));
  972. /* push rfc1042/llc/snap */
  973. memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042,
  974. sizeof(struct rfc1042_hdr));
  975. /* push original 802.11 header */
  976. hdr = (struct ieee80211_hdr *)first_hdr;
  977. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  978. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  979. /* original 802.11 header has a different DA and in
  980. * case of 4addr it may also have different SA
  981. */
  982. hdr = (struct ieee80211_hdr *)msdu->data;
  983. ether_addr_copy(ieee80211_get_DA(hdr), da);
  984. ether_addr_copy(ieee80211_get_SA(hdr), sa);
  985. }
  986. static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar,
  987. struct sk_buff *msdu,
  988. struct ieee80211_rx_status *status,
  989. const u8 first_hdr[64])
  990. {
  991. struct ieee80211_hdr *hdr;
  992. size_t hdr_len;
  993. int l3_pad_bytes;
  994. struct htt_rx_desc *rxd;
  995. /* Delivered decapped frame:
  996. * [amsdu header] <-- replaced with 802.11 hdr
  997. * [rfc1042/llc]
  998. * [payload]
  999. */
  1000. rxd = (void *)msdu->data - sizeof(*rxd);
  1001. l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd);
  1002. skb_put(msdu, l3_pad_bytes);
  1003. skb_pull(msdu, sizeof(struct amsdu_subframe_hdr) + l3_pad_bytes);
  1004. hdr = (struct ieee80211_hdr *)first_hdr;
  1005. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1006. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  1007. }
  1008. static void ath10k_htt_rx_h_undecap(struct ath10k *ar,
  1009. struct sk_buff *msdu,
  1010. struct ieee80211_rx_status *status,
  1011. u8 first_hdr[64],
  1012. enum htt_rx_mpdu_encrypt_type enctype,
  1013. bool is_decrypted)
  1014. {
  1015. struct htt_rx_desc *rxd;
  1016. enum rx_msdu_decap_format decap;
  1017. /* First msdu's decapped header:
  1018. * [802.11 header] <-- padded to 4 bytes long
  1019. * [crypto param] <-- padded to 4 bytes long
  1020. * [amsdu header] <-- only if A-MSDU
  1021. * [rfc1042/llc]
  1022. *
  1023. * Other (2nd, 3rd, ..) msdu's decapped header:
  1024. * [amsdu header] <-- only if A-MSDU
  1025. * [rfc1042/llc]
  1026. */
  1027. rxd = (void *)msdu->data - sizeof(*rxd);
  1028. decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
  1029. RX_MSDU_START_INFO1_DECAP_FORMAT);
  1030. switch (decap) {
  1031. case RX_MSDU_DECAP_RAW:
  1032. ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype,
  1033. is_decrypted);
  1034. break;
  1035. case RX_MSDU_DECAP_NATIVE_WIFI:
  1036. ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr);
  1037. break;
  1038. case RX_MSDU_DECAP_ETHERNET2_DIX:
  1039. ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype);
  1040. break;
  1041. case RX_MSDU_DECAP_8023_SNAP_LLC:
  1042. ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr);
  1043. break;
  1044. }
  1045. }
  1046. static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
  1047. {
  1048. struct htt_rx_desc *rxd;
  1049. u32 flags, info;
  1050. bool is_ip4, is_ip6;
  1051. bool is_tcp, is_udp;
  1052. bool ip_csum_ok, tcpudp_csum_ok;
  1053. rxd = (void *)skb->data - sizeof(*rxd);
  1054. flags = __le32_to_cpu(rxd->attention.flags);
  1055. info = __le32_to_cpu(rxd->msdu_start.common.info1);
  1056. is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
  1057. is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
  1058. is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
  1059. is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
  1060. ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
  1061. tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
  1062. if (!is_ip4 && !is_ip6)
  1063. return CHECKSUM_NONE;
  1064. if (!is_tcp && !is_udp)
  1065. return CHECKSUM_NONE;
  1066. if (!ip_csum_ok)
  1067. return CHECKSUM_NONE;
  1068. if (!tcpudp_csum_ok)
  1069. return CHECKSUM_NONE;
  1070. return CHECKSUM_UNNECESSARY;
  1071. }
  1072. static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu)
  1073. {
  1074. msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu);
  1075. }
  1076. static void ath10k_htt_rx_h_mpdu(struct ath10k *ar,
  1077. struct sk_buff_head *amsdu,
  1078. struct ieee80211_rx_status *status)
  1079. {
  1080. struct sk_buff *first;
  1081. struct sk_buff *last;
  1082. struct sk_buff *msdu;
  1083. struct htt_rx_desc *rxd;
  1084. struct ieee80211_hdr *hdr;
  1085. enum htt_rx_mpdu_encrypt_type enctype;
  1086. u8 first_hdr[64];
  1087. u8 *qos;
  1088. size_t hdr_len;
  1089. bool has_fcs_err;
  1090. bool has_crypto_err;
  1091. bool has_tkip_err;
  1092. bool has_peer_idx_invalid;
  1093. bool is_decrypted;
  1094. bool is_mgmt;
  1095. u32 attention;
  1096. if (skb_queue_empty(amsdu))
  1097. return;
  1098. first = skb_peek(amsdu);
  1099. rxd = (void *)first->data - sizeof(*rxd);
  1100. is_mgmt = !!(rxd->attention.flags &
  1101. __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE));
  1102. enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  1103. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  1104. /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11
  1105. * decapped header. It'll be used for undecapping of each MSDU.
  1106. */
  1107. hdr = (void *)rxd->rx_hdr_status;
  1108. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1109. memcpy(first_hdr, hdr, hdr_len);
  1110. /* Each A-MSDU subframe will use the original header as the base and be
  1111. * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl.
  1112. */
  1113. hdr = (void *)first_hdr;
  1114. qos = ieee80211_get_qos_ctl(hdr);
  1115. qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
  1116. /* Some attention flags are valid only in the last MSDU. */
  1117. last = skb_peek_tail(amsdu);
  1118. rxd = (void *)last->data - sizeof(*rxd);
  1119. attention = __le32_to_cpu(rxd->attention.flags);
  1120. has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR);
  1121. has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
  1122. has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
  1123. has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID);
  1124. /* Note: If hardware captures an encrypted frame that it can't decrypt,
  1125. * e.g. due to fcs error, missing peer or invalid key data it will
  1126. * report the frame as raw.
  1127. */
  1128. is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE &&
  1129. !has_fcs_err &&
  1130. !has_crypto_err &&
  1131. !has_peer_idx_invalid);
  1132. /* Clear per-MPDU flags while leaving per-PPDU flags intact. */
  1133. status->flag &= ~(RX_FLAG_FAILED_FCS_CRC |
  1134. RX_FLAG_MMIC_ERROR |
  1135. RX_FLAG_DECRYPTED |
  1136. RX_FLAG_IV_STRIPPED |
  1137. RX_FLAG_ONLY_MONITOR |
  1138. RX_FLAG_MMIC_STRIPPED);
  1139. if (has_fcs_err)
  1140. status->flag |= RX_FLAG_FAILED_FCS_CRC;
  1141. if (has_tkip_err)
  1142. status->flag |= RX_FLAG_MMIC_ERROR;
  1143. /* Firmware reports all necessary management frames via WMI already.
  1144. * They are not reported to monitor interfaces at all so pass the ones
  1145. * coming via HTT to monitor interfaces instead. This simplifies
  1146. * matters a lot.
  1147. */
  1148. if (is_mgmt)
  1149. status->flag |= RX_FLAG_ONLY_MONITOR;
  1150. if (is_decrypted) {
  1151. status->flag |= RX_FLAG_DECRYPTED;
  1152. if (likely(!is_mgmt))
  1153. status->flag |= RX_FLAG_IV_STRIPPED |
  1154. RX_FLAG_MMIC_STRIPPED;
  1155. }
  1156. skb_queue_walk(amsdu, msdu) {
  1157. ath10k_htt_rx_h_csum_offload(msdu);
  1158. ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype,
  1159. is_decrypted);
  1160. /* Undecapping involves copying the original 802.11 header back
  1161. * to sk_buff. If frame is protected and hardware has decrypted
  1162. * it then remove the protected bit.
  1163. */
  1164. if (!is_decrypted)
  1165. continue;
  1166. if (is_mgmt)
  1167. continue;
  1168. hdr = (void *)msdu->data;
  1169. hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
  1170. }
  1171. }
  1172. static void ath10k_htt_rx_h_deliver(struct ath10k *ar,
  1173. struct sk_buff_head *amsdu,
  1174. struct ieee80211_rx_status *status)
  1175. {
  1176. struct sk_buff *msdu;
  1177. while ((msdu = __skb_dequeue(amsdu))) {
  1178. /* Setup per-MSDU flags */
  1179. if (skb_queue_empty(amsdu))
  1180. status->flag &= ~RX_FLAG_AMSDU_MORE;
  1181. else
  1182. status->flag |= RX_FLAG_AMSDU_MORE;
  1183. ath10k_process_rx(ar, status, msdu);
  1184. }
  1185. }
  1186. static int ath10k_unchain_msdu(struct sk_buff_head *amsdu)
  1187. {
  1188. struct sk_buff *skb, *first;
  1189. int space;
  1190. int total_len = 0;
  1191. /* TODO: Might could optimize this by using
  1192. * skb_try_coalesce or similar method to
  1193. * decrease copying, or maybe get mac80211 to
  1194. * provide a way to just receive a list of
  1195. * skb?
  1196. */
  1197. first = __skb_dequeue(amsdu);
  1198. /* Allocate total length all at once. */
  1199. skb_queue_walk(amsdu, skb)
  1200. total_len += skb->len;
  1201. space = total_len - skb_tailroom(first);
  1202. if ((space > 0) &&
  1203. (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) {
  1204. /* TODO: bump some rx-oom error stat */
  1205. /* put it back together so we can free the
  1206. * whole list at once.
  1207. */
  1208. __skb_queue_head(amsdu, first);
  1209. return -1;
  1210. }
  1211. /* Walk list again, copying contents into
  1212. * msdu_head
  1213. */
  1214. while ((skb = __skb_dequeue(amsdu))) {
  1215. skb_copy_from_linear_data(skb, skb_put(first, skb->len),
  1216. skb->len);
  1217. dev_kfree_skb_any(skb);
  1218. }
  1219. __skb_queue_head(amsdu, first);
  1220. return 0;
  1221. }
  1222. static void ath10k_htt_rx_h_unchain(struct ath10k *ar,
  1223. struct sk_buff_head *amsdu)
  1224. {
  1225. struct sk_buff *first;
  1226. struct htt_rx_desc *rxd;
  1227. enum rx_msdu_decap_format decap;
  1228. first = skb_peek(amsdu);
  1229. rxd = (void *)first->data - sizeof(*rxd);
  1230. decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
  1231. RX_MSDU_START_INFO1_DECAP_FORMAT);
  1232. /* FIXME: Current unchaining logic can only handle simple case of raw
  1233. * msdu chaining. If decapping is other than raw the chaining may be
  1234. * more complex and this isn't handled by the current code. Don't even
  1235. * try re-constructing such frames - it'll be pretty much garbage.
  1236. */
  1237. if (decap != RX_MSDU_DECAP_RAW ||
  1238. skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) {
  1239. __skb_queue_purge(amsdu);
  1240. return;
  1241. }
  1242. ath10k_unchain_msdu(amsdu);
  1243. }
  1244. static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar,
  1245. struct sk_buff_head *amsdu,
  1246. struct ieee80211_rx_status *rx_status)
  1247. {
  1248. /* FIXME: It might be a good idea to do some fuzzy-testing to drop
  1249. * invalid/dangerous frames.
  1250. */
  1251. if (!rx_status->freq) {
  1252. ath10k_warn(ar, "no channel configured; ignoring frame(s)!\n");
  1253. return false;
  1254. }
  1255. if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
  1256. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n");
  1257. return false;
  1258. }
  1259. return true;
  1260. }
  1261. static void ath10k_htt_rx_h_filter(struct ath10k *ar,
  1262. struct sk_buff_head *amsdu,
  1263. struct ieee80211_rx_status *rx_status)
  1264. {
  1265. if (skb_queue_empty(amsdu))
  1266. return;
  1267. if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status))
  1268. return;
  1269. __skb_queue_purge(amsdu);
  1270. }
  1271. static int ath10k_htt_rx_handle_amsdu(struct ath10k_htt *htt)
  1272. {
  1273. struct ath10k *ar = htt->ar;
  1274. struct ieee80211_rx_status *rx_status = &htt->rx_status;
  1275. struct sk_buff_head amsdu;
  1276. int ret, num_msdus;
  1277. __skb_queue_head_init(&amsdu);
  1278. spin_lock_bh(&htt->rx_ring.lock);
  1279. if (htt->rx_confused) {
  1280. spin_unlock_bh(&htt->rx_ring.lock);
  1281. return -EIO;
  1282. }
  1283. ret = ath10k_htt_rx_amsdu_pop(htt, &amsdu);
  1284. spin_unlock_bh(&htt->rx_ring.lock);
  1285. if (ret < 0) {
  1286. ath10k_warn(ar, "rx ring became corrupted: %d\n", ret);
  1287. __skb_queue_purge(&amsdu);
  1288. /* FIXME: It's probably a good idea to reboot the
  1289. * device instead of leaving it inoperable.
  1290. */
  1291. htt->rx_confused = true;
  1292. return ret;
  1293. }
  1294. num_msdus = skb_queue_len(&amsdu);
  1295. ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
  1296. /* only for ret = 1 indicates chained msdus */
  1297. if (ret > 0)
  1298. ath10k_htt_rx_h_unchain(ar, &amsdu);
  1299. ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
  1300. ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
  1301. ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
  1302. return num_msdus;
  1303. }
  1304. static void ath10k_htt_rx_proc_rx_ind(struct ath10k_htt *htt,
  1305. struct htt_rx_indication *rx)
  1306. {
  1307. struct ath10k *ar = htt->ar;
  1308. struct htt_rx_indication_mpdu_range *mpdu_ranges;
  1309. int num_mpdu_ranges;
  1310. int i, mpdu_count = 0;
  1311. num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
  1312. HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
  1313. mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
  1314. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
  1315. rx, sizeof(*rx) +
  1316. (sizeof(struct htt_rx_indication_mpdu_range) *
  1317. num_mpdu_ranges));
  1318. for (i = 0; i < num_mpdu_ranges; i++)
  1319. mpdu_count += mpdu_ranges[i].mpdu_count;
  1320. atomic_add(mpdu_count, &htt->num_mpdus_ready);
  1321. }
  1322. static void ath10k_htt_rx_tx_compl_ind(struct ath10k *ar,
  1323. struct sk_buff *skb)
  1324. {
  1325. struct ath10k_htt *htt = &ar->htt;
  1326. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1327. struct htt_tx_done tx_done = {};
  1328. int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
  1329. __le16 msdu_id;
  1330. int i;
  1331. switch (status) {
  1332. case HTT_DATA_TX_STATUS_NO_ACK:
  1333. tx_done.status = HTT_TX_COMPL_STATE_NOACK;
  1334. break;
  1335. case HTT_DATA_TX_STATUS_OK:
  1336. tx_done.status = HTT_TX_COMPL_STATE_ACK;
  1337. break;
  1338. case HTT_DATA_TX_STATUS_DISCARD:
  1339. case HTT_DATA_TX_STATUS_POSTPONE:
  1340. case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
  1341. tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
  1342. break;
  1343. default:
  1344. ath10k_warn(ar, "unhandled tx completion status %d\n", status);
  1345. tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
  1346. break;
  1347. }
  1348. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
  1349. resp->data_tx_completion.num_msdus);
  1350. for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
  1351. msdu_id = resp->data_tx_completion.msdus[i];
  1352. tx_done.msdu_id = __le16_to_cpu(msdu_id);
  1353. /* kfifo_put: In practice firmware shouldn't fire off per-CE
  1354. * interrupt and main interrupt (MSI/-X range case) for the same
  1355. * HTC service so it should be safe to use kfifo_put w/o lock.
  1356. *
  1357. * From kfifo_put() documentation:
  1358. * Note that with only one concurrent reader and one concurrent
  1359. * writer, you don't need extra locking to use these macro.
  1360. */
  1361. if (!kfifo_put(&htt->txdone_fifo, tx_done)) {
  1362. ath10k_warn(ar, "txdone fifo overrun, msdu_id %d status %d\n",
  1363. tx_done.msdu_id, tx_done.status);
  1364. ath10k_txrx_tx_unref(htt, &tx_done);
  1365. }
  1366. }
  1367. }
  1368. static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
  1369. {
  1370. struct htt_rx_addba *ev = &resp->rx_addba;
  1371. struct ath10k_peer *peer;
  1372. struct ath10k_vif *arvif;
  1373. u16 info0, tid, peer_id;
  1374. info0 = __le16_to_cpu(ev->info0);
  1375. tid = MS(info0, HTT_RX_BA_INFO0_TID);
  1376. peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
  1377. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1378. "htt rx addba tid %hu peer_id %hu size %hhu\n",
  1379. tid, peer_id, ev->window_size);
  1380. spin_lock_bh(&ar->data_lock);
  1381. peer = ath10k_peer_find_by_id(ar, peer_id);
  1382. if (!peer) {
  1383. ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
  1384. peer_id);
  1385. spin_unlock_bh(&ar->data_lock);
  1386. return;
  1387. }
  1388. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  1389. if (!arvif) {
  1390. ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
  1391. peer->vdev_id);
  1392. spin_unlock_bh(&ar->data_lock);
  1393. return;
  1394. }
  1395. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1396. "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
  1397. peer->addr, tid, ev->window_size);
  1398. ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
  1399. spin_unlock_bh(&ar->data_lock);
  1400. }
  1401. static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
  1402. {
  1403. struct htt_rx_delba *ev = &resp->rx_delba;
  1404. struct ath10k_peer *peer;
  1405. struct ath10k_vif *arvif;
  1406. u16 info0, tid, peer_id;
  1407. info0 = __le16_to_cpu(ev->info0);
  1408. tid = MS(info0, HTT_RX_BA_INFO0_TID);
  1409. peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
  1410. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1411. "htt rx delba tid %hu peer_id %hu\n",
  1412. tid, peer_id);
  1413. spin_lock_bh(&ar->data_lock);
  1414. peer = ath10k_peer_find_by_id(ar, peer_id);
  1415. if (!peer) {
  1416. ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
  1417. peer_id);
  1418. spin_unlock_bh(&ar->data_lock);
  1419. return;
  1420. }
  1421. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  1422. if (!arvif) {
  1423. ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
  1424. peer->vdev_id);
  1425. spin_unlock_bh(&ar->data_lock);
  1426. return;
  1427. }
  1428. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1429. "htt rx stop rx ba session sta %pM tid %hu\n",
  1430. peer->addr, tid);
  1431. ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
  1432. spin_unlock_bh(&ar->data_lock);
  1433. }
  1434. static int ath10k_htt_rx_extract_amsdu(struct sk_buff_head *list,
  1435. struct sk_buff_head *amsdu)
  1436. {
  1437. struct sk_buff *msdu;
  1438. struct htt_rx_desc *rxd;
  1439. if (skb_queue_empty(list))
  1440. return -ENOBUFS;
  1441. if (WARN_ON(!skb_queue_empty(amsdu)))
  1442. return -EINVAL;
  1443. while ((msdu = __skb_dequeue(list))) {
  1444. __skb_queue_tail(amsdu, msdu);
  1445. rxd = (void *)msdu->data - sizeof(*rxd);
  1446. if (rxd->msdu_end.common.info0 &
  1447. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))
  1448. break;
  1449. }
  1450. msdu = skb_peek_tail(amsdu);
  1451. rxd = (void *)msdu->data - sizeof(*rxd);
  1452. if (!(rxd->msdu_end.common.info0 &
  1453. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) {
  1454. skb_queue_splice_init(amsdu, list);
  1455. return -EAGAIN;
  1456. }
  1457. return 0;
  1458. }
  1459. static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status,
  1460. struct sk_buff *skb)
  1461. {
  1462. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1463. if (!ieee80211_has_protected(hdr->frame_control))
  1464. return;
  1465. /* Offloaded frames are already decrypted but firmware insists they are
  1466. * protected in the 802.11 header. Strip the flag. Otherwise mac80211
  1467. * will drop the frame.
  1468. */
  1469. hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
  1470. status->flag |= RX_FLAG_DECRYPTED |
  1471. RX_FLAG_IV_STRIPPED |
  1472. RX_FLAG_MMIC_STRIPPED;
  1473. }
  1474. static int ath10k_htt_rx_h_rx_offload(struct ath10k *ar,
  1475. struct sk_buff_head *list)
  1476. {
  1477. struct ath10k_htt *htt = &ar->htt;
  1478. struct ieee80211_rx_status *status = &htt->rx_status;
  1479. struct htt_rx_offload_msdu *rx;
  1480. struct sk_buff *msdu;
  1481. size_t offset;
  1482. int num_msdu = 0;
  1483. while ((msdu = __skb_dequeue(list))) {
  1484. /* Offloaded frames don't have Rx descriptor. Instead they have
  1485. * a short meta information header.
  1486. */
  1487. rx = (void *)msdu->data;
  1488. skb_put(msdu, sizeof(*rx));
  1489. skb_pull(msdu, sizeof(*rx));
  1490. if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) {
  1491. ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n");
  1492. dev_kfree_skb_any(msdu);
  1493. continue;
  1494. }
  1495. skb_put(msdu, __le16_to_cpu(rx->msdu_len));
  1496. /* Offloaded rx header length isn't multiple of 2 nor 4 so the
  1497. * actual payload is unaligned. Align the frame. Otherwise
  1498. * mac80211 complains. This shouldn't reduce performance much
  1499. * because these offloaded frames are rare.
  1500. */
  1501. offset = 4 - ((unsigned long)msdu->data & 3);
  1502. skb_put(msdu, offset);
  1503. memmove(msdu->data + offset, msdu->data, msdu->len);
  1504. skb_pull(msdu, offset);
  1505. /* FIXME: The frame is NWifi. Re-construct QoS Control
  1506. * if possible later.
  1507. */
  1508. memset(status, 0, sizeof(*status));
  1509. status->flag |= RX_FLAG_NO_SIGNAL_VAL;
  1510. ath10k_htt_rx_h_rx_offload_prot(status, msdu);
  1511. ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id);
  1512. ath10k_process_rx(ar, status, msdu);
  1513. num_msdu++;
  1514. }
  1515. return num_msdu;
  1516. }
  1517. static int ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb)
  1518. {
  1519. struct ath10k_htt *htt = &ar->htt;
  1520. struct htt_resp *resp = (void *)skb->data;
  1521. struct ieee80211_rx_status *status = &htt->rx_status;
  1522. struct sk_buff_head list;
  1523. struct sk_buff_head amsdu;
  1524. u16 peer_id;
  1525. u16 msdu_count;
  1526. u8 vdev_id;
  1527. u8 tid;
  1528. bool offload;
  1529. bool frag;
  1530. int ret, num_msdus = 0;
  1531. lockdep_assert_held(&htt->rx_ring.lock);
  1532. if (htt->rx_confused)
  1533. return -EIO;
  1534. skb_pull(skb, sizeof(resp->hdr));
  1535. skb_pull(skb, sizeof(resp->rx_in_ord_ind));
  1536. peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id);
  1537. msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count);
  1538. vdev_id = resp->rx_in_ord_ind.vdev_id;
  1539. tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID);
  1540. offload = !!(resp->rx_in_ord_ind.info &
  1541. HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
  1542. frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK);
  1543. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1544. "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n",
  1545. vdev_id, peer_id, tid, offload, frag, msdu_count);
  1546. if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs)) {
  1547. ath10k_warn(ar, "dropping invalid in order rx indication\n");
  1548. return -EINVAL;
  1549. }
  1550. /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later
  1551. * extracted and processed.
  1552. */
  1553. __skb_queue_head_init(&list);
  1554. ret = ath10k_htt_rx_pop_paddr_list(htt, &resp->rx_in_ord_ind, &list);
  1555. if (ret < 0) {
  1556. ath10k_warn(ar, "failed to pop paddr list: %d\n", ret);
  1557. htt->rx_confused = true;
  1558. return -EIO;
  1559. }
  1560. /* Offloaded frames are very different and need to be handled
  1561. * separately.
  1562. */
  1563. if (offload)
  1564. num_msdus = ath10k_htt_rx_h_rx_offload(ar, &list);
  1565. while (!skb_queue_empty(&list)) {
  1566. __skb_queue_head_init(&amsdu);
  1567. ret = ath10k_htt_rx_extract_amsdu(&list, &amsdu);
  1568. switch (ret) {
  1569. case 0:
  1570. /* Note: The in-order indication may report interleaved
  1571. * frames from different PPDUs meaning reported rx rate
  1572. * to mac80211 isn't accurate/reliable. It's still
  1573. * better to report something than nothing though. This
  1574. * should still give an idea about rx rate to the user.
  1575. */
  1576. num_msdus += skb_queue_len(&amsdu);
  1577. ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id);
  1578. ath10k_htt_rx_h_filter(ar, &amsdu, status);
  1579. ath10k_htt_rx_h_mpdu(ar, &amsdu, status);
  1580. ath10k_htt_rx_h_deliver(ar, &amsdu, status);
  1581. break;
  1582. case -EAGAIN:
  1583. /* fall through */
  1584. default:
  1585. /* Should not happen. */
  1586. ath10k_warn(ar, "failed to extract amsdu: %d\n", ret);
  1587. htt->rx_confused = true;
  1588. __skb_queue_purge(&list);
  1589. return -EIO;
  1590. }
  1591. }
  1592. return num_msdus;
  1593. }
  1594. static void ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k *ar,
  1595. const __le32 *resp_ids,
  1596. int num_resp_ids)
  1597. {
  1598. int i;
  1599. u32 resp_id;
  1600. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm num_resp_ids %d\n",
  1601. num_resp_ids);
  1602. for (i = 0; i < num_resp_ids; i++) {
  1603. resp_id = le32_to_cpu(resp_ids[i]);
  1604. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm resp_id %u\n",
  1605. resp_id);
  1606. /* TODO: free resp_id */
  1607. }
  1608. }
  1609. static void ath10k_htt_rx_tx_fetch_ind(struct ath10k *ar, struct sk_buff *skb)
  1610. {
  1611. struct ieee80211_hw *hw = ar->hw;
  1612. struct ieee80211_txq *txq;
  1613. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1614. struct htt_tx_fetch_record *record;
  1615. size_t len;
  1616. size_t max_num_bytes;
  1617. size_t max_num_msdus;
  1618. size_t num_bytes;
  1619. size_t num_msdus;
  1620. const __le32 *resp_ids;
  1621. u16 num_records;
  1622. u16 num_resp_ids;
  1623. u16 peer_id;
  1624. u8 tid;
  1625. int ret;
  1626. int i;
  1627. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind\n");
  1628. len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_ind);
  1629. if (unlikely(skb->len < len)) {
  1630. ath10k_warn(ar, "received corrupted tx_fetch_ind event: buffer too short\n");
  1631. return;
  1632. }
  1633. num_records = le16_to_cpu(resp->tx_fetch_ind.num_records);
  1634. num_resp_ids = le16_to_cpu(resp->tx_fetch_ind.num_resp_ids);
  1635. len += sizeof(resp->tx_fetch_ind.records[0]) * num_records;
  1636. len += sizeof(resp->tx_fetch_ind.resp_ids[0]) * num_resp_ids;
  1637. if (unlikely(skb->len < len)) {
  1638. ath10k_warn(ar, "received corrupted tx_fetch_ind event: too many records/resp_ids\n");
  1639. return;
  1640. }
  1641. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind num records %hu num resps %hu seq %hu\n",
  1642. num_records, num_resp_ids,
  1643. le16_to_cpu(resp->tx_fetch_ind.fetch_seq_num));
  1644. if (!ar->htt.tx_q_state.enabled) {
  1645. ath10k_warn(ar, "received unexpected tx_fetch_ind event: not enabled\n");
  1646. return;
  1647. }
  1648. if (ar->htt.tx_q_state.mode == HTT_TX_MODE_SWITCH_PUSH) {
  1649. ath10k_warn(ar, "received unexpected tx_fetch_ind event: in push mode\n");
  1650. return;
  1651. }
  1652. rcu_read_lock();
  1653. for (i = 0; i < num_records; i++) {
  1654. record = &resp->tx_fetch_ind.records[i];
  1655. peer_id = MS(le16_to_cpu(record->info),
  1656. HTT_TX_FETCH_RECORD_INFO_PEER_ID);
  1657. tid = MS(le16_to_cpu(record->info),
  1658. HTT_TX_FETCH_RECORD_INFO_TID);
  1659. max_num_msdus = le16_to_cpu(record->num_msdus);
  1660. max_num_bytes = le32_to_cpu(record->num_bytes);
  1661. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch record %i peer_id %hu tid %hhu msdus %zu bytes %zu\n",
  1662. i, peer_id, tid, max_num_msdus, max_num_bytes);
  1663. if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
  1664. unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
  1665. ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n",
  1666. peer_id, tid);
  1667. continue;
  1668. }
  1669. spin_lock_bh(&ar->data_lock);
  1670. txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
  1671. spin_unlock_bh(&ar->data_lock);
  1672. /* It is okay to release the lock and use txq because RCU read
  1673. * lock is held.
  1674. */
  1675. if (unlikely(!txq)) {
  1676. ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n",
  1677. peer_id, tid);
  1678. continue;
  1679. }
  1680. num_msdus = 0;
  1681. num_bytes = 0;
  1682. while (num_msdus < max_num_msdus &&
  1683. num_bytes < max_num_bytes) {
  1684. ret = ath10k_mac_tx_push_txq(hw, txq);
  1685. if (ret < 0)
  1686. break;
  1687. num_msdus++;
  1688. num_bytes += ret;
  1689. }
  1690. record->num_msdus = cpu_to_le16(num_msdus);
  1691. record->num_bytes = cpu_to_le32(num_bytes);
  1692. ath10k_htt_tx_txq_recalc(hw, txq);
  1693. }
  1694. rcu_read_unlock();
  1695. resp_ids = ath10k_htt_get_tx_fetch_ind_resp_ids(&resp->tx_fetch_ind);
  1696. ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, resp_ids, num_resp_ids);
  1697. ret = ath10k_htt_tx_fetch_resp(ar,
  1698. resp->tx_fetch_ind.token,
  1699. resp->tx_fetch_ind.fetch_seq_num,
  1700. resp->tx_fetch_ind.records,
  1701. num_records);
  1702. if (unlikely(ret)) {
  1703. ath10k_warn(ar, "failed to submit tx fetch resp for token 0x%08x: %d\n",
  1704. le32_to_cpu(resp->tx_fetch_ind.token), ret);
  1705. /* FIXME: request fw restart */
  1706. }
  1707. ath10k_htt_tx_txq_sync(ar);
  1708. }
  1709. static void ath10k_htt_rx_tx_fetch_confirm(struct ath10k *ar,
  1710. struct sk_buff *skb)
  1711. {
  1712. const struct htt_resp *resp = (void *)skb->data;
  1713. size_t len;
  1714. int num_resp_ids;
  1715. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm\n");
  1716. len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_confirm);
  1717. if (unlikely(skb->len < len)) {
  1718. ath10k_warn(ar, "received corrupted tx_fetch_confirm event: buffer too short\n");
  1719. return;
  1720. }
  1721. num_resp_ids = le16_to_cpu(resp->tx_fetch_confirm.num_resp_ids);
  1722. len += sizeof(resp->tx_fetch_confirm.resp_ids[0]) * num_resp_ids;
  1723. if (unlikely(skb->len < len)) {
  1724. ath10k_warn(ar, "received corrupted tx_fetch_confirm event: resp_ids buffer overflow\n");
  1725. return;
  1726. }
  1727. ath10k_htt_rx_tx_fetch_resp_id_confirm(ar,
  1728. resp->tx_fetch_confirm.resp_ids,
  1729. num_resp_ids);
  1730. }
  1731. static void ath10k_htt_rx_tx_mode_switch_ind(struct ath10k *ar,
  1732. struct sk_buff *skb)
  1733. {
  1734. const struct htt_resp *resp = (void *)skb->data;
  1735. const struct htt_tx_mode_switch_record *record;
  1736. struct ieee80211_txq *txq;
  1737. struct ath10k_txq *artxq;
  1738. size_t len;
  1739. size_t num_records;
  1740. enum htt_tx_mode_switch_mode mode;
  1741. bool enable;
  1742. u16 info0;
  1743. u16 info1;
  1744. u16 threshold;
  1745. u16 peer_id;
  1746. u8 tid;
  1747. int i;
  1748. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx mode switch ind\n");
  1749. len = sizeof(resp->hdr) + sizeof(resp->tx_mode_switch_ind);
  1750. if (unlikely(skb->len < len)) {
  1751. ath10k_warn(ar, "received corrupted tx_mode_switch_ind event: buffer too short\n");
  1752. return;
  1753. }
  1754. info0 = le16_to_cpu(resp->tx_mode_switch_ind.info0);
  1755. info1 = le16_to_cpu(resp->tx_mode_switch_ind.info1);
  1756. enable = !!(info0 & HTT_TX_MODE_SWITCH_IND_INFO0_ENABLE);
  1757. num_records = MS(info0, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
  1758. mode = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_MODE);
  1759. threshold = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
  1760. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1761. "htt rx tx mode switch ind info0 0x%04hx info1 0x%04hx enable %d num records %zd mode %d threshold %hu\n",
  1762. info0, info1, enable, num_records, mode, threshold);
  1763. len += sizeof(resp->tx_mode_switch_ind.records[0]) * num_records;
  1764. if (unlikely(skb->len < len)) {
  1765. ath10k_warn(ar, "received corrupted tx_mode_switch_mode_ind event: too many records\n");
  1766. return;
  1767. }
  1768. switch (mode) {
  1769. case HTT_TX_MODE_SWITCH_PUSH:
  1770. case HTT_TX_MODE_SWITCH_PUSH_PULL:
  1771. break;
  1772. default:
  1773. ath10k_warn(ar, "received invalid tx_mode_switch_mode_ind mode %d, ignoring\n",
  1774. mode);
  1775. return;
  1776. }
  1777. if (!enable)
  1778. return;
  1779. ar->htt.tx_q_state.enabled = enable;
  1780. ar->htt.tx_q_state.mode = mode;
  1781. ar->htt.tx_q_state.num_push_allowed = threshold;
  1782. rcu_read_lock();
  1783. for (i = 0; i < num_records; i++) {
  1784. record = &resp->tx_mode_switch_ind.records[i];
  1785. info0 = le16_to_cpu(record->info0);
  1786. peer_id = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_PEER_ID);
  1787. tid = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_TID);
  1788. if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
  1789. unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
  1790. ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n",
  1791. peer_id, tid);
  1792. continue;
  1793. }
  1794. spin_lock_bh(&ar->data_lock);
  1795. txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
  1796. spin_unlock_bh(&ar->data_lock);
  1797. /* It is okay to release the lock and use txq because RCU read
  1798. * lock is held.
  1799. */
  1800. if (unlikely(!txq)) {
  1801. ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n",
  1802. peer_id, tid);
  1803. continue;
  1804. }
  1805. spin_lock_bh(&ar->htt.tx_lock);
  1806. artxq = (void *)txq->drv_priv;
  1807. artxq->num_push_allowed = le16_to_cpu(record->num_max_msdus);
  1808. spin_unlock_bh(&ar->htt.tx_lock);
  1809. }
  1810. rcu_read_unlock();
  1811. ath10k_mac_tx_push_pending(ar);
  1812. }
  1813. void ath10k_htt_htc_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
  1814. {
  1815. bool release;
  1816. release = ath10k_htt_t2h_msg_handler(ar, skb);
  1817. /* Free the indication buffer */
  1818. if (release)
  1819. dev_kfree_skb_any(skb);
  1820. }
  1821. static inline bool is_valid_legacy_rate(u8 rate)
  1822. {
  1823. static const u8 legacy_rates[] = {1, 2, 5, 11, 6, 9, 12,
  1824. 18, 24, 36, 48, 54};
  1825. int i;
  1826. for (i = 0; i < ARRAY_SIZE(legacy_rates); i++) {
  1827. if (rate == legacy_rates[i])
  1828. return true;
  1829. }
  1830. return false;
  1831. }
  1832. static void
  1833. ath10k_update_per_peer_tx_stats(struct ath10k *ar,
  1834. struct ieee80211_sta *sta,
  1835. struct ath10k_per_peer_tx_stats *peer_stats)
  1836. {
  1837. struct ath10k_sta *arsta = (struct ath10k_sta *)sta->drv_priv;
  1838. u8 rate = 0, sgi;
  1839. struct rate_info txrate;
  1840. lockdep_assert_held(&ar->data_lock);
  1841. txrate.flags = ATH10K_HW_PREAMBLE(peer_stats->ratecode);
  1842. txrate.bw = ATH10K_HW_BW(peer_stats->flags);
  1843. txrate.nss = ATH10K_HW_NSS(peer_stats->ratecode);
  1844. txrate.mcs = ATH10K_HW_MCS_RATE(peer_stats->ratecode);
  1845. sgi = ATH10K_HW_GI(peer_stats->flags);
  1846. if (((txrate.flags == WMI_RATE_PREAMBLE_HT) ||
  1847. (txrate.flags == WMI_RATE_PREAMBLE_VHT)) && txrate.mcs > 9) {
  1848. ath10k_warn(ar, "Invalid mcs %hhd peer stats", txrate.mcs);
  1849. return;
  1850. }
  1851. memset(&arsta->txrate, 0, sizeof(arsta->txrate));
  1852. if (txrate.flags == WMI_RATE_PREAMBLE_CCK ||
  1853. txrate.flags == WMI_RATE_PREAMBLE_OFDM) {
  1854. rate = ATH10K_HW_LEGACY_RATE(peer_stats->ratecode);
  1855. if (!is_valid_legacy_rate(rate)) {
  1856. ath10k_warn(ar, "Invalid legacy rate %hhd peer stats",
  1857. rate);
  1858. return;
  1859. }
  1860. /* This is hacky, FW sends CCK rate 5.5Mbps as 6 */
  1861. rate *= 10;
  1862. if (rate == 60 && txrate.flags == WMI_RATE_PREAMBLE_CCK)
  1863. rate = rate - 5;
  1864. arsta->txrate.legacy = rate;
  1865. } else if (txrate.flags == WMI_RATE_PREAMBLE_HT) {
  1866. arsta->txrate.flags = RATE_INFO_FLAGS_MCS;
  1867. arsta->txrate.mcs = txrate.mcs;
  1868. } else {
  1869. arsta->txrate.flags = RATE_INFO_FLAGS_VHT_MCS;
  1870. arsta->txrate.mcs = txrate.mcs;
  1871. }
  1872. if (sgi)
  1873. arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;
  1874. arsta->txrate.nss = txrate.nss;
  1875. arsta->txrate.bw = txrate.bw + RATE_INFO_BW_20;
  1876. }
  1877. static void ath10k_htt_fetch_peer_stats(struct ath10k *ar,
  1878. struct sk_buff *skb)
  1879. {
  1880. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1881. struct ath10k_per_peer_tx_stats *p_tx_stats = &ar->peer_tx_stats;
  1882. struct htt_per_peer_tx_stats_ind *tx_stats;
  1883. struct ieee80211_sta *sta;
  1884. struct ath10k_peer *peer;
  1885. int peer_id, i;
  1886. u8 ppdu_len, num_ppdu;
  1887. num_ppdu = resp->peer_tx_stats.num_ppdu;
  1888. ppdu_len = resp->peer_tx_stats.ppdu_len * sizeof(__le32);
  1889. if (skb->len < sizeof(struct htt_resp_hdr) + num_ppdu * ppdu_len) {
  1890. ath10k_warn(ar, "Invalid peer stats buf length %d\n", skb->len);
  1891. return;
  1892. }
  1893. tx_stats = (struct htt_per_peer_tx_stats_ind *)
  1894. (resp->peer_tx_stats.payload);
  1895. peer_id = __le16_to_cpu(tx_stats->peer_id);
  1896. rcu_read_lock();
  1897. spin_lock_bh(&ar->data_lock);
  1898. peer = ath10k_peer_find_by_id(ar, peer_id);
  1899. if (!peer) {
  1900. ath10k_warn(ar, "Invalid peer id %d peer stats buffer\n",
  1901. peer_id);
  1902. goto out;
  1903. }
  1904. sta = peer->sta;
  1905. for (i = 0; i < num_ppdu; i++) {
  1906. tx_stats = (struct htt_per_peer_tx_stats_ind *)
  1907. (resp->peer_tx_stats.payload + i * ppdu_len);
  1908. p_tx_stats->succ_bytes = __le32_to_cpu(tx_stats->succ_bytes);
  1909. p_tx_stats->retry_bytes = __le32_to_cpu(tx_stats->retry_bytes);
  1910. p_tx_stats->failed_bytes =
  1911. __le32_to_cpu(tx_stats->failed_bytes);
  1912. p_tx_stats->ratecode = tx_stats->ratecode;
  1913. p_tx_stats->flags = tx_stats->flags;
  1914. p_tx_stats->succ_pkts = __le16_to_cpu(tx_stats->succ_pkts);
  1915. p_tx_stats->retry_pkts = __le16_to_cpu(tx_stats->retry_pkts);
  1916. p_tx_stats->failed_pkts = __le16_to_cpu(tx_stats->failed_pkts);
  1917. ath10k_update_per_peer_tx_stats(ar, sta, p_tx_stats);
  1918. }
  1919. out:
  1920. spin_unlock_bh(&ar->data_lock);
  1921. rcu_read_unlock();
  1922. }
  1923. bool ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
  1924. {
  1925. struct ath10k_htt *htt = &ar->htt;
  1926. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1927. enum htt_t2h_msg_type type;
  1928. /* confirm alignment */
  1929. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  1930. ath10k_warn(ar, "unaligned htt message, expect trouble\n");
  1931. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
  1932. resp->hdr.msg_type);
  1933. if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) {
  1934. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X",
  1935. resp->hdr.msg_type, ar->htt.t2h_msg_types_max);
  1936. return true;
  1937. }
  1938. type = ar->htt.t2h_msg_types[resp->hdr.msg_type];
  1939. switch (type) {
  1940. case HTT_T2H_MSG_TYPE_VERSION_CONF: {
  1941. htt->target_version_major = resp->ver_resp.major;
  1942. htt->target_version_minor = resp->ver_resp.minor;
  1943. complete(&htt->target_version_received);
  1944. break;
  1945. }
  1946. case HTT_T2H_MSG_TYPE_RX_IND:
  1947. ath10k_htt_rx_proc_rx_ind(htt, &resp->rx_ind);
  1948. break;
  1949. case HTT_T2H_MSG_TYPE_PEER_MAP: {
  1950. struct htt_peer_map_event ev = {
  1951. .vdev_id = resp->peer_map.vdev_id,
  1952. .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
  1953. };
  1954. memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
  1955. ath10k_peer_map_event(htt, &ev);
  1956. break;
  1957. }
  1958. case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
  1959. struct htt_peer_unmap_event ev = {
  1960. .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
  1961. };
  1962. ath10k_peer_unmap_event(htt, &ev);
  1963. break;
  1964. }
  1965. case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
  1966. struct htt_tx_done tx_done = {};
  1967. int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
  1968. tx_done.msdu_id = __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
  1969. switch (status) {
  1970. case HTT_MGMT_TX_STATUS_OK:
  1971. tx_done.status = HTT_TX_COMPL_STATE_ACK;
  1972. break;
  1973. case HTT_MGMT_TX_STATUS_RETRY:
  1974. tx_done.status = HTT_TX_COMPL_STATE_NOACK;
  1975. break;
  1976. case HTT_MGMT_TX_STATUS_DROP:
  1977. tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
  1978. break;
  1979. }
  1980. status = ath10k_txrx_tx_unref(htt, &tx_done);
  1981. if (!status) {
  1982. spin_lock_bh(&htt->tx_lock);
  1983. ath10k_htt_tx_mgmt_dec_pending(htt);
  1984. spin_unlock_bh(&htt->tx_lock);
  1985. }
  1986. break;
  1987. }
  1988. case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
  1989. ath10k_htt_rx_tx_compl_ind(htt->ar, skb);
  1990. break;
  1991. case HTT_T2H_MSG_TYPE_SEC_IND: {
  1992. struct ath10k *ar = htt->ar;
  1993. struct htt_security_indication *ev = &resp->security_indication;
  1994. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1995. "sec ind peer_id %d unicast %d type %d\n",
  1996. __le16_to_cpu(ev->peer_id),
  1997. !!(ev->flags & HTT_SECURITY_IS_UNICAST),
  1998. MS(ev->flags, HTT_SECURITY_TYPE));
  1999. complete(&ar->install_key_done);
  2000. break;
  2001. }
  2002. case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
  2003. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  2004. skb->data, skb->len);
  2005. atomic_inc(&htt->num_mpdus_ready);
  2006. break;
  2007. }
  2008. case HTT_T2H_MSG_TYPE_TEST:
  2009. break;
  2010. case HTT_T2H_MSG_TYPE_STATS_CONF:
  2011. trace_ath10k_htt_stats(ar, skb->data, skb->len);
  2012. break;
  2013. case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
  2014. /* Firmware can return tx frames if it's unable to fully
  2015. * process them and suspects host may be able to fix it. ath10k
  2016. * sends all tx frames as already inspected so this shouldn't
  2017. * happen unless fw has a bug.
  2018. */
  2019. ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
  2020. break;
  2021. case HTT_T2H_MSG_TYPE_RX_ADDBA:
  2022. ath10k_htt_rx_addba(ar, resp);
  2023. break;
  2024. case HTT_T2H_MSG_TYPE_RX_DELBA:
  2025. ath10k_htt_rx_delba(ar, resp);
  2026. break;
  2027. case HTT_T2H_MSG_TYPE_PKTLOG: {
  2028. trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload,
  2029. skb->len -
  2030. offsetof(struct htt_resp,
  2031. pktlog_msg.payload));
  2032. break;
  2033. }
  2034. case HTT_T2H_MSG_TYPE_RX_FLUSH: {
  2035. /* Ignore this event because mac80211 takes care of Rx
  2036. * aggregation reordering.
  2037. */
  2038. break;
  2039. }
  2040. case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: {
  2041. __skb_queue_tail(&htt->rx_in_ord_compl_q, skb);
  2042. return false;
  2043. }
  2044. case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND:
  2045. break;
  2046. case HTT_T2H_MSG_TYPE_CHAN_CHANGE: {
  2047. u32 phymode = __le32_to_cpu(resp->chan_change.phymode);
  2048. u32 freq = __le32_to_cpu(resp->chan_change.freq);
  2049. ar->tgt_oper_chan = ieee80211_get_channel(ar->hw->wiphy, freq);
  2050. ath10k_dbg(ar, ATH10K_DBG_HTT,
  2051. "htt chan change freq %u phymode %s\n",
  2052. freq, ath10k_wmi_phymode_str(phymode));
  2053. break;
  2054. }
  2055. case HTT_T2H_MSG_TYPE_AGGR_CONF:
  2056. break;
  2057. case HTT_T2H_MSG_TYPE_TX_FETCH_IND: {
  2058. struct sk_buff *tx_fetch_ind = skb_copy(skb, GFP_ATOMIC);
  2059. if (!tx_fetch_ind) {
  2060. ath10k_warn(ar, "failed to copy htt tx fetch ind\n");
  2061. break;
  2062. }
  2063. skb_queue_tail(&htt->tx_fetch_ind_q, tx_fetch_ind);
  2064. break;
  2065. }
  2066. case HTT_T2H_MSG_TYPE_TX_FETCH_CONFIRM:
  2067. ath10k_htt_rx_tx_fetch_confirm(ar, skb);
  2068. break;
  2069. case HTT_T2H_MSG_TYPE_TX_MODE_SWITCH_IND:
  2070. ath10k_htt_rx_tx_mode_switch_ind(ar, skb);
  2071. break;
  2072. case HTT_T2H_MSG_TYPE_PEER_STATS:
  2073. ath10k_htt_fetch_peer_stats(ar, skb);
  2074. break;
  2075. case HTT_T2H_MSG_TYPE_EN_STATS:
  2076. default:
  2077. ath10k_warn(ar, "htt event (%d) not handled\n",
  2078. resp->hdr.msg_type);
  2079. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  2080. skb->data, skb->len);
  2081. break;
  2082. }
  2083. return true;
  2084. }
  2085. EXPORT_SYMBOL(ath10k_htt_t2h_msg_handler);
  2086. void ath10k_htt_rx_pktlog_completion_handler(struct ath10k *ar,
  2087. struct sk_buff *skb)
  2088. {
  2089. trace_ath10k_htt_pktlog(ar, skb->data, skb->len);
  2090. dev_kfree_skb_any(skb);
  2091. }
  2092. EXPORT_SYMBOL(ath10k_htt_rx_pktlog_completion_handler);
  2093. int ath10k_htt_txrx_compl_task(struct ath10k *ar, int budget)
  2094. {
  2095. struct ath10k_htt *htt = &ar->htt;
  2096. struct htt_tx_done tx_done = {};
  2097. struct sk_buff_head tx_ind_q;
  2098. struct sk_buff *skb;
  2099. unsigned long flags;
  2100. int quota = 0, done, num_rx_msdus;
  2101. bool resched_napi = false;
  2102. __skb_queue_head_init(&tx_ind_q);
  2103. /* Since in-ord-ind can deliver more than 1 A-MSDU in single event,
  2104. * process it first to utilize full available quota.
  2105. */
  2106. while (quota < budget) {
  2107. if (skb_queue_empty(&htt->rx_in_ord_compl_q))
  2108. break;
  2109. skb = __skb_dequeue(&htt->rx_in_ord_compl_q);
  2110. if (!skb) {
  2111. resched_napi = true;
  2112. goto exit;
  2113. }
  2114. spin_lock_bh(&htt->rx_ring.lock);
  2115. num_rx_msdus = ath10k_htt_rx_in_ord_ind(ar, skb);
  2116. spin_unlock_bh(&htt->rx_ring.lock);
  2117. if (num_rx_msdus < 0) {
  2118. resched_napi = true;
  2119. goto exit;
  2120. }
  2121. dev_kfree_skb_any(skb);
  2122. if (num_rx_msdus > 0)
  2123. quota += num_rx_msdus;
  2124. if ((quota > ATH10K_NAPI_QUOTA_LIMIT) &&
  2125. !skb_queue_empty(&htt->rx_in_ord_compl_q)) {
  2126. resched_napi = true;
  2127. goto exit;
  2128. }
  2129. }
  2130. while (quota < budget) {
  2131. /* no more data to receive */
  2132. if (!atomic_read(&htt->num_mpdus_ready))
  2133. break;
  2134. num_rx_msdus = ath10k_htt_rx_handle_amsdu(htt);
  2135. if (num_rx_msdus < 0) {
  2136. resched_napi = true;
  2137. goto exit;
  2138. }
  2139. quota += num_rx_msdus;
  2140. atomic_dec(&htt->num_mpdus_ready);
  2141. if ((quota > ATH10K_NAPI_QUOTA_LIMIT) &&
  2142. atomic_read(&htt->num_mpdus_ready)) {
  2143. resched_napi = true;
  2144. goto exit;
  2145. }
  2146. }
  2147. /* From NAPI documentation:
  2148. * The napi poll() function may also process TX completions, in which
  2149. * case if it processes the entire TX ring then it should count that
  2150. * work as the rest of the budget.
  2151. */
  2152. if ((quota < budget) && !kfifo_is_empty(&htt->txdone_fifo))
  2153. quota = budget;
  2154. /* kfifo_get: called only within txrx_tasklet so it's neatly serialized.
  2155. * From kfifo_get() documentation:
  2156. * Note that with only one concurrent reader and one concurrent writer,
  2157. * you don't need extra locking to use these macro.
  2158. */
  2159. while (kfifo_get(&htt->txdone_fifo, &tx_done))
  2160. ath10k_txrx_tx_unref(htt, &tx_done);
  2161. ath10k_mac_tx_push_pending(ar);
  2162. spin_lock_irqsave(&htt->tx_fetch_ind_q.lock, flags);
  2163. skb_queue_splice_init(&htt->tx_fetch_ind_q, &tx_ind_q);
  2164. spin_unlock_irqrestore(&htt->tx_fetch_ind_q.lock, flags);
  2165. while ((skb = __skb_dequeue(&tx_ind_q))) {
  2166. ath10k_htt_rx_tx_fetch_ind(ar, skb);
  2167. dev_kfree_skb_any(skb);
  2168. }
  2169. exit:
  2170. ath10k_htt_rx_msdu_buff_replenish(htt);
  2171. /* In case of rx failure or more data to read, report budget
  2172. * to reschedule NAPI poll
  2173. */
  2174. done = resched_napi ? budget : quota;
  2175. return done;
  2176. }
  2177. EXPORT_SYMBOL(ath10k_htt_txrx_compl_task);