core.c 63 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/firmware.h>
  19. #include <linux/of.h>
  20. #include <linux/dmi.h>
  21. #include <linux/ctype.h>
  22. #include <asm/byteorder.h>
  23. #include "core.h"
  24. #include "mac.h"
  25. #include "htc.h"
  26. #include "hif.h"
  27. #include "wmi.h"
  28. #include "bmi.h"
  29. #include "debug.h"
  30. #include "htt.h"
  31. #include "testmode.h"
  32. #include "wmi-ops.h"
  33. unsigned int ath10k_debug_mask;
  34. static unsigned int ath10k_cryptmode_param;
  35. static bool uart_print;
  36. static bool skip_otp;
  37. static bool rawmode;
  38. module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
  39. module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
  40. module_param(uart_print, bool, 0644);
  41. module_param(skip_otp, bool, 0644);
  42. module_param(rawmode, bool, 0644);
  43. MODULE_PARM_DESC(debug_mask, "Debugging mask");
  44. MODULE_PARM_DESC(uart_print, "Uart target debugging");
  45. MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
  46. MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
  47. MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath");
  48. static const struct ath10k_hw_params ath10k_hw_params_list[] = {
  49. {
  50. .id = QCA988X_HW_2_0_VERSION,
  51. .dev_id = QCA988X_2_0_DEVICE_ID,
  52. .name = "qca988x hw2.0",
  53. .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  54. .uart_pin = 7,
  55. .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
  56. .otp_exe_param = 0,
  57. .channel_counters_freq_hz = 88000,
  58. .max_probe_resp_desc_thres = 0,
  59. .cal_data_len = 2116,
  60. .fw = {
  61. .dir = QCA988X_HW_2_0_FW_DIR,
  62. .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
  63. .board_size = QCA988X_BOARD_DATA_SZ,
  64. .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
  65. },
  66. .hw_ops = &qca988x_ops,
  67. .decap_align_bytes = 4,
  68. },
  69. {
  70. .id = QCA9887_HW_1_0_VERSION,
  71. .dev_id = QCA9887_1_0_DEVICE_ID,
  72. .name = "qca9887 hw1.0",
  73. .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
  74. .uart_pin = 7,
  75. .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
  76. .otp_exe_param = 0,
  77. .channel_counters_freq_hz = 88000,
  78. .max_probe_resp_desc_thres = 0,
  79. .cal_data_len = 2116,
  80. .fw = {
  81. .dir = QCA9887_HW_1_0_FW_DIR,
  82. .board = QCA9887_HW_1_0_BOARD_DATA_FILE,
  83. .board_size = QCA9887_BOARD_DATA_SZ,
  84. .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
  85. },
  86. .hw_ops = &qca988x_ops,
  87. .decap_align_bytes = 4,
  88. },
  89. {
  90. .id = QCA6174_HW_2_1_VERSION,
  91. .dev_id = QCA6164_2_1_DEVICE_ID,
  92. .name = "qca6164 hw2.1",
  93. .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
  94. .uart_pin = 6,
  95. .otp_exe_param = 0,
  96. .channel_counters_freq_hz = 88000,
  97. .max_probe_resp_desc_thres = 0,
  98. .cal_data_len = 8124,
  99. .fw = {
  100. .dir = QCA6174_HW_2_1_FW_DIR,
  101. .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
  102. .board_size = QCA6174_BOARD_DATA_SZ,
  103. .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
  104. },
  105. .hw_ops = &qca988x_ops,
  106. .decap_align_bytes = 4,
  107. },
  108. {
  109. .id = QCA6174_HW_2_1_VERSION,
  110. .dev_id = QCA6174_2_1_DEVICE_ID,
  111. .name = "qca6174 hw2.1",
  112. .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
  113. .uart_pin = 6,
  114. .otp_exe_param = 0,
  115. .channel_counters_freq_hz = 88000,
  116. .max_probe_resp_desc_thres = 0,
  117. .cal_data_len = 8124,
  118. .fw = {
  119. .dir = QCA6174_HW_2_1_FW_DIR,
  120. .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
  121. .board_size = QCA6174_BOARD_DATA_SZ,
  122. .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
  123. },
  124. .hw_ops = &qca988x_ops,
  125. .decap_align_bytes = 4,
  126. },
  127. {
  128. .id = QCA6174_HW_3_0_VERSION,
  129. .dev_id = QCA6174_2_1_DEVICE_ID,
  130. .name = "qca6174 hw3.0",
  131. .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
  132. .uart_pin = 6,
  133. .otp_exe_param = 0,
  134. .channel_counters_freq_hz = 88000,
  135. .max_probe_resp_desc_thres = 0,
  136. .cal_data_len = 8124,
  137. .fw = {
  138. .dir = QCA6174_HW_3_0_FW_DIR,
  139. .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
  140. .board_size = QCA6174_BOARD_DATA_SZ,
  141. .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
  142. },
  143. .hw_ops = &qca988x_ops,
  144. .decap_align_bytes = 4,
  145. },
  146. {
  147. .id = QCA6174_HW_3_2_VERSION,
  148. .dev_id = QCA6174_2_1_DEVICE_ID,
  149. .name = "qca6174 hw3.2",
  150. .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
  151. .uart_pin = 6,
  152. .otp_exe_param = 0,
  153. .channel_counters_freq_hz = 88000,
  154. .max_probe_resp_desc_thres = 0,
  155. .cal_data_len = 8124,
  156. .fw = {
  157. /* uses same binaries as hw3.0 */
  158. .dir = QCA6174_HW_3_0_FW_DIR,
  159. .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
  160. .board_size = QCA6174_BOARD_DATA_SZ,
  161. .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
  162. },
  163. .hw_ops = &qca988x_ops,
  164. .decap_align_bytes = 4,
  165. },
  166. {
  167. .id = QCA99X0_HW_2_0_DEV_VERSION,
  168. .dev_id = QCA99X0_2_0_DEVICE_ID,
  169. .name = "qca99x0 hw2.0",
  170. .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
  171. .uart_pin = 7,
  172. .otp_exe_param = 0x00000700,
  173. .continuous_frag_desc = true,
  174. .cck_rate_map_rev2 = true,
  175. .channel_counters_freq_hz = 150000,
  176. .max_probe_resp_desc_thres = 24,
  177. .tx_chain_mask = 0xf,
  178. .rx_chain_mask = 0xf,
  179. .max_spatial_stream = 4,
  180. .cal_data_len = 12064,
  181. .fw = {
  182. .dir = QCA99X0_HW_2_0_FW_DIR,
  183. .board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
  184. .board_size = QCA99X0_BOARD_DATA_SZ,
  185. .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
  186. },
  187. .sw_decrypt_mcast_mgmt = true,
  188. .hw_ops = &qca99x0_ops,
  189. .decap_align_bytes = 1,
  190. },
  191. {
  192. .id = QCA9984_HW_1_0_DEV_VERSION,
  193. .dev_id = QCA9984_1_0_DEVICE_ID,
  194. .name = "qca9984/qca9994 hw1.0",
  195. .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
  196. .uart_pin = 7,
  197. .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
  198. .otp_exe_param = 0x00000700,
  199. .continuous_frag_desc = true,
  200. .cck_rate_map_rev2 = true,
  201. .channel_counters_freq_hz = 150000,
  202. .max_probe_resp_desc_thres = 24,
  203. .tx_chain_mask = 0xf,
  204. .rx_chain_mask = 0xf,
  205. .max_spatial_stream = 4,
  206. .cal_data_len = 12064,
  207. .fw = {
  208. .dir = QCA9984_HW_1_0_FW_DIR,
  209. .board = QCA9984_HW_1_0_BOARD_DATA_FILE,
  210. .board_size = QCA99X0_BOARD_DATA_SZ,
  211. .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
  212. },
  213. .sw_decrypt_mcast_mgmt = true,
  214. .hw_ops = &qca99x0_ops,
  215. .decap_align_bytes = 1,
  216. },
  217. {
  218. .id = QCA9888_HW_2_0_DEV_VERSION,
  219. .dev_id = QCA9888_2_0_DEVICE_ID,
  220. .name = "qca9888 hw2.0",
  221. .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
  222. .uart_pin = 7,
  223. .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
  224. .otp_exe_param = 0x00000700,
  225. .continuous_frag_desc = true,
  226. .channel_counters_freq_hz = 150000,
  227. .max_probe_resp_desc_thres = 24,
  228. .tx_chain_mask = 3,
  229. .rx_chain_mask = 3,
  230. .max_spatial_stream = 2,
  231. .cal_data_len = 12064,
  232. .fw = {
  233. .dir = QCA9888_HW_2_0_FW_DIR,
  234. .board = QCA9888_HW_2_0_BOARD_DATA_FILE,
  235. .board_size = QCA99X0_BOARD_DATA_SZ,
  236. .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
  237. },
  238. .sw_decrypt_mcast_mgmt = true,
  239. .hw_ops = &qca99x0_ops,
  240. .decap_align_bytes = 1,
  241. },
  242. {
  243. .id = QCA9377_HW_1_0_DEV_VERSION,
  244. .dev_id = QCA9377_1_0_DEVICE_ID,
  245. .name = "qca9377 hw1.0",
  246. .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
  247. .uart_pin = 6,
  248. .otp_exe_param = 0,
  249. .channel_counters_freq_hz = 88000,
  250. .max_probe_resp_desc_thres = 0,
  251. .cal_data_len = 8124,
  252. .fw = {
  253. .dir = QCA9377_HW_1_0_FW_DIR,
  254. .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
  255. .board_size = QCA9377_BOARD_DATA_SZ,
  256. .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
  257. },
  258. .hw_ops = &qca988x_ops,
  259. .decap_align_bytes = 4,
  260. },
  261. {
  262. .id = QCA9377_HW_1_1_DEV_VERSION,
  263. .dev_id = QCA9377_1_0_DEVICE_ID,
  264. .name = "qca9377 hw1.1",
  265. .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
  266. .uart_pin = 6,
  267. .otp_exe_param = 0,
  268. .channel_counters_freq_hz = 88000,
  269. .max_probe_resp_desc_thres = 0,
  270. .cal_data_len = 8124,
  271. .fw = {
  272. .dir = QCA9377_HW_1_0_FW_DIR,
  273. .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
  274. .board_size = QCA9377_BOARD_DATA_SZ,
  275. .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
  276. },
  277. .hw_ops = &qca988x_ops,
  278. .decap_align_bytes = 4,
  279. },
  280. {
  281. .id = QCA4019_HW_1_0_DEV_VERSION,
  282. .dev_id = 0,
  283. .name = "qca4019 hw1.0",
  284. .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
  285. .uart_pin = 7,
  286. .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
  287. .otp_exe_param = 0x0010000,
  288. .continuous_frag_desc = true,
  289. .cck_rate_map_rev2 = true,
  290. .channel_counters_freq_hz = 125000,
  291. .max_probe_resp_desc_thres = 24,
  292. .tx_chain_mask = 0x3,
  293. .rx_chain_mask = 0x3,
  294. .max_spatial_stream = 2,
  295. .cal_data_len = 12064,
  296. .fw = {
  297. .dir = QCA4019_HW_1_0_FW_DIR,
  298. .board = QCA4019_HW_1_0_BOARD_DATA_FILE,
  299. .board_size = QCA4019_BOARD_DATA_SZ,
  300. .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
  301. },
  302. .sw_decrypt_mcast_mgmt = true,
  303. .hw_ops = &qca99x0_ops,
  304. .decap_align_bytes = 1,
  305. },
  306. };
  307. static const char *const ath10k_core_fw_feature_str[] = {
  308. [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
  309. [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
  310. [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
  311. [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
  312. [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
  313. [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
  314. [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
  315. [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
  316. [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
  317. [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
  318. [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
  319. [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
  320. [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
  321. [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
  322. [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param",
  323. [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",
  324. [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast",
  325. };
  326. static unsigned int ath10k_core_get_fw_feature_str(char *buf,
  327. size_t buf_len,
  328. enum ath10k_fw_features feat)
  329. {
  330. /* make sure that ath10k_core_fw_feature_str[] gets updated */
  331. BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
  332. ATH10K_FW_FEATURE_COUNT);
  333. if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
  334. WARN_ON(!ath10k_core_fw_feature_str[feat])) {
  335. return scnprintf(buf, buf_len, "bit%d", feat);
  336. }
  337. return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
  338. }
  339. void ath10k_core_get_fw_features_str(struct ath10k *ar,
  340. char *buf,
  341. size_t buf_len)
  342. {
  343. size_t len = 0;
  344. int i;
  345. for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
  346. if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) {
  347. if (len > 0)
  348. len += scnprintf(buf + len, buf_len - len, ",");
  349. len += ath10k_core_get_fw_feature_str(buf + len,
  350. buf_len - len,
  351. i);
  352. }
  353. }
  354. }
  355. static void ath10k_send_suspend_complete(struct ath10k *ar)
  356. {
  357. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
  358. complete(&ar->target_suspend);
  359. }
  360. static int ath10k_init_configure_target(struct ath10k *ar)
  361. {
  362. u32 param_host;
  363. int ret;
  364. /* tell target which HTC version it is used*/
  365. ret = ath10k_bmi_write32(ar, hi_app_host_interest,
  366. HTC_PROTOCOL_VERSION);
  367. if (ret) {
  368. ath10k_err(ar, "settings HTC version failed\n");
  369. return ret;
  370. }
  371. /* set the firmware mode to STA/IBSS/AP */
  372. ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
  373. if (ret) {
  374. ath10k_err(ar, "setting firmware mode (1/2) failed\n");
  375. return ret;
  376. }
  377. /* TODO following parameters need to be re-visited. */
  378. /* num_device */
  379. param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
  380. /* Firmware mode */
  381. /* FIXME: Why FW_MODE_AP ??.*/
  382. param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
  383. /* mac_addr_method */
  384. param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  385. /* firmware_bridge */
  386. param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  387. /* fwsubmode */
  388. param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
  389. ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
  390. if (ret) {
  391. ath10k_err(ar, "setting firmware mode (2/2) failed\n");
  392. return ret;
  393. }
  394. /* We do all byte-swapping on the host */
  395. ret = ath10k_bmi_write32(ar, hi_be, 0);
  396. if (ret) {
  397. ath10k_err(ar, "setting host CPU BE mode failed\n");
  398. return ret;
  399. }
  400. /* FW descriptor/Data swap flags */
  401. ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
  402. if (ret) {
  403. ath10k_err(ar, "setting FW data/desc swap flags failed\n");
  404. return ret;
  405. }
  406. /* Some devices have a special sanity check that verifies the PCI
  407. * Device ID is written to this host interest var. It is known to be
  408. * required to boot QCA6164.
  409. */
  410. ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
  411. ar->dev_id);
  412. if (ret) {
  413. ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
  414. return ret;
  415. }
  416. return 0;
  417. }
  418. static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
  419. const char *dir,
  420. const char *file)
  421. {
  422. char filename[100];
  423. const struct firmware *fw;
  424. int ret;
  425. if (file == NULL)
  426. return ERR_PTR(-ENOENT);
  427. if (dir == NULL)
  428. dir = ".";
  429. snprintf(filename, sizeof(filename), "%s/%s", dir, file);
  430. ret = request_firmware_direct(&fw, filename, ar->dev);
  431. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n",
  432. filename, ret);
  433. if (ret)
  434. return ERR_PTR(ret);
  435. return fw;
  436. }
  437. static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
  438. size_t data_len)
  439. {
  440. u32 board_data_size = ar->hw_params.fw.board_size;
  441. u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
  442. u32 board_ext_data_addr;
  443. int ret;
  444. ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
  445. if (ret) {
  446. ath10k_err(ar, "could not read board ext data addr (%d)\n",
  447. ret);
  448. return ret;
  449. }
  450. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  451. "boot push board extended data addr 0x%x\n",
  452. board_ext_data_addr);
  453. if (board_ext_data_addr == 0)
  454. return 0;
  455. if (data_len != (board_data_size + board_ext_data_size)) {
  456. ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
  457. data_len, board_data_size, board_ext_data_size);
  458. return -EINVAL;
  459. }
  460. ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
  461. data + board_data_size,
  462. board_ext_data_size);
  463. if (ret) {
  464. ath10k_err(ar, "could not write board ext data (%d)\n", ret);
  465. return ret;
  466. }
  467. ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
  468. (board_ext_data_size << 16) | 1);
  469. if (ret) {
  470. ath10k_err(ar, "could not write board ext data bit (%d)\n",
  471. ret);
  472. return ret;
  473. }
  474. return 0;
  475. }
  476. static int ath10k_download_board_data(struct ath10k *ar, const void *data,
  477. size_t data_len)
  478. {
  479. u32 board_data_size = ar->hw_params.fw.board_size;
  480. u32 address;
  481. int ret;
  482. ret = ath10k_push_board_ext_data(ar, data, data_len);
  483. if (ret) {
  484. ath10k_err(ar, "could not push board ext data (%d)\n", ret);
  485. goto exit;
  486. }
  487. ret = ath10k_bmi_read32(ar, hi_board_data, &address);
  488. if (ret) {
  489. ath10k_err(ar, "could not read board data addr (%d)\n", ret);
  490. goto exit;
  491. }
  492. ret = ath10k_bmi_write_memory(ar, address, data,
  493. min_t(u32, board_data_size,
  494. data_len));
  495. if (ret) {
  496. ath10k_err(ar, "could not write board data (%d)\n", ret);
  497. goto exit;
  498. }
  499. ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
  500. if (ret) {
  501. ath10k_err(ar, "could not write board data bit (%d)\n", ret);
  502. goto exit;
  503. }
  504. exit:
  505. return ret;
  506. }
  507. static int ath10k_download_cal_file(struct ath10k *ar,
  508. const struct firmware *file)
  509. {
  510. int ret;
  511. if (!file)
  512. return -ENOENT;
  513. if (IS_ERR(file))
  514. return PTR_ERR(file);
  515. ret = ath10k_download_board_data(ar, file->data, file->size);
  516. if (ret) {
  517. ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
  518. return ret;
  519. }
  520. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
  521. return 0;
  522. }
  523. static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
  524. {
  525. struct device_node *node;
  526. int data_len;
  527. void *data;
  528. int ret;
  529. node = ar->dev->of_node;
  530. if (!node)
  531. /* Device Tree is optional, don't print any warnings if
  532. * there's no node for ath10k.
  533. */
  534. return -ENOENT;
  535. if (!of_get_property(node, dt_name, &data_len)) {
  536. /* The calibration data node is optional */
  537. return -ENOENT;
  538. }
  539. if (data_len != ar->hw_params.cal_data_len) {
  540. ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
  541. data_len);
  542. ret = -EMSGSIZE;
  543. goto out;
  544. }
  545. data = kmalloc(data_len, GFP_KERNEL);
  546. if (!data) {
  547. ret = -ENOMEM;
  548. goto out;
  549. }
  550. ret = of_property_read_u8_array(node, dt_name, data, data_len);
  551. if (ret) {
  552. ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
  553. ret);
  554. goto out_free;
  555. }
  556. ret = ath10k_download_board_data(ar, data, data_len);
  557. if (ret) {
  558. ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
  559. ret);
  560. goto out_free;
  561. }
  562. ret = 0;
  563. out_free:
  564. kfree(data);
  565. out:
  566. return ret;
  567. }
  568. static int ath10k_download_cal_eeprom(struct ath10k *ar)
  569. {
  570. size_t data_len;
  571. void *data = NULL;
  572. int ret;
  573. ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len);
  574. if (ret) {
  575. if (ret != -EOPNOTSUPP)
  576. ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
  577. ret);
  578. goto out_free;
  579. }
  580. ret = ath10k_download_board_data(ar, data, data_len);
  581. if (ret) {
  582. ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n",
  583. ret);
  584. goto out_free;
  585. }
  586. ret = 0;
  587. out_free:
  588. kfree(data);
  589. return ret;
  590. }
  591. static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
  592. {
  593. u32 result, address;
  594. u8 board_id, chip_id;
  595. int ret;
  596. address = ar->hw_params.patch_load_addr;
  597. if (!ar->normal_mode_fw.fw_file.otp_data ||
  598. !ar->normal_mode_fw.fw_file.otp_len) {
  599. ath10k_warn(ar,
  600. "failed to retrieve board id because of invalid otp\n");
  601. return -ENODATA;
  602. }
  603. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  604. "boot upload otp to 0x%x len %zd for board id\n",
  605. address, ar->normal_mode_fw.fw_file.otp_len);
  606. ret = ath10k_bmi_fast_download(ar, address,
  607. ar->normal_mode_fw.fw_file.otp_data,
  608. ar->normal_mode_fw.fw_file.otp_len);
  609. if (ret) {
  610. ath10k_err(ar, "could not write otp for board id check: %d\n",
  611. ret);
  612. return ret;
  613. }
  614. ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EEPROM_BOARD_ID,
  615. &result);
  616. if (ret) {
  617. ath10k_err(ar, "could not execute otp for board id check: %d\n",
  618. ret);
  619. return ret;
  620. }
  621. board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
  622. chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
  623. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  624. "boot get otp board id result 0x%08x board_id %d chip_id %d\n",
  625. result, board_id, chip_id);
  626. if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 ||
  627. (board_id == 0)) {
  628. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  629. "board id does not exist in otp, ignore it\n");
  630. return -EOPNOTSUPP;
  631. }
  632. ar->id.bmi_ids_valid = true;
  633. ar->id.bmi_board_id = board_id;
  634. ar->id.bmi_chip_id = chip_id;
  635. return 0;
  636. }
  637. static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data)
  638. {
  639. struct ath10k *ar = data;
  640. const char *bdf_ext;
  641. const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC;
  642. u8 bdf_enabled;
  643. int i;
  644. if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE)
  645. return;
  646. if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) {
  647. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  648. "wrong smbios bdf ext type length (%d).\n",
  649. hdr->length);
  650. return;
  651. }
  652. bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET);
  653. if (!bdf_enabled) {
  654. ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n");
  655. return;
  656. }
  657. /* Only one string exists (per spec) */
  658. bdf_ext = (char *)hdr + hdr->length;
  659. if (memcmp(bdf_ext, magic, strlen(magic)) != 0) {
  660. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  661. "bdf variant magic does not match.\n");
  662. return;
  663. }
  664. for (i = 0; i < strlen(bdf_ext); i++) {
  665. if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) {
  666. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  667. "bdf variant name contains non ascii chars.\n");
  668. return;
  669. }
  670. }
  671. /* Copy extension name without magic suffix */
  672. if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic),
  673. sizeof(ar->id.bdf_ext)) < 0) {
  674. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  675. "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
  676. bdf_ext);
  677. return;
  678. }
  679. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  680. "found and validated bdf variant smbios_type 0x%x bdf %s\n",
  681. ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext);
  682. }
  683. static int ath10k_core_check_smbios(struct ath10k *ar)
  684. {
  685. ar->id.bdf_ext[0] = '\0';
  686. dmi_walk(ath10k_core_check_bdfext, ar);
  687. if (ar->id.bdf_ext[0] == '\0')
  688. return -ENODATA;
  689. return 0;
  690. }
  691. static int ath10k_download_and_run_otp(struct ath10k *ar)
  692. {
  693. u32 result, address = ar->hw_params.patch_load_addr;
  694. u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
  695. int ret;
  696. ret = ath10k_download_board_data(ar,
  697. ar->running_fw->board_data,
  698. ar->running_fw->board_len);
  699. if (ret) {
  700. ath10k_err(ar, "failed to download board data: %d\n", ret);
  701. return ret;
  702. }
  703. /* OTP is optional */
  704. if (!ar->running_fw->fw_file.otp_data ||
  705. !ar->running_fw->fw_file.otp_len) {
  706. ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n",
  707. ar->running_fw->fw_file.otp_data,
  708. ar->running_fw->fw_file.otp_len);
  709. return 0;
  710. }
  711. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
  712. address, ar->running_fw->fw_file.otp_len);
  713. ret = ath10k_bmi_fast_download(ar, address,
  714. ar->running_fw->fw_file.otp_data,
  715. ar->running_fw->fw_file.otp_len);
  716. if (ret) {
  717. ath10k_err(ar, "could not write otp (%d)\n", ret);
  718. return ret;
  719. }
  720. ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
  721. if (ret) {
  722. ath10k_err(ar, "could not execute otp (%d)\n", ret);
  723. return ret;
  724. }
  725. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
  726. if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
  727. ar->running_fw->fw_file.fw_features)) &&
  728. result != 0) {
  729. ath10k_err(ar, "otp calibration failed: %d", result);
  730. return -EINVAL;
  731. }
  732. return 0;
  733. }
  734. static int ath10k_download_fw(struct ath10k *ar)
  735. {
  736. u32 address, data_len;
  737. const void *data;
  738. int ret;
  739. address = ar->hw_params.patch_load_addr;
  740. data = ar->running_fw->fw_file.firmware_data;
  741. data_len = ar->running_fw->fw_file.firmware_len;
  742. ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file);
  743. if (ret) {
  744. ath10k_err(ar, "failed to configure fw code swap: %d\n",
  745. ret);
  746. return ret;
  747. }
  748. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  749. "boot uploading firmware image %pK len %d\n",
  750. data, data_len);
  751. ret = ath10k_bmi_fast_download(ar, address, data, data_len);
  752. if (ret) {
  753. ath10k_err(ar, "failed to download firmware: %d\n",
  754. ret);
  755. return ret;
  756. }
  757. return ret;
  758. }
  759. static void ath10k_core_free_board_files(struct ath10k *ar)
  760. {
  761. if (!IS_ERR(ar->normal_mode_fw.board))
  762. release_firmware(ar->normal_mode_fw.board);
  763. ar->normal_mode_fw.board = NULL;
  764. ar->normal_mode_fw.board_data = NULL;
  765. ar->normal_mode_fw.board_len = 0;
  766. }
  767. static void ath10k_core_free_firmware_files(struct ath10k *ar)
  768. {
  769. if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware))
  770. release_firmware(ar->normal_mode_fw.fw_file.firmware);
  771. if (!IS_ERR(ar->cal_file))
  772. release_firmware(ar->cal_file);
  773. if (!IS_ERR(ar->pre_cal_file))
  774. release_firmware(ar->pre_cal_file);
  775. ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file);
  776. ar->normal_mode_fw.fw_file.otp_data = NULL;
  777. ar->normal_mode_fw.fw_file.otp_len = 0;
  778. ar->normal_mode_fw.fw_file.firmware = NULL;
  779. ar->normal_mode_fw.fw_file.firmware_data = NULL;
  780. ar->normal_mode_fw.fw_file.firmware_len = 0;
  781. ar->cal_file = NULL;
  782. ar->pre_cal_file = NULL;
  783. }
  784. static int ath10k_fetch_cal_file(struct ath10k *ar)
  785. {
  786. char filename[100];
  787. /* pre-cal-<bus>-<id>.bin */
  788. scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin",
  789. ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
  790. ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
  791. if (!IS_ERR(ar->pre_cal_file))
  792. goto success;
  793. /* cal-<bus>-<id>.bin */
  794. scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
  795. ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
  796. ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
  797. if (IS_ERR(ar->cal_file))
  798. /* calibration file is optional, don't print any warnings */
  799. return PTR_ERR(ar->cal_file);
  800. success:
  801. ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
  802. ATH10K_FW_DIR, filename);
  803. return 0;
  804. }
  805. static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar)
  806. {
  807. if (!ar->hw_params.fw.board) {
  808. ath10k_err(ar, "failed to find board file fw entry\n");
  809. return -EINVAL;
  810. }
  811. ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
  812. ar->hw_params.fw.dir,
  813. ar->hw_params.fw.board);
  814. if (IS_ERR(ar->normal_mode_fw.board))
  815. return PTR_ERR(ar->normal_mode_fw.board);
  816. ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data;
  817. ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size;
  818. return 0;
  819. }
  820. static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
  821. const void *buf, size_t buf_len,
  822. const char *boardname)
  823. {
  824. const struct ath10k_fw_ie *hdr;
  825. bool name_match_found;
  826. int ret, board_ie_id;
  827. size_t board_ie_len;
  828. const void *board_ie_data;
  829. name_match_found = false;
  830. /* go through ATH10K_BD_IE_BOARD_ elements */
  831. while (buf_len > sizeof(struct ath10k_fw_ie)) {
  832. hdr = buf;
  833. board_ie_id = le32_to_cpu(hdr->id);
  834. board_ie_len = le32_to_cpu(hdr->len);
  835. board_ie_data = hdr->data;
  836. buf_len -= sizeof(*hdr);
  837. buf += sizeof(*hdr);
  838. if (buf_len < ALIGN(board_ie_len, 4)) {
  839. ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
  840. buf_len, ALIGN(board_ie_len, 4));
  841. ret = -EINVAL;
  842. goto out;
  843. }
  844. switch (board_ie_id) {
  845. case ATH10K_BD_IE_BOARD_NAME:
  846. ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
  847. board_ie_data, board_ie_len);
  848. if (board_ie_len != strlen(boardname))
  849. break;
  850. ret = memcmp(board_ie_data, boardname, strlen(boardname));
  851. if (ret)
  852. break;
  853. name_match_found = true;
  854. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  855. "boot found match for name '%s'",
  856. boardname);
  857. break;
  858. case ATH10K_BD_IE_BOARD_DATA:
  859. if (!name_match_found)
  860. /* no match found */
  861. break;
  862. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  863. "boot found board data for '%s'",
  864. boardname);
  865. ar->normal_mode_fw.board_data = board_ie_data;
  866. ar->normal_mode_fw.board_len = board_ie_len;
  867. ret = 0;
  868. goto out;
  869. default:
  870. ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
  871. board_ie_id);
  872. break;
  873. }
  874. /* jump over the padding */
  875. board_ie_len = ALIGN(board_ie_len, 4);
  876. buf_len -= board_ie_len;
  877. buf += board_ie_len;
  878. }
  879. /* no match found */
  880. ret = -ENOENT;
  881. out:
  882. return ret;
  883. }
  884. static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
  885. const char *boardname,
  886. const char *filename)
  887. {
  888. size_t len, magic_len, ie_len;
  889. struct ath10k_fw_ie *hdr;
  890. const u8 *data;
  891. int ret, ie_id;
  892. ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
  893. ar->hw_params.fw.dir,
  894. filename);
  895. if (IS_ERR(ar->normal_mode_fw.board))
  896. return PTR_ERR(ar->normal_mode_fw.board);
  897. data = ar->normal_mode_fw.board->data;
  898. len = ar->normal_mode_fw.board->size;
  899. /* magic has extra null byte padded */
  900. magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
  901. if (len < magic_len) {
  902. ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
  903. ar->hw_params.fw.dir, filename, len);
  904. ret = -EINVAL;
  905. goto err;
  906. }
  907. if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
  908. ath10k_err(ar, "found invalid board magic\n");
  909. ret = -EINVAL;
  910. goto err;
  911. }
  912. /* magic is padded to 4 bytes */
  913. magic_len = ALIGN(magic_len, 4);
  914. if (len < magic_len) {
  915. ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
  916. ar->hw_params.fw.dir, filename, len);
  917. ret = -EINVAL;
  918. goto err;
  919. }
  920. data += magic_len;
  921. len -= magic_len;
  922. while (len > sizeof(struct ath10k_fw_ie)) {
  923. hdr = (struct ath10k_fw_ie *)data;
  924. ie_id = le32_to_cpu(hdr->id);
  925. ie_len = le32_to_cpu(hdr->len);
  926. len -= sizeof(*hdr);
  927. data = hdr->data;
  928. if (len < ALIGN(ie_len, 4)) {
  929. ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
  930. ie_id, ie_len, len);
  931. ret = -EINVAL;
  932. goto err;
  933. }
  934. switch (ie_id) {
  935. case ATH10K_BD_IE_BOARD:
  936. ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
  937. boardname);
  938. if (ret == -ENOENT && ar->id.bdf_ext[0] != '\0') {
  939. /* try default bdf if variant was not found */
  940. char *s, *v = ",variant=";
  941. char boardname2[100];
  942. strlcpy(boardname2, boardname,
  943. sizeof(boardname2));
  944. s = strstr(boardname2, v);
  945. if (s)
  946. *s = '\0'; /* strip ",variant=%s" */
  947. ret = ath10k_core_parse_bd_ie_board(ar, data,
  948. ie_len,
  949. boardname2);
  950. }
  951. if (ret == -ENOENT)
  952. /* no match found, continue */
  953. break;
  954. else if (ret)
  955. /* there was an error, bail out */
  956. goto err;
  957. /* board data found */
  958. goto out;
  959. }
  960. /* jump over the padding */
  961. ie_len = ALIGN(ie_len, 4);
  962. len -= ie_len;
  963. data += ie_len;
  964. }
  965. out:
  966. if (!ar->normal_mode_fw.board_data || !ar->normal_mode_fw.board_len) {
  967. ath10k_err(ar,
  968. "failed to fetch board data for %s from %s/%s\n",
  969. boardname, ar->hw_params.fw.dir, filename);
  970. ret = -ENODATA;
  971. goto err;
  972. }
  973. return 0;
  974. err:
  975. ath10k_core_free_board_files(ar);
  976. return ret;
  977. }
  978. static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
  979. size_t name_len)
  980. {
  981. /* strlen(',variant=') + strlen(ar->id.bdf_ext) */
  982. char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 };
  983. if (ar->id.bmi_ids_valid) {
  984. scnprintf(name, name_len,
  985. "bus=%s,bmi-chip-id=%d,bmi-board-id=%d",
  986. ath10k_bus_str(ar->hif.bus),
  987. ar->id.bmi_chip_id,
  988. ar->id.bmi_board_id);
  989. goto out;
  990. }
  991. if (ar->id.bdf_ext[0] != '\0')
  992. scnprintf(variant, sizeof(variant), ",variant=%s",
  993. ar->id.bdf_ext);
  994. scnprintf(name, name_len,
  995. "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s",
  996. ath10k_bus_str(ar->hif.bus),
  997. ar->id.vendor, ar->id.device,
  998. ar->id.subsystem_vendor, ar->id.subsystem_device, variant);
  999. out:
  1000. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
  1001. return 0;
  1002. }
  1003. static int ath10k_core_fetch_board_file(struct ath10k *ar)
  1004. {
  1005. char boardname[100];
  1006. int ret;
  1007. ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname));
  1008. if (ret) {
  1009. ath10k_err(ar, "failed to create board name: %d", ret);
  1010. return ret;
  1011. }
  1012. ar->bd_api = 2;
  1013. ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
  1014. ATH10K_BOARD_API2_FILE);
  1015. if (!ret)
  1016. goto success;
  1017. ar->bd_api = 1;
  1018. ret = ath10k_core_fetch_board_data_api_1(ar);
  1019. if (ret) {
  1020. ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n",
  1021. ar->hw_params.fw.dir);
  1022. return ret;
  1023. }
  1024. success:
  1025. ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
  1026. return 0;
  1027. }
  1028. int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
  1029. struct ath10k_fw_file *fw_file)
  1030. {
  1031. size_t magic_len, len, ie_len;
  1032. int ie_id, i, index, bit, ret;
  1033. struct ath10k_fw_ie *hdr;
  1034. const u8 *data;
  1035. __le32 *timestamp, *version;
  1036. /* first fetch the firmware file (firmware-*.bin) */
  1037. fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
  1038. name);
  1039. if (IS_ERR(fw_file->firmware))
  1040. return PTR_ERR(fw_file->firmware);
  1041. data = fw_file->firmware->data;
  1042. len = fw_file->firmware->size;
  1043. /* magic also includes the null byte, check that as well */
  1044. magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
  1045. if (len < magic_len) {
  1046. ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
  1047. ar->hw_params.fw.dir, name, len);
  1048. ret = -EINVAL;
  1049. goto err;
  1050. }
  1051. if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
  1052. ath10k_err(ar, "invalid firmware magic\n");
  1053. ret = -EINVAL;
  1054. goto err;
  1055. }
  1056. /* jump over the padding */
  1057. magic_len = ALIGN(magic_len, 4);
  1058. len -= magic_len;
  1059. data += magic_len;
  1060. /* loop elements */
  1061. while (len > sizeof(struct ath10k_fw_ie)) {
  1062. hdr = (struct ath10k_fw_ie *)data;
  1063. ie_id = le32_to_cpu(hdr->id);
  1064. ie_len = le32_to_cpu(hdr->len);
  1065. len -= sizeof(*hdr);
  1066. data += sizeof(*hdr);
  1067. if (len < ie_len) {
  1068. ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
  1069. ie_id, len, ie_len);
  1070. ret = -EINVAL;
  1071. goto err;
  1072. }
  1073. switch (ie_id) {
  1074. case ATH10K_FW_IE_FW_VERSION:
  1075. if (ie_len > sizeof(fw_file->fw_version) - 1)
  1076. break;
  1077. memcpy(fw_file->fw_version, data, ie_len);
  1078. fw_file->fw_version[ie_len] = '\0';
  1079. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  1080. "found fw version %s\n",
  1081. fw_file->fw_version);
  1082. break;
  1083. case ATH10K_FW_IE_TIMESTAMP:
  1084. if (ie_len != sizeof(u32))
  1085. break;
  1086. timestamp = (__le32 *)data;
  1087. ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
  1088. le32_to_cpup(timestamp));
  1089. break;
  1090. case ATH10K_FW_IE_FEATURES:
  1091. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  1092. "found firmware features ie (%zd B)\n",
  1093. ie_len);
  1094. for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
  1095. index = i / 8;
  1096. bit = i % 8;
  1097. if (index == ie_len)
  1098. break;
  1099. if (data[index] & (1 << bit)) {
  1100. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  1101. "Enabling feature bit: %i\n",
  1102. i);
  1103. __set_bit(i, fw_file->fw_features);
  1104. }
  1105. }
  1106. ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
  1107. fw_file->fw_features,
  1108. sizeof(fw_file->fw_features));
  1109. break;
  1110. case ATH10K_FW_IE_FW_IMAGE:
  1111. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  1112. "found fw image ie (%zd B)\n",
  1113. ie_len);
  1114. fw_file->firmware_data = data;
  1115. fw_file->firmware_len = ie_len;
  1116. break;
  1117. case ATH10K_FW_IE_OTP_IMAGE:
  1118. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  1119. "found otp image ie (%zd B)\n",
  1120. ie_len);
  1121. fw_file->otp_data = data;
  1122. fw_file->otp_len = ie_len;
  1123. break;
  1124. case ATH10K_FW_IE_WMI_OP_VERSION:
  1125. if (ie_len != sizeof(u32))
  1126. break;
  1127. version = (__le32 *)data;
  1128. fw_file->wmi_op_version = le32_to_cpup(version);
  1129. ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
  1130. fw_file->wmi_op_version);
  1131. break;
  1132. case ATH10K_FW_IE_HTT_OP_VERSION:
  1133. if (ie_len != sizeof(u32))
  1134. break;
  1135. version = (__le32 *)data;
  1136. fw_file->htt_op_version = le32_to_cpup(version);
  1137. ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
  1138. fw_file->htt_op_version);
  1139. break;
  1140. case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
  1141. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  1142. "found fw code swap image ie (%zd B)\n",
  1143. ie_len);
  1144. fw_file->codeswap_data = data;
  1145. fw_file->codeswap_len = ie_len;
  1146. break;
  1147. default:
  1148. ath10k_warn(ar, "Unknown FW IE: %u\n",
  1149. le32_to_cpu(hdr->id));
  1150. break;
  1151. }
  1152. /* jump over the padding */
  1153. ie_len = ALIGN(ie_len, 4);
  1154. len -= ie_len;
  1155. data += ie_len;
  1156. }
  1157. if (!fw_file->firmware_data ||
  1158. !fw_file->firmware_len) {
  1159. ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
  1160. ar->hw_params.fw.dir, name);
  1161. ret = -ENOMEDIUM;
  1162. goto err;
  1163. }
  1164. return 0;
  1165. err:
  1166. ath10k_core_free_firmware_files(ar);
  1167. return ret;
  1168. }
  1169. static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name,
  1170. size_t fw_name_len, int fw_api)
  1171. {
  1172. scnprintf(fw_name, fw_name_len, "%s-%d.bin", ATH10K_FW_FILE_BASE, fw_api);
  1173. }
  1174. static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
  1175. {
  1176. int ret, i;
  1177. char fw_name[100];
  1178. /* calibration file is optional, don't check for any errors */
  1179. ath10k_fetch_cal_file(ar);
  1180. for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) {
  1181. ar->fw_api = i;
  1182. ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n",
  1183. ar->fw_api);
  1184. ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api);
  1185. ret = ath10k_core_fetch_firmware_api_n(ar, fw_name,
  1186. &ar->normal_mode_fw.fw_file);
  1187. if (!ret)
  1188. goto success;
  1189. }
  1190. /* we end up here if we couldn't fetch any firmware */
  1191. ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d",
  1192. ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir,
  1193. ret);
  1194. return ret;
  1195. success:
  1196. ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
  1197. return 0;
  1198. }
  1199. static int ath10k_core_pre_cal_download(struct ath10k *ar)
  1200. {
  1201. int ret;
  1202. ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
  1203. if (ret == 0) {
  1204. ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
  1205. goto success;
  1206. }
  1207. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  1208. "boot did not find a pre calibration file, try DT next: %d\n",
  1209. ret);
  1210. ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
  1211. if (ret) {
  1212. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  1213. "unable to load pre cal data from DT: %d\n", ret);
  1214. return ret;
  1215. }
  1216. ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
  1217. success:
  1218. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
  1219. ath10k_cal_mode_str(ar->cal_mode));
  1220. return 0;
  1221. }
  1222. static int ath10k_core_pre_cal_config(struct ath10k *ar)
  1223. {
  1224. int ret;
  1225. ret = ath10k_core_pre_cal_download(ar);
  1226. if (ret) {
  1227. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  1228. "failed to load pre cal data: %d\n", ret);
  1229. return ret;
  1230. }
  1231. ret = ath10k_core_get_board_id_from_otp(ar);
  1232. if (ret) {
  1233. ath10k_err(ar, "failed to get board id: %d\n", ret);
  1234. return ret;
  1235. }
  1236. ret = ath10k_download_and_run_otp(ar);
  1237. if (ret) {
  1238. ath10k_err(ar, "failed to run otp: %d\n", ret);
  1239. return ret;
  1240. }
  1241. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  1242. "pre cal configuration done successfully\n");
  1243. return 0;
  1244. }
  1245. static int ath10k_download_cal_data(struct ath10k *ar)
  1246. {
  1247. int ret;
  1248. ret = ath10k_core_pre_cal_config(ar);
  1249. if (ret == 0)
  1250. return 0;
  1251. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  1252. "pre cal download procedure failed, try cal file: %d\n",
  1253. ret);
  1254. ret = ath10k_download_cal_file(ar, ar->cal_file);
  1255. if (ret == 0) {
  1256. ar->cal_mode = ATH10K_CAL_MODE_FILE;
  1257. goto done;
  1258. }
  1259. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  1260. "boot did not find a calibration file, try DT next: %d\n",
  1261. ret);
  1262. ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
  1263. if (ret == 0) {
  1264. ar->cal_mode = ATH10K_CAL_MODE_DT;
  1265. goto done;
  1266. }
  1267. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  1268. "boot did not find DT entry, try target EEPROM next: %d\n",
  1269. ret);
  1270. ret = ath10k_download_cal_eeprom(ar);
  1271. if (ret == 0) {
  1272. ar->cal_mode = ATH10K_CAL_MODE_EEPROM;
  1273. goto done;
  1274. }
  1275. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  1276. "boot did not find target EEPROM entry, try OTP next: %d\n",
  1277. ret);
  1278. ret = ath10k_download_and_run_otp(ar);
  1279. if (ret) {
  1280. ath10k_err(ar, "failed to run otp: %d\n", ret);
  1281. return ret;
  1282. }
  1283. ar->cal_mode = ATH10K_CAL_MODE_OTP;
  1284. done:
  1285. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
  1286. ath10k_cal_mode_str(ar->cal_mode));
  1287. return 0;
  1288. }
  1289. static int ath10k_init_uart(struct ath10k *ar)
  1290. {
  1291. int ret;
  1292. /*
  1293. * Explicitly setting UART prints to zero as target turns it on
  1294. * based on scratch registers.
  1295. */
  1296. ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
  1297. if (ret) {
  1298. ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
  1299. return ret;
  1300. }
  1301. if (!uart_print)
  1302. return 0;
  1303. ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
  1304. if (ret) {
  1305. ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
  1306. return ret;
  1307. }
  1308. ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
  1309. if (ret) {
  1310. ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
  1311. return ret;
  1312. }
  1313. /* Set the UART baud rate to 19200. */
  1314. ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
  1315. if (ret) {
  1316. ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
  1317. return ret;
  1318. }
  1319. ath10k_info(ar, "UART prints enabled\n");
  1320. return 0;
  1321. }
  1322. static int ath10k_init_hw_params(struct ath10k *ar)
  1323. {
  1324. const struct ath10k_hw_params *uninitialized_var(hw_params);
  1325. int i;
  1326. for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
  1327. hw_params = &ath10k_hw_params_list[i];
  1328. if (hw_params->id == ar->target_version &&
  1329. hw_params->dev_id == ar->dev_id)
  1330. break;
  1331. }
  1332. if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
  1333. ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
  1334. ar->target_version);
  1335. return -EINVAL;
  1336. }
  1337. ar->hw_params = *hw_params;
  1338. ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
  1339. ar->hw_params.name, ar->target_version);
  1340. return 0;
  1341. }
  1342. static void ath10k_core_restart(struct work_struct *work)
  1343. {
  1344. struct ath10k *ar = container_of(work, struct ath10k, restart_work);
  1345. int ret;
  1346. set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
  1347. /* Place a barrier to make sure the compiler doesn't reorder
  1348. * CRASH_FLUSH and calling other functions.
  1349. */
  1350. barrier();
  1351. ieee80211_stop_queues(ar->hw);
  1352. ath10k_drain_tx(ar);
  1353. complete(&ar->scan.started);
  1354. complete(&ar->scan.completed);
  1355. complete(&ar->scan.on_channel);
  1356. complete(&ar->offchan_tx_completed);
  1357. complete(&ar->install_key_done);
  1358. complete(&ar->vdev_setup_done);
  1359. complete(&ar->thermal.wmi_sync);
  1360. complete(&ar->bss_survey_done);
  1361. wake_up(&ar->htt.empty_tx_wq);
  1362. wake_up(&ar->wmi.tx_credits_wq);
  1363. wake_up(&ar->peer_mapping_wq);
  1364. mutex_lock(&ar->conf_mutex);
  1365. switch (ar->state) {
  1366. case ATH10K_STATE_ON:
  1367. ar->state = ATH10K_STATE_RESTARTING;
  1368. ath10k_halt(ar);
  1369. ath10k_scan_finish(ar);
  1370. ieee80211_restart_hw(ar->hw);
  1371. break;
  1372. case ATH10K_STATE_OFF:
  1373. /* this can happen if driver is being unloaded
  1374. * or if the crash happens during FW probing */
  1375. ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
  1376. break;
  1377. case ATH10K_STATE_RESTARTING:
  1378. /* hw restart might be requested from multiple places */
  1379. break;
  1380. case ATH10K_STATE_RESTARTED:
  1381. ar->state = ATH10K_STATE_WEDGED;
  1382. /* fall through */
  1383. case ATH10K_STATE_WEDGED:
  1384. ath10k_warn(ar, "device is wedged, will not restart\n");
  1385. break;
  1386. case ATH10K_STATE_UTF:
  1387. ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
  1388. break;
  1389. }
  1390. mutex_unlock(&ar->conf_mutex);
  1391. ret = ath10k_debug_fw_devcoredump(ar);
  1392. if (ret)
  1393. ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d",
  1394. ret);
  1395. }
  1396. static void ath10k_core_set_coverage_class_work(struct work_struct *work)
  1397. {
  1398. struct ath10k *ar = container_of(work, struct ath10k,
  1399. set_coverage_class_work);
  1400. if (ar->hw_params.hw_ops->set_coverage_class)
  1401. ar->hw_params.hw_ops->set_coverage_class(ar, -1);
  1402. }
  1403. static int ath10k_core_init_firmware_features(struct ath10k *ar)
  1404. {
  1405. struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
  1406. if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) &&
  1407. !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
  1408. ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
  1409. return -EINVAL;
  1410. }
  1411. if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
  1412. ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
  1413. ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version);
  1414. return -EINVAL;
  1415. }
  1416. ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
  1417. switch (ath10k_cryptmode_param) {
  1418. case ATH10K_CRYPT_MODE_HW:
  1419. clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
  1420. clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
  1421. break;
  1422. case ATH10K_CRYPT_MODE_SW:
  1423. if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
  1424. fw_file->fw_features)) {
  1425. ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
  1426. return -EINVAL;
  1427. }
  1428. set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
  1429. set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
  1430. break;
  1431. default:
  1432. ath10k_info(ar, "invalid cryptmode: %d\n",
  1433. ath10k_cryptmode_param);
  1434. return -EINVAL;
  1435. }
  1436. ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
  1437. ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
  1438. if (rawmode) {
  1439. if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
  1440. fw_file->fw_features)) {
  1441. ath10k_err(ar, "rawmode = 1 requires support from firmware");
  1442. return -EINVAL;
  1443. }
  1444. set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
  1445. }
  1446. if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
  1447. ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
  1448. /* Workaround:
  1449. *
  1450. * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
  1451. * and causes enormous performance issues (malformed frames,
  1452. * etc).
  1453. *
  1454. * Disabling A-MSDU makes RAW mode stable with heavy traffic
  1455. * albeit a bit slower compared to regular operation.
  1456. */
  1457. ar->htt.max_num_amsdu = 1;
  1458. }
  1459. /* Backwards compatibility for firmwares without
  1460. * ATH10K_FW_IE_WMI_OP_VERSION.
  1461. */
  1462. if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
  1463. if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
  1464. if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
  1465. fw_file->fw_features))
  1466. fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
  1467. else
  1468. fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
  1469. } else {
  1470. fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
  1471. }
  1472. }
  1473. switch (fw_file->wmi_op_version) {
  1474. case ATH10K_FW_WMI_OP_VERSION_MAIN:
  1475. ar->max_num_peers = TARGET_NUM_PEERS;
  1476. ar->max_num_stations = TARGET_NUM_STATIONS;
  1477. ar->max_num_vdevs = TARGET_NUM_VDEVS;
  1478. ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
  1479. ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
  1480. WMI_STAT_PEER;
  1481. ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
  1482. break;
  1483. case ATH10K_FW_WMI_OP_VERSION_10_1:
  1484. case ATH10K_FW_WMI_OP_VERSION_10_2:
  1485. case ATH10K_FW_WMI_OP_VERSION_10_2_4:
  1486. if (ath10k_peer_stats_enabled(ar)) {
  1487. ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
  1488. ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
  1489. } else {
  1490. ar->max_num_peers = TARGET_10X_NUM_PEERS;
  1491. ar->max_num_stations = TARGET_10X_NUM_STATIONS;
  1492. }
  1493. ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
  1494. ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
  1495. ar->fw_stats_req_mask = WMI_STAT_PEER;
  1496. ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
  1497. break;
  1498. case ATH10K_FW_WMI_OP_VERSION_TLV:
  1499. ar->max_num_peers = TARGET_TLV_NUM_PEERS;
  1500. ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
  1501. ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
  1502. ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
  1503. ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
  1504. ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
  1505. ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
  1506. WMI_STAT_PEER;
  1507. ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
  1508. break;
  1509. case ATH10K_FW_WMI_OP_VERSION_10_4:
  1510. ar->max_num_peers = TARGET_10_4_NUM_PEERS;
  1511. ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
  1512. ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
  1513. ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
  1514. ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
  1515. ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
  1516. WMI_10_4_STAT_PEER_EXTD;
  1517. ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
  1518. if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
  1519. fw_file->fw_features))
  1520. ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
  1521. else
  1522. ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
  1523. break;
  1524. case ATH10K_FW_WMI_OP_VERSION_UNSET:
  1525. case ATH10K_FW_WMI_OP_VERSION_MAX:
  1526. WARN_ON(1);
  1527. return -EINVAL;
  1528. }
  1529. /* Backwards compatibility for firmwares without
  1530. * ATH10K_FW_IE_HTT_OP_VERSION.
  1531. */
  1532. if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
  1533. switch (fw_file->wmi_op_version) {
  1534. case ATH10K_FW_WMI_OP_VERSION_MAIN:
  1535. fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
  1536. break;
  1537. case ATH10K_FW_WMI_OP_VERSION_10_1:
  1538. case ATH10K_FW_WMI_OP_VERSION_10_2:
  1539. case ATH10K_FW_WMI_OP_VERSION_10_2_4:
  1540. fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
  1541. break;
  1542. case ATH10K_FW_WMI_OP_VERSION_TLV:
  1543. fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
  1544. break;
  1545. case ATH10K_FW_WMI_OP_VERSION_10_4:
  1546. case ATH10K_FW_WMI_OP_VERSION_UNSET:
  1547. case ATH10K_FW_WMI_OP_VERSION_MAX:
  1548. ath10k_err(ar, "htt op version not found from fw meta data");
  1549. return -EINVAL;
  1550. }
  1551. }
  1552. return 0;
  1553. }
  1554. static int ath10k_core_reset_rx_filter(struct ath10k *ar)
  1555. {
  1556. int ret;
  1557. int vdev_id;
  1558. int vdev_type;
  1559. int vdev_subtype;
  1560. const u8 *vdev_addr;
  1561. vdev_id = 0;
  1562. vdev_type = WMI_VDEV_TYPE_STA;
  1563. vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE);
  1564. vdev_addr = ar->mac_addr;
  1565. ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype,
  1566. vdev_addr);
  1567. if (ret) {
  1568. ath10k_err(ar, "failed to create dummy vdev: %d\n", ret);
  1569. return ret;
  1570. }
  1571. ret = ath10k_wmi_vdev_delete(ar, vdev_id);
  1572. if (ret) {
  1573. ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret);
  1574. return ret;
  1575. }
  1576. /* WMI and HTT may use separate HIF pipes and are not guaranteed to be
  1577. * serialized properly implicitly.
  1578. *
  1579. * Moreover (most) WMI commands have no explicit acknowledges. It is
  1580. * possible to infer it implicitly by poking firmware with echo
  1581. * command - getting a reply means all preceding comments have been
  1582. * (mostly) processed.
  1583. *
  1584. * In case of vdev create/delete this is sufficient.
  1585. *
  1586. * Without this it's possible to end up with a race when HTT Rx ring is
  1587. * started before vdev create/delete hack is complete allowing a short
  1588. * window of opportunity to receive (and Tx ACK) a bunch of frames.
  1589. */
  1590. ret = ath10k_wmi_barrier(ar);
  1591. if (ret) {
  1592. ath10k_err(ar, "failed to ping firmware: %d\n", ret);
  1593. return ret;
  1594. }
  1595. return 0;
  1596. }
  1597. int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
  1598. const struct ath10k_fw_components *fw)
  1599. {
  1600. int status;
  1601. u32 val;
  1602. lockdep_assert_held(&ar->conf_mutex);
  1603. clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
  1604. ar->running_fw = fw;
  1605. ath10k_bmi_start(ar);
  1606. if (ath10k_init_configure_target(ar)) {
  1607. status = -EINVAL;
  1608. goto err;
  1609. }
  1610. status = ath10k_download_cal_data(ar);
  1611. if (status)
  1612. goto err;
  1613. /* Some of of qca988x solutions are having global reset issue
  1614. * during target initialization. Bypassing PLL setting before
  1615. * downloading firmware and letting the SoC run on REF_CLK is
  1616. * fixing the problem. Corresponding firmware change is also needed
  1617. * to set the clock source once the target is initialized.
  1618. */
  1619. if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
  1620. ar->running_fw->fw_file.fw_features)) {
  1621. status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
  1622. if (status) {
  1623. ath10k_err(ar, "could not write to skip_clock_init: %d\n",
  1624. status);
  1625. goto err;
  1626. }
  1627. }
  1628. status = ath10k_download_fw(ar);
  1629. if (status)
  1630. goto err;
  1631. status = ath10k_init_uart(ar);
  1632. if (status)
  1633. goto err;
  1634. ar->htc.htc_ops.target_send_suspend_complete =
  1635. ath10k_send_suspend_complete;
  1636. status = ath10k_htc_init(ar);
  1637. if (status) {
  1638. ath10k_err(ar, "could not init HTC (%d)\n", status);
  1639. goto err;
  1640. }
  1641. status = ath10k_bmi_done(ar);
  1642. if (status)
  1643. goto err;
  1644. status = ath10k_wmi_attach(ar);
  1645. if (status) {
  1646. ath10k_err(ar, "WMI attach failed: %d\n", status);
  1647. goto err;
  1648. }
  1649. status = ath10k_htt_init(ar);
  1650. if (status) {
  1651. ath10k_err(ar, "failed to init htt: %d\n", status);
  1652. goto err_wmi_detach;
  1653. }
  1654. status = ath10k_htt_tx_start(&ar->htt);
  1655. if (status) {
  1656. ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
  1657. goto err_wmi_detach;
  1658. }
  1659. status = ath10k_htt_rx_alloc(&ar->htt);
  1660. if (status) {
  1661. ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
  1662. goto err_htt_tx_detach;
  1663. }
  1664. status = ath10k_hif_start(ar);
  1665. if (status) {
  1666. ath10k_err(ar, "could not start HIF: %d\n", status);
  1667. goto err_htt_rx_detach;
  1668. }
  1669. status = ath10k_htc_wait_target(&ar->htc);
  1670. if (status) {
  1671. ath10k_err(ar, "failed to connect to HTC: %d\n", status);
  1672. goto err_hif_stop;
  1673. }
  1674. if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
  1675. status = ath10k_htt_connect(&ar->htt);
  1676. if (status) {
  1677. ath10k_err(ar, "failed to connect htt (%d)\n", status);
  1678. goto err_hif_stop;
  1679. }
  1680. }
  1681. status = ath10k_wmi_connect(ar);
  1682. if (status) {
  1683. ath10k_err(ar, "could not connect wmi: %d\n", status);
  1684. goto err_hif_stop;
  1685. }
  1686. status = ath10k_htc_start(&ar->htc);
  1687. if (status) {
  1688. ath10k_err(ar, "failed to start htc: %d\n", status);
  1689. goto err_hif_stop;
  1690. }
  1691. if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
  1692. status = ath10k_wmi_wait_for_service_ready(ar);
  1693. if (status) {
  1694. ath10k_warn(ar, "wmi service ready event not received");
  1695. goto err_hif_stop;
  1696. }
  1697. }
  1698. ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
  1699. ar->hw->wiphy->fw_version);
  1700. if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) &&
  1701. mode == ATH10K_FIRMWARE_MODE_NORMAL) {
  1702. val = 0;
  1703. if (ath10k_peer_stats_enabled(ar))
  1704. val = WMI_10_4_PEER_STATS;
  1705. if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
  1706. val |= WMI_10_4_BSS_CHANNEL_INFO_64;
  1707. /* 10.4 firmware supports BT-Coex without reloading firmware
  1708. * via pdev param. To support Bluetooth coexistence pdev param,
  1709. * WMI_COEX_GPIO_SUPPORT of extended resource config should be
  1710. * enabled always.
  1711. */
  1712. if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
  1713. test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
  1714. ar->running_fw->fw_file.fw_features))
  1715. val |= WMI_10_4_COEX_GPIO_SUPPORT;
  1716. status = ath10k_mac_ext_resource_config(ar, val);
  1717. if (status) {
  1718. ath10k_err(ar,
  1719. "failed to send ext resource cfg command : %d\n",
  1720. status);
  1721. goto err_hif_stop;
  1722. }
  1723. }
  1724. status = ath10k_wmi_cmd_init(ar);
  1725. if (status) {
  1726. ath10k_err(ar, "could not send WMI init command (%d)\n",
  1727. status);
  1728. goto err_hif_stop;
  1729. }
  1730. status = ath10k_wmi_wait_for_unified_ready(ar);
  1731. if (status) {
  1732. ath10k_err(ar, "wmi unified ready event not received\n");
  1733. goto err_hif_stop;
  1734. }
  1735. /* Some firmware revisions do not properly set up hardware rx filter
  1736. * registers.
  1737. *
  1738. * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK
  1739. * is filled with 0s instead of 1s allowing HW to respond with ACKs to
  1740. * any frames that matches MAC_PCU_RX_FILTER which is also
  1741. * misconfigured to accept anything.
  1742. *
  1743. * The ADDR1 is programmed using internal firmware structure field and
  1744. * can't be (easily/sanely) reached from the driver explicitly. It is
  1745. * possible to implicitly make it correct by creating a dummy vdev and
  1746. * then deleting it.
  1747. */
  1748. if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
  1749. status = ath10k_core_reset_rx_filter(ar);
  1750. if (status) {
  1751. ath10k_err(ar,
  1752. "failed to reset rx filter: %d\n", status);
  1753. goto err_hif_stop;
  1754. }
  1755. }
  1756. /* If firmware indicates Full Rx Reorder support it must be used in a
  1757. * slightly different manner. Let HTT code know.
  1758. */
  1759. ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
  1760. ar->wmi.svc_map));
  1761. status = ath10k_htt_rx_ring_refill(ar);
  1762. if (status) {
  1763. ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
  1764. goto err_hif_stop;
  1765. }
  1766. if (ar->max_num_vdevs >= 64)
  1767. ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL;
  1768. else
  1769. ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
  1770. INIT_LIST_HEAD(&ar->arvifs);
  1771. /* we don't care about HTT in UTF mode */
  1772. if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
  1773. status = ath10k_htt_setup(&ar->htt);
  1774. if (status) {
  1775. ath10k_err(ar, "failed to setup htt: %d\n", status);
  1776. goto err_hif_stop;
  1777. }
  1778. }
  1779. status = ath10k_debug_start(ar);
  1780. if (status)
  1781. goto err_hif_stop;
  1782. return 0;
  1783. err_hif_stop:
  1784. ath10k_hif_stop(ar);
  1785. err_htt_rx_detach:
  1786. ath10k_htt_rx_free(&ar->htt);
  1787. err_htt_tx_detach:
  1788. ath10k_htt_tx_free(&ar->htt);
  1789. err_wmi_detach:
  1790. ath10k_wmi_detach(ar);
  1791. err:
  1792. return status;
  1793. }
  1794. EXPORT_SYMBOL(ath10k_core_start);
  1795. int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
  1796. {
  1797. int ret;
  1798. unsigned long time_left;
  1799. reinit_completion(&ar->target_suspend);
  1800. ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
  1801. if (ret) {
  1802. ath10k_warn(ar, "could not suspend target (%d)\n", ret);
  1803. return ret;
  1804. }
  1805. time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
  1806. if (!time_left) {
  1807. ath10k_warn(ar, "suspend timed out - target pause event never came\n");
  1808. return -ETIMEDOUT;
  1809. }
  1810. return 0;
  1811. }
  1812. void ath10k_core_stop(struct ath10k *ar)
  1813. {
  1814. lockdep_assert_held(&ar->conf_mutex);
  1815. ath10k_debug_stop(ar);
  1816. /* try to suspend target */
  1817. if (ar->state != ATH10K_STATE_RESTARTING &&
  1818. ar->state != ATH10K_STATE_UTF)
  1819. ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
  1820. ath10k_hif_stop(ar);
  1821. ath10k_htt_tx_stop(&ar->htt);
  1822. ath10k_htt_rx_free(&ar->htt);
  1823. ath10k_wmi_detach(ar);
  1824. }
  1825. EXPORT_SYMBOL(ath10k_core_stop);
  1826. /* mac80211 manages fw/hw initialization through start/stop hooks. However in
  1827. * order to know what hw capabilities should be advertised to mac80211 it is
  1828. * necessary to load the firmware (and tear it down immediately since start
  1829. * hook will try to init it again) before registering */
  1830. static int ath10k_core_probe_fw(struct ath10k *ar)
  1831. {
  1832. struct bmi_target_info target_info;
  1833. int ret = 0;
  1834. ret = ath10k_hif_power_up(ar);
  1835. if (ret) {
  1836. ath10k_err(ar, "could not start pci hif (%d)\n", ret);
  1837. return ret;
  1838. }
  1839. memset(&target_info, 0, sizeof(target_info));
  1840. ret = ath10k_bmi_get_target_info(ar, &target_info);
  1841. if (ret) {
  1842. ath10k_err(ar, "could not get target info (%d)\n", ret);
  1843. goto err_power_down;
  1844. }
  1845. ar->target_version = target_info.version;
  1846. ar->hw->wiphy->hw_version = target_info.version;
  1847. ret = ath10k_init_hw_params(ar);
  1848. if (ret) {
  1849. ath10k_err(ar, "could not get hw params (%d)\n", ret);
  1850. goto err_power_down;
  1851. }
  1852. ret = ath10k_core_fetch_firmware_files(ar);
  1853. if (ret) {
  1854. ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
  1855. goto err_power_down;
  1856. }
  1857. BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) !=
  1858. sizeof(ar->normal_mode_fw.fw_file.fw_version));
  1859. memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version,
  1860. sizeof(ar->hw->wiphy->fw_version));
  1861. ath10k_debug_print_hwfw_info(ar);
  1862. ret = ath10k_core_pre_cal_download(ar);
  1863. if (ret) {
  1864. /* pre calibration data download is not necessary
  1865. * for all the chipsets. Ignore failures and continue.
  1866. */
  1867. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  1868. "could not load pre cal data: %d\n", ret);
  1869. }
  1870. ret = ath10k_core_get_board_id_from_otp(ar);
  1871. if (ret && ret != -EOPNOTSUPP) {
  1872. ath10k_err(ar, "failed to get board id from otp: %d\n",
  1873. ret);
  1874. goto err_free_firmware_files;
  1875. }
  1876. ret = ath10k_core_check_smbios(ar);
  1877. if (ret)
  1878. ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not set.\n");
  1879. ret = ath10k_core_fetch_board_file(ar);
  1880. if (ret) {
  1881. ath10k_err(ar, "failed to fetch board file: %d\n", ret);
  1882. goto err_free_firmware_files;
  1883. }
  1884. ath10k_debug_print_board_info(ar);
  1885. ret = ath10k_core_init_firmware_features(ar);
  1886. if (ret) {
  1887. ath10k_err(ar, "fatal problem with firmware features: %d\n",
  1888. ret);
  1889. goto err_free_firmware_files;
  1890. }
  1891. ret = ath10k_swap_code_seg_init(ar, &ar->normal_mode_fw.fw_file);
  1892. if (ret) {
  1893. ath10k_err(ar, "failed to initialize code swap segment: %d\n",
  1894. ret);
  1895. goto err_free_firmware_files;
  1896. }
  1897. mutex_lock(&ar->conf_mutex);
  1898. ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL,
  1899. &ar->normal_mode_fw);
  1900. if (ret) {
  1901. ath10k_err(ar, "could not init core (%d)\n", ret);
  1902. goto err_unlock;
  1903. }
  1904. ath10k_debug_print_boot_info(ar);
  1905. ath10k_core_stop(ar);
  1906. mutex_unlock(&ar->conf_mutex);
  1907. ath10k_hif_power_down(ar);
  1908. return 0;
  1909. err_unlock:
  1910. mutex_unlock(&ar->conf_mutex);
  1911. err_free_firmware_files:
  1912. ath10k_core_free_firmware_files(ar);
  1913. err_power_down:
  1914. ath10k_hif_power_down(ar);
  1915. return ret;
  1916. }
  1917. static void ath10k_core_register_work(struct work_struct *work)
  1918. {
  1919. struct ath10k *ar = container_of(work, struct ath10k, register_work);
  1920. int status;
  1921. /* peer stats are enabled by default */
  1922. set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags);
  1923. status = ath10k_core_probe_fw(ar);
  1924. if (status) {
  1925. ath10k_err(ar, "could not probe fw (%d)\n", status);
  1926. goto err;
  1927. }
  1928. status = ath10k_mac_register(ar);
  1929. if (status) {
  1930. ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
  1931. goto err_release_fw;
  1932. }
  1933. status = ath10k_debug_register(ar);
  1934. if (status) {
  1935. ath10k_err(ar, "unable to initialize debugfs\n");
  1936. goto err_unregister_mac;
  1937. }
  1938. status = ath10k_spectral_create(ar);
  1939. if (status) {
  1940. ath10k_err(ar, "failed to initialize spectral\n");
  1941. goto err_debug_destroy;
  1942. }
  1943. status = ath10k_thermal_register(ar);
  1944. if (status) {
  1945. ath10k_err(ar, "could not register thermal device: %d\n",
  1946. status);
  1947. goto err_spectral_destroy;
  1948. }
  1949. set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
  1950. return;
  1951. err_spectral_destroy:
  1952. ath10k_spectral_destroy(ar);
  1953. err_debug_destroy:
  1954. ath10k_debug_destroy(ar);
  1955. err_unregister_mac:
  1956. ath10k_mac_unregister(ar);
  1957. err_release_fw:
  1958. ath10k_core_free_firmware_files(ar);
  1959. err:
  1960. /* TODO: It's probably a good idea to release device from the driver
  1961. * but calling device_release_driver() here will cause a deadlock.
  1962. */
  1963. return;
  1964. }
  1965. int ath10k_core_register(struct ath10k *ar, u32 chip_id)
  1966. {
  1967. ar->chip_id = chip_id;
  1968. queue_work(ar->workqueue, &ar->register_work);
  1969. return 0;
  1970. }
  1971. EXPORT_SYMBOL(ath10k_core_register);
  1972. void ath10k_core_unregister(struct ath10k *ar)
  1973. {
  1974. cancel_work_sync(&ar->register_work);
  1975. if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
  1976. return;
  1977. ath10k_thermal_unregister(ar);
  1978. /* Stop spectral before unregistering from mac80211 to remove the
  1979. * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
  1980. * would be already be free'd recursively, leading to a double free.
  1981. */
  1982. ath10k_spectral_destroy(ar);
  1983. /* We must unregister from mac80211 before we stop HTC and HIF.
  1984. * Otherwise we will fail to submit commands to FW and mac80211 will be
  1985. * unhappy about callback failures. */
  1986. ath10k_mac_unregister(ar);
  1987. ath10k_testmode_destroy(ar);
  1988. ath10k_core_free_firmware_files(ar);
  1989. ath10k_core_free_board_files(ar);
  1990. ath10k_debug_unregister(ar);
  1991. }
  1992. EXPORT_SYMBOL(ath10k_core_unregister);
  1993. struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
  1994. enum ath10k_bus bus,
  1995. enum ath10k_hw_rev hw_rev,
  1996. const struct ath10k_hif_ops *hif_ops)
  1997. {
  1998. struct ath10k *ar;
  1999. int ret;
  2000. ar = ath10k_mac_create(priv_size);
  2001. if (!ar)
  2002. return NULL;
  2003. ar->ath_common.priv = ar;
  2004. ar->ath_common.hw = ar->hw;
  2005. ar->dev = dev;
  2006. ar->hw_rev = hw_rev;
  2007. ar->hif.ops = hif_ops;
  2008. ar->hif.bus = bus;
  2009. switch (hw_rev) {
  2010. case ATH10K_HW_QCA988X:
  2011. case ATH10K_HW_QCA9887:
  2012. ar->regs = &qca988x_regs;
  2013. ar->hw_values = &qca988x_values;
  2014. break;
  2015. case ATH10K_HW_QCA6174:
  2016. case ATH10K_HW_QCA9377:
  2017. ar->regs = &qca6174_regs;
  2018. ar->hw_values = &qca6174_values;
  2019. break;
  2020. case ATH10K_HW_QCA99X0:
  2021. case ATH10K_HW_QCA9984:
  2022. ar->regs = &qca99x0_regs;
  2023. ar->hw_values = &qca99x0_values;
  2024. break;
  2025. case ATH10K_HW_QCA9888:
  2026. ar->regs = &qca99x0_regs;
  2027. ar->hw_values = &qca9888_values;
  2028. break;
  2029. case ATH10K_HW_QCA4019:
  2030. ar->regs = &qca4019_regs;
  2031. ar->hw_values = &qca4019_values;
  2032. break;
  2033. default:
  2034. ath10k_err(ar, "unsupported core hardware revision %d\n",
  2035. hw_rev);
  2036. ret = -ENOTSUPP;
  2037. goto err_free_mac;
  2038. }
  2039. init_completion(&ar->scan.started);
  2040. init_completion(&ar->scan.completed);
  2041. init_completion(&ar->scan.on_channel);
  2042. init_completion(&ar->target_suspend);
  2043. init_completion(&ar->wow.wakeup_completed);
  2044. init_completion(&ar->install_key_done);
  2045. init_completion(&ar->vdev_setup_done);
  2046. init_completion(&ar->thermal.wmi_sync);
  2047. init_completion(&ar->bss_survey_done);
  2048. INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
  2049. ar->workqueue = create_singlethread_workqueue("ath10k_wq");
  2050. if (!ar->workqueue)
  2051. goto err_free_mac;
  2052. ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
  2053. if (!ar->workqueue_aux)
  2054. goto err_free_wq;
  2055. mutex_init(&ar->conf_mutex);
  2056. spin_lock_init(&ar->data_lock);
  2057. spin_lock_init(&ar->txqs_lock);
  2058. INIT_LIST_HEAD(&ar->txqs);
  2059. INIT_LIST_HEAD(&ar->peers);
  2060. init_waitqueue_head(&ar->peer_mapping_wq);
  2061. init_waitqueue_head(&ar->htt.empty_tx_wq);
  2062. init_waitqueue_head(&ar->wmi.tx_credits_wq);
  2063. init_completion(&ar->offchan_tx_completed);
  2064. INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
  2065. skb_queue_head_init(&ar->offchan_tx_queue);
  2066. INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
  2067. skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
  2068. INIT_WORK(&ar->register_work, ath10k_core_register_work);
  2069. INIT_WORK(&ar->restart_work, ath10k_core_restart);
  2070. INIT_WORK(&ar->set_coverage_class_work,
  2071. ath10k_core_set_coverage_class_work);
  2072. init_dummy_netdev(&ar->napi_dev);
  2073. ret = ath10k_debug_create(ar);
  2074. if (ret)
  2075. goto err_free_aux_wq;
  2076. return ar;
  2077. err_free_aux_wq:
  2078. destroy_workqueue(ar->workqueue_aux);
  2079. err_free_wq:
  2080. destroy_workqueue(ar->workqueue);
  2081. err_free_mac:
  2082. ath10k_mac_destroy(ar);
  2083. return NULL;
  2084. }
  2085. EXPORT_SYMBOL(ath10k_core_create);
  2086. void ath10k_core_destroy(struct ath10k *ar)
  2087. {
  2088. flush_workqueue(ar->workqueue);
  2089. destroy_workqueue(ar->workqueue);
  2090. flush_workqueue(ar->workqueue_aux);
  2091. destroy_workqueue(ar->workqueue_aux);
  2092. ath10k_debug_destroy(ar);
  2093. ath10k_htt_tx_destroy(&ar->htt);
  2094. ath10k_wmi_free_host_mem(ar);
  2095. ath10k_mac_destroy(ar);
  2096. }
  2097. EXPORT_SYMBOL(ath10k_core_destroy);
  2098. MODULE_AUTHOR("Qualcomm Atheros");
  2099. MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards.");
  2100. MODULE_LICENSE("Dual BSD/GPL");