qede_main.c 52 KB

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  1. /* QLogic qede NIC Driver
  2. * Copyright (c) 2015-2017 QLogic Corporation
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and /or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/module.h>
  33. #include <linux/pci.h>
  34. #include <linux/version.h>
  35. #include <linux/device.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/etherdevice.h>
  38. #include <linux/skbuff.h>
  39. #include <linux/errno.h>
  40. #include <linux/list.h>
  41. #include <linux/string.h>
  42. #include <linux/dma-mapping.h>
  43. #include <linux/interrupt.h>
  44. #include <asm/byteorder.h>
  45. #include <asm/param.h>
  46. #include <linux/io.h>
  47. #include <linux/netdev_features.h>
  48. #include <linux/udp.h>
  49. #include <linux/tcp.h>
  50. #include <net/udp_tunnel.h>
  51. #include <linux/ip.h>
  52. #include <net/ipv6.h>
  53. #include <net/tcp.h>
  54. #include <linux/if_ether.h>
  55. #include <linux/if_vlan.h>
  56. #include <linux/pkt_sched.h>
  57. #include <linux/ethtool.h>
  58. #include <linux/in.h>
  59. #include <linux/random.h>
  60. #include <net/ip6_checksum.h>
  61. #include <linux/bitops.h>
  62. #include <linux/vmalloc.h>
  63. #include <linux/qed/qede_roce.h>
  64. #include "qede.h"
  65. #include "qede_ptp.h"
  66. static char version[] =
  67. "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
  68. MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
  69. MODULE_LICENSE("GPL");
  70. MODULE_VERSION(DRV_MODULE_VERSION);
  71. static uint debug;
  72. module_param(debug, uint, 0);
  73. MODULE_PARM_DESC(debug, " Default debug msglevel");
  74. static const struct qed_eth_ops *qed_ops;
  75. #define CHIP_NUM_57980S_40 0x1634
  76. #define CHIP_NUM_57980S_10 0x1666
  77. #define CHIP_NUM_57980S_MF 0x1636
  78. #define CHIP_NUM_57980S_100 0x1644
  79. #define CHIP_NUM_57980S_50 0x1654
  80. #define CHIP_NUM_57980S_25 0x1656
  81. #define CHIP_NUM_57980S_IOV 0x1664
  82. #ifndef PCI_DEVICE_ID_NX2_57980E
  83. #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
  84. #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
  85. #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
  86. #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
  87. #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
  88. #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
  89. #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
  90. #endif
  91. enum qede_pci_private {
  92. QEDE_PRIVATE_PF,
  93. QEDE_PRIVATE_VF
  94. };
  95. static const struct pci_device_id qede_pci_tbl[] = {
  96. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
  97. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
  98. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
  99. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
  100. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
  101. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
  102. #ifdef CONFIG_QED_SRIOV
  103. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
  104. #endif
  105. { 0 }
  106. };
  107. MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
  108. static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
  109. #define TX_TIMEOUT (5 * HZ)
  110. /* Utilize last protocol index for XDP */
  111. #define XDP_PI 11
  112. static void qede_remove(struct pci_dev *pdev);
  113. static void qede_shutdown(struct pci_dev *pdev);
  114. static void qede_link_update(void *dev, struct qed_link_output *link);
  115. /* The qede lock is used to protect driver state change and driver flows that
  116. * are not reentrant.
  117. */
  118. void __qede_lock(struct qede_dev *edev)
  119. {
  120. mutex_lock(&edev->qede_lock);
  121. }
  122. void __qede_unlock(struct qede_dev *edev)
  123. {
  124. mutex_unlock(&edev->qede_lock);
  125. }
  126. #ifdef CONFIG_QED_SRIOV
  127. static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos,
  128. __be16 vlan_proto)
  129. {
  130. struct qede_dev *edev = netdev_priv(ndev);
  131. if (vlan > 4095) {
  132. DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
  133. return -EINVAL;
  134. }
  135. if (vlan_proto != htons(ETH_P_8021Q))
  136. return -EPROTONOSUPPORT;
  137. DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
  138. vlan, vf);
  139. return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
  140. }
  141. static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
  142. {
  143. struct qede_dev *edev = netdev_priv(ndev);
  144. DP_VERBOSE(edev, QED_MSG_IOV,
  145. "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n",
  146. mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx);
  147. if (!is_valid_ether_addr(mac)) {
  148. DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
  149. return -EINVAL;
  150. }
  151. return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
  152. }
  153. static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
  154. {
  155. struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
  156. struct qed_dev_info *qed_info = &edev->dev_info.common;
  157. struct qed_update_vport_params *vport_params;
  158. int rc;
  159. vport_params = vzalloc(sizeof(*vport_params));
  160. if (!vport_params)
  161. return -ENOMEM;
  162. DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
  163. rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
  164. /* Enable/Disable Tx switching for PF */
  165. if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
  166. qed_info->mf_mode != QED_MF_NPAR && qed_info->tx_switching) {
  167. vport_params->vport_id = 0;
  168. vport_params->update_tx_switching_flg = 1;
  169. vport_params->tx_switching_flg = num_vfs_param ? 1 : 0;
  170. edev->ops->vport_update(edev->cdev, vport_params);
  171. }
  172. vfree(vport_params);
  173. return rc;
  174. }
  175. #endif
  176. static struct pci_driver qede_pci_driver = {
  177. .name = "qede",
  178. .id_table = qede_pci_tbl,
  179. .probe = qede_probe,
  180. .remove = qede_remove,
  181. .shutdown = qede_shutdown,
  182. #ifdef CONFIG_QED_SRIOV
  183. .sriov_configure = qede_sriov_configure,
  184. #endif
  185. };
  186. static struct qed_eth_cb_ops qede_ll_ops = {
  187. {
  188. .link_update = qede_link_update,
  189. },
  190. .force_mac = qede_force_mac,
  191. };
  192. static int qede_netdev_event(struct notifier_block *this, unsigned long event,
  193. void *ptr)
  194. {
  195. struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
  196. struct ethtool_drvinfo drvinfo;
  197. struct qede_dev *edev;
  198. if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR)
  199. goto done;
  200. /* Check whether this is a qede device */
  201. if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
  202. goto done;
  203. memset(&drvinfo, 0, sizeof(drvinfo));
  204. ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
  205. if (strcmp(drvinfo.driver, "qede"))
  206. goto done;
  207. edev = netdev_priv(ndev);
  208. switch (event) {
  209. case NETDEV_CHANGENAME:
  210. /* Notify qed of the name change */
  211. if (!edev->ops || !edev->ops->common)
  212. goto done;
  213. edev->ops->common->set_id(edev->cdev, edev->ndev->name, "qede");
  214. break;
  215. case NETDEV_CHANGEADDR:
  216. edev = netdev_priv(ndev);
  217. qede_roce_event_changeaddr(edev);
  218. break;
  219. }
  220. done:
  221. return NOTIFY_DONE;
  222. }
  223. static struct notifier_block qede_netdev_notifier = {
  224. .notifier_call = qede_netdev_event,
  225. };
  226. static
  227. int __init qede_init(void)
  228. {
  229. int ret;
  230. pr_info("qede_init: %s\n", version);
  231. qed_ops = qed_get_eth_ops();
  232. if (!qed_ops) {
  233. pr_notice("Failed to get qed ethtool operations\n");
  234. return -EINVAL;
  235. }
  236. /* Must register notifier before pci ops, since we might miss
  237. * interface rename after pci probe and netdev registeration.
  238. */
  239. ret = register_netdevice_notifier(&qede_netdev_notifier);
  240. if (ret) {
  241. pr_notice("Failed to register netdevice_notifier\n");
  242. qed_put_eth_ops();
  243. return -EINVAL;
  244. }
  245. ret = pci_register_driver(&qede_pci_driver);
  246. if (ret) {
  247. pr_notice("Failed to register driver\n");
  248. unregister_netdevice_notifier(&qede_netdev_notifier);
  249. qed_put_eth_ops();
  250. return -EINVAL;
  251. }
  252. return 0;
  253. }
  254. static void __exit qede_cleanup(void)
  255. {
  256. if (debug & QED_LOG_INFO_MASK)
  257. pr_info("qede_cleanup called\n");
  258. unregister_netdevice_notifier(&qede_netdev_notifier);
  259. pci_unregister_driver(&qede_pci_driver);
  260. qed_put_eth_ops();
  261. }
  262. module_init(qede_init);
  263. module_exit(qede_cleanup);
  264. static int qede_open(struct net_device *ndev);
  265. static int qede_close(struct net_device *ndev);
  266. void qede_fill_by_demand_stats(struct qede_dev *edev)
  267. {
  268. struct qed_eth_stats stats;
  269. edev->ops->get_vport_stats(edev->cdev, &stats);
  270. edev->stats.no_buff_discards = stats.no_buff_discards;
  271. edev->stats.packet_too_big_discard = stats.packet_too_big_discard;
  272. edev->stats.ttl0_discard = stats.ttl0_discard;
  273. edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
  274. edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
  275. edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
  276. edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
  277. edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
  278. edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
  279. edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
  280. edev->stats.mac_filter_discards = stats.mac_filter_discards;
  281. edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
  282. edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
  283. edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
  284. edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
  285. edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
  286. edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
  287. edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
  288. edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
  289. edev->stats.coalesced_events = stats.tpa_coalesced_events;
  290. edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
  291. edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
  292. edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
  293. edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
  294. edev->stats.rx_65_to_127_byte_packets = stats.rx_65_to_127_byte_packets;
  295. edev->stats.rx_128_to_255_byte_packets =
  296. stats.rx_128_to_255_byte_packets;
  297. edev->stats.rx_256_to_511_byte_packets =
  298. stats.rx_256_to_511_byte_packets;
  299. edev->stats.rx_512_to_1023_byte_packets =
  300. stats.rx_512_to_1023_byte_packets;
  301. edev->stats.rx_1024_to_1518_byte_packets =
  302. stats.rx_1024_to_1518_byte_packets;
  303. edev->stats.rx_1519_to_1522_byte_packets =
  304. stats.rx_1519_to_1522_byte_packets;
  305. edev->stats.rx_1519_to_2047_byte_packets =
  306. stats.rx_1519_to_2047_byte_packets;
  307. edev->stats.rx_2048_to_4095_byte_packets =
  308. stats.rx_2048_to_4095_byte_packets;
  309. edev->stats.rx_4096_to_9216_byte_packets =
  310. stats.rx_4096_to_9216_byte_packets;
  311. edev->stats.rx_9217_to_16383_byte_packets =
  312. stats.rx_9217_to_16383_byte_packets;
  313. edev->stats.rx_crc_errors = stats.rx_crc_errors;
  314. edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
  315. edev->stats.rx_pause_frames = stats.rx_pause_frames;
  316. edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
  317. edev->stats.rx_align_errors = stats.rx_align_errors;
  318. edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
  319. edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
  320. edev->stats.rx_jabbers = stats.rx_jabbers;
  321. edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
  322. edev->stats.rx_fragments = stats.rx_fragments;
  323. edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
  324. edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
  325. edev->stats.tx_128_to_255_byte_packets =
  326. stats.tx_128_to_255_byte_packets;
  327. edev->stats.tx_256_to_511_byte_packets =
  328. stats.tx_256_to_511_byte_packets;
  329. edev->stats.tx_512_to_1023_byte_packets =
  330. stats.tx_512_to_1023_byte_packets;
  331. edev->stats.tx_1024_to_1518_byte_packets =
  332. stats.tx_1024_to_1518_byte_packets;
  333. edev->stats.tx_1519_to_2047_byte_packets =
  334. stats.tx_1519_to_2047_byte_packets;
  335. edev->stats.tx_2048_to_4095_byte_packets =
  336. stats.tx_2048_to_4095_byte_packets;
  337. edev->stats.tx_4096_to_9216_byte_packets =
  338. stats.tx_4096_to_9216_byte_packets;
  339. edev->stats.tx_9217_to_16383_byte_packets =
  340. stats.tx_9217_to_16383_byte_packets;
  341. edev->stats.tx_pause_frames = stats.tx_pause_frames;
  342. edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
  343. edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
  344. edev->stats.tx_total_collisions = stats.tx_total_collisions;
  345. edev->stats.brb_truncates = stats.brb_truncates;
  346. edev->stats.brb_discards = stats.brb_discards;
  347. edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
  348. }
  349. static void qede_get_stats64(struct net_device *dev,
  350. struct rtnl_link_stats64 *stats)
  351. {
  352. struct qede_dev *edev = netdev_priv(dev);
  353. qede_fill_by_demand_stats(edev);
  354. stats->rx_packets = edev->stats.rx_ucast_pkts +
  355. edev->stats.rx_mcast_pkts +
  356. edev->stats.rx_bcast_pkts;
  357. stats->tx_packets = edev->stats.tx_ucast_pkts +
  358. edev->stats.tx_mcast_pkts +
  359. edev->stats.tx_bcast_pkts;
  360. stats->rx_bytes = edev->stats.rx_ucast_bytes +
  361. edev->stats.rx_mcast_bytes +
  362. edev->stats.rx_bcast_bytes;
  363. stats->tx_bytes = edev->stats.tx_ucast_bytes +
  364. edev->stats.tx_mcast_bytes +
  365. edev->stats.tx_bcast_bytes;
  366. stats->tx_errors = edev->stats.tx_err_drop_pkts;
  367. stats->multicast = edev->stats.rx_mcast_pkts +
  368. edev->stats.rx_bcast_pkts;
  369. stats->rx_fifo_errors = edev->stats.no_buff_discards;
  370. stats->collisions = edev->stats.tx_total_collisions;
  371. stats->rx_crc_errors = edev->stats.rx_crc_errors;
  372. stats->rx_frame_errors = edev->stats.rx_align_errors;
  373. }
  374. #ifdef CONFIG_QED_SRIOV
  375. static int qede_get_vf_config(struct net_device *dev, int vfidx,
  376. struct ifla_vf_info *ivi)
  377. {
  378. struct qede_dev *edev = netdev_priv(dev);
  379. if (!edev->ops)
  380. return -EINVAL;
  381. return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
  382. }
  383. static int qede_set_vf_rate(struct net_device *dev, int vfidx,
  384. int min_tx_rate, int max_tx_rate)
  385. {
  386. struct qede_dev *edev = netdev_priv(dev);
  387. return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
  388. max_tx_rate);
  389. }
  390. static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
  391. {
  392. struct qede_dev *edev = netdev_priv(dev);
  393. if (!edev->ops)
  394. return -EINVAL;
  395. return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
  396. }
  397. static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
  398. int link_state)
  399. {
  400. struct qede_dev *edev = netdev_priv(dev);
  401. if (!edev->ops)
  402. return -EINVAL;
  403. return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
  404. }
  405. static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting)
  406. {
  407. struct qede_dev *edev = netdev_priv(dev);
  408. if (!edev->ops)
  409. return -EINVAL;
  410. return edev->ops->iov->set_trust(edev->cdev, vfidx, setting);
  411. }
  412. #endif
  413. static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  414. {
  415. struct qede_dev *edev = netdev_priv(dev);
  416. if (!netif_running(dev))
  417. return -EAGAIN;
  418. switch (cmd) {
  419. case SIOCSHWTSTAMP:
  420. return qede_ptp_hw_ts(edev, ifr);
  421. default:
  422. DP_VERBOSE(edev, QED_MSG_DEBUG,
  423. "default IOCTL cmd 0x%x\n", cmd);
  424. return -EOPNOTSUPP;
  425. }
  426. return 0;
  427. }
  428. static const struct net_device_ops qede_netdev_ops = {
  429. .ndo_open = qede_open,
  430. .ndo_stop = qede_close,
  431. .ndo_start_xmit = qede_start_xmit,
  432. .ndo_set_rx_mode = qede_set_rx_mode,
  433. .ndo_set_mac_address = qede_set_mac_addr,
  434. .ndo_validate_addr = eth_validate_addr,
  435. .ndo_change_mtu = qede_change_mtu,
  436. .ndo_do_ioctl = qede_ioctl,
  437. #ifdef CONFIG_QED_SRIOV
  438. .ndo_set_vf_mac = qede_set_vf_mac,
  439. .ndo_set_vf_vlan = qede_set_vf_vlan,
  440. .ndo_set_vf_trust = qede_set_vf_trust,
  441. #endif
  442. .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
  443. .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
  444. .ndo_set_features = qede_set_features,
  445. .ndo_get_stats64 = qede_get_stats64,
  446. #ifdef CONFIG_QED_SRIOV
  447. .ndo_set_vf_link_state = qede_set_vf_link_state,
  448. .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
  449. .ndo_get_vf_config = qede_get_vf_config,
  450. .ndo_set_vf_rate = qede_set_vf_rate,
  451. #endif
  452. .ndo_udp_tunnel_add = qede_udp_tunnel_add,
  453. .ndo_udp_tunnel_del = qede_udp_tunnel_del,
  454. .ndo_features_check = qede_features_check,
  455. .ndo_xdp = qede_xdp,
  456. };
  457. /* -------------------------------------------------------------------------
  458. * START OF PROBE / REMOVE
  459. * -------------------------------------------------------------------------
  460. */
  461. static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
  462. struct pci_dev *pdev,
  463. struct qed_dev_eth_info *info,
  464. u32 dp_module, u8 dp_level)
  465. {
  466. struct net_device *ndev;
  467. struct qede_dev *edev;
  468. ndev = alloc_etherdev_mqs(sizeof(*edev),
  469. info->num_queues, info->num_queues);
  470. if (!ndev) {
  471. pr_err("etherdev allocation failed\n");
  472. return NULL;
  473. }
  474. edev = netdev_priv(ndev);
  475. edev->ndev = ndev;
  476. edev->cdev = cdev;
  477. edev->pdev = pdev;
  478. edev->dp_module = dp_module;
  479. edev->dp_level = dp_level;
  480. edev->ops = qed_ops;
  481. edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
  482. edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
  483. DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n",
  484. info->num_queues, info->num_queues);
  485. SET_NETDEV_DEV(ndev, &pdev->dev);
  486. memset(&edev->stats, 0, sizeof(edev->stats));
  487. memcpy(&edev->dev_info, info, sizeof(*info));
  488. INIT_LIST_HEAD(&edev->vlan_list);
  489. return edev;
  490. }
  491. static void qede_init_ndev(struct qede_dev *edev)
  492. {
  493. struct net_device *ndev = edev->ndev;
  494. struct pci_dev *pdev = edev->pdev;
  495. u32 hw_features;
  496. pci_set_drvdata(pdev, ndev);
  497. ndev->mem_start = edev->dev_info.common.pci_mem_start;
  498. ndev->base_addr = ndev->mem_start;
  499. ndev->mem_end = edev->dev_info.common.pci_mem_end;
  500. ndev->irq = edev->dev_info.common.pci_irq;
  501. ndev->watchdog_timeo = TX_TIMEOUT;
  502. ndev->netdev_ops = &qede_netdev_ops;
  503. qede_set_ethtool_ops(ndev);
  504. ndev->priv_flags |= IFF_UNICAST_FLT;
  505. /* user-changeble features */
  506. hw_features = NETIF_F_GRO | NETIF_F_SG |
  507. NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
  508. NETIF_F_TSO | NETIF_F_TSO6;
  509. /* Encap features*/
  510. hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL |
  511. NETIF_F_TSO_ECN | NETIF_F_GSO_UDP_TUNNEL_CSUM |
  512. NETIF_F_GSO_GRE_CSUM;
  513. ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
  514. NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO_ECN |
  515. NETIF_F_TSO6 | NETIF_F_GSO_GRE |
  516. NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RXCSUM |
  517. NETIF_F_GSO_UDP_TUNNEL_CSUM |
  518. NETIF_F_GSO_GRE_CSUM;
  519. ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
  520. NETIF_F_HIGHDMA;
  521. ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
  522. NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
  523. NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
  524. ndev->hw_features = hw_features;
  525. /* MTU range: 46 - 9600 */
  526. ndev->min_mtu = ETH_ZLEN - ETH_HLEN;
  527. ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE;
  528. /* Set network device HW mac */
  529. ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
  530. ndev->mtu = edev->dev_info.common.mtu;
  531. }
  532. /* This function converts from 32b param to two params of level and module
  533. * Input 32b decoding:
  534. * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
  535. * 'happy' flow, e.g. memory allocation failed.
  536. * b30 - enable all INFO prints. INFO prints are for major steps in the flow
  537. * and provide important parameters.
  538. * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
  539. * module. VERBOSE prints are for tracking the specific flow in low level.
  540. *
  541. * Notice that the level should be that of the lowest required logs.
  542. */
  543. void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
  544. {
  545. *p_dp_level = QED_LEVEL_NOTICE;
  546. *p_dp_module = 0;
  547. if (debug & QED_LOG_VERBOSE_MASK) {
  548. *p_dp_level = QED_LEVEL_VERBOSE;
  549. *p_dp_module = (debug & 0x3FFFFFFF);
  550. } else if (debug & QED_LOG_INFO_MASK) {
  551. *p_dp_level = QED_LEVEL_INFO;
  552. } else if (debug & QED_LOG_NOTICE_MASK) {
  553. *p_dp_level = QED_LEVEL_NOTICE;
  554. }
  555. }
  556. static void qede_free_fp_array(struct qede_dev *edev)
  557. {
  558. if (edev->fp_array) {
  559. struct qede_fastpath *fp;
  560. int i;
  561. for_each_queue(i) {
  562. fp = &edev->fp_array[i];
  563. kfree(fp->sb_info);
  564. kfree(fp->rxq);
  565. kfree(fp->xdp_tx);
  566. kfree(fp->txq);
  567. }
  568. kfree(edev->fp_array);
  569. }
  570. edev->num_queues = 0;
  571. edev->fp_num_tx = 0;
  572. edev->fp_num_rx = 0;
  573. }
  574. static int qede_alloc_fp_array(struct qede_dev *edev)
  575. {
  576. u8 fp_combined, fp_rx = edev->fp_num_rx;
  577. struct qede_fastpath *fp;
  578. int i;
  579. edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev),
  580. sizeof(*edev->fp_array), GFP_KERNEL);
  581. if (!edev->fp_array) {
  582. DP_NOTICE(edev, "fp array allocation failed\n");
  583. goto err;
  584. }
  585. fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx;
  586. /* Allocate the FP elements for Rx queues followed by combined and then
  587. * the Tx. This ordering should be maintained so that the respective
  588. * queues (Rx or Tx) will be together in the fastpath array and the
  589. * associated ids will be sequential.
  590. */
  591. for_each_queue(i) {
  592. fp = &edev->fp_array[i];
  593. fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL);
  594. if (!fp->sb_info) {
  595. DP_NOTICE(edev, "sb info struct allocation failed\n");
  596. goto err;
  597. }
  598. if (fp_rx) {
  599. fp->type = QEDE_FASTPATH_RX;
  600. fp_rx--;
  601. } else if (fp_combined) {
  602. fp->type = QEDE_FASTPATH_COMBINED;
  603. fp_combined--;
  604. } else {
  605. fp->type = QEDE_FASTPATH_TX;
  606. }
  607. if (fp->type & QEDE_FASTPATH_TX) {
  608. fp->txq = kzalloc(sizeof(*fp->txq), GFP_KERNEL);
  609. if (!fp->txq)
  610. goto err;
  611. }
  612. if (fp->type & QEDE_FASTPATH_RX) {
  613. fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL);
  614. if (!fp->rxq)
  615. goto err;
  616. if (edev->xdp_prog) {
  617. fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx),
  618. GFP_KERNEL);
  619. if (!fp->xdp_tx)
  620. goto err;
  621. fp->type |= QEDE_FASTPATH_XDP;
  622. }
  623. }
  624. }
  625. return 0;
  626. err:
  627. qede_free_fp_array(edev);
  628. return -ENOMEM;
  629. }
  630. static void qede_sp_task(struct work_struct *work)
  631. {
  632. struct qede_dev *edev = container_of(work, struct qede_dev,
  633. sp_task.work);
  634. struct qed_dev *cdev = edev->cdev;
  635. __qede_lock(edev);
  636. if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
  637. if (edev->state == QEDE_STATE_OPEN)
  638. qede_config_rx_mode(edev->ndev);
  639. if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) {
  640. struct qed_tunn_params tunn_params;
  641. memset(&tunn_params, 0, sizeof(tunn_params));
  642. tunn_params.update_vxlan_port = 1;
  643. tunn_params.vxlan_port = edev->vxlan_dst_port;
  644. qed_ops->tunn_config(cdev, &tunn_params);
  645. }
  646. if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) {
  647. struct qed_tunn_params tunn_params;
  648. memset(&tunn_params, 0, sizeof(tunn_params));
  649. tunn_params.update_geneve_port = 1;
  650. tunn_params.geneve_port = edev->geneve_dst_port;
  651. qed_ops->tunn_config(cdev, &tunn_params);
  652. }
  653. __qede_unlock(edev);
  654. }
  655. static void qede_update_pf_params(struct qed_dev *cdev)
  656. {
  657. struct qed_pf_params pf_params;
  658. /* 64 rx + 64 tx + 64 XDP */
  659. memset(&pf_params, 0, sizeof(struct qed_pf_params));
  660. pf_params.eth_pf_params.num_cons = (MAX_SB_PER_PF_MIMD - 1) * 3;
  661. qed_ops->common->update_pf_params(cdev, &pf_params);
  662. }
  663. enum qede_probe_mode {
  664. QEDE_PROBE_NORMAL,
  665. };
  666. static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
  667. bool is_vf, enum qede_probe_mode mode)
  668. {
  669. struct qed_probe_params probe_params;
  670. struct qed_slowpath_params sp_params;
  671. struct qed_dev_eth_info dev_info;
  672. struct qede_dev *edev;
  673. struct qed_dev *cdev;
  674. int rc;
  675. if (unlikely(dp_level & QED_LEVEL_INFO))
  676. pr_notice("Starting qede probe\n");
  677. memset(&probe_params, 0, sizeof(probe_params));
  678. probe_params.protocol = QED_PROTOCOL_ETH;
  679. probe_params.dp_module = dp_module;
  680. probe_params.dp_level = dp_level;
  681. probe_params.is_vf = is_vf;
  682. cdev = qed_ops->common->probe(pdev, &probe_params);
  683. if (!cdev) {
  684. rc = -ENODEV;
  685. goto err0;
  686. }
  687. qede_update_pf_params(cdev);
  688. /* Start the Slowpath-process */
  689. memset(&sp_params, 0, sizeof(sp_params));
  690. sp_params.int_mode = QED_INT_MODE_MSIX;
  691. sp_params.drv_major = QEDE_MAJOR_VERSION;
  692. sp_params.drv_minor = QEDE_MINOR_VERSION;
  693. sp_params.drv_rev = QEDE_REVISION_VERSION;
  694. sp_params.drv_eng = QEDE_ENGINEERING_VERSION;
  695. strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
  696. rc = qed_ops->common->slowpath_start(cdev, &sp_params);
  697. if (rc) {
  698. pr_notice("Cannot start slowpath\n");
  699. goto err1;
  700. }
  701. /* Learn information crucial for qede to progress */
  702. rc = qed_ops->fill_dev_info(cdev, &dev_info);
  703. if (rc)
  704. goto err2;
  705. edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
  706. dp_level);
  707. if (!edev) {
  708. rc = -ENOMEM;
  709. goto err2;
  710. }
  711. if (is_vf)
  712. edev->flags |= QEDE_FLAG_IS_VF;
  713. qede_init_ndev(edev);
  714. rc = qede_roce_dev_add(edev);
  715. if (rc)
  716. goto err3;
  717. /* Prepare the lock prior to the registeration of the netdev,
  718. * as once it's registered we might reach flows requiring it
  719. * [it's even possible to reach a flow needing it directly
  720. * from there, although it's unlikely].
  721. */
  722. INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
  723. mutex_init(&edev->qede_lock);
  724. rc = register_netdev(edev->ndev);
  725. if (rc) {
  726. DP_NOTICE(edev, "Cannot register net-device\n");
  727. goto err4;
  728. }
  729. edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
  730. /* PTP not supported on VFs */
  731. if (!is_vf) {
  732. rc = qede_ptp_register_phc(edev);
  733. if (rc) {
  734. DP_NOTICE(edev, "Cannot register PHC\n");
  735. goto err5;
  736. }
  737. }
  738. edev->ops->register_ops(cdev, &qede_ll_ops, edev);
  739. #ifdef CONFIG_DCB
  740. if (!IS_VF(edev))
  741. qede_set_dcbnl_ops(edev->ndev);
  742. #endif
  743. edev->rx_copybreak = QEDE_RX_HDR_SIZE;
  744. DP_INFO(edev, "Ending successfully qede probe\n");
  745. return 0;
  746. err5:
  747. unregister_netdev(edev->ndev);
  748. err4:
  749. qede_roce_dev_remove(edev);
  750. err3:
  751. free_netdev(edev->ndev);
  752. err2:
  753. qed_ops->common->slowpath_stop(cdev);
  754. err1:
  755. qed_ops->common->remove(cdev);
  756. err0:
  757. return rc;
  758. }
  759. static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  760. {
  761. bool is_vf = false;
  762. u32 dp_module = 0;
  763. u8 dp_level = 0;
  764. switch ((enum qede_pci_private)id->driver_data) {
  765. case QEDE_PRIVATE_VF:
  766. if (debug & QED_LOG_VERBOSE_MASK)
  767. dev_err(&pdev->dev, "Probing a VF\n");
  768. is_vf = true;
  769. break;
  770. default:
  771. if (debug & QED_LOG_VERBOSE_MASK)
  772. dev_err(&pdev->dev, "Probing a PF\n");
  773. }
  774. qede_config_debug(debug, &dp_module, &dp_level);
  775. return __qede_probe(pdev, dp_module, dp_level, is_vf,
  776. QEDE_PROBE_NORMAL);
  777. }
  778. enum qede_remove_mode {
  779. QEDE_REMOVE_NORMAL,
  780. };
  781. static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
  782. {
  783. struct net_device *ndev = pci_get_drvdata(pdev);
  784. struct qede_dev *edev = netdev_priv(ndev);
  785. struct qed_dev *cdev = edev->cdev;
  786. DP_INFO(edev, "Starting qede_remove\n");
  787. cancel_delayed_work_sync(&edev->sp_task);
  788. unregister_netdev(ndev);
  789. qede_ptp_remove(edev);
  790. qede_roce_dev_remove(edev);
  791. edev->ops->common->set_power_state(cdev, PCI_D0);
  792. pci_set_drvdata(pdev, NULL);
  793. /* Release edev's reference to XDP's bpf if such exist */
  794. if (edev->xdp_prog)
  795. bpf_prog_put(edev->xdp_prog);
  796. /* Use global ops since we've freed edev */
  797. qed_ops->common->slowpath_stop(cdev);
  798. if (system_state == SYSTEM_POWER_OFF)
  799. return;
  800. qed_ops->common->remove(cdev);
  801. /* Since this can happen out-of-sync with other flows,
  802. * don't release the netdevice until after slowpath stop
  803. * has been called to guarantee various other contexts
  804. * [e.g., QED register callbacks] won't break anything when
  805. * accessing the netdevice.
  806. */
  807. free_netdev(ndev);
  808. dev_info(&pdev->dev, "Ending qede_remove successfully\n");
  809. }
  810. static void qede_remove(struct pci_dev *pdev)
  811. {
  812. __qede_remove(pdev, QEDE_REMOVE_NORMAL);
  813. }
  814. static void qede_shutdown(struct pci_dev *pdev)
  815. {
  816. __qede_remove(pdev, QEDE_REMOVE_NORMAL);
  817. }
  818. /* -------------------------------------------------------------------------
  819. * START OF LOAD / UNLOAD
  820. * -------------------------------------------------------------------------
  821. */
  822. static int qede_set_num_queues(struct qede_dev *edev)
  823. {
  824. int rc;
  825. u16 rss_num;
  826. /* Setup queues according to possible resources*/
  827. if (edev->req_queues)
  828. rss_num = edev->req_queues;
  829. else
  830. rss_num = netif_get_num_default_rss_queues() *
  831. edev->dev_info.common.num_hwfns;
  832. rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
  833. rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
  834. if (rc > 0) {
  835. /* Managed to request interrupts for our queues */
  836. edev->num_queues = rc;
  837. DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
  838. QEDE_QUEUE_CNT(edev), rss_num);
  839. rc = 0;
  840. }
  841. edev->fp_num_tx = edev->req_num_tx;
  842. edev->fp_num_rx = edev->req_num_rx;
  843. return rc;
  844. }
  845. static void qede_free_mem_sb(struct qede_dev *edev,
  846. struct qed_sb_info *sb_info)
  847. {
  848. if (sb_info->sb_virt)
  849. dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
  850. (void *)sb_info->sb_virt, sb_info->sb_phys);
  851. }
  852. /* This function allocates fast-path status block memory */
  853. static int qede_alloc_mem_sb(struct qede_dev *edev,
  854. struct qed_sb_info *sb_info, u16 sb_id)
  855. {
  856. struct status_block *sb_virt;
  857. dma_addr_t sb_phys;
  858. int rc;
  859. sb_virt = dma_alloc_coherent(&edev->pdev->dev,
  860. sizeof(*sb_virt), &sb_phys, GFP_KERNEL);
  861. if (!sb_virt) {
  862. DP_ERR(edev, "Status block allocation failed\n");
  863. return -ENOMEM;
  864. }
  865. rc = edev->ops->common->sb_init(edev->cdev, sb_info,
  866. sb_virt, sb_phys, sb_id,
  867. QED_SB_TYPE_L2_QUEUE);
  868. if (rc) {
  869. DP_ERR(edev, "Status block initialization failed\n");
  870. dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
  871. sb_virt, sb_phys);
  872. return rc;
  873. }
  874. return 0;
  875. }
  876. static void qede_free_rx_buffers(struct qede_dev *edev,
  877. struct qede_rx_queue *rxq)
  878. {
  879. u16 i;
  880. for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
  881. struct sw_rx_data *rx_buf;
  882. struct page *data;
  883. rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
  884. data = rx_buf->data;
  885. dma_unmap_page(&edev->pdev->dev,
  886. rx_buf->mapping, PAGE_SIZE, rxq->data_direction);
  887. rx_buf->data = NULL;
  888. __free_page(data);
  889. }
  890. }
  891. static void qede_free_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq)
  892. {
  893. int i;
  894. if (edev->gro_disable)
  895. return;
  896. for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
  897. struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
  898. struct sw_rx_data *replace_buf = &tpa_info->buffer;
  899. if (replace_buf->data) {
  900. dma_unmap_page(&edev->pdev->dev,
  901. replace_buf->mapping,
  902. PAGE_SIZE, DMA_FROM_DEVICE);
  903. __free_page(replace_buf->data);
  904. }
  905. }
  906. }
  907. static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
  908. {
  909. qede_free_sge_mem(edev, rxq);
  910. /* Free rx buffers */
  911. qede_free_rx_buffers(edev, rxq);
  912. /* Free the parallel SW ring */
  913. kfree(rxq->sw_rx_ring);
  914. /* Free the real RQ ring used by FW */
  915. edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
  916. edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
  917. }
  918. static int qede_alloc_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq)
  919. {
  920. dma_addr_t mapping;
  921. int i;
  922. /* Don't perform FW aggregations in case of XDP */
  923. if (edev->xdp_prog)
  924. edev->gro_disable = 1;
  925. if (edev->gro_disable)
  926. return 0;
  927. if (edev->ndev->mtu > PAGE_SIZE) {
  928. edev->gro_disable = 1;
  929. return 0;
  930. }
  931. for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
  932. struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
  933. struct sw_rx_data *replace_buf = &tpa_info->buffer;
  934. replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
  935. if (unlikely(!replace_buf->data)) {
  936. DP_NOTICE(edev,
  937. "Failed to allocate TPA skb pool [replacement buffer]\n");
  938. goto err;
  939. }
  940. mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
  941. PAGE_SIZE, DMA_FROM_DEVICE);
  942. if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
  943. DP_NOTICE(edev,
  944. "Failed to map TPA replacement buffer\n");
  945. goto err;
  946. }
  947. replace_buf->mapping = mapping;
  948. tpa_info->buffer.page_offset = 0;
  949. tpa_info->buffer_mapping = mapping;
  950. tpa_info->state = QEDE_AGG_STATE_NONE;
  951. }
  952. return 0;
  953. err:
  954. qede_free_sge_mem(edev, rxq);
  955. edev->gro_disable = 1;
  956. return -ENOMEM;
  957. }
  958. /* This function allocates all memory needed per Rx queue */
  959. static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
  960. {
  961. int i, rc, size;
  962. rxq->num_rx_buffers = edev->q_num_rx_buffers;
  963. rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu;
  964. if (rxq->rx_buf_size > PAGE_SIZE)
  965. rxq->rx_buf_size = PAGE_SIZE;
  966. /* Segment size to spilt a page in multiple equal parts,
  967. * unless XDP is used in which case we'd use the entire page.
  968. */
  969. if (!edev->xdp_prog)
  970. rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
  971. else
  972. rxq->rx_buf_seg_size = PAGE_SIZE;
  973. /* Allocate the parallel driver ring for Rx buffers */
  974. size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
  975. rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
  976. if (!rxq->sw_rx_ring) {
  977. DP_ERR(edev, "Rx buffers ring allocation failed\n");
  978. rc = -ENOMEM;
  979. goto err;
  980. }
  981. /* Allocate FW Rx ring */
  982. rc = edev->ops->common->chain_alloc(edev->cdev,
  983. QED_CHAIN_USE_TO_CONSUME_PRODUCE,
  984. QED_CHAIN_MODE_NEXT_PTR,
  985. QED_CHAIN_CNT_TYPE_U16,
  986. RX_RING_SIZE,
  987. sizeof(struct eth_rx_bd),
  988. &rxq->rx_bd_ring);
  989. if (rc)
  990. goto err;
  991. /* Allocate FW completion ring */
  992. rc = edev->ops->common->chain_alloc(edev->cdev,
  993. QED_CHAIN_USE_TO_CONSUME,
  994. QED_CHAIN_MODE_PBL,
  995. QED_CHAIN_CNT_TYPE_U16,
  996. RX_RING_SIZE,
  997. sizeof(union eth_rx_cqe),
  998. &rxq->rx_comp_ring);
  999. if (rc)
  1000. goto err;
  1001. /* Allocate buffers for the Rx ring */
  1002. rxq->filled_buffers = 0;
  1003. for (i = 0; i < rxq->num_rx_buffers; i++) {
  1004. rc = qede_alloc_rx_buffer(rxq, false);
  1005. if (rc) {
  1006. DP_ERR(edev,
  1007. "Rx buffers allocation failed at index %d\n", i);
  1008. goto err;
  1009. }
  1010. }
  1011. rc = qede_alloc_sge_mem(edev, rxq);
  1012. err:
  1013. return rc;
  1014. }
  1015. static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
  1016. {
  1017. /* Free the parallel SW ring */
  1018. if (txq->is_xdp)
  1019. kfree(txq->sw_tx_ring.pages);
  1020. else
  1021. kfree(txq->sw_tx_ring.skbs);
  1022. /* Free the real RQ ring used by FW */
  1023. edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
  1024. }
  1025. /* This function allocates all memory needed per Tx queue */
  1026. static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
  1027. {
  1028. union eth_tx_bd_types *p_virt;
  1029. int size, rc;
  1030. txq->num_tx_buffers = edev->q_num_tx_buffers;
  1031. /* Allocate the parallel driver ring for Tx buffers */
  1032. if (txq->is_xdp) {
  1033. size = sizeof(*txq->sw_tx_ring.pages) * TX_RING_SIZE;
  1034. txq->sw_tx_ring.pages = kzalloc(size, GFP_KERNEL);
  1035. if (!txq->sw_tx_ring.pages)
  1036. goto err;
  1037. } else {
  1038. size = sizeof(*txq->sw_tx_ring.skbs) * TX_RING_SIZE;
  1039. txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL);
  1040. if (!txq->sw_tx_ring.skbs)
  1041. goto err;
  1042. }
  1043. rc = edev->ops->common->chain_alloc(edev->cdev,
  1044. QED_CHAIN_USE_TO_CONSUME_PRODUCE,
  1045. QED_CHAIN_MODE_PBL,
  1046. QED_CHAIN_CNT_TYPE_U16,
  1047. TX_RING_SIZE,
  1048. sizeof(*p_virt), &txq->tx_pbl);
  1049. if (rc)
  1050. goto err;
  1051. return 0;
  1052. err:
  1053. qede_free_mem_txq(edev, txq);
  1054. return -ENOMEM;
  1055. }
  1056. /* This function frees all memory of a single fp */
  1057. static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
  1058. {
  1059. qede_free_mem_sb(edev, fp->sb_info);
  1060. if (fp->type & QEDE_FASTPATH_RX)
  1061. qede_free_mem_rxq(edev, fp->rxq);
  1062. if (fp->type & QEDE_FASTPATH_TX)
  1063. qede_free_mem_txq(edev, fp->txq);
  1064. }
  1065. /* This function allocates all memory needed for a single fp (i.e. an entity
  1066. * which contains status block, one rx queue and/or multiple per-TC tx queues.
  1067. */
  1068. static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
  1069. {
  1070. int rc = 0;
  1071. rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id);
  1072. if (rc)
  1073. goto out;
  1074. if (fp->type & QEDE_FASTPATH_RX) {
  1075. rc = qede_alloc_mem_rxq(edev, fp->rxq);
  1076. if (rc)
  1077. goto out;
  1078. }
  1079. if (fp->type & QEDE_FASTPATH_XDP) {
  1080. rc = qede_alloc_mem_txq(edev, fp->xdp_tx);
  1081. if (rc)
  1082. goto out;
  1083. }
  1084. if (fp->type & QEDE_FASTPATH_TX) {
  1085. rc = qede_alloc_mem_txq(edev, fp->txq);
  1086. if (rc)
  1087. goto out;
  1088. }
  1089. out:
  1090. return rc;
  1091. }
  1092. static void qede_free_mem_load(struct qede_dev *edev)
  1093. {
  1094. int i;
  1095. for_each_queue(i) {
  1096. struct qede_fastpath *fp = &edev->fp_array[i];
  1097. qede_free_mem_fp(edev, fp);
  1098. }
  1099. }
  1100. /* This function allocates all qede memory at NIC load. */
  1101. static int qede_alloc_mem_load(struct qede_dev *edev)
  1102. {
  1103. int rc = 0, queue_id;
  1104. for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) {
  1105. struct qede_fastpath *fp = &edev->fp_array[queue_id];
  1106. rc = qede_alloc_mem_fp(edev, fp);
  1107. if (rc) {
  1108. DP_ERR(edev,
  1109. "Failed to allocate memory for fastpath - rss id = %d\n",
  1110. queue_id);
  1111. qede_free_mem_load(edev);
  1112. return rc;
  1113. }
  1114. }
  1115. return 0;
  1116. }
  1117. /* This function inits fp content and resets the SB, RXQ and TXQ structures */
  1118. static void qede_init_fp(struct qede_dev *edev)
  1119. {
  1120. int queue_id, rxq_index = 0, txq_index = 0;
  1121. struct qede_fastpath *fp;
  1122. for_each_queue(queue_id) {
  1123. fp = &edev->fp_array[queue_id];
  1124. fp->edev = edev;
  1125. fp->id = queue_id;
  1126. if (fp->type & QEDE_FASTPATH_XDP) {
  1127. fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev,
  1128. rxq_index);
  1129. fp->xdp_tx->is_xdp = 1;
  1130. }
  1131. if (fp->type & QEDE_FASTPATH_RX) {
  1132. fp->rxq->rxq_id = rxq_index++;
  1133. /* Determine how to map buffers for this queue */
  1134. if (fp->type & QEDE_FASTPATH_XDP)
  1135. fp->rxq->data_direction = DMA_BIDIRECTIONAL;
  1136. else
  1137. fp->rxq->data_direction = DMA_FROM_DEVICE;
  1138. fp->rxq->dev = &edev->pdev->dev;
  1139. }
  1140. if (fp->type & QEDE_FASTPATH_TX) {
  1141. fp->txq->index = txq_index++;
  1142. if (edev->dev_info.is_legacy)
  1143. fp->txq->is_legacy = 1;
  1144. fp->txq->dev = &edev->pdev->dev;
  1145. }
  1146. snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
  1147. edev->ndev->name, queue_id);
  1148. }
  1149. edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
  1150. }
  1151. static int qede_set_real_num_queues(struct qede_dev *edev)
  1152. {
  1153. int rc = 0;
  1154. rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_COUNT(edev));
  1155. if (rc) {
  1156. DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
  1157. return rc;
  1158. }
  1159. rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev));
  1160. if (rc) {
  1161. DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
  1162. return rc;
  1163. }
  1164. return 0;
  1165. }
  1166. static void qede_napi_disable_remove(struct qede_dev *edev)
  1167. {
  1168. int i;
  1169. for_each_queue(i) {
  1170. napi_disable(&edev->fp_array[i].napi);
  1171. netif_napi_del(&edev->fp_array[i].napi);
  1172. }
  1173. }
  1174. static void qede_napi_add_enable(struct qede_dev *edev)
  1175. {
  1176. int i;
  1177. /* Add NAPI objects */
  1178. for_each_queue(i) {
  1179. netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
  1180. qede_poll, NAPI_POLL_WEIGHT);
  1181. napi_enable(&edev->fp_array[i].napi);
  1182. }
  1183. }
  1184. static void qede_sync_free_irqs(struct qede_dev *edev)
  1185. {
  1186. int i;
  1187. for (i = 0; i < edev->int_info.used_cnt; i++) {
  1188. if (edev->int_info.msix_cnt) {
  1189. synchronize_irq(edev->int_info.msix[i].vector);
  1190. free_irq(edev->int_info.msix[i].vector,
  1191. &edev->fp_array[i]);
  1192. } else {
  1193. edev->ops->common->simd_handler_clean(edev->cdev, i);
  1194. }
  1195. }
  1196. edev->int_info.used_cnt = 0;
  1197. }
  1198. static int qede_req_msix_irqs(struct qede_dev *edev)
  1199. {
  1200. int i, rc;
  1201. /* Sanitize number of interrupts == number of prepared RSS queues */
  1202. if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) {
  1203. DP_ERR(edev,
  1204. "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
  1205. QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt);
  1206. return -EINVAL;
  1207. }
  1208. for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
  1209. rc = request_irq(edev->int_info.msix[i].vector,
  1210. qede_msix_fp_int, 0, edev->fp_array[i].name,
  1211. &edev->fp_array[i]);
  1212. if (rc) {
  1213. DP_ERR(edev, "Request fp %d irq failed\n", i);
  1214. qede_sync_free_irqs(edev);
  1215. return rc;
  1216. }
  1217. DP_VERBOSE(edev, NETIF_MSG_INTR,
  1218. "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
  1219. edev->fp_array[i].name, i,
  1220. &edev->fp_array[i]);
  1221. edev->int_info.used_cnt++;
  1222. }
  1223. return 0;
  1224. }
  1225. static void qede_simd_fp_handler(void *cookie)
  1226. {
  1227. struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
  1228. napi_schedule_irqoff(&fp->napi);
  1229. }
  1230. static int qede_setup_irqs(struct qede_dev *edev)
  1231. {
  1232. int i, rc = 0;
  1233. /* Learn Interrupt configuration */
  1234. rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
  1235. if (rc)
  1236. return rc;
  1237. if (edev->int_info.msix_cnt) {
  1238. rc = qede_req_msix_irqs(edev);
  1239. if (rc)
  1240. return rc;
  1241. edev->ndev->irq = edev->int_info.msix[0].vector;
  1242. } else {
  1243. const struct qed_common_ops *ops;
  1244. /* qed should learn receive the RSS ids and callbacks */
  1245. ops = edev->ops->common;
  1246. for (i = 0; i < QEDE_QUEUE_CNT(edev); i++)
  1247. ops->simd_handler_config(edev->cdev,
  1248. &edev->fp_array[i], i,
  1249. qede_simd_fp_handler);
  1250. edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev);
  1251. }
  1252. return 0;
  1253. }
  1254. static int qede_drain_txq(struct qede_dev *edev,
  1255. struct qede_tx_queue *txq, bool allow_drain)
  1256. {
  1257. int rc, cnt = 1000;
  1258. while (txq->sw_tx_cons != txq->sw_tx_prod) {
  1259. if (!cnt) {
  1260. if (allow_drain) {
  1261. DP_NOTICE(edev,
  1262. "Tx queue[%d] is stuck, requesting MCP to drain\n",
  1263. txq->index);
  1264. rc = edev->ops->common->drain(edev->cdev);
  1265. if (rc)
  1266. return rc;
  1267. return qede_drain_txq(edev, txq, false);
  1268. }
  1269. DP_NOTICE(edev,
  1270. "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
  1271. txq->index, txq->sw_tx_prod,
  1272. txq->sw_tx_cons);
  1273. return -ENODEV;
  1274. }
  1275. cnt--;
  1276. usleep_range(1000, 2000);
  1277. barrier();
  1278. }
  1279. /* FW finished processing, wait for HW to transmit all tx packets */
  1280. usleep_range(1000, 2000);
  1281. return 0;
  1282. }
  1283. static int qede_stop_txq(struct qede_dev *edev,
  1284. struct qede_tx_queue *txq, int rss_id)
  1285. {
  1286. return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle);
  1287. }
  1288. static int qede_stop_queues(struct qede_dev *edev)
  1289. {
  1290. struct qed_update_vport_params *vport_update_params;
  1291. struct qed_dev *cdev = edev->cdev;
  1292. struct qede_fastpath *fp;
  1293. int rc, i;
  1294. /* Disable the vport */
  1295. vport_update_params = vzalloc(sizeof(*vport_update_params));
  1296. if (!vport_update_params)
  1297. return -ENOMEM;
  1298. vport_update_params->vport_id = 0;
  1299. vport_update_params->update_vport_active_flg = 1;
  1300. vport_update_params->vport_active_flg = 0;
  1301. vport_update_params->update_rss_flg = 0;
  1302. rc = edev->ops->vport_update(cdev, vport_update_params);
  1303. vfree(vport_update_params);
  1304. if (rc) {
  1305. DP_ERR(edev, "Failed to update vport\n");
  1306. return rc;
  1307. }
  1308. /* Flush Tx queues. If needed, request drain from MCP */
  1309. for_each_queue(i) {
  1310. fp = &edev->fp_array[i];
  1311. if (fp->type & QEDE_FASTPATH_TX) {
  1312. rc = qede_drain_txq(edev, fp->txq, true);
  1313. if (rc)
  1314. return rc;
  1315. }
  1316. if (fp->type & QEDE_FASTPATH_XDP) {
  1317. rc = qede_drain_txq(edev, fp->xdp_tx, true);
  1318. if (rc)
  1319. return rc;
  1320. }
  1321. }
  1322. /* Stop all Queues in reverse order */
  1323. for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) {
  1324. fp = &edev->fp_array[i];
  1325. /* Stop the Tx Queue(s) */
  1326. if (fp->type & QEDE_FASTPATH_TX) {
  1327. rc = qede_stop_txq(edev, fp->txq, i);
  1328. if (rc)
  1329. return rc;
  1330. }
  1331. /* Stop the Rx Queue */
  1332. if (fp->type & QEDE_FASTPATH_RX) {
  1333. rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle);
  1334. if (rc) {
  1335. DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
  1336. return rc;
  1337. }
  1338. }
  1339. /* Stop the XDP forwarding queue */
  1340. if (fp->type & QEDE_FASTPATH_XDP) {
  1341. rc = qede_stop_txq(edev, fp->xdp_tx, i);
  1342. if (rc)
  1343. return rc;
  1344. bpf_prog_put(fp->rxq->xdp_prog);
  1345. }
  1346. }
  1347. /* Stop the vport */
  1348. rc = edev->ops->vport_stop(cdev, 0);
  1349. if (rc)
  1350. DP_ERR(edev, "Failed to stop VPORT\n");
  1351. return rc;
  1352. }
  1353. static int qede_start_txq(struct qede_dev *edev,
  1354. struct qede_fastpath *fp,
  1355. struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx)
  1356. {
  1357. dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl);
  1358. u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl);
  1359. struct qed_queue_start_common_params params;
  1360. struct qed_txq_start_ret_params ret_params;
  1361. int rc;
  1362. memset(&params, 0, sizeof(params));
  1363. memset(&ret_params, 0, sizeof(ret_params));
  1364. /* Let the XDP queue share the queue-zone with one of the regular txq.
  1365. * We don't really care about its coalescing.
  1366. */
  1367. if (txq->is_xdp)
  1368. params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq);
  1369. else
  1370. params.queue_id = txq->index;
  1371. params.sb = fp->sb_info->igu_sb_id;
  1372. params.sb_idx = sb_idx;
  1373. rc = edev->ops->q_tx_start(edev->cdev, rss_id, &params, phys_table,
  1374. page_cnt, &ret_params);
  1375. if (rc) {
  1376. DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc);
  1377. return rc;
  1378. }
  1379. txq->doorbell_addr = ret_params.p_doorbell;
  1380. txq->handle = ret_params.p_handle;
  1381. /* Determine the FW consumer address associated */
  1382. txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx];
  1383. /* Prepare the doorbell parameters */
  1384. SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM);
  1385. SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
  1386. SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL,
  1387. DQ_XCM_ETH_TX_BD_PROD_CMD);
  1388. txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
  1389. return rc;
  1390. }
  1391. static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
  1392. {
  1393. int vlan_removal_en = 1;
  1394. struct qed_dev *cdev = edev->cdev;
  1395. struct qed_dev_info *qed_info = &edev->dev_info.common;
  1396. struct qed_update_vport_params *vport_update_params;
  1397. struct qed_queue_start_common_params q_params;
  1398. struct qed_start_vport_params start = {0};
  1399. int rc, i;
  1400. if (!edev->num_queues) {
  1401. DP_ERR(edev,
  1402. "Cannot update V-VPORT as active as there are no Rx queues\n");
  1403. return -EINVAL;
  1404. }
  1405. vport_update_params = vzalloc(sizeof(*vport_update_params));
  1406. if (!vport_update_params)
  1407. return -ENOMEM;
  1408. start.handle_ptp_pkts = !!(edev->ptp);
  1409. start.gro_enable = !edev->gro_disable;
  1410. start.mtu = edev->ndev->mtu;
  1411. start.vport_id = 0;
  1412. start.drop_ttl0 = true;
  1413. start.remove_inner_vlan = vlan_removal_en;
  1414. start.clear_stats = clear_stats;
  1415. rc = edev->ops->vport_start(cdev, &start);
  1416. if (rc) {
  1417. DP_ERR(edev, "Start V-PORT failed %d\n", rc);
  1418. goto out;
  1419. }
  1420. DP_VERBOSE(edev, NETIF_MSG_IFUP,
  1421. "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
  1422. start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
  1423. for_each_queue(i) {
  1424. struct qede_fastpath *fp = &edev->fp_array[i];
  1425. dma_addr_t p_phys_table;
  1426. u32 page_cnt;
  1427. if (fp->type & QEDE_FASTPATH_RX) {
  1428. struct qed_rxq_start_ret_params ret_params;
  1429. struct qede_rx_queue *rxq = fp->rxq;
  1430. __le16 *val;
  1431. memset(&ret_params, 0, sizeof(ret_params));
  1432. memset(&q_params, 0, sizeof(q_params));
  1433. q_params.queue_id = rxq->rxq_id;
  1434. q_params.vport_id = 0;
  1435. q_params.sb = fp->sb_info->igu_sb_id;
  1436. q_params.sb_idx = RX_PI;
  1437. p_phys_table =
  1438. qed_chain_get_pbl_phys(&rxq->rx_comp_ring);
  1439. page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring);
  1440. rc = edev->ops->q_rx_start(cdev, i, &q_params,
  1441. rxq->rx_buf_size,
  1442. rxq->rx_bd_ring.p_phys_addr,
  1443. p_phys_table,
  1444. page_cnt, &ret_params);
  1445. if (rc) {
  1446. DP_ERR(edev, "Start RXQ #%d failed %d\n", i,
  1447. rc);
  1448. goto out;
  1449. }
  1450. /* Use the return parameters */
  1451. rxq->hw_rxq_prod_addr = ret_params.p_prod;
  1452. rxq->handle = ret_params.p_handle;
  1453. val = &fp->sb_info->sb_virt->pi_array[RX_PI];
  1454. rxq->hw_cons_ptr = val;
  1455. qede_update_rx_prod(edev, rxq);
  1456. }
  1457. if (fp->type & QEDE_FASTPATH_XDP) {
  1458. rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI);
  1459. if (rc)
  1460. goto out;
  1461. fp->rxq->xdp_prog = bpf_prog_add(edev->xdp_prog, 1);
  1462. if (IS_ERR(fp->rxq->xdp_prog)) {
  1463. rc = PTR_ERR(fp->rxq->xdp_prog);
  1464. fp->rxq->xdp_prog = NULL;
  1465. goto out;
  1466. }
  1467. }
  1468. if (fp->type & QEDE_FASTPATH_TX) {
  1469. rc = qede_start_txq(edev, fp, fp->txq, i, TX_PI(0));
  1470. if (rc)
  1471. goto out;
  1472. }
  1473. }
  1474. /* Prepare and send the vport enable */
  1475. vport_update_params->vport_id = start.vport_id;
  1476. vport_update_params->update_vport_active_flg = 1;
  1477. vport_update_params->vport_active_flg = 1;
  1478. if ((qed_info->mf_mode == QED_MF_NPAR || pci_num_vf(edev->pdev)) &&
  1479. qed_info->tx_switching) {
  1480. vport_update_params->update_tx_switching_flg = 1;
  1481. vport_update_params->tx_switching_flg = 1;
  1482. }
  1483. qede_fill_rss_params(edev, &vport_update_params->rss_params,
  1484. &vport_update_params->update_rss_flg);
  1485. rc = edev->ops->vport_update(cdev, vport_update_params);
  1486. if (rc)
  1487. DP_ERR(edev, "Update V-PORT failed %d\n", rc);
  1488. out:
  1489. vfree(vport_update_params);
  1490. return rc;
  1491. }
  1492. enum qede_unload_mode {
  1493. QEDE_UNLOAD_NORMAL,
  1494. };
  1495. static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode,
  1496. bool is_locked)
  1497. {
  1498. struct qed_link_params link_params;
  1499. int rc;
  1500. DP_INFO(edev, "Starting qede unload\n");
  1501. if (!is_locked)
  1502. __qede_lock(edev);
  1503. qede_roce_dev_event_close(edev);
  1504. edev->state = QEDE_STATE_CLOSED;
  1505. qede_ptp_stop(edev);
  1506. /* Close OS Tx */
  1507. netif_tx_disable(edev->ndev);
  1508. netif_carrier_off(edev->ndev);
  1509. /* Reset the link */
  1510. memset(&link_params, 0, sizeof(link_params));
  1511. link_params.link_up = false;
  1512. edev->ops->common->set_link(edev->cdev, &link_params);
  1513. rc = qede_stop_queues(edev);
  1514. if (rc) {
  1515. qede_sync_free_irqs(edev);
  1516. goto out;
  1517. }
  1518. DP_INFO(edev, "Stopped Queues\n");
  1519. qede_vlan_mark_nonconfigured(edev);
  1520. edev->ops->fastpath_stop(edev->cdev);
  1521. /* Release the interrupts */
  1522. qede_sync_free_irqs(edev);
  1523. edev->ops->common->set_fp_int(edev->cdev, 0);
  1524. qede_napi_disable_remove(edev);
  1525. qede_free_mem_load(edev);
  1526. qede_free_fp_array(edev);
  1527. out:
  1528. if (!is_locked)
  1529. __qede_unlock(edev);
  1530. DP_INFO(edev, "Ending qede unload\n");
  1531. }
  1532. enum qede_load_mode {
  1533. QEDE_LOAD_NORMAL,
  1534. QEDE_LOAD_RELOAD,
  1535. };
  1536. static int qede_load(struct qede_dev *edev, enum qede_load_mode mode,
  1537. bool is_locked)
  1538. {
  1539. struct qed_link_params link_params;
  1540. int rc;
  1541. DP_INFO(edev, "Starting qede load\n");
  1542. if (!is_locked)
  1543. __qede_lock(edev);
  1544. rc = qede_set_num_queues(edev);
  1545. if (rc)
  1546. goto out;
  1547. rc = qede_alloc_fp_array(edev);
  1548. if (rc)
  1549. goto out;
  1550. qede_init_fp(edev);
  1551. rc = qede_alloc_mem_load(edev);
  1552. if (rc)
  1553. goto err1;
  1554. DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n",
  1555. QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev));
  1556. rc = qede_set_real_num_queues(edev);
  1557. if (rc)
  1558. goto err2;
  1559. qede_napi_add_enable(edev);
  1560. DP_INFO(edev, "Napi added and enabled\n");
  1561. rc = qede_setup_irqs(edev);
  1562. if (rc)
  1563. goto err3;
  1564. DP_INFO(edev, "Setup IRQs succeeded\n");
  1565. rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
  1566. if (rc)
  1567. goto err4;
  1568. DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
  1569. /* Add primary mac and set Rx filters */
  1570. ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
  1571. /* Program un-configured VLANs */
  1572. qede_configure_vlan_filters(edev);
  1573. /* Ask for link-up using current configuration */
  1574. memset(&link_params, 0, sizeof(link_params));
  1575. link_params.link_up = true;
  1576. edev->ops->common->set_link(edev->cdev, &link_params);
  1577. qede_roce_dev_event_open(edev);
  1578. qede_ptp_start(edev, (mode == QEDE_LOAD_NORMAL));
  1579. edev->state = QEDE_STATE_OPEN;
  1580. DP_INFO(edev, "Ending successfully qede load\n");
  1581. goto out;
  1582. err4:
  1583. qede_sync_free_irqs(edev);
  1584. memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
  1585. err3:
  1586. qede_napi_disable_remove(edev);
  1587. err2:
  1588. qede_free_mem_load(edev);
  1589. err1:
  1590. edev->ops->common->set_fp_int(edev->cdev, 0);
  1591. qede_free_fp_array(edev);
  1592. edev->num_queues = 0;
  1593. edev->fp_num_tx = 0;
  1594. edev->fp_num_rx = 0;
  1595. out:
  1596. if (!is_locked)
  1597. __qede_unlock(edev);
  1598. return rc;
  1599. }
  1600. /* 'func' should be able to run between unload and reload assuming interface
  1601. * is actually running, or afterwards in case it's currently DOWN.
  1602. */
  1603. void qede_reload(struct qede_dev *edev,
  1604. struct qede_reload_args *args, bool is_locked)
  1605. {
  1606. if (!is_locked)
  1607. __qede_lock(edev);
  1608. /* Since qede_lock is held, internal state wouldn't change even
  1609. * if netdev state would start transitioning. Check whether current
  1610. * internal configuration indicates device is up, then reload.
  1611. */
  1612. if (edev->state == QEDE_STATE_OPEN) {
  1613. qede_unload(edev, QEDE_UNLOAD_NORMAL, true);
  1614. if (args)
  1615. args->func(edev, args);
  1616. qede_load(edev, QEDE_LOAD_RELOAD, true);
  1617. /* Since no one is going to do it for us, re-configure */
  1618. qede_config_rx_mode(edev->ndev);
  1619. } else if (args) {
  1620. args->func(edev, args);
  1621. }
  1622. if (!is_locked)
  1623. __qede_unlock(edev);
  1624. }
  1625. /* called with rtnl_lock */
  1626. static int qede_open(struct net_device *ndev)
  1627. {
  1628. struct qede_dev *edev = netdev_priv(ndev);
  1629. int rc;
  1630. netif_carrier_off(ndev);
  1631. edev->ops->common->set_power_state(edev->cdev, PCI_D0);
  1632. rc = qede_load(edev, QEDE_LOAD_NORMAL, false);
  1633. if (rc)
  1634. return rc;
  1635. udp_tunnel_get_rx_info(ndev);
  1636. edev->ops->common->update_drv_state(edev->cdev, true);
  1637. return 0;
  1638. }
  1639. static int qede_close(struct net_device *ndev)
  1640. {
  1641. struct qede_dev *edev = netdev_priv(ndev);
  1642. qede_unload(edev, QEDE_UNLOAD_NORMAL, false);
  1643. edev->ops->common->update_drv_state(edev->cdev, false);
  1644. return 0;
  1645. }
  1646. static void qede_link_update(void *dev, struct qed_link_output *link)
  1647. {
  1648. struct qede_dev *edev = dev;
  1649. if (!netif_running(edev->ndev)) {
  1650. DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
  1651. return;
  1652. }
  1653. if (link->link_up) {
  1654. if (!netif_carrier_ok(edev->ndev)) {
  1655. DP_NOTICE(edev, "Link is up\n");
  1656. netif_tx_start_all_queues(edev->ndev);
  1657. netif_carrier_on(edev->ndev);
  1658. }
  1659. } else {
  1660. if (netif_carrier_ok(edev->ndev)) {
  1661. DP_NOTICE(edev, "Link is down\n");
  1662. netif_tx_disable(edev->ndev);
  1663. netif_carrier_off(edev->ndev);
  1664. }
  1665. }
  1666. }