qede_fp.c 47 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700
  1. /* QLogic qede NIC Driver
  2. * Copyright (c) 2015-2017 QLogic Corporation
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and /or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/netdevice.h>
  33. #include <linux/etherdevice.h>
  34. #include <linux/skbuff.h>
  35. #include <linux/bpf_trace.h>
  36. #include <net/udp_tunnel.h>
  37. #include <linux/ip.h>
  38. #include <net/ipv6.h>
  39. #include <net/tcp.h>
  40. #include <linux/if_ether.h>
  41. #include <linux/if_vlan.h>
  42. #include <net/ip6_checksum.h>
  43. #include "qede_ptp.h"
  44. #include <linux/qed/qed_if.h>
  45. #include "qede.h"
  46. /*********************************
  47. * Content also used by slowpath *
  48. *********************************/
  49. int qede_alloc_rx_buffer(struct qede_rx_queue *rxq, bool allow_lazy)
  50. {
  51. struct sw_rx_data *sw_rx_data;
  52. struct eth_rx_bd *rx_bd;
  53. dma_addr_t mapping;
  54. struct page *data;
  55. /* In case lazy-allocation is allowed, postpone allocation until the
  56. * end of the NAPI run. We'd still need to make sure the Rx ring has
  57. * sufficient buffers to guarantee an additional Rx interrupt.
  58. */
  59. if (allow_lazy && likely(rxq->filled_buffers > 12)) {
  60. rxq->filled_buffers--;
  61. return 0;
  62. }
  63. data = alloc_pages(GFP_ATOMIC, 0);
  64. if (unlikely(!data))
  65. return -ENOMEM;
  66. /* Map the entire page as it would be used
  67. * for multiple RX buffer segment size mapping.
  68. */
  69. mapping = dma_map_page(rxq->dev, data, 0,
  70. PAGE_SIZE, rxq->data_direction);
  71. if (unlikely(dma_mapping_error(rxq->dev, mapping))) {
  72. __free_page(data);
  73. return -ENOMEM;
  74. }
  75. sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
  76. sw_rx_data->page_offset = 0;
  77. sw_rx_data->data = data;
  78. sw_rx_data->mapping = mapping;
  79. /* Advance PROD and get BD pointer */
  80. rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
  81. WARN_ON(!rx_bd);
  82. rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
  83. rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
  84. rxq->sw_rx_prod++;
  85. rxq->filled_buffers++;
  86. return 0;
  87. }
  88. /* Unmap the data and free skb */
  89. int qede_free_tx_pkt(struct qede_dev *edev, struct qede_tx_queue *txq, int *len)
  90. {
  91. u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
  92. struct sk_buff *skb = txq->sw_tx_ring.skbs[idx].skb;
  93. struct eth_tx_1st_bd *first_bd;
  94. struct eth_tx_bd *tx_data_bd;
  95. int bds_consumed = 0;
  96. int nbds;
  97. bool data_split = txq->sw_tx_ring.skbs[idx].flags & QEDE_TSO_SPLIT_BD;
  98. int i, split_bd_len = 0;
  99. if (unlikely(!skb)) {
  100. DP_ERR(edev,
  101. "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
  102. idx, txq->sw_tx_cons, txq->sw_tx_prod);
  103. return -1;
  104. }
  105. *len = skb->len;
  106. first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
  107. bds_consumed++;
  108. nbds = first_bd->data.nbds;
  109. if (data_split) {
  110. struct eth_tx_bd *split = (struct eth_tx_bd *)
  111. qed_chain_consume(&txq->tx_pbl);
  112. split_bd_len = BD_UNMAP_LEN(split);
  113. bds_consumed++;
  114. }
  115. dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
  116. BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
  117. /* Unmap the data of the skb frags */
  118. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
  119. tx_data_bd = (struct eth_tx_bd *)
  120. qed_chain_consume(&txq->tx_pbl);
  121. dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
  122. BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
  123. }
  124. while (bds_consumed++ < nbds)
  125. qed_chain_consume(&txq->tx_pbl);
  126. /* Free skb */
  127. dev_kfree_skb_any(skb);
  128. txq->sw_tx_ring.skbs[idx].skb = NULL;
  129. txq->sw_tx_ring.skbs[idx].flags = 0;
  130. return 0;
  131. }
  132. /* Unmap the data and free skb when mapping failed during start_xmit */
  133. static void qede_free_failed_tx_pkt(struct qede_tx_queue *txq,
  134. struct eth_tx_1st_bd *first_bd,
  135. int nbd, bool data_split)
  136. {
  137. u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
  138. struct sk_buff *skb = txq->sw_tx_ring.skbs[idx].skb;
  139. struct eth_tx_bd *tx_data_bd;
  140. int i, split_bd_len = 0;
  141. /* Return prod to its position before this skb was handled */
  142. qed_chain_set_prod(&txq->tx_pbl,
  143. le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
  144. first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
  145. if (data_split) {
  146. struct eth_tx_bd *split = (struct eth_tx_bd *)
  147. qed_chain_produce(&txq->tx_pbl);
  148. split_bd_len = BD_UNMAP_LEN(split);
  149. nbd--;
  150. }
  151. dma_unmap_single(txq->dev, BD_UNMAP_ADDR(first_bd),
  152. BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
  153. /* Unmap the data of the skb frags */
  154. for (i = 0; i < nbd; i++) {
  155. tx_data_bd = (struct eth_tx_bd *)
  156. qed_chain_produce(&txq->tx_pbl);
  157. if (tx_data_bd->nbytes)
  158. dma_unmap_page(txq->dev,
  159. BD_UNMAP_ADDR(tx_data_bd),
  160. BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
  161. }
  162. /* Return again prod to its position before this skb was handled */
  163. qed_chain_set_prod(&txq->tx_pbl,
  164. le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
  165. /* Free skb */
  166. dev_kfree_skb_any(skb);
  167. txq->sw_tx_ring.skbs[idx].skb = NULL;
  168. txq->sw_tx_ring.skbs[idx].flags = 0;
  169. }
  170. static u32 qede_xmit_type(struct sk_buff *skb, int *ipv6_ext)
  171. {
  172. u32 rc = XMIT_L4_CSUM;
  173. __be16 l3_proto;
  174. if (skb->ip_summed != CHECKSUM_PARTIAL)
  175. return XMIT_PLAIN;
  176. l3_proto = vlan_get_protocol(skb);
  177. if (l3_proto == htons(ETH_P_IPV6) &&
  178. (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
  179. *ipv6_ext = 1;
  180. if (skb->encapsulation) {
  181. rc |= XMIT_ENC;
  182. if (skb_is_gso(skb)) {
  183. unsigned short gso_type = skb_shinfo(skb)->gso_type;
  184. if ((gso_type & SKB_GSO_UDP_TUNNEL_CSUM) ||
  185. (gso_type & SKB_GSO_GRE_CSUM))
  186. rc |= XMIT_ENC_GSO_L4_CSUM;
  187. rc |= XMIT_LSO;
  188. return rc;
  189. }
  190. }
  191. if (skb_is_gso(skb))
  192. rc |= XMIT_LSO;
  193. return rc;
  194. }
  195. static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
  196. struct eth_tx_2nd_bd *second_bd,
  197. struct eth_tx_3rd_bd *third_bd)
  198. {
  199. u8 l4_proto;
  200. u16 bd2_bits1 = 0, bd2_bits2 = 0;
  201. bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
  202. bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
  203. ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
  204. << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
  205. bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
  206. ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
  207. if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
  208. l4_proto = ipv6_hdr(skb)->nexthdr;
  209. else
  210. l4_proto = ip_hdr(skb)->protocol;
  211. if (l4_proto == IPPROTO_UDP)
  212. bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
  213. if (third_bd)
  214. third_bd->data.bitfields |=
  215. cpu_to_le16(((tcp_hdrlen(skb) / 4) &
  216. ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
  217. ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
  218. second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
  219. second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
  220. }
  221. static int map_frag_to_bd(struct qede_tx_queue *txq,
  222. skb_frag_t *frag, struct eth_tx_bd *bd)
  223. {
  224. dma_addr_t mapping;
  225. /* Map skb non-linear frag data for DMA */
  226. mapping = skb_frag_dma_map(txq->dev, frag, 0,
  227. skb_frag_size(frag), DMA_TO_DEVICE);
  228. if (unlikely(dma_mapping_error(txq->dev, mapping)))
  229. return -ENOMEM;
  230. /* Setup the data pointer of the frag data */
  231. BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
  232. return 0;
  233. }
  234. static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
  235. {
  236. if (is_encap_pkt)
  237. return (skb_inner_transport_header(skb) +
  238. inner_tcp_hdrlen(skb) - skb->data);
  239. else
  240. return (skb_transport_header(skb) +
  241. tcp_hdrlen(skb) - skb->data);
  242. }
  243. /* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
  244. #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
  245. static bool qede_pkt_req_lin(struct sk_buff *skb, u8 xmit_type)
  246. {
  247. int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
  248. if (xmit_type & XMIT_LSO) {
  249. int hlen;
  250. hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
  251. /* linear payload would require its own BD */
  252. if (skb_headlen(skb) > hlen)
  253. allowed_frags--;
  254. }
  255. return (skb_shinfo(skb)->nr_frags > allowed_frags);
  256. }
  257. #endif
  258. static inline void qede_update_tx_producer(struct qede_tx_queue *txq)
  259. {
  260. /* wmb makes sure that the BDs data is updated before updating the
  261. * producer, otherwise FW may read old data from the BDs.
  262. */
  263. wmb();
  264. barrier();
  265. writel(txq->tx_db.raw, txq->doorbell_addr);
  266. /* mmiowb is needed to synchronize doorbell writes from more than one
  267. * processor. It guarantees that the write arrives to the device before
  268. * the queue lock is released and another start_xmit is called (possibly
  269. * on another CPU). Without this barrier, the next doorbell can bypass
  270. * this doorbell. This is applicable to IA64/Altix systems.
  271. */
  272. mmiowb();
  273. }
  274. static int qede_xdp_xmit(struct qede_dev *edev, struct qede_fastpath *fp,
  275. struct sw_rx_data *metadata, u16 padding, u16 length)
  276. {
  277. struct qede_tx_queue *txq = fp->xdp_tx;
  278. u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
  279. struct eth_tx_1st_bd *first_bd;
  280. if (!qed_chain_get_elem_left(&txq->tx_pbl)) {
  281. txq->stopped_cnt++;
  282. return -ENOMEM;
  283. }
  284. first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
  285. memset(first_bd, 0, sizeof(*first_bd));
  286. first_bd->data.bd_flags.bitfields =
  287. BIT(ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT);
  288. first_bd->data.bitfields |=
  289. (length & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
  290. ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
  291. first_bd->data.nbds = 1;
  292. /* We can safely ignore the offset, as it's 0 for XDP */
  293. BD_SET_UNMAP_ADDR_LEN(first_bd, metadata->mapping + padding, length);
  294. /* Synchronize the buffer back to device, as program [probably]
  295. * has changed it.
  296. */
  297. dma_sync_single_for_device(&edev->pdev->dev,
  298. metadata->mapping + padding,
  299. length, PCI_DMA_TODEVICE);
  300. txq->sw_tx_ring.pages[idx] = metadata->data;
  301. txq->sw_tx_prod++;
  302. /* Mark the fastpath for future XDP doorbell */
  303. fp->xdp_xmit = 1;
  304. return 0;
  305. }
  306. int qede_txq_has_work(struct qede_tx_queue *txq)
  307. {
  308. u16 hw_bd_cons;
  309. /* Tell compiler that consumer and producer can change */
  310. barrier();
  311. hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
  312. if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
  313. return 0;
  314. return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
  315. }
  316. static void qede_xdp_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
  317. {
  318. struct eth_tx_1st_bd *bd;
  319. u16 hw_bd_cons;
  320. hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
  321. barrier();
  322. while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
  323. bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
  324. dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(bd),
  325. PAGE_SIZE, DMA_BIDIRECTIONAL);
  326. __free_page(txq->sw_tx_ring.pages[txq->sw_tx_cons &
  327. NUM_TX_BDS_MAX]);
  328. txq->sw_tx_cons++;
  329. txq->xmit_pkts++;
  330. }
  331. }
  332. static int qede_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
  333. {
  334. struct netdev_queue *netdev_txq;
  335. u16 hw_bd_cons;
  336. unsigned int pkts_compl = 0, bytes_compl = 0;
  337. int rc;
  338. netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
  339. hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
  340. barrier();
  341. while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
  342. int len = 0;
  343. rc = qede_free_tx_pkt(edev, txq, &len);
  344. if (rc) {
  345. DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
  346. hw_bd_cons,
  347. qed_chain_get_cons_idx(&txq->tx_pbl));
  348. break;
  349. }
  350. bytes_compl += len;
  351. pkts_compl++;
  352. txq->sw_tx_cons++;
  353. txq->xmit_pkts++;
  354. }
  355. netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
  356. /* Need to make the tx_bd_cons update visible to start_xmit()
  357. * before checking for netif_tx_queue_stopped(). Without the
  358. * memory barrier, there is a small possibility that
  359. * start_xmit() will miss it and cause the queue to be stopped
  360. * forever.
  361. * On the other hand we need an rmb() here to ensure the proper
  362. * ordering of bit testing in the following
  363. * netif_tx_queue_stopped(txq) call.
  364. */
  365. smp_mb();
  366. if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
  367. /* Taking tx_lock is needed to prevent reenabling the queue
  368. * while it's empty. This could have happen if rx_action() gets
  369. * suspended in qede_tx_int() after the condition before
  370. * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
  371. *
  372. * stops the queue->sees fresh tx_bd_cons->releases the queue->
  373. * sends some packets consuming the whole queue again->
  374. * stops the queue
  375. */
  376. __netif_tx_lock(netdev_txq, smp_processor_id());
  377. if ((netif_tx_queue_stopped(netdev_txq)) &&
  378. (edev->state == QEDE_STATE_OPEN) &&
  379. (qed_chain_get_elem_left(&txq->tx_pbl)
  380. >= (MAX_SKB_FRAGS + 1))) {
  381. netif_tx_wake_queue(netdev_txq);
  382. DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
  383. "Wake queue was called\n");
  384. }
  385. __netif_tx_unlock(netdev_txq);
  386. }
  387. return 0;
  388. }
  389. bool qede_has_rx_work(struct qede_rx_queue *rxq)
  390. {
  391. u16 hw_comp_cons, sw_comp_cons;
  392. /* Tell compiler that status block fields can change */
  393. barrier();
  394. hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
  395. sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
  396. return hw_comp_cons != sw_comp_cons;
  397. }
  398. static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
  399. {
  400. qed_chain_consume(&rxq->rx_bd_ring);
  401. rxq->sw_rx_cons++;
  402. }
  403. /* This function reuses the buffer(from an offset) from
  404. * consumer index to producer index in the bd ring
  405. */
  406. static inline void qede_reuse_page(struct qede_rx_queue *rxq,
  407. struct sw_rx_data *curr_cons)
  408. {
  409. struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
  410. struct sw_rx_data *curr_prod;
  411. dma_addr_t new_mapping;
  412. curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
  413. *curr_prod = *curr_cons;
  414. new_mapping = curr_prod->mapping + curr_prod->page_offset;
  415. rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
  416. rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
  417. rxq->sw_rx_prod++;
  418. curr_cons->data = NULL;
  419. }
  420. /* In case of allocation failures reuse buffers
  421. * from consumer index to produce buffers for firmware
  422. */
  423. void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq, u8 count)
  424. {
  425. struct sw_rx_data *curr_cons;
  426. for (; count > 0; count--) {
  427. curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
  428. qede_reuse_page(rxq, curr_cons);
  429. qede_rx_bd_ring_consume(rxq);
  430. }
  431. }
  432. static inline int qede_realloc_rx_buffer(struct qede_rx_queue *rxq,
  433. struct sw_rx_data *curr_cons)
  434. {
  435. /* Move to the next segment in the page */
  436. curr_cons->page_offset += rxq->rx_buf_seg_size;
  437. if (curr_cons->page_offset == PAGE_SIZE) {
  438. if (unlikely(qede_alloc_rx_buffer(rxq, true))) {
  439. /* Since we failed to allocate new buffer
  440. * current buffer can be used again.
  441. */
  442. curr_cons->page_offset -= rxq->rx_buf_seg_size;
  443. return -ENOMEM;
  444. }
  445. dma_unmap_page(rxq->dev, curr_cons->mapping,
  446. PAGE_SIZE, rxq->data_direction);
  447. } else {
  448. /* Increment refcount of the page as we don't want
  449. * network stack to take the ownership of the page
  450. * which can be recycled multiple times by the driver.
  451. */
  452. page_ref_inc(curr_cons->data);
  453. qede_reuse_page(rxq, curr_cons);
  454. }
  455. return 0;
  456. }
  457. void qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq)
  458. {
  459. u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
  460. u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
  461. struct eth_rx_prod_data rx_prods = {0};
  462. /* Update producers */
  463. rx_prods.bd_prod = cpu_to_le16(bd_prod);
  464. rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
  465. /* Make sure that the BD and SGE data is updated before updating the
  466. * producers since FW might read the BD/SGE right after the producer
  467. * is updated.
  468. */
  469. wmb();
  470. internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
  471. (u32 *)&rx_prods);
  472. /* mmiowb is needed to synchronize doorbell writes from more than one
  473. * processor. It guarantees that the write arrives to the device before
  474. * the napi lock is released and another qede_poll is called (possibly
  475. * on another CPU). Without this barrier, the next doorbell can bypass
  476. * this doorbell. This is applicable to IA64/Altix systems.
  477. */
  478. mmiowb();
  479. }
  480. static void qede_get_rxhash(struct sk_buff *skb, u8 bitfields, __le32 rss_hash)
  481. {
  482. enum pkt_hash_types hash_type = PKT_HASH_TYPE_NONE;
  483. enum rss_hash_type htype;
  484. u32 hash = 0;
  485. htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
  486. if (htype) {
  487. hash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
  488. (htype == RSS_HASH_TYPE_IPV6)) ?
  489. PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
  490. hash = le32_to_cpu(rss_hash);
  491. }
  492. skb_set_hash(skb, hash, hash_type);
  493. }
  494. static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
  495. {
  496. skb_checksum_none_assert(skb);
  497. if (csum_flag & QEDE_CSUM_UNNECESSARY)
  498. skb->ip_summed = CHECKSUM_UNNECESSARY;
  499. if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY) {
  500. skb->csum_level = 1;
  501. skb->encapsulation = 1;
  502. }
  503. }
  504. static inline void qede_skb_receive(struct qede_dev *edev,
  505. struct qede_fastpath *fp,
  506. struct qede_rx_queue *rxq,
  507. struct sk_buff *skb, u16 vlan_tag)
  508. {
  509. if (vlan_tag)
  510. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
  511. napi_gro_receive(&fp->napi, skb);
  512. rxq->rcv_pkts++;
  513. }
  514. static void qede_set_gro_params(struct qede_dev *edev,
  515. struct sk_buff *skb,
  516. struct eth_fast_path_rx_tpa_start_cqe *cqe)
  517. {
  518. u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
  519. if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
  520. PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
  521. skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
  522. else
  523. skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
  524. skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
  525. cqe->header_len;
  526. }
  527. static int qede_fill_frag_skb(struct qede_dev *edev,
  528. struct qede_rx_queue *rxq,
  529. u8 tpa_agg_index, u16 len_on_bd)
  530. {
  531. struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
  532. NUM_RX_BDS_MAX];
  533. struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
  534. struct sk_buff *skb = tpa_info->skb;
  535. if (unlikely(tpa_info->state != QEDE_AGG_STATE_START))
  536. goto out;
  537. /* Add one frag and update the appropriate fields in the skb */
  538. skb_fill_page_desc(skb, tpa_info->frag_id++,
  539. current_bd->data, current_bd->page_offset,
  540. len_on_bd);
  541. if (unlikely(qede_realloc_rx_buffer(rxq, current_bd))) {
  542. /* Incr page ref count to reuse on allocation failure
  543. * so that it doesn't get freed while freeing SKB.
  544. */
  545. page_ref_inc(current_bd->data);
  546. goto out;
  547. }
  548. qed_chain_consume(&rxq->rx_bd_ring);
  549. rxq->sw_rx_cons++;
  550. skb->data_len += len_on_bd;
  551. skb->truesize += rxq->rx_buf_seg_size;
  552. skb->len += len_on_bd;
  553. return 0;
  554. out:
  555. tpa_info->state = QEDE_AGG_STATE_ERROR;
  556. qede_recycle_rx_bd_ring(rxq, 1);
  557. return -ENOMEM;
  558. }
  559. static bool qede_tunn_exist(u16 flag)
  560. {
  561. return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
  562. PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
  563. }
  564. static u8 qede_check_tunn_csum(u16 flag)
  565. {
  566. u16 csum_flag = 0;
  567. u8 tcsum = 0;
  568. if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
  569. PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
  570. csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
  571. PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
  572. if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
  573. PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
  574. csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
  575. PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
  576. tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
  577. }
  578. csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
  579. PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
  580. PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
  581. PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
  582. if (csum_flag & flag)
  583. return QEDE_CSUM_ERROR;
  584. return QEDE_CSUM_UNNECESSARY | tcsum;
  585. }
  586. static void qede_tpa_start(struct qede_dev *edev,
  587. struct qede_rx_queue *rxq,
  588. struct eth_fast_path_rx_tpa_start_cqe *cqe)
  589. {
  590. struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
  591. struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
  592. struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
  593. struct sw_rx_data *replace_buf = &tpa_info->buffer;
  594. dma_addr_t mapping = tpa_info->buffer_mapping;
  595. struct sw_rx_data *sw_rx_data_cons;
  596. struct sw_rx_data *sw_rx_data_prod;
  597. sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
  598. sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
  599. /* Use pre-allocated replacement buffer - we can't release the agg.
  600. * start until its over and we don't want to risk allocation failing
  601. * here, so re-allocate when aggregation will be over.
  602. */
  603. sw_rx_data_prod->mapping = replace_buf->mapping;
  604. sw_rx_data_prod->data = replace_buf->data;
  605. rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
  606. rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
  607. sw_rx_data_prod->page_offset = replace_buf->page_offset;
  608. rxq->sw_rx_prod++;
  609. /* move partial skb from cons to pool (don't unmap yet)
  610. * save mapping, incase we drop the packet later on.
  611. */
  612. tpa_info->buffer = *sw_rx_data_cons;
  613. mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
  614. le32_to_cpu(rx_bd_cons->addr.lo));
  615. tpa_info->buffer_mapping = mapping;
  616. rxq->sw_rx_cons++;
  617. /* set tpa state to start only if we are able to allocate skb
  618. * for this aggregation, otherwise mark as error and aggregation will
  619. * be dropped
  620. */
  621. tpa_info->skb = netdev_alloc_skb(edev->ndev,
  622. le16_to_cpu(cqe->len_on_first_bd));
  623. if (unlikely(!tpa_info->skb)) {
  624. DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
  625. tpa_info->state = QEDE_AGG_STATE_ERROR;
  626. goto cons_buf;
  627. }
  628. /* Start filling in the aggregation info */
  629. skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
  630. tpa_info->frag_id = 0;
  631. tpa_info->state = QEDE_AGG_STATE_START;
  632. /* Store some information from first CQE */
  633. tpa_info->start_cqe_placement_offset = cqe->placement_offset;
  634. tpa_info->start_cqe_bd_len = le16_to_cpu(cqe->len_on_first_bd);
  635. if ((le16_to_cpu(cqe->pars_flags.flags) >>
  636. PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
  637. PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
  638. tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
  639. else
  640. tpa_info->vlan_tag = 0;
  641. qede_get_rxhash(tpa_info->skb, cqe->bitfields, cqe->rss_hash);
  642. /* This is needed in order to enable forwarding support */
  643. qede_set_gro_params(edev, tpa_info->skb, cqe);
  644. cons_buf: /* We still need to handle bd_len_list to consume buffers */
  645. if (likely(cqe->ext_bd_len_list[0]))
  646. qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
  647. le16_to_cpu(cqe->ext_bd_len_list[0]));
  648. if (unlikely(cqe->ext_bd_len_list[1])) {
  649. DP_ERR(edev,
  650. "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
  651. tpa_info->state = QEDE_AGG_STATE_ERROR;
  652. }
  653. }
  654. #ifdef CONFIG_INET
  655. static void qede_gro_ip_csum(struct sk_buff *skb)
  656. {
  657. const struct iphdr *iph = ip_hdr(skb);
  658. struct tcphdr *th;
  659. skb_set_transport_header(skb, sizeof(struct iphdr));
  660. th = tcp_hdr(skb);
  661. th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
  662. iph->saddr, iph->daddr, 0);
  663. tcp_gro_complete(skb);
  664. }
  665. static void qede_gro_ipv6_csum(struct sk_buff *skb)
  666. {
  667. struct ipv6hdr *iph = ipv6_hdr(skb);
  668. struct tcphdr *th;
  669. skb_set_transport_header(skb, sizeof(struct ipv6hdr));
  670. th = tcp_hdr(skb);
  671. th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
  672. &iph->saddr, &iph->daddr, 0);
  673. tcp_gro_complete(skb);
  674. }
  675. #endif
  676. static void qede_gro_receive(struct qede_dev *edev,
  677. struct qede_fastpath *fp,
  678. struct sk_buff *skb,
  679. u16 vlan_tag)
  680. {
  681. /* FW can send a single MTU sized packet from gro flow
  682. * due to aggregation timeout/last segment etc. which
  683. * is not expected to be a gro packet. If a skb has zero
  684. * frags then simply push it in the stack as non gso skb.
  685. */
  686. if (unlikely(!skb->data_len)) {
  687. skb_shinfo(skb)->gso_type = 0;
  688. skb_shinfo(skb)->gso_size = 0;
  689. goto send_skb;
  690. }
  691. #ifdef CONFIG_INET
  692. if (skb_shinfo(skb)->gso_size) {
  693. skb_reset_network_header(skb);
  694. switch (skb->protocol) {
  695. case htons(ETH_P_IP):
  696. qede_gro_ip_csum(skb);
  697. break;
  698. case htons(ETH_P_IPV6):
  699. qede_gro_ipv6_csum(skb);
  700. break;
  701. default:
  702. DP_ERR(edev,
  703. "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
  704. ntohs(skb->protocol));
  705. }
  706. }
  707. #endif
  708. send_skb:
  709. skb_record_rx_queue(skb, fp->rxq->rxq_id);
  710. qede_skb_receive(edev, fp, fp->rxq, skb, vlan_tag);
  711. }
  712. static inline void qede_tpa_cont(struct qede_dev *edev,
  713. struct qede_rx_queue *rxq,
  714. struct eth_fast_path_rx_tpa_cont_cqe *cqe)
  715. {
  716. int i;
  717. for (i = 0; cqe->len_list[i]; i++)
  718. qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
  719. le16_to_cpu(cqe->len_list[i]));
  720. if (unlikely(i > 1))
  721. DP_ERR(edev,
  722. "Strange - TPA cont with more than a single len_list entry\n");
  723. }
  724. static void qede_tpa_end(struct qede_dev *edev,
  725. struct qede_fastpath *fp,
  726. struct eth_fast_path_rx_tpa_end_cqe *cqe)
  727. {
  728. struct qede_rx_queue *rxq = fp->rxq;
  729. struct qede_agg_info *tpa_info;
  730. struct sk_buff *skb;
  731. int i;
  732. tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
  733. skb = tpa_info->skb;
  734. for (i = 0; cqe->len_list[i]; i++)
  735. qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
  736. le16_to_cpu(cqe->len_list[i]));
  737. if (unlikely(i > 1))
  738. DP_ERR(edev,
  739. "Strange - TPA emd with more than a single len_list entry\n");
  740. if (unlikely(tpa_info->state != QEDE_AGG_STATE_START))
  741. goto err;
  742. /* Sanity */
  743. if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
  744. DP_ERR(edev,
  745. "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
  746. cqe->num_of_bds, tpa_info->frag_id);
  747. if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
  748. DP_ERR(edev,
  749. "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
  750. le16_to_cpu(cqe->total_packet_len), skb->len);
  751. memcpy(skb->data,
  752. page_address(tpa_info->buffer.data) +
  753. tpa_info->start_cqe_placement_offset +
  754. tpa_info->buffer.page_offset, tpa_info->start_cqe_bd_len);
  755. /* Finalize the SKB */
  756. skb->protocol = eth_type_trans(skb, edev->ndev);
  757. skb->ip_summed = CHECKSUM_UNNECESSARY;
  758. /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
  759. * to skb_shinfo(skb)->gso_segs
  760. */
  761. NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
  762. qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
  763. tpa_info->state = QEDE_AGG_STATE_NONE;
  764. return;
  765. err:
  766. tpa_info->state = QEDE_AGG_STATE_NONE;
  767. dev_kfree_skb_any(tpa_info->skb);
  768. tpa_info->skb = NULL;
  769. }
  770. static u8 qede_check_notunn_csum(u16 flag)
  771. {
  772. u16 csum_flag = 0;
  773. u8 csum = 0;
  774. if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
  775. PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
  776. csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
  777. PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
  778. csum = QEDE_CSUM_UNNECESSARY;
  779. }
  780. csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
  781. PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
  782. if (csum_flag & flag)
  783. return QEDE_CSUM_ERROR;
  784. return csum;
  785. }
  786. static u8 qede_check_csum(u16 flag)
  787. {
  788. if (!qede_tunn_exist(flag))
  789. return qede_check_notunn_csum(flag);
  790. else
  791. return qede_check_tunn_csum(flag);
  792. }
  793. static bool qede_pkt_is_ip_fragmented(struct eth_fast_path_rx_reg_cqe *cqe,
  794. u16 flag)
  795. {
  796. u8 tun_pars_flg = cqe->tunnel_pars_flags.flags;
  797. if ((tun_pars_flg & (ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK <<
  798. ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT)) ||
  799. (flag & (PARSING_AND_ERR_FLAGS_IPV4FRAG_MASK <<
  800. PARSING_AND_ERR_FLAGS_IPV4FRAG_SHIFT)))
  801. return true;
  802. return false;
  803. }
  804. /* Return true iff packet is to be passed to stack */
  805. static bool qede_rx_xdp(struct qede_dev *edev,
  806. struct qede_fastpath *fp,
  807. struct qede_rx_queue *rxq,
  808. struct bpf_prog *prog,
  809. struct sw_rx_data *bd,
  810. struct eth_fast_path_rx_reg_cqe *cqe)
  811. {
  812. u16 len = le16_to_cpu(cqe->len_on_first_bd);
  813. struct xdp_buff xdp;
  814. enum xdp_action act;
  815. xdp.data = page_address(bd->data) + cqe->placement_offset;
  816. xdp.data_end = xdp.data + len;
  817. /* Queues always have a full reset currently, so for the time
  818. * being until there's atomic program replace just mark read
  819. * side for map helpers.
  820. */
  821. rcu_read_lock();
  822. act = bpf_prog_run_xdp(prog, &xdp);
  823. rcu_read_unlock();
  824. if (act == XDP_PASS)
  825. return true;
  826. /* Count number of packets not to be passed to stack */
  827. rxq->xdp_no_pass++;
  828. switch (act) {
  829. case XDP_TX:
  830. /* We need the replacement buffer before transmit. */
  831. if (qede_alloc_rx_buffer(rxq, true)) {
  832. qede_recycle_rx_bd_ring(rxq, 1);
  833. trace_xdp_exception(edev->ndev, prog, act);
  834. return false;
  835. }
  836. /* Now if there's a transmission problem, we'd still have to
  837. * throw current buffer, as replacement was already allocated.
  838. */
  839. if (qede_xdp_xmit(edev, fp, bd, cqe->placement_offset, len)) {
  840. dma_unmap_page(rxq->dev, bd->mapping,
  841. PAGE_SIZE, DMA_BIDIRECTIONAL);
  842. __free_page(bd->data);
  843. trace_xdp_exception(edev->ndev, prog, act);
  844. }
  845. /* Regardless, we've consumed an Rx BD */
  846. qede_rx_bd_ring_consume(rxq);
  847. return false;
  848. default:
  849. bpf_warn_invalid_xdp_action(act);
  850. case XDP_ABORTED:
  851. trace_xdp_exception(edev->ndev, prog, act);
  852. case XDP_DROP:
  853. qede_recycle_rx_bd_ring(rxq, cqe->bd_num);
  854. }
  855. return false;
  856. }
  857. static struct sk_buff *qede_rx_allocate_skb(struct qede_dev *edev,
  858. struct qede_rx_queue *rxq,
  859. struct sw_rx_data *bd, u16 len,
  860. u16 pad)
  861. {
  862. unsigned int offset = bd->page_offset;
  863. struct skb_frag_struct *frag;
  864. struct page *page = bd->data;
  865. unsigned int pull_len;
  866. struct sk_buff *skb;
  867. unsigned char *va;
  868. /* Allocate a new SKB with a sufficient large header len */
  869. skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
  870. if (unlikely(!skb))
  871. return NULL;
  872. /* Copy data into SKB - if it's small, we can simply copy it and
  873. * re-use the already allcoated & mapped memory.
  874. */
  875. if (len + pad <= edev->rx_copybreak) {
  876. memcpy(skb_put(skb, len),
  877. page_address(page) + pad + offset, len);
  878. qede_reuse_page(rxq, bd);
  879. goto out;
  880. }
  881. frag = &skb_shinfo(skb)->frags[0];
  882. skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
  883. page, pad + offset, len, rxq->rx_buf_seg_size);
  884. va = skb_frag_address(frag);
  885. pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
  886. /* Align the pull_len to optimize memcpy */
  887. memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
  888. /* Correct the skb & frag sizes offset after the pull */
  889. skb_frag_size_sub(frag, pull_len);
  890. frag->page_offset += pull_len;
  891. skb->data_len -= pull_len;
  892. skb->tail += pull_len;
  893. if (unlikely(qede_realloc_rx_buffer(rxq, bd))) {
  894. /* Incr page ref count to reuse on allocation failure so
  895. * that it doesn't get freed while freeing SKB [as its
  896. * already mapped there].
  897. */
  898. page_ref_inc(page);
  899. dev_kfree_skb_any(skb);
  900. return NULL;
  901. }
  902. out:
  903. /* We've consumed the first BD and prepared an SKB */
  904. qede_rx_bd_ring_consume(rxq);
  905. return skb;
  906. }
  907. static int qede_rx_build_jumbo(struct qede_dev *edev,
  908. struct qede_rx_queue *rxq,
  909. struct sk_buff *skb,
  910. struct eth_fast_path_rx_reg_cqe *cqe,
  911. u16 first_bd_len)
  912. {
  913. u16 pkt_len = le16_to_cpu(cqe->pkt_len);
  914. struct sw_rx_data *bd;
  915. u16 bd_cons_idx;
  916. u8 num_frags;
  917. pkt_len -= first_bd_len;
  918. /* We've already used one BD for the SKB. Now take care of the rest */
  919. for (num_frags = cqe->bd_num - 1; num_frags > 0; num_frags--) {
  920. u16 cur_size = pkt_len > rxq->rx_buf_size ? rxq->rx_buf_size :
  921. pkt_len;
  922. if (unlikely(!cur_size)) {
  923. DP_ERR(edev,
  924. "Still got %d BDs for mapping jumbo, but length became 0\n",
  925. num_frags);
  926. goto out;
  927. }
  928. /* We need a replacement buffer for each BD */
  929. if (unlikely(qede_alloc_rx_buffer(rxq, true)))
  930. goto out;
  931. /* Now that we've allocated the replacement buffer,
  932. * we can safely consume the next BD and map it to the SKB.
  933. */
  934. bd_cons_idx = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
  935. bd = &rxq->sw_rx_ring[bd_cons_idx];
  936. qede_rx_bd_ring_consume(rxq);
  937. dma_unmap_page(rxq->dev, bd->mapping,
  938. PAGE_SIZE, DMA_FROM_DEVICE);
  939. skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags++,
  940. bd->data, 0, cur_size);
  941. skb->truesize += PAGE_SIZE;
  942. skb->data_len += cur_size;
  943. skb->len += cur_size;
  944. pkt_len -= cur_size;
  945. }
  946. if (unlikely(pkt_len))
  947. DP_ERR(edev,
  948. "Mapped all BDs of jumbo, but still have %d bytes\n",
  949. pkt_len);
  950. out:
  951. return num_frags;
  952. }
  953. static int qede_rx_process_tpa_cqe(struct qede_dev *edev,
  954. struct qede_fastpath *fp,
  955. struct qede_rx_queue *rxq,
  956. union eth_rx_cqe *cqe,
  957. enum eth_rx_cqe_type type)
  958. {
  959. switch (type) {
  960. case ETH_RX_CQE_TYPE_TPA_START:
  961. qede_tpa_start(edev, rxq, &cqe->fast_path_tpa_start);
  962. return 0;
  963. case ETH_RX_CQE_TYPE_TPA_CONT:
  964. qede_tpa_cont(edev, rxq, &cqe->fast_path_tpa_cont);
  965. return 0;
  966. case ETH_RX_CQE_TYPE_TPA_END:
  967. qede_tpa_end(edev, fp, &cqe->fast_path_tpa_end);
  968. return 1;
  969. default:
  970. return 0;
  971. }
  972. }
  973. static int qede_rx_process_cqe(struct qede_dev *edev,
  974. struct qede_fastpath *fp,
  975. struct qede_rx_queue *rxq)
  976. {
  977. struct bpf_prog *xdp_prog = READ_ONCE(rxq->xdp_prog);
  978. struct eth_fast_path_rx_reg_cqe *fp_cqe;
  979. u16 len, pad, bd_cons_idx, parse_flag;
  980. enum eth_rx_cqe_type cqe_type;
  981. union eth_rx_cqe *cqe;
  982. struct sw_rx_data *bd;
  983. struct sk_buff *skb;
  984. __le16 flags;
  985. u8 csum_flag;
  986. /* Get the CQE from the completion ring */
  987. cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
  988. cqe_type = cqe->fast_path_regular.type;
  989. /* Process an unlikely slowpath event */
  990. if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
  991. struct eth_slow_path_rx_cqe *sp_cqe;
  992. sp_cqe = (struct eth_slow_path_rx_cqe *)cqe;
  993. edev->ops->eth_cqe_completion(edev->cdev, fp->id, sp_cqe);
  994. return 0;
  995. }
  996. /* Handle TPA cqes */
  997. if (cqe_type != ETH_RX_CQE_TYPE_REGULAR)
  998. return qede_rx_process_tpa_cqe(edev, fp, rxq, cqe, cqe_type);
  999. /* Get the data from the SW ring; Consume it only after it's evident
  1000. * we wouldn't recycle it.
  1001. */
  1002. bd_cons_idx = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
  1003. bd = &rxq->sw_rx_ring[bd_cons_idx];
  1004. fp_cqe = &cqe->fast_path_regular;
  1005. len = le16_to_cpu(fp_cqe->len_on_first_bd);
  1006. pad = fp_cqe->placement_offset;
  1007. /* Run eBPF program if one is attached */
  1008. if (xdp_prog)
  1009. if (!qede_rx_xdp(edev, fp, rxq, xdp_prog, bd, fp_cqe))
  1010. return 1;
  1011. /* If this is an error packet then drop it */
  1012. flags = cqe->fast_path_regular.pars_flags.flags;
  1013. parse_flag = le16_to_cpu(flags);
  1014. csum_flag = qede_check_csum(parse_flag);
  1015. if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
  1016. if (qede_pkt_is_ip_fragmented(fp_cqe, parse_flag)) {
  1017. rxq->rx_ip_frags++;
  1018. } else {
  1019. DP_NOTICE(edev,
  1020. "CQE has error, flags = %x, dropping incoming packet\n",
  1021. parse_flag);
  1022. rxq->rx_hw_errors++;
  1023. qede_recycle_rx_bd_ring(rxq, fp_cqe->bd_num);
  1024. return 0;
  1025. }
  1026. }
  1027. /* Basic validation passed; Need to prepare an SKB. This would also
  1028. * guarantee to finally consume the first BD upon success.
  1029. */
  1030. skb = qede_rx_allocate_skb(edev, rxq, bd, len, pad);
  1031. if (!skb) {
  1032. rxq->rx_alloc_errors++;
  1033. qede_recycle_rx_bd_ring(rxq, fp_cqe->bd_num);
  1034. return 0;
  1035. }
  1036. /* In case of Jumbo packet, several PAGE_SIZEd buffers will be pointed
  1037. * by a single cqe.
  1038. */
  1039. if (fp_cqe->bd_num > 1) {
  1040. u16 unmapped_frags = qede_rx_build_jumbo(edev, rxq, skb,
  1041. fp_cqe, len);
  1042. if (unlikely(unmapped_frags > 0)) {
  1043. qede_recycle_rx_bd_ring(rxq, unmapped_frags);
  1044. dev_kfree_skb_any(skb);
  1045. return 0;
  1046. }
  1047. }
  1048. /* The SKB contains all the data. Now prepare meta-magic */
  1049. skb->protocol = eth_type_trans(skb, edev->ndev);
  1050. qede_get_rxhash(skb, fp_cqe->bitfields, fp_cqe->rss_hash);
  1051. qede_set_skb_csum(skb, csum_flag);
  1052. skb_record_rx_queue(skb, rxq->rxq_id);
  1053. qede_ptp_record_rx_ts(edev, cqe, skb);
  1054. /* SKB is prepared - pass it to stack */
  1055. qede_skb_receive(edev, fp, rxq, skb, le16_to_cpu(fp_cqe->vlan_tag));
  1056. return 1;
  1057. }
  1058. static int qede_rx_int(struct qede_fastpath *fp, int budget)
  1059. {
  1060. struct qede_rx_queue *rxq = fp->rxq;
  1061. struct qede_dev *edev = fp->edev;
  1062. u16 hw_comp_cons, sw_comp_cons;
  1063. int work_done = 0;
  1064. hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
  1065. sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
  1066. /* Memory barrier to prevent the CPU from doing speculative reads of CQE
  1067. * / BD in the while-loop before reading hw_comp_cons. If the CQE is
  1068. * read before it is written by FW, then FW writes CQE and SB, and then
  1069. * the CPU reads the hw_comp_cons, it will use an old CQE.
  1070. */
  1071. rmb();
  1072. /* Loop to complete all indicated BDs */
  1073. while ((sw_comp_cons != hw_comp_cons) && (work_done < budget)) {
  1074. qede_rx_process_cqe(edev, fp, rxq);
  1075. qed_chain_recycle_consumed(&rxq->rx_comp_ring);
  1076. sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
  1077. work_done++;
  1078. }
  1079. /* Allocate replacement buffers */
  1080. while (rxq->num_rx_buffers - rxq->filled_buffers)
  1081. if (qede_alloc_rx_buffer(rxq, false))
  1082. break;
  1083. /* Update producers */
  1084. qede_update_rx_prod(edev, rxq);
  1085. return work_done;
  1086. }
  1087. static bool qede_poll_is_more_work(struct qede_fastpath *fp)
  1088. {
  1089. qed_sb_update_sb_idx(fp->sb_info);
  1090. /* *_has_*_work() reads the status block, thus we need to ensure that
  1091. * status block indices have been actually read (qed_sb_update_sb_idx)
  1092. * prior to this check (*_has_*_work) so that we won't write the
  1093. * "newer" value of the status block to HW (if there was a DMA right
  1094. * after qede_has_rx_work and if there is no rmb, the memory reading
  1095. * (qed_sb_update_sb_idx) may be postponed to right before *_ack_sb).
  1096. * In this case there will never be another interrupt until there is
  1097. * another update of the status block, while there is still unhandled
  1098. * work.
  1099. */
  1100. rmb();
  1101. if (likely(fp->type & QEDE_FASTPATH_RX))
  1102. if (qede_has_rx_work(fp->rxq))
  1103. return true;
  1104. if (fp->type & QEDE_FASTPATH_XDP)
  1105. if (qede_txq_has_work(fp->xdp_tx))
  1106. return true;
  1107. if (likely(fp->type & QEDE_FASTPATH_TX))
  1108. if (qede_txq_has_work(fp->txq))
  1109. return true;
  1110. return false;
  1111. }
  1112. /*********************
  1113. * NDO & API related *
  1114. *********************/
  1115. int qede_poll(struct napi_struct *napi, int budget)
  1116. {
  1117. struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
  1118. napi);
  1119. struct qede_dev *edev = fp->edev;
  1120. int rx_work_done = 0;
  1121. if (likely(fp->type & QEDE_FASTPATH_TX) && qede_txq_has_work(fp->txq))
  1122. qede_tx_int(edev, fp->txq);
  1123. if ((fp->type & QEDE_FASTPATH_XDP) && qede_txq_has_work(fp->xdp_tx))
  1124. qede_xdp_tx_int(edev, fp->xdp_tx);
  1125. rx_work_done = (likely(fp->type & QEDE_FASTPATH_RX) &&
  1126. qede_has_rx_work(fp->rxq)) ?
  1127. qede_rx_int(fp, budget) : 0;
  1128. if (rx_work_done < budget) {
  1129. if (!qede_poll_is_more_work(fp)) {
  1130. napi_complete_done(napi, rx_work_done);
  1131. /* Update and reenable interrupts */
  1132. qed_sb_ack(fp->sb_info, IGU_INT_ENABLE, 1);
  1133. } else {
  1134. rx_work_done = budget;
  1135. }
  1136. }
  1137. if (fp->xdp_xmit) {
  1138. u16 xdp_prod = qed_chain_get_prod_idx(&fp->xdp_tx->tx_pbl);
  1139. fp->xdp_xmit = 0;
  1140. fp->xdp_tx->tx_db.data.bd_prod = cpu_to_le16(xdp_prod);
  1141. qede_update_tx_producer(fp->xdp_tx);
  1142. }
  1143. return rx_work_done;
  1144. }
  1145. irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
  1146. {
  1147. struct qede_fastpath *fp = fp_cookie;
  1148. qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
  1149. napi_schedule_irqoff(&fp->napi);
  1150. return IRQ_HANDLED;
  1151. }
  1152. /* Main transmit function */
  1153. netdev_tx_t qede_start_xmit(struct sk_buff *skb, struct net_device *ndev)
  1154. {
  1155. struct qede_dev *edev = netdev_priv(ndev);
  1156. struct netdev_queue *netdev_txq;
  1157. struct qede_tx_queue *txq;
  1158. struct eth_tx_1st_bd *first_bd;
  1159. struct eth_tx_2nd_bd *second_bd = NULL;
  1160. struct eth_tx_3rd_bd *third_bd = NULL;
  1161. struct eth_tx_bd *tx_data_bd = NULL;
  1162. u16 txq_index;
  1163. u8 nbd = 0;
  1164. dma_addr_t mapping;
  1165. int rc, frag_idx = 0, ipv6_ext = 0;
  1166. u8 xmit_type;
  1167. u16 idx;
  1168. u16 hlen;
  1169. bool data_split = false;
  1170. /* Get tx-queue context and netdev index */
  1171. txq_index = skb_get_queue_mapping(skb);
  1172. WARN_ON(txq_index >= QEDE_TSS_COUNT(edev));
  1173. txq = edev->fp_array[edev->fp_num_rx + txq_index].txq;
  1174. netdev_txq = netdev_get_tx_queue(ndev, txq_index);
  1175. WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) < (MAX_SKB_FRAGS + 1));
  1176. xmit_type = qede_xmit_type(skb, &ipv6_ext);
  1177. #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
  1178. if (qede_pkt_req_lin(skb, xmit_type)) {
  1179. if (skb_linearize(skb)) {
  1180. DP_NOTICE(edev,
  1181. "SKB linearization failed - silently dropping this SKB\n");
  1182. dev_kfree_skb_any(skb);
  1183. return NETDEV_TX_OK;
  1184. }
  1185. }
  1186. #endif
  1187. /* Fill the entry in the SW ring and the BDs in the FW ring */
  1188. idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
  1189. txq->sw_tx_ring.skbs[idx].skb = skb;
  1190. first_bd = (struct eth_tx_1st_bd *)
  1191. qed_chain_produce(&txq->tx_pbl);
  1192. memset(first_bd, 0, sizeof(*first_bd));
  1193. first_bd->data.bd_flags.bitfields =
  1194. 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
  1195. if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP))
  1196. qede_ptp_tx_ts(edev, skb);
  1197. /* Map skb linear data for DMA and set in the first BD */
  1198. mapping = dma_map_single(txq->dev, skb->data,
  1199. skb_headlen(skb), DMA_TO_DEVICE);
  1200. if (unlikely(dma_mapping_error(txq->dev, mapping))) {
  1201. DP_NOTICE(edev, "SKB mapping failed\n");
  1202. qede_free_failed_tx_pkt(txq, first_bd, 0, false);
  1203. qede_update_tx_producer(txq);
  1204. return NETDEV_TX_OK;
  1205. }
  1206. nbd++;
  1207. BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
  1208. /* In case there is IPv6 with extension headers or LSO we need 2nd and
  1209. * 3rd BDs.
  1210. */
  1211. if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
  1212. second_bd = (struct eth_tx_2nd_bd *)
  1213. qed_chain_produce(&txq->tx_pbl);
  1214. memset(second_bd, 0, sizeof(*second_bd));
  1215. nbd++;
  1216. third_bd = (struct eth_tx_3rd_bd *)
  1217. qed_chain_produce(&txq->tx_pbl);
  1218. memset(third_bd, 0, sizeof(*third_bd));
  1219. nbd++;
  1220. /* We need to fill in additional data in second_bd... */
  1221. tx_data_bd = (struct eth_tx_bd *)second_bd;
  1222. }
  1223. if (skb_vlan_tag_present(skb)) {
  1224. first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
  1225. first_bd->data.bd_flags.bitfields |=
  1226. 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
  1227. }
  1228. /* Fill the parsing flags & params according to the requested offload */
  1229. if (xmit_type & XMIT_L4_CSUM) {
  1230. /* We don't re-calculate IP checksum as it is already done by
  1231. * the upper stack
  1232. */
  1233. first_bd->data.bd_flags.bitfields |=
  1234. 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
  1235. if (xmit_type & XMIT_ENC) {
  1236. first_bd->data.bd_flags.bitfields |=
  1237. 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
  1238. first_bd->data.bitfields |=
  1239. 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
  1240. }
  1241. /* Legacy FW had flipped behavior in regard to this bit -
  1242. * I.e., needed to set to prevent FW from touching encapsulated
  1243. * packets when it didn't need to.
  1244. */
  1245. if (unlikely(txq->is_legacy))
  1246. first_bd->data.bitfields ^=
  1247. 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
  1248. /* If the packet is IPv6 with extension header, indicate that
  1249. * to FW and pass few params, since the device cracker doesn't
  1250. * support parsing IPv6 with extension header/s.
  1251. */
  1252. if (unlikely(ipv6_ext))
  1253. qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
  1254. }
  1255. if (xmit_type & XMIT_LSO) {
  1256. first_bd->data.bd_flags.bitfields |=
  1257. (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
  1258. third_bd->data.lso_mss =
  1259. cpu_to_le16(skb_shinfo(skb)->gso_size);
  1260. if (unlikely(xmit_type & XMIT_ENC)) {
  1261. first_bd->data.bd_flags.bitfields |=
  1262. 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
  1263. if (xmit_type & XMIT_ENC_GSO_L4_CSUM) {
  1264. u8 tmp = ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_SHIFT;
  1265. first_bd->data.bd_flags.bitfields |= 1 << tmp;
  1266. }
  1267. hlen = qede_get_skb_hlen(skb, true);
  1268. } else {
  1269. first_bd->data.bd_flags.bitfields |=
  1270. 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
  1271. hlen = qede_get_skb_hlen(skb, false);
  1272. }
  1273. /* @@@TBD - if will not be removed need to check */
  1274. third_bd->data.bitfields |=
  1275. cpu_to_le16(1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT);
  1276. /* Make life easier for FW guys who can't deal with header and
  1277. * data on same BD. If we need to split, use the second bd...
  1278. */
  1279. if (unlikely(skb_headlen(skb) > hlen)) {
  1280. DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
  1281. "TSO split header size is %d (%x:%x)\n",
  1282. first_bd->nbytes, first_bd->addr.hi,
  1283. first_bd->addr.lo);
  1284. mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
  1285. le32_to_cpu(first_bd->addr.lo)) +
  1286. hlen;
  1287. BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
  1288. le16_to_cpu(first_bd->nbytes) -
  1289. hlen);
  1290. /* this marks the BD as one that has no
  1291. * individual mapping
  1292. */
  1293. txq->sw_tx_ring.skbs[idx].flags |= QEDE_TSO_SPLIT_BD;
  1294. first_bd->nbytes = cpu_to_le16(hlen);
  1295. tx_data_bd = (struct eth_tx_bd *)third_bd;
  1296. data_split = true;
  1297. }
  1298. } else {
  1299. first_bd->data.bitfields |=
  1300. (skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
  1301. ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
  1302. }
  1303. /* Handle fragmented skb */
  1304. /* special handle for frags inside 2nd and 3rd bds.. */
  1305. while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
  1306. rc = map_frag_to_bd(txq,
  1307. &skb_shinfo(skb)->frags[frag_idx],
  1308. tx_data_bd);
  1309. if (rc) {
  1310. qede_free_failed_tx_pkt(txq, first_bd, nbd, data_split);
  1311. qede_update_tx_producer(txq);
  1312. return NETDEV_TX_OK;
  1313. }
  1314. if (tx_data_bd == (struct eth_tx_bd *)second_bd)
  1315. tx_data_bd = (struct eth_tx_bd *)third_bd;
  1316. else
  1317. tx_data_bd = NULL;
  1318. frag_idx++;
  1319. }
  1320. /* map last frags into 4th, 5th .... */
  1321. for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
  1322. tx_data_bd = (struct eth_tx_bd *)
  1323. qed_chain_produce(&txq->tx_pbl);
  1324. memset(tx_data_bd, 0, sizeof(*tx_data_bd));
  1325. rc = map_frag_to_bd(txq,
  1326. &skb_shinfo(skb)->frags[frag_idx],
  1327. tx_data_bd);
  1328. if (rc) {
  1329. qede_free_failed_tx_pkt(txq, first_bd, nbd, data_split);
  1330. qede_update_tx_producer(txq);
  1331. return NETDEV_TX_OK;
  1332. }
  1333. }
  1334. /* update the first BD with the actual num BDs */
  1335. first_bd->data.nbds = nbd;
  1336. netdev_tx_sent_queue(netdev_txq, skb->len);
  1337. skb_tx_timestamp(skb);
  1338. /* Advance packet producer only before sending the packet since mapping
  1339. * of pages may fail.
  1340. */
  1341. txq->sw_tx_prod++;
  1342. /* 'next page' entries are counted in the producer value */
  1343. txq->tx_db.data.bd_prod =
  1344. cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
  1345. if (!skb->xmit_more || netif_xmit_stopped(netdev_txq))
  1346. qede_update_tx_producer(txq);
  1347. if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
  1348. < (MAX_SKB_FRAGS + 1))) {
  1349. if (skb->xmit_more)
  1350. qede_update_tx_producer(txq);
  1351. netif_tx_stop_queue(netdev_txq);
  1352. txq->stopped_cnt++;
  1353. DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
  1354. "Stop queue was called\n");
  1355. /* paired memory barrier is in qede_tx_int(), we have to keep
  1356. * ordering of set_bit() in netif_tx_stop_queue() and read of
  1357. * fp->bd_tx_cons
  1358. */
  1359. smp_mb();
  1360. if ((qed_chain_get_elem_left(&txq->tx_pbl) >=
  1361. (MAX_SKB_FRAGS + 1)) &&
  1362. (edev->state == QEDE_STATE_OPEN)) {
  1363. netif_tx_wake_queue(netdev_txq);
  1364. DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
  1365. "Wake queue was called\n");
  1366. }
  1367. }
  1368. return NETDEV_TX_OK;
  1369. }
  1370. /* 8B udp header + 8B base tunnel header + 32B option length */
  1371. #define QEDE_MAX_TUN_HDR_LEN 48
  1372. netdev_features_t qede_features_check(struct sk_buff *skb,
  1373. struct net_device *dev,
  1374. netdev_features_t features)
  1375. {
  1376. if (skb->encapsulation) {
  1377. u8 l4_proto = 0;
  1378. switch (vlan_get_protocol(skb)) {
  1379. case htons(ETH_P_IP):
  1380. l4_proto = ip_hdr(skb)->protocol;
  1381. break;
  1382. case htons(ETH_P_IPV6):
  1383. l4_proto = ipv6_hdr(skb)->nexthdr;
  1384. break;
  1385. default:
  1386. return features;
  1387. }
  1388. /* Disable offloads for geneve tunnels, as HW can't parse
  1389. * the geneve header which has option length greater than 32B.
  1390. */
  1391. if ((l4_proto == IPPROTO_UDP) &&
  1392. ((skb_inner_mac_header(skb) -
  1393. skb_transport_header(skb)) > QEDE_MAX_TUN_HDR_LEN))
  1394. return features & ~(NETIF_F_CSUM_MASK |
  1395. NETIF_F_GSO_MASK);
  1396. }
  1397. return features;
  1398. }