qede_ethtool.c 45 KB

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  1. /* QLogic qede NIC Driver
  2. * Copyright (c) 2015-2017 QLogic Corporation
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and /or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/version.h>
  33. #include <linux/types.h>
  34. #include <linux/netdevice.h>
  35. #include <linux/etherdevice.h>
  36. #include <linux/ethtool.h>
  37. #include <linux/string.h>
  38. #include <linux/pci.h>
  39. #include <linux/capability.h>
  40. #include <linux/vmalloc.h>
  41. #include "qede.h"
  42. #include "qede_ptp.h"
  43. #define QEDE_RQSTAT_OFFSET(stat_name) \
  44. (offsetof(struct qede_rx_queue, stat_name))
  45. #define QEDE_RQSTAT_STRING(stat_name) (#stat_name)
  46. #define QEDE_RQSTAT(stat_name) \
  47. {QEDE_RQSTAT_OFFSET(stat_name), QEDE_RQSTAT_STRING(stat_name)}
  48. #define QEDE_SELFTEST_POLL_COUNT 100
  49. static const struct {
  50. u64 offset;
  51. char string[ETH_GSTRING_LEN];
  52. } qede_rqstats_arr[] = {
  53. QEDE_RQSTAT(rcv_pkts),
  54. QEDE_RQSTAT(rx_hw_errors),
  55. QEDE_RQSTAT(rx_alloc_errors),
  56. QEDE_RQSTAT(rx_ip_frags),
  57. QEDE_RQSTAT(xdp_no_pass),
  58. };
  59. #define QEDE_NUM_RQSTATS ARRAY_SIZE(qede_rqstats_arr)
  60. #define QEDE_TQSTAT_OFFSET(stat_name) \
  61. (offsetof(struct qede_tx_queue, stat_name))
  62. #define QEDE_TQSTAT_STRING(stat_name) (#stat_name)
  63. #define QEDE_TQSTAT(stat_name) \
  64. {QEDE_TQSTAT_OFFSET(stat_name), QEDE_TQSTAT_STRING(stat_name)}
  65. #define QEDE_NUM_TQSTATS ARRAY_SIZE(qede_tqstats_arr)
  66. static const struct {
  67. u64 offset;
  68. char string[ETH_GSTRING_LEN];
  69. } qede_tqstats_arr[] = {
  70. QEDE_TQSTAT(xmit_pkts),
  71. QEDE_TQSTAT(stopped_cnt),
  72. };
  73. #define QEDE_STAT_OFFSET(stat_name) (offsetof(struct qede_stats, stat_name))
  74. #define QEDE_STAT_STRING(stat_name) (#stat_name)
  75. #define _QEDE_STAT(stat_name, pf_only) \
  76. {QEDE_STAT_OFFSET(stat_name), QEDE_STAT_STRING(stat_name), pf_only}
  77. #define QEDE_PF_STAT(stat_name) _QEDE_STAT(stat_name, true)
  78. #define QEDE_STAT(stat_name) _QEDE_STAT(stat_name, false)
  79. static const struct {
  80. u64 offset;
  81. char string[ETH_GSTRING_LEN];
  82. bool pf_only;
  83. } qede_stats_arr[] = {
  84. QEDE_STAT(rx_ucast_bytes),
  85. QEDE_STAT(rx_mcast_bytes),
  86. QEDE_STAT(rx_bcast_bytes),
  87. QEDE_STAT(rx_ucast_pkts),
  88. QEDE_STAT(rx_mcast_pkts),
  89. QEDE_STAT(rx_bcast_pkts),
  90. QEDE_STAT(tx_ucast_bytes),
  91. QEDE_STAT(tx_mcast_bytes),
  92. QEDE_STAT(tx_bcast_bytes),
  93. QEDE_STAT(tx_ucast_pkts),
  94. QEDE_STAT(tx_mcast_pkts),
  95. QEDE_STAT(tx_bcast_pkts),
  96. QEDE_PF_STAT(rx_64_byte_packets),
  97. QEDE_PF_STAT(rx_65_to_127_byte_packets),
  98. QEDE_PF_STAT(rx_128_to_255_byte_packets),
  99. QEDE_PF_STAT(rx_256_to_511_byte_packets),
  100. QEDE_PF_STAT(rx_512_to_1023_byte_packets),
  101. QEDE_PF_STAT(rx_1024_to_1518_byte_packets),
  102. QEDE_PF_STAT(rx_1519_to_1522_byte_packets),
  103. QEDE_PF_STAT(rx_1519_to_2047_byte_packets),
  104. QEDE_PF_STAT(rx_2048_to_4095_byte_packets),
  105. QEDE_PF_STAT(rx_4096_to_9216_byte_packets),
  106. QEDE_PF_STAT(rx_9217_to_16383_byte_packets),
  107. QEDE_PF_STAT(tx_64_byte_packets),
  108. QEDE_PF_STAT(tx_65_to_127_byte_packets),
  109. QEDE_PF_STAT(tx_128_to_255_byte_packets),
  110. QEDE_PF_STAT(tx_256_to_511_byte_packets),
  111. QEDE_PF_STAT(tx_512_to_1023_byte_packets),
  112. QEDE_PF_STAT(tx_1024_to_1518_byte_packets),
  113. QEDE_PF_STAT(tx_1519_to_2047_byte_packets),
  114. QEDE_PF_STAT(tx_2048_to_4095_byte_packets),
  115. QEDE_PF_STAT(tx_4096_to_9216_byte_packets),
  116. QEDE_PF_STAT(tx_9217_to_16383_byte_packets),
  117. QEDE_PF_STAT(rx_mac_crtl_frames),
  118. QEDE_PF_STAT(tx_mac_ctrl_frames),
  119. QEDE_PF_STAT(rx_pause_frames),
  120. QEDE_PF_STAT(tx_pause_frames),
  121. QEDE_PF_STAT(rx_pfc_frames),
  122. QEDE_PF_STAT(tx_pfc_frames),
  123. QEDE_PF_STAT(rx_crc_errors),
  124. QEDE_PF_STAT(rx_align_errors),
  125. QEDE_PF_STAT(rx_carrier_errors),
  126. QEDE_PF_STAT(rx_oversize_packets),
  127. QEDE_PF_STAT(rx_jabbers),
  128. QEDE_PF_STAT(rx_undersize_packets),
  129. QEDE_PF_STAT(rx_fragments),
  130. QEDE_PF_STAT(tx_lpi_entry_count),
  131. QEDE_PF_STAT(tx_total_collisions),
  132. QEDE_PF_STAT(brb_truncates),
  133. QEDE_PF_STAT(brb_discards),
  134. QEDE_STAT(no_buff_discards),
  135. QEDE_PF_STAT(mftag_filter_discards),
  136. QEDE_PF_STAT(mac_filter_discards),
  137. QEDE_STAT(tx_err_drop_pkts),
  138. QEDE_STAT(ttl0_discard),
  139. QEDE_STAT(packet_too_big_discard),
  140. QEDE_STAT(coalesced_pkts),
  141. QEDE_STAT(coalesced_events),
  142. QEDE_STAT(coalesced_aborts_num),
  143. QEDE_STAT(non_coalesced_pkts),
  144. QEDE_STAT(coalesced_bytes),
  145. };
  146. #define QEDE_NUM_STATS ARRAY_SIZE(qede_stats_arr)
  147. enum {
  148. QEDE_PRI_FLAG_CMT,
  149. QEDE_PRI_FLAG_LEN,
  150. };
  151. static const char qede_private_arr[QEDE_PRI_FLAG_LEN][ETH_GSTRING_LEN] = {
  152. "Coupled-Function",
  153. };
  154. enum qede_ethtool_tests {
  155. QEDE_ETHTOOL_INT_LOOPBACK,
  156. QEDE_ETHTOOL_INTERRUPT_TEST,
  157. QEDE_ETHTOOL_MEMORY_TEST,
  158. QEDE_ETHTOOL_REGISTER_TEST,
  159. QEDE_ETHTOOL_CLOCK_TEST,
  160. QEDE_ETHTOOL_NVRAM_TEST,
  161. QEDE_ETHTOOL_TEST_MAX
  162. };
  163. static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = {
  164. "Internal loopback (offline)",
  165. "Interrupt (online)\t",
  166. "Memory (online)\t\t",
  167. "Register (online)\t",
  168. "Clock (online)\t\t",
  169. "Nvram (online)\t\t",
  170. };
  171. static void qede_get_strings_stats_txq(struct qede_dev *edev,
  172. struct qede_tx_queue *txq, u8 **buf)
  173. {
  174. int i;
  175. for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
  176. if (txq->is_xdp)
  177. sprintf(*buf, "%d [XDP]: %s",
  178. QEDE_TXQ_XDP_TO_IDX(edev, txq),
  179. qede_tqstats_arr[i].string);
  180. else
  181. sprintf(*buf, "%d: %s", txq->index,
  182. qede_tqstats_arr[i].string);
  183. *buf += ETH_GSTRING_LEN;
  184. }
  185. }
  186. static void qede_get_strings_stats_rxq(struct qede_dev *edev,
  187. struct qede_rx_queue *rxq, u8 **buf)
  188. {
  189. int i;
  190. for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
  191. sprintf(*buf, "%d: %s", rxq->rxq_id,
  192. qede_rqstats_arr[i].string);
  193. *buf += ETH_GSTRING_LEN;
  194. }
  195. }
  196. static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf)
  197. {
  198. struct qede_fastpath *fp;
  199. int i;
  200. /* Account for queue statistics */
  201. for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
  202. fp = &edev->fp_array[i];
  203. if (fp->type & QEDE_FASTPATH_RX)
  204. qede_get_strings_stats_rxq(edev, fp->rxq, &buf);
  205. if (fp->type & QEDE_FASTPATH_XDP)
  206. qede_get_strings_stats_txq(edev, fp->xdp_tx, &buf);
  207. if (fp->type & QEDE_FASTPATH_TX)
  208. qede_get_strings_stats_txq(edev, fp->txq, &buf);
  209. }
  210. /* Account for non-queue statistics */
  211. for (i = 0; i < QEDE_NUM_STATS; i++) {
  212. if (IS_VF(edev) && qede_stats_arr[i].pf_only)
  213. continue;
  214. strcpy(buf, qede_stats_arr[i].string);
  215. buf += ETH_GSTRING_LEN;
  216. }
  217. }
  218. static void qede_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
  219. {
  220. struct qede_dev *edev = netdev_priv(dev);
  221. switch (stringset) {
  222. case ETH_SS_STATS:
  223. qede_get_strings_stats(edev, buf);
  224. break;
  225. case ETH_SS_PRIV_FLAGS:
  226. memcpy(buf, qede_private_arr,
  227. ETH_GSTRING_LEN * QEDE_PRI_FLAG_LEN);
  228. break;
  229. case ETH_SS_TEST:
  230. memcpy(buf, qede_tests_str_arr,
  231. ETH_GSTRING_LEN * QEDE_ETHTOOL_TEST_MAX);
  232. break;
  233. default:
  234. DP_VERBOSE(edev, QED_MSG_DEBUG,
  235. "Unsupported stringset 0x%08x\n", stringset);
  236. }
  237. }
  238. static void qede_get_ethtool_stats_txq(struct qede_tx_queue *txq, u64 **buf)
  239. {
  240. int i;
  241. for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
  242. **buf = *((u64 *)(((void *)txq) + qede_tqstats_arr[i].offset));
  243. (*buf)++;
  244. }
  245. }
  246. static void qede_get_ethtool_stats_rxq(struct qede_rx_queue *rxq, u64 **buf)
  247. {
  248. int i;
  249. for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
  250. **buf = *((u64 *)(((void *)rxq) + qede_rqstats_arr[i].offset));
  251. (*buf)++;
  252. }
  253. }
  254. static void qede_get_ethtool_stats(struct net_device *dev,
  255. struct ethtool_stats *stats, u64 *buf)
  256. {
  257. struct qede_dev *edev = netdev_priv(dev);
  258. struct qede_fastpath *fp;
  259. int i;
  260. qede_fill_by_demand_stats(edev);
  261. /* Need to protect the access to the fastpath array */
  262. __qede_lock(edev);
  263. for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
  264. fp = &edev->fp_array[i];
  265. if (fp->type & QEDE_FASTPATH_RX)
  266. qede_get_ethtool_stats_rxq(fp->rxq, &buf);
  267. if (fp->type & QEDE_FASTPATH_XDP)
  268. qede_get_ethtool_stats_txq(fp->xdp_tx, &buf);
  269. if (fp->type & QEDE_FASTPATH_TX)
  270. qede_get_ethtool_stats_txq(fp->txq, &buf);
  271. }
  272. for (i = 0; i < QEDE_NUM_STATS; i++) {
  273. if (IS_VF(edev) && qede_stats_arr[i].pf_only)
  274. continue;
  275. *buf = *((u64 *)(((void *)&edev->stats) +
  276. qede_stats_arr[i].offset));
  277. buf++;
  278. }
  279. __qede_unlock(edev);
  280. }
  281. static int qede_get_sset_count(struct net_device *dev, int stringset)
  282. {
  283. struct qede_dev *edev = netdev_priv(dev);
  284. int num_stats = QEDE_NUM_STATS;
  285. switch (stringset) {
  286. case ETH_SS_STATS:
  287. if (IS_VF(edev)) {
  288. int i;
  289. for (i = 0; i < QEDE_NUM_STATS; i++)
  290. if (qede_stats_arr[i].pf_only)
  291. num_stats--;
  292. }
  293. /* Account for the Regular Tx statistics */
  294. num_stats += QEDE_TSS_COUNT(edev) * QEDE_NUM_TQSTATS;
  295. /* Account for the Regular Rx statistics */
  296. num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_RQSTATS;
  297. /* Account for XDP statistics [if needed] */
  298. if (edev->xdp_prog)
  299. num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_TQSTATS;
  300. return num_stats;
  301. case ETH_SS_PRIV_FLAGS:
  302. return QEDE_PRI_FLAG_LEN;
  303. case ETH_SS_TEST:
  304. if (!IS_VF(edev))
  305. return QEDE_ETHTOOL_TEST_MAX;
  306. else
  307. return 0;
  308. default:
  309. DP_VERBOSE(edev, QED_MSG_DEBUG,
  310. "Unsupported stringset 0x%08x\n", stringset);
  311. return -EINVAL;
  312. }
  313. }
  314. static u32 qede_get_priv_flags(struct net_device *dev)
  315. {
  316. struct qede_dev *edev = netdev_priv(dev);
  317. return (!!(edev->dev_info.common.num_hwfns > 1)) << QEDE_PRI_FLAG_CMT;
  318. }
  319. struct qede_link_mode_mapping {
  320. u32 qed_link_mode;
  321. u32 ethtool_link_mode;
  322. };
  323. static const struct qede_link_mode_mapping qed_lm_map[] = {
  324. {QED_LM_FIBRE_BIT, ETHTOOL_LINK_MODE_FIBRE_BIT},
  325. {QED_LM_Autoneg_BIT, ETHTOOL_LINK_MODE_Autoneg_BIT},
  326. {QED_LM_Asym_Pause_BIT, ETHTOOL_LINK_MODE_Asym_Pause_BIT},
  327. {QED_LM_Pause_BIT, ETHTOOL_LINK_MODE_Pause_BIT},
  328. {QED_LM_1000baseT_Half_BIT, ETHTOOL_LINK_MODE_1000baseT_Half_BIT},
  329. {QED_LM_1000baseT_Full_BIT, ETHTOOL_LINK_MODE_1000baseT_Full_BIT},
  330. {QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT},
  331. {QED_LM_25000baseKR_Full_BIT, ETHTOOL_LINK_MODE_25000baseKR_Full_BIT},
  332. {QED_LM_40000baseLR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT},
  333. {QED_LM_50000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT},
  334. {QED_LM_100000baseKR4_Full_BIT,
  335. ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT},
  336. };
  337. #define QEDE_DRV_TO_ETHTOOL_CAPS(caps, lk_ksettings, name) \
  338. { \
  339. int i; \
  340. \
  341. for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \
  342. if ((caps) & (qed_lm_map[i].qed_link_mode)) \
  343. __set_bit(qed_lm_map[i].ethtool_link_mode,\
  344. lk_ksettings->link_modes.name); \
  345. } \
  346. }
  347. #define QEDE_ETHTOOL_TO_DRV_CAPS(caps, lk_ksettings, name) \
  348. { \
  349. int i; \
  350. \
  351. for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \
  352. if (test_bit(qed_lm_map[i].ethtool_link_mode, \
  353. lk_ksettings->link_modes.name)) \
  354. caps |= qed_lm_map[i].qed_link_mode; \
  355. } \
  356. }
  357. static int qede_get_link_ksettings(struct net_device *dev,
  358. struct ethtool_link_ksettings *cmd)
  359. {
  360. struct ethtool_link_settings *base = &cmd->base;
  361. struct qede_dev *edev = netdev_priv(dev);
  362. struct qed_link_output current_link;
  363. __qede_lock(edev);
  364. memset(&current_link, 0, sizeof(current_link));
  365. edev->ops->common->get_link(edev->cdev, &current_link);
  366. ethtool_link_ksettings_zero_link_mode(cmd, supported);
  367. QEDE_DRV_TO_ETHTOOL_CAPS(current_link.supported_caps, cmd, supported)
  368. ethtool_link_ksettings_zero_link_mode(cmd, advertising);
  369. QEDE_DRV_TO_ETHTOOL_CAPS(current_link.advertised_caps, cmd, advertising)
  370. ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
  371. QEDE_DRV_TO_ETHTOOL_CAPS(current_link.lp_caps, cmd, lp_advertising)
  372. if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) {
  373. base->speed = current_link.speed;
  374. base->duplex = current_link.duplex;
  375. } else {
  376. base->speed = SPEED_UNKNOWN;
  377. base->duplex = DUPLEX_UNKNOWN;
  378. }
  379. __qede_unlock(edev);
  380. base->port = current_link.port;
  381. base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE :
  382. AUTONEG_DISABLE;
  383. return 0;
  384. }
  385. static int qede_set_link_ksettings(struct net_device *dev,
  386. const struct ethtool_link_ksettings *cmd)
  387. {
  388. const struct ethtool_link_settings *base = &cmd->base;
  389. struct qede_dev *edev = netdev_priv(dev);
  390. struct qed_link_output current_link;
  391. struct qed_link_params params;
  392. if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
  393. DP_INFO(edev, "Link settings are not allowed to be changed\n");
  394. return -EOPNOTSUPP;
  395. }
  396. memset(&current_link, 0, sizeof(current_link));
  397. memset(&params, 0, sizeof(params));
  398. edev->ops->common->get_link(edev->cdev, &current_link);
  399. params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS;
  400. params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG;
  401. if (base->autoneg == AUTONEG_ENABLE) {
  402. params.autoneg = true;
  403. params.forced_speed = 0;
  404. QEDE_ETHTOOL_TO_DRV_CAPS(params.adv_speeds, cmd, advertising)
  405. } else { /* forced speed */
  406. params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED;
  407. params.autoneg = false;
  408. params.forced_speed = base->speed;
  409. switch (base->speed) {
  410. case SPEED_10000:
  411. if (!(current_link.supported_caps &
  412. QED_LM_10000baseKR_Full_BIT)) {
  413. DP_INFO(edev, "10G speed not supported\n");
  414. return -EINVAL;
  415. }
  416. params.adv_speeds = QED_LM_10000baseKR_Full_BIT;
  417. break;
  418. case SPEED_25000:
  419. if (!(current_link.supported_caps &
  420. QED_LM_25000baseKR_Full_BIT)) {
  421. DP_INFO(edev, "25G speed not supported\n");
  422. return -EINVAL;
  423. }
  424. params.adv_speeds = QED_LM_25000baseKR_Full_BIT;
  425. break;
  426. case SPEED_40000:
  427. if (!(current_link.supported_caps &
  428. QED_LM_40000baseLR4_Full_BIT)) {
  429. DP_INFO(edev, "40G speed not supported\n");
  430. return -EINVAL;
  431. }
  432. params.adv_speeds = QED_LM_40000baseLR4_Full_BIT;
  433. break;
  434. case SPEED_50000:
  435. if (!(current_link.supported_caps &
  436. QED_LM_50000baseKR2_Full_BIT)) {
  437. DP_INFO(edev, "50G speed not supported\n");
  438. return -EINVAL;
  439. }
  440. params.adv_speeds = QED_LM_50000baseKR2_Full_BIT;
  441. break;
  442. case SPEED_100000:
  443. if (!(current_link.supported_caps &
  444. QED_LM_100000baseKR4_Full_BIT)) {
  445. DP_INFO(edev, "100G speed not supported\n");
  446. return -EINVAL;
  447. }
  448. params.adv_speeds = QED_LM_100000baseKR4_Full_BIT;
  449. break;
  450. default:
  451. DP_INFO(edev, "Unsupported speed %u\n", base->speed);
  452. return -EINVAL;
  453. }
  454. }
  455. params.link_up = true;
  456. edev->ops->common->set_link(edev->cdev, &params);
  457. return 0;
  458. }
  459. static void qede_get_drvinfo(struct net_device *ndev,
  460. struct ethtool_drvinfo *info)
  461. {
  462. char mfw[ETHTOOL_FWVERS_LEN], storm[ETHTOOL_FWVERS_LEN];
  463. struct qede_dev *edev = netdev_priv(ndev);
  464. strlcpy(info->driver, "qede", sizeof(info->driver));
  465. strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
  466. snprintf(storm, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
  467. edev->dev_info.common.fw_major,
  468. edev->dev_info.common.fw_minor,
  469. edev->dev_info.common.fw_rev,
  470. edev->dev_info.common.fw_eng);
  471. snprintf(mfw, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
  472. (edev->dev_info.common.mfw_rev >> 24) & 0xFF,
  473. (edev->dev_info.common.mfw_rev >> 16) & 0xFF,
  474. (edev->dev_info.common.mfw_rev >> 8) & 0xFF,
  475. edev->dev_info.common.mfw_rev & 0xFF);
  476. if ((strlen(storm) + strlen(mfw) + strlen("mfw storm ")) <
  477. sizeof(info->fw_version)) {
  478. snprintf(info->fw_version, sizeof(info->fw_version),
  479. "mfw %s storm %s", mfw, storm);
  480. } else {
  481. snprintf(info->fw_version, sizeof(info->fw_version),
  482. "%s %s", mfw, storm);
  483. }
  484. strlcpy(info->bus_info, pci_name(edev->pdev), sizeof(info->bus_info));
  485. }
  486. static void qede_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
  487. {
  488. struct qede_dev *edev = netdev_priv(ndev);
  489. if (edev->dev_info.common.wol_support) {
  490. wol->supported = WAKE_MAGIC;
  491. wol->wolopts = edev->wol_enabled ? WAKE_MAGIC : 0;
  492. }
  493. }
  494. static int qede_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
  495. {
  496. struct qede_dev *edev = netdev_priv(ndev);
  497. bool wol_requested;
  498. int rc;
  499. if (wol->wolopts & ~WAKE_MAGIC) {
  500. DP_INFO(edev,
  501. "Can't support WoL options other than magic-packet\n");
  502. return -EINVAL;
  503. }
  504. wol_requested = !!(wol->wolopts & WAKE_MAGIC);
  505. if (wol_requested == edev->wol_enabled)
  506. return 0;
  507. /* Need to actually change configuration */
  508. if (!edev->dev_info.common.wol_support) {
  509. DP_INFO(edev, "Device doesn't support WoL\n");
  510. return -EINVAL;
  511. }
  512. rc = edev->ops->common->update_wol(edev->cdev, wol_requested);
  513. if (!rc)
  514. edev->wol_enabled = wol_requested;
  515. return rc;
  516. }
  517. static u32 qede_get_msglevel(struct net_device *ndev)
  518. {
  519. struct qede_dev *edev = netdev_priv(ndev);
  520. return ((u32)edev->dp_level << QED_LOG_LEVEL_SHIFT) | edev->dp_module;
  521. }
  522. static void qede_set_msglevel(struct net_device *ndev, u32 level)
  523. {
  524. struct qede_dev *edev = netdev_priv(ndev);
  525. u32 dp_module = 0;
  526. u8 dp_level = 0;
  527. qede_config_debug(level, &dp_module, &dp_level);
  528. edev->dp_level = dp_level;
  529. edev->dp_module = dp_module;
  530. edev->ops->common->update_msglvl(edev->cdev,
  531. dp_module, dp_level);
  532. }
  533. static int qede_nway_reset(struct net_device *dev)
  534. {
  535. struct qede_dev *edev = netdev_priv(dev);
  536. struct qed_link_output current_link;
  537. struct qed_link_params link_params;
  538. if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
  539. DP_INFO(edev, "Link settings are not allowed to be changed\n");
  540. return -EOPNOTSUPP;
  541. }
  542. if (!netif_running(dev))
  543. return 0;
  544. memset(&current_link, 0, sizeof(current_link));
  545. edev->ops->common->get_link(edev->cdev, &current_link);
  546. if (!current_link.link_up)
  547. return 0;
  548. /* Toggle the link */
  549. memset(&link_params, 0, sizeof(link_params));
  550. link_params.link_up = false;
  551. edev->ops->common->set_link(edev->cdev, &link_params);
  552. link_params.link_up = true;
  553. edev->ops->common->set_link(edev->cdev, &link_params);
  554. return 0;
  555. }
  556. static u32 qede_get_link(struct net_device *dev)
  557. {
  558. struct qede_dev *edev = netdev_priv(dev);
  559. struct qed_link_output current_link;
  560. memset(&current_link, 0, sizeof(current_link));
  561. edev->ops->common->get_link(edev->cdev, &current_link);
  562. return current_link.link_up;
  563. }
  564. static int qede_get_coalesce(struct net_device *dev,
  565. struct ethtool_coalesce *coal)
  566. {
  567. struct qede_dev *edev = netdev_priv(dev);
  568. u16 rxc, txc;
  569. memset(coal, 0, sizeof(struct ethtool_coalesce));
  570. edev->ops->common->get_coalesce(edev->cdev, &rxc, &txc);
  571. coal->rx_coalesce_usecs = rxc;
  572. coal->tx_coalesce_usecs = txc;
  573. return 0;
  574. }
  575. static int qede_set_coalesce(struct net_device *dev,
  576. struct ethtool_coalesce *coal)
  577. {
  578. struct qede_dev *edev = netdev_priv(dev);
  579. int i, rc = 0;
  580. u16 rxc, txc;
  581. u8 sb_id;
  582. if (!netif_running(dev)) {
  583. DP_INFO(edev, "Interface is down\n");
  584. return -EINVAL;
  585. }
  586. if (coal->rx_coalesce_usecs > QED_COALESCE_MAX ||
  587. coal->tx_coalesce_usecs > QED_COALESCE_MAX) {
  588. DP_INFO(edev,
  589. "Can't support requested %s coalesce value [max supported value %d]\n",
  590. coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx"
  591. : "tx",
  592. QED_COALESCE_MAX);
  593. return -EINVAL;
  594. }
  595. rxc = (u16)coal->rx_coalesce_usecs;
  596. txc = (u16)coal->tx_coalesce_usecs;
  597. for_each_queue(i) {
  598. sb_id = edev->fp_array[i].sb_info->igu_sb_id;
  599. rc = edev->ops->common->set_coalesce(edev->cdev, rxc, txc,
  600. (u8)i, sb_id);
  601. if (rc) {
  602. DP_INFO(edev, "Set coalesce error, rc = %d\n", rc);
  603. return rc;
  604. }
  605. }
  606. return rc;
  607. }
  608. static void qede_get_ringparam(struct net_device *dev,
  609. struct ethtool_ringparam *ering)
  610. {
  611. struct qede_dev *edev = netdev_priv(dev);
  612. ering->rx_max_pending = NUM_RX_BDS_MAX;
  613. ering->rx_pending = edev->q_num_rx_buffers;
  614. ering->tx_max_pending = NUM_TX_BDS_MAX;
  615. ering->tx_pending = edev->q_num_tx_buffers;
  616. }
  617. static int qede_set_ringparam(struct net_device *dev,
  618. struct ethtool_ringparam *ering)
  619. {
  620. struct qede_dev *edev = netdev_priv(dev);
  621. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  622. "Set ring params command parameters: rx_pending = %d, tx_pending = %d\n",
  623. ering->rx_pending, ering->tx_pending);
  624. /* Validate legality of configuration */
  625. if (ering->rx_pending > NUM_RX_BDS_MAX ||
  626. ering->rx_pending < NUM_RX_BDS_MIN ||
  627. ering->tx_pending > NUM_TX_BDS_MAX ||
  628. ering->tx_pending < NUM_TX_BDS_MIN) {
  629. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  630. "Can only support Rx Buffer size [0%08x,...,0x%08x] and Tx Buffer size [0x%08x,...,0x%08x]\n",
  631. NUM_RX_BDS_MIN, NUM_RX_BDS_MAX,
  632. NUM_TX_BDS_MIN, NUM_TX_BDS_MAX);
  633. return -EINVAL;
  634. }
  635. /* Change ring size and re-load */
  636. edev->q_num_rx_buffers = ering->rx_pending;
  637. edev->q_num_tx_buffers = ering->tx_pending;
  638. qede_reload(edev, NULL, false);
  639. return 0;
  640. }
  641. static void qede_get_pauseparam(struct net_device *dev,
  642. struct ethtool_pauseparam *epause)
  643. {
  644. struct qede_dev *edev = netdev_priv(dev);
  645. struct qed_link_output current_link;
  646. memset(&current_link, 0, sizeof(current_link));
  647. edev->ops->common->get_link(edev->cdev, &current_link);
  648. if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
  649. epause->autoneg = true;
  650. if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE)
  651. epause->rx_pause = true;
  652. if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE)
  653. epause->tx_pause = true;
  654. DP_VERBOSE(edev, QED_MSG_DEBUG,
  655. "ethtool_pauseparam: cmd %d autoneg %d rx_pause %d tx_pause %d\n",
  656. epause->cmd, epause->autoneg, epause->rx_pause,
  657. epause->tx_pause);
  658. }
  659. static int qede_set_pauseparam(struct net_device *dev,
  660. struct ethtool_pauseparam *epause)
  661. {
  662. struct qede_dev *edev = netdev_priv(dev);
  663. struct qed_link_params params;
  664. struct qed_link_output current_link;
  665. if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
  666. DP_INFO(edev,
  667. "Pause settings are not allowed to be changed\n");
  668. return -EOPNOTSUPP;
  669. }
  670. memset(&current_link, 0, sizeof(current_link));
  671. edev->ops->common->get_link(edev->cdev, &current_link);
  672. memset(&params, 0, sizeof(params));
  673. params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG;
  674. if (epause->autoneg) {
  675. if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) {
  676. DP_INFO(edev, "autoneg not supported\n");
  677. return -EINVAL;
  678. }
  679. params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
  680. }
  681. if (epause->rx_pause)
  682. params.pause_config |= QED_LINK_PAUSE_RX_ENABLE;
  683. if (epause->tx_pause)
  684. params.pause_config |= QED_LINK_PAUSE_TX_ENABLE;
  685. params.link_up = true;
  686. edev->ops->common->set_link(edev->cdev, &params);
  687. return 0;
  688. }
  689. static void qede_get_regs(struct net_device *ndev,
  690. struct ethtool_regs *regs, void *buffer)
  691. {
  692. struct qede_dev *edev = netdev_priv(ndev);
  693. regs->version = 0;
  694. memset(buffer, 0, regs->len);
  695. if (edev->ops && edev->ops->common)
  696. edev->ops->common->dbg_all_data(edev->cdev, buffer);
  697. }
  698. static int qede_get_regs_len(struct net_device *ndev)
  699. {
  700. struct qede_dev *edev = netdev_priv(ndev);
  701. if (edev->ops && edev->ops->common)
  702. return edev->ops->common->dbg_all_data_size(edev->cdev);
  703. else
  704. return -EINVAL;
  705. }
  706. static void qede_update_mtu(struct qede_dev *edev,
  707. struct qede_reload_args *args)
  708. {
  709. edev->ndev->mtu = args->u.mtu;
  710. }
  711. /* Netdevice NDOs */
  712. int qede_change_mtu(struct net_device *ndev, int new_mtu)
  713. {
  714. struct qede_dev *edev = netdev_priv(ndev);
  715. struct qede_reload_args args;
  716. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  717. "Configuring MTU size of %d\n", new_mtu);
  718. /* Set the mtu field and re-start the interface if needed */
  719. args.u.mtu = new_mtu;
  720. args.func = &qede_update_mtu;
  721. qede_reload(edev, &args, false);
  722. edev->ops->common->update_mtu(edev->cdev, new_mtu);
  723. return 0;
  724. }
  725. static void qede_get_channels(struct net_device *dev,
  726. struct ethtool_channels *channels)
  727. {
  728. struct qede_dev *edev = netdev_priv(dev);
  729. channels->max_combined = QEDE_MAX_RSS_CNT(edev);
  730. channels->max_rx = QEDE_MAX_RSS_CNT(edev);
  731. channels->max_tx = QEDE_MAX_RSS_CNT(edev);
  732. channels->combined_count = QEDE_QUEUE_CNT(edev) - edev->fp_num_tx -
  733. edev->fp_num_rx;
  734. channels->tx_count = edev->fp_num_tx;
  735. channels->rx_count = edev->fp_num_rx;
  736. }
  737. static int qede_set_channels(struct net_device *dev,
  738. struct ethtool_channels *channels)
  739. {
  740. struct qede_dev *edev = netdev_priv(dev);
  741. u32 count;
  742. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  743. "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n",
  744. channels->rx_count, channels->tx_count,
  745. channels->other_count, channels->combined_count);
  746. count = channels->rx_count + channels->tx_count +
  747. channels->combined_count;
  748. /* We don't support `other' channels */
  749. if (channels->other_count) {
  750. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  751. "command parameters not supported\n");
  752. return -EINVAL;
  753. }
  754. if (!(channels->combined_count || (channels->rx_count &&
  755. channels->tx_count))) {
  756. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  757. "need to request at least one transmit and one receive channel\n");
  758. return -EINVAL;
  759. }
  760. if (count > QEDE_MAX_RSS_CNT(edev)) {
  761. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  762. "requested channels = %d max supported channels = %d\n",
  763. count, QEDE_MAX_RSS_CNT(edev));
  764. return -EINVAL;
  765. }
  766. /* Check if there was a change in the active parameters */
  767. if ((count == QEDE_QUEUE_CNT(edev)) &&
  768. (channels->tx_count == edev->fp_num_tx) &&
  769. (channels->rx_count == edev->fp_num_rx)) {
  770. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  771. "No change in active parameters\n");
  772. return 0;
  773. }
  774. /* We need the number of queues to be divisible between the hwfns */
  775. if ((count % edev->dev_info.common.num_hwfns) ||
  776. (channels->tx_count % edev->dev_info.common.num_hwfns) ||
  777. (channels->rx_count % edev->dev_info.common.num_hwfns)) {
  778. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  779. "Number of channels must be divisible by %04x\n",
  780. edev->dev_info.common.num_hwfns);
  781. return -EINVAL;
  782. }
  783. /* Set number of queues and reload if necessary */
  784. edev->req_queues = count;
  785. edev->req_num_tx = channels->tx_count;
  786. edev->req_num_rx = channels->rx_count;
  787. /* Reset the indirection table if rx queue count is updated */
  788. if ((edev->req_queues - edev->req_num_tx) != QEDE_RSS_COUNT(edev)) {
  789. edev->rss_params_inited &= ~QEDE_RSS_INDIR_INITED;
  790. memset(edev->rss_ind_table, 0, sizeof(edev->rss_ind_table));
  791. }
  792. qede_reload(edev, NULL, false);
  793. return 0;
  794. }
  795. static int qede_get_ts_info(struct net_device *dev,
  796. struct ethtool_ts_info *info)
  797. {
  798. struct qede_dev *edev = netdev_priv(dev);
  799. return qede_ptp_get_ts_info(edev, info);
  800. }
  801. static int qede_set_phys_id(struct net_device *dev,
  802. enum ethtool_phys_id_state state)
  803. {
  804. struct qede_dev *edev = netdev_priv(dev);
  805. u8 led_state = 0;
  806. switch (state) {
  807. case ETHTOOL_ID_ACTIVE:
  808. return 1; /* cycle on/off once per second */
  809. case ETHTOOL_ID_ON:
  810. led_state = QED_LED_MODE_ON;
  811. break;
  812. case ETHTOOL_ID_OFF:
  813. led_state = QED_LED_MODE_OFF;
  814. break;
  815. case ETHTOOL_ID_INACTIVE:
  816. led_state = QED_LED_MODE_RESTORE;
  817. break;
  818. }
  819. edev->ops->common->set_led(edev->cdev, led_state);
  820. return 0;
  821. }
  822. static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
  823. {
  824. info->data = RXH_IP_SRC | RXH_IP_DST;
  825. switch (info->flow_type) {
  826. case TCP_V4_FLOW:
  827. case TCP_V6_FLOW:
  828. info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
  829. break;
  830. case UDP_V4_FLOW:
  831. if (edev->rss_caps & QED_RSS_IPV4_UDP)
  832. info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
  833. break;
  834. case UDP_V6_FLOW:
  835. if (edev->rss_caps & QED_RSS_IPV6_UDP)
  836. info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
  837. break;
  838. case IPV4_FLOW:
  839. case IPV6_FLOW:
  840. break;
  841. default:
  842. info->data = 0;
  843. break;
  844. }
  845. return 0;
  846. }
  847. static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
  848. u32 *rules __always_unused)
  849. {
  850. struct qede_dev *edev = netdev_priv(dev);
  851. switch (info->cmd) {
  852. case ETHTOOL_GRXRINGS:
  853. info->data = QEDE_RSS_COUNT(edev);
  854. return 0;
  855. case ETHTOOL_GRXFH:
  856. return qede_get_rss_flags(edev, info);
  857. default:
  858. DP_ERR(edev, "Command parameters not supported\n");
  859. return -EOPNOTSUPP;
  860. }
  861. }
  862. static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
  863. {
  864. struct qed_update_vport_params *vport_update_params;
  865. u8 set_caps = 0, clr_caps = 0;
  866. int rc = 0;
  867. DP_VERBOSE(edev, QED_MSG_DEBUG,
  868. "Set rss flags command parameters: flow type = %d, data = %llu\n",
  869. info->flow_type, info->data);
  870. switch (info->flow_type) {
  871. case TCP_V4_FLOW:
  872. case TCP_V6_FLOW:
  873. /* For TCP only 4-tuple hash is supported */
  874. if (info->data ^ (RXH_IP_SRC | RXH_IP_DST |
  875. RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
  876. DP_INFO(edev, "Command parameters not supported\n");
  877. return -EINVAL;
  878. }
  879. return 0;
  880. case UDP_V4_FLOW:
  881. /* For UDP either 2-tuple hash or 4-tuple hash is supported */
  882. if (info->data == (RXH_IP_SRC | RXH_IP_DST |
  883. RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
  884. set_caps = QED_RSS_IPV4_UDP;
  885. DP_VERBOSE(edev, QED_MSG_DEBUG,
  886. "UDP 4-tuple enabled\n");
  887. } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
  888. clr_caps = QED_RSS_IPV4_UDP;
  889. DP_VERBOSE(edev, QED_MSG_DEBUG,
  890. "UDP 4-tuple disabled\n");
  891. } else {
  892. return -EINVAL;
  893. }
  894. break;
  895. case UDP_V6_FLOW:
  896. /* For UDP either 2-tuple hash or 4-tuple hash is supported */
  897. if (info->data == (RXH_IP_SRC | RXH_IP_DST |
  898. RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
  899. set_caps = QED_RSS_IPV6_UDP;
  900. DP_VERBOSE(edev, QED_MSG_DEBUG,
  901. "UDP 4-tuple enabled\n");
  902. } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
  903. clr_caps = QED_RSS_IPV6_UDP;
  904. DP_VERBOSE(edev, QED_MSG_DEBUG,
  905. "UDP 4-tuple disabled\n");
  906. } else {
  907. return -EINVAL;
  908. }
  909. break;
  910. case IPV4_FLOW:
  911. case IPV6_FLOW:
  912. /* For IP only 2-tuple hash is supported */
  913. if (info->data ^ (RXH_IP_SRC | RXH_IP_DST)) {
  914. DP_INFO(edev, "Command parameters not supported\n");
  915. return -EINVAL;
  916. }
  917. return 0;
  918. case SCTP_V4_FLOW:
  919. case AH_ESP_V4_FLOW:
  920. case AH_V4_FLOW:
  921. case ESP_V4_FLOW:
  922. case SCTP_V6_FLOW:
  923. case AH_ESP_V6_FLOW:
  924. case AH_V6_FLOW:
  925. case ESP_V6_FLOW:
  926. case IP_USER_FLOW:
  927. case ETHER_FLOW:
  928. /* RSS is not supported for these protocols */
  929. if (info->data) {
  930. DP_INFO(edev, "Command parameters not supported\n");
  931. return -EINVAL;
  932. }
  933. return 0;
  934. default:
  935. return -EINVAL;
  936. }
  937. /* No action is needed if there is no change in the rss capability */
  938. if (edev->rss_caps == ((edev->rss_caps & ~clr_caps) | set_caps))
  939. return 0;
  940. /* Update internal configuration */
  941. edev->rss_caps = ((edev->rss_caps & ~clr_caps) | set_caps);
  942. edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
  943. /* Re-configure if possible */
  944. __qede_lock(edev);
  945. if (edev->state == QEDE_STATE_OPEN) {
  946. vport_update_params = vzalloc(sizeof(*vport_update_params));
  947. if (!vport_update_params) {
  948. __qede_unlock(edev);
  949. return -ENOMEM;
  950. }
  951. qede_fill_rss_params(edev, &vport_update_params->rss_params,
  952. &vport_update_params->update_rss_flg);
  953. rc = edev->ops->vport_update(edev->cdev, vport_update_params);
  954. vfree(vport_update_params);
  955. }
  956. __qede_unlock(edev);
  957. return rc;
  958. }
  959. static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info)
  960. {
  961. struct qede_dev *edev = netdev_priv(dev);
  962. switch (info->cmd) {
  963. case ETHTOOL_SRXFH:
  964. return qede_set_rss_flags(edev, info);
  965. default:
  966. DP_INFO(edev, "Command parameters not supported\n");
  967. return -EOPNOTSUPP;
  968. }
  969. }
  970. static u32 qede_get_rxfh_indir_size(struct net_device *dev)
  971. {
  972. return QED_RSS_IND_TABLE_SIZE;
  973. }
  974. static u32 qede_get_rxfh_key_size(struct net_device *dev)
  975. {
  976. struct qede_dev *edev = netdev_priv(dev);
  977. return sizeof(edev->rss_key);
  978. }
  979. static int qede_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, u8 *hfunc)
  980. {
  981. struct qede_dev *edev = netdev_priv(dev);
  982. int i;
  983. if (hfunc)
  984. *hfunc = ETH_RSS_HASH_TOP;
  985. if (!indir)
  986. return 0;
  987. for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
  988. indir[i] = edev->rss_ind_table[i];
  989. if (key)
  990. memcpy(key, edev->rss_key, qede_get_rxfh_key_size(dev));
  991. return 0;
  992. }
  993. static int qede_set_rxfh(struct net_device *dev, const u32 *indir,
  994. const u8 *key, const u8 hfunc)
  995. {
  996. struct qed_update_vport_params *vport_update_params;
  997. struct qede_dev *edev = netdev_priv(dev);
  998. int i, rc = 0;
  999. if (edev->dev_info.common.num_hwfns > 1) {
  1000. DP_INFO(edev,
  1001. "RSS configuration is not supported for 100G devices\n");
  1002. return -EOPNOTSUPP;
  1003. }
  1004. if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
  1005. return -EOPNOTSUPP;
  1006. if (!indir && !key)
  1007. return 0;
  1008. if (indir) {
  1009. for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
  1010. edev->rss_ind_table[i] = indir[i];
  1011. edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
  1012. }
  1013. if (key) {
  1014. memcpy(&edev->rss_key, key, qede_get_rxfh_key_size(dev));
  1015. edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
  1016. }
  1017. __qede_lock(edev);
  1018. if (edev->state == QEDE_STATE_OPEN) {
  1019. vport_update_params = vzalloc(sizeof(*vport_update_params));
  1020. if (!vport_update_params) {
  1021. __qede_unlock(edev);
  1022. return -ENOMEM;
  1023. }
  1024. qede_fill_rss_params(edev, &vport_update_params->rss_params,
  1025. &vport_update_params->update_rss_flg);
  1026. rc = edev->ops->vport_update(edev->cdev, vport_update_params);
  1027. vfree(vport_update_params);
  1028. }
  1029. __qede_unlock(edev);
  1030. return rc;
  1031. }
  1032. /* This function enables the interrupt generation and the NAPI on the device */
  1033. static void qede_netif_start(struct qede_dev *edev)
  1034. {
  1035. int i;
  1036. if (!netif_running(edev->ndev))
  1037. return;
  1038. for_each_queue(i) {
  1039. /* Update and reenable interrupts */
  1040. qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_ENABLE, 1);
  1041. napi_enable(&edev->fp_array[i].napi);
  1042. }
  1043. }
  1044. /* This function disables the NAPI and the interrupt generation on the device */
  1045. static void qede_netif_stop(struct qede_dev *edev)
  1046. {
  1047. int i;
  1048. for_each_queue(i) {
  1049. napi_disable(&edev->fp_array[i].napi);
  1050. /* Disable interrupts */
  1051. qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_DISABLE, 0);
  1052. }
  1053. }
  1054. static int qede_selftest_transmit_traffic(struct qede_dev *edev,
  1055. struct sk_buff *skb)
  1056. {
  1057. struct qede_tx_queue *txq = NULL;
  1058. struct eth_tx_1st_bd *first_bd;
  1059. dma_addr_t mapping;
  1060. int i, idx, val;
  1061. for_each_queue(i) {
  1062. if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
  1063. txq = edev->fp_array[i].txq;
  1064. break;
  1065. }
  1066. }
  1067. if (!txq) {
  1068. DP_NOTICE(edev, "Tx path is not available\n");
  1069. return -1;
  1070. }
  1071. /* Fill the entry in the SW ring and the BDs in the FW ring */
  1072. idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
  1073. txq->sw_tx_ring.skbs[idx].skb = skb;
  1074. first_bd = qed_chain_produce(&txq->tx_pbl);
  1075. memset(first_bd, 0, sizeof(*first_bd));
  1076. val = 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
  1077. first_bd->data.bd_flags.bitfields = val;
  1078. val = skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK;
  1079. first_bd->data.bitfields |= (val << ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT);
  1080. /* Map skb linear data for DMA and set in the first BD */
  1081. mapping = dma_map_single(&edev->pdev->dev, skb->data,
  1082. skb_headlen(skb), DMA_TO_DEVICE);
  1083. if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
  1084. DP_NOTICE(edev, "SKB mapping failed\n");
  1085. return -ENOMEM;
  1086. }
  1087. BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
  1088. /* update the first BD with the actual num BDs */
  1089. first_bd->data.nbds = 1;
  1090. txq->sw_tx_prod++;
  1091. /* 'next page' entries are counted in the producer value */
  1092. val = cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
  1093. txq->tx_db.data.bd_prod = val;
  1094. /* wmb makes sure that the BDs data is updated before updating the
  1095. * producer, otherwise FW may read old data from the BDs.
  1096. */
  1097. wmb();
  1098. barrier();
  1099. writel(txq->tx_db.raw, txq->doorbell_addr);
  1100. /* mmiowb is needed to synchronize doorbell writes from more than one
  1101. * processor. It guarantees that the write arrives to the device before
  1102. * the queue lock is released and another start_xmit is called (possibly
  1103. * on another CPU). Without this barrier, the next doorbell can bypass
  1104. * this doorbell. This is applicable to IA64/Altix systems.
  1105. */
  1106. mmiowb();
  1107. for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) {
  1108. if (qede_txq_has_work(txq))
  1109. break;
  1110. usleep_range(100, 200);
  1111. }
  1112. if (!qede_txq_has_work(txq)) {
  1113. DP_NOTICE(edev, "Tx completion didn't happen\n");
  1114. return -1;
  1115. }
  1116. first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
  1117. dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
  1118. BD_UNMAP_LEN(first_bd), DMA_TO_DEVICE);
  1119. txq->sw_tx_cons++;
  1120. txq->sw_tx_ring.skbs[idx].skb = NULL;
  1121. return 0;
  1122. }
  1123. static int qede_selftest_receive_traffic(struct qede_dev *edev)
  1124. {
  1125. u16 hw_comp_cons, sw_comp_cons, sw_rx_index, len;
  1126. struct eth_fast_path_rx_reg_cqe *fp_cqe;
  1127. struct qede_rx_queue *rxq = NULL;
  1128. struct sw_rx_data *sw_rx_data;
  1129. union eth_rx_cqe *cqe;
  1130. int i, iter, rc = 0;
  1131. u8 *data_ptr;
  1132. for_each_queue(i) {
  1133. if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
  1134. rxq = edev->fp_array[i].rxq;
  1135. break;
  1136. }
  1137. }
  1138. if (!rxq) {
  1139. DP_NOTICE(edev, "Rx path is not available\n");
  1140. return -1;
  1141. }
  1142. /* The packet is expected to receive on rx-queue 0 even though RSS is
  1143. * enabled. This is because the queue 0 is configured as the default
  1144. * queue and that the loopback traffic is not IP.
  1145. */
  1146. for (iter = 0; iter < QEDE_SELFTEST_POLL_COUNT; iter++) {
  1147. if (!qede_has_rx_work(rxq)) {
  1148. usleep_range(100, 200);
  1149. continue;
  1150. }
  1151. hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
  1152. sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
  1153. /* Memory barrier to prevent the CPU from doing speculative
  1154. * reads of CQE/BD before reading hw_comp_cons. If the CQE is
  1155. * read before it is written by FW, then FW writes CQE and SB,
  1156. * and then the CPU reads the hw_comp_cons, it will use an old
  1157. * CQE.
  1158. */
  1159. rmb();
  1160. /* Get the CQE from the completion ring */
  1161. cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
  1162. /* Get the data from the SW ring */
  1163. sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
  1164. sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
  1165. fp_cqe = &cqe->fast_path_regular;
  1166. len = le16_to_cpu(fp_cqe->len_on_first_bd);
  1167. data_ptr = (u8 *)(page_address(sw_rx_data->data) +
  1168. fp_cqe->placement_offset +
  1169. sw_rx_data->page_offset);
  1170. if (ether_addr_equal(data_ptr, edev->ndev->dev_addr) &&
  1171. ether_addr_equal(data_ptr + ETH_ALEN,
  1172. edev->ndev->dev_addr)) {
  1173. for (i = ETH_HLEN; i < len; i++)
  1174. if (data_ptr[i] != (unsigned char)(i & 0xff)) {
  1175. rc = -1;
  1176. break;
  1177. }
  1178. qede_recycle_rx_bd_ring(rxq, 1);
  1179. qed_chain_recycle_consumed(&rxq->rx_comp_ring);
  1180. break;
  1181. }
  1182. DP_INFO(edev, "Not the transmitted packet\n");
  1183. qede_recycle_rx_bd_ring(rxq, 1);
  1184. qed_chain_recycle_consumed(&rxq->rx_comp_ring);
  1185. }
  1186. if (iter == QEDE_SELFTEST_POLL_COUNT) {
  1187. DP_NOTICE(edev, "Failed to receive the traffic\n");
  1188. return -1;
  1189. }
  1190. qede_update_rx_prod(edev, rxq);
  1191. return rc;
  1192. }
  1193. static int qede_selftest_run_loopback(struct qede_dev *edev, u32 loopback_mode)
  1194. {
  1195. struct qed_link_params link_params;
  1196. struct sk_buff *skb = NULL;
  1197. int rc = 0, i;
  1198. u32 pkt_size;
  1199. u8 *packet;
  1200. if (!netif_running(edev->ndev)) {
  1201. DP_NOTICE(edev, "Interface is down\n");
  1202. return -EINVAL;
  1203. }
  1204. qede_netif_stop(edev);
  1205. /* Bring up the link in Loopback mode */
  1206. memset(&link_params, 0, sizeof(link_params));
  1207. link_params.link_up = true;
  1208. link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
  1209. link_params.loopback_mode = loopback_mode;
  1210. edev->ops->common->set_link(edev->cdev, &link_params);
  1211. /* Wait for loopback configuration to apply */
  1212. msleep_interruptible(500);
  1213. /* prepare the loopback packet */
  1214. pkt_size = edev->ndev->mtu + ETH_HLEN;
  1215. skb = netdev_alloc_skb(edev->ndev, pkt_size);
  1216. if (!skb) {
  1217. DP_INFO(edev, "Can't allocate skb\n");
  1218. rc = -ENOMEM;
  1219. goto test_loopback_exit;
  1220. }
  1221. packet = skb_put(skb, pkt_size);
  1222. ether_addr_copy(packet, edev->ndev->dev_addr);
  1223. ether_addr_copy(packet + ETH_ALEN, edev->ndev->dev_addr);
  1224. memset(packet + (2 * ETH_ALEN), 0x77, (ETH_HLEN - (2 * ETH_ALEN)));
  1225. for (i = ETH_HLEN; i < pkt_size; i++)
  1226. packet[i] = (unsigned char)(i & 0xff);
  1227. rc = qede_selftest_transmit_traffic(edev, skb);
  1228. if (rc)
  1229. goto test_loopback_exit;
  1230. rc = qede_selftest_receive_traffic(edev);
  1231. if (rc)
  1232. goto test_loopback_exit;
  1233. DP_VERBOSE(edev, NETIF_MSG_RX_STATUS, "Loopback test successful\n");
  1234. test_loopback_exit:
  1235. dev_kfree_skb(skb);
  1236. /* Bring up the link in Normal mode */
  1237. memset(&link_params, 0, sizeof(link_params));
  1238. link_params.link_up = true;
  1239. link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
  1240. link_params.loopback_mode = QED_LINK_LOOPBACK_NONE;
  1241. edev->ops->common->set_link(edev->cdev, &link_params);
  1242. /* Wait for loopback configuration to apply */
  1243. msleep_interruptible(500);
  1244. qede_netif_start(edev);
  1245. return rc;
  1246. }
  1247. static void qede_self_test(struct net_device *dev,
  1248. struct ethtool_test *etest, u64 *buf)
  1249. {
  1250. struct qede_dev *edev = netdev_priv(dev);
  1251. DP_VERBOSE(edev, QED_MSG_DEBUG,
  1252. "Self-test command parameters: offline = %d, external_lb = %d\n",
  1253. (etest->flags & ETH_TEST_FL_OFFLINE),
  1254. (etest->flags & ETH_TEST_FL_EXTERNAL_LB) >> 2);
  1255. memset(buf, 0, sizeof(u64) * QEDE_ETHTOOL_TEST_MAX);
  1256. if (etest->flags & ETH_TEST_FL_OFFLINE) {
  1257. if (qede_selftest_run_loopback(edev,
  1258. QED_LINK_LOOPBACK_INT_PHY)) {
  1259. buf[QEDE_ETHTOOL_INT_LOOPBACK] = 1;
  1260. etest->flags |= ETH_TEST_FL_FAILED;
  1261. }
  1262. }
  1263. if (edev->ops->common->selftest->selftest_interrupt(edev->cdev)) {
  1264. buf[QEDE_ETHTOOL_INTERRUPT_TEST] = 1;
  1265. etest->flags |= ETH_TEST_FL_FAILED;
  1266. }
  1267. if (edev->ops->common->selftest->selftest_memory(edev->cdev)) {
  1268. buf[QEDE_ETHTOOL_MEMORY_TEST] = 1;
  1269. etest->flags |= ETH_TEST_FL_FAILED;
  1270. }
  1271. if (edev->ops->common->selftest->selftest_register(edev->cdev)) {
  1272. buf[QEDE_ETHTOOL_REGISTER_TEST] = 1;
  1273. etest->flags |= ETH_TEST_FL_FAILED;
  1274. }
  1275. if (edev->ops->common->selftest->selftest_clock(edev->cdev)) {
  1276. buf[QEDE_ETHTOOL_CLOCK_TEST] = 1;
  1277. etest->flags |= ETH_TEST_FL_FAILED;
  1278. }
  1279. if (edev->ops->common->selftest->selftest_nvram(edev->cdev)) {
  1280. buf[QEDE_ETHTOOL_NVRAM_TEST] = 1;
  1281. etest->flags |= ETH_TEST_FL_FAILED;
  1282. }
  1283. }
  1284. static int qede_set_tunable(struct net_device *dev,
  1285. const struct ethtool_tunable *tuna,
  1286. const void *data)
  1287. {
  1288. struct qede_dev *edev = netdev_priv(dev);
  1289. u32 val;
  1290. switch (tuna->id) {
  1291. case ETHTOOL_RX_COPYBREAK:
  1292. val = *(u32 *)data;
  1293. if (val < QEDE_MIN_PKT_LEN || val > QEDE_RX_HDR_SIZE) {
  1294. DP_VERBOSE(edev, QED_MSG_DEBUG,
  1295. "Invalid rx copy break value, range is [%u, %u]",
  1296. QEDE_MIN_PKT_LEN, QEDE_RX_HDR_SIZE);
  1297. return -EINVAL;
  1298. }
  1299. edev->rx_copybreak = *(u32 *)data;
  1300. break;
  1301. default:
  1302. return -EOPNOTSUPP;
  1303. }
  1304. return 0;
  1305. }
  1306. static int qede_get_tunable(struct net_device *dev,
  1307. const struct ethtool_tunable *tuna, void *data)
  1308. {
  1309. struct qede_dev *edev = netdev_priv(dev);
  1310. switch (tuna->id) {
  1311. case ETHTOOL_RX_COPYBREAK:
  1312. *(u32 *)data = edev->rx_copybreak;
  1313. break;
  1314. default:
  1315. return -EOPNOTSUPP;
  1316. }
  1317. return 0;
  1318. }
  1319. static const struct ethtool_ops qede_ethtool_ops = {
  1320. .get_link_ksettings = qede_get_link_ksettings,
  1321. .set_link_ksettings = qede_set_link_ksettings,
  1322. .get_drvinfo = qede_get_drvinfo,
  1323. .get_regs_len = qede_get_regs_len,
  1324. .get_regs = qede_get_regs,
  1325. .get_wol = qede_get_wol,
  1326. .set_wol = qede_set_wol,
  1327. .get_msglevel = qede_get_msglevel,
  1328. .set_msglevel = qede_set_msglevel,
  1329. .nway_reset = qede_nway_reset,
  1330. .get_link = qede_get_link,
  1331. .get_coalesce = qede_get_coalesce,
  1332. .set_coalesce = qede_set_coalesce,
  1333. .get_ringparam = qede_get_ringparam,
  1334. .set_ringparam = qede_set_ringparam,
  1335. .get_pauseparam = qede_get_pauseparam,
  1336. .set_pauseparam = qede_set_pauseparam,
  1337. .get_strings = qede_get_strings,
  1338. .set_phys_id = qede_set_phys_id,
  1339. .get_ethtool_stats = qede_get_ethtool_stats,
  1340. .get_priv_flags = qede_get_priv_flags,
  1341. .get_sset_count = qede_get_sset_count,
  1342. .get_rxnfc = qede_get_rxnfc,
  1343. .set_rxnfc = qede_set_rxnfc,
  1344. .get_rxfh_indir_size = qede_get_rxfh_indir_size,
  1345. .get_rxfh_key_size = qede_get_rxfh_key_size,
  1346. .get_rxfh = qede_get_rxfh,
  1347. .set_rxfh = qede_set_rxfh,
  1348. .get_ts_info = qede_get_ts_info,
  1349. .get_channels = qede_get_channels,
  1350. .set_channels = qede_set_channels,
  1351. .self_test = qede_self_test,
  1352. .get_tunable = qede_get_tunable,
  1353. .set_tunable = qede_set_tunable,
  1354. };
  1355. static const struct ethtool_ops qede_vf_ethtool_ops = {
  1356. .get_link_ksettings = qede_get_link_ksettings,
  1357. .get_drvinfo = qede_get_drvinfo,
  1358. .get_msglevel = qede_get_msglevel,
  1359. .set_msglevel = qede_set_msglevel,
  1360. .get_link = qede_get_link,
  1361. .get_ringparam = qede_get_ringparam,
  1362. .set_ringparam = qede_set_ringparam,
  1363. .get_strings = qede_get_strings,
  1364. .get_ethtool_stats = qede_get_ethtool_stats,
  1365. .get_priv_flags = qede_get_priv_flags,
  1366. .get_sset_count = qede_get_sset_count,
  1367. .get_rxnfc = qede_get_rxnfc,
  1368. .set_rxnfc = qede_set_rxnfc,
  1369. .get_rxfh_indir_size = qede_get_rxfh_indir_size,
  1370. .get_rxfh_key_size = qede_get_rxfh_key_size,
  1371. .get_rxfh = qede_get_rxfh,
  1372. .set_rxfh = qede_set_rxfh,
  1373. .get_channels = qede_get_channels,
  1374. .set_channels = qede_set_channels,
  1375. .get_tunable = qede_get_tunable,
  1376. .set_tunable = qede_set_tunable,
  1377. };
  1378. void qede_set_ethtool_ops(struct net_device *dev)
  1379. {
  1380. struct qede_dev *edev = netdev_priv(dev);
  1381. if (IS_VF(edev))
  1382. dev->ethtool_ops = &qede_vf_ethtool_ops;
  1383. else
  1384. dev->ethtool_ops = &qede_ethtool_ops;
  1385. }