qed_fcoe.c 29 KB

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  1. /* QLogic qed NIC Driver
  2. * Copyright (c) 2015-2017 QLogic Corporation
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and /or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/types.h>
  33. #include <asm/byteorder.h>
  34. #include <asm/param.h>
  35. #include <linux/delay.h>
  36. #include <linux/dma-mapping.h>
  37. #include <linux/interrupt.h>
  38. #include <linux/kernel.h>
  39. #include <linux/log2.h>
  40. #include <linux/module.h>
  41. #include <linux/pci.h>
  42. #include <linux/slab.h>
  43. #include <linux/stddef.h>
  44. #include <linux/string.h>
  45. #include <linux/version.h>
  46. #include <linux/workqueue.h>
  47. #include <linux/errno.h>
  48. #include <linux/list.h>
  49. #include <linux/spinlock.h>
  50. #define __PREVENT_DUMP_MEM_ARR__
  51. #define __PREVENT_PXP_GLOBAL_WIN__
  52. #include "qed.h"
  53. #include "qed_cxt.h"
  54. #include "qed_dev_api.h"
  55. #include "qed_fcoe.h"
  56. #include "qed_hsi.h"
  57. #include "qed_hw.h"
  58. #include "qed_int.h"
  59. #include "qed_ll2.h"
  60. #include "qed_mcp.h"
  61. #include "qed_reg_addr.h"
  62. #include "qed_sp.h"
  63. #include "qed_sriov.h"
  64. #include <linux/qed/qed_fcoe_if.h>
  65. struct qed_fcoe_conn {
  66. struct list_head list_entry;
  67. bool free_on_delete;
  68. u16 conn_id;
  69. u32 icid;
  70. u32 fw_cid;
  71. u8 layer_code;
  72. dma_addr_t sq_pbl_addr;
  73. dma_addr_t sq_curr_page_addr;
  74. dma_addr_t sq_next_page_addr;
  75. dma_addr_t xferq_pbl_addr;
  76. void *xferq_pbl_addr_virt_addr;
  77. dma_addr_t xferq_addr[4];
  78. void *xferq_addr_virt_addr[4];
  79. dma_addr_t confq_pbl_addr;
  80. void *confq_pbl_addr_virt_addr;
  81. dma_addr_t confq_addr[2];
  82. void *confq_addr_virt_addr[2];
  83. dma_addr_t terminate_params;
  84. u16 dst_mac_addr_lo;
  85. u16 dst_mac_addr_mid;
  86. u16 dst_mac_addr_hi;
  87. u16 src_mac_addr_lo;
  88. u16 src_mac_addr_mid;
  89. u16 src_mac_addr_hi;
  90. u16 tx_max_fc_pay_len;
  91. u16 e_d_tov_timer_val;
  92. u16 rec_tov_timer_val;
  93. u16 rx_max_fc_pay_len;
  94. u16 vlan_tag;
  95. u16 physical_q0;
  96. struct fc_addr_nw s_id;
  97. u8 max_conc_seqs_c3;
  98. struct fc_addr_nw d_id;
  99. u8 flags;
  100. u8 def_q_idx;
  101. };
  102. static int
  103. qed_sp_fcoe_func_start(struct qed_hwfn *p_hwfn,
  104. enum spq_mode comp_mode,
  105. struct qed_spq_comp_cb *p_comp_addr)
  106. {
  107. struct qed_fcoe_pf_params *fcoe_pf_params = NULL;
  108. struct fcoe_init_ramrod_params *p_ramrod = NULL;
  109. struct fcoe_init_func_ramrod_data *p_data;
  110. struct fcoe_conn_context *p_cxt = NULL;
  111. struct qed_spq_entry *p_ent = NULL;
  112. struct qed_sp_init_data init_data;
  113. struct qed_cxt_info cxt_info;
  114. u32 dummy_cid;
  115. int rc = 0;
  116. u16 tmp;
  117. u8 i;
  118. /* Get SPQ entry */
  119. memset(&init_data, 0, sizeof(init_data));
  120. init_data.cid = qed_spq_get_cid(p_hwfn);
  121. init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
  122. init_data.comp_mode = comp_mode;
  123. init_data.p_comp_data = p_comp_addr;
  124. rc = qed_sp_init_request(p_hwfn, &p_ent,
  125. FCOE_RAMROD_CMD_ID_INIT_FUNC,
  126. PROTOCOLID_FCOE, &init_data);
  127. if (rc)
  128. return rc;
  129. p_ramrod = &p_ent->ramrod.fcoe_init;
  130. p_data = &p_ramrod->init_ramrod_data;
  131. fcoe_pf_params = &p_hwfn->pf_params.fcoe_pf_params;
  132. p_data->mtu = cpu_to_le16(fcoe_pf_params->mtu);
  133. tmp = cpu_to_le16(fcoe_pf_params->sq_num_pbl_pages);
  134. p_data->sq_num_pages_in_pbl = tmp;
  135. rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_FCOE, &dummy_cid);
  136. if (rc)
  137. return rc;
  138. cxt_info.iid = dummy_cid;
  139. rc = qed_cxt_get_cid_info(p_hwfn, &cxt_info);
  140. if (rc) {
  141. DP_NOTICE(p_hwfn, "Cannot find context info for dummy cid=%d\n",
  142. dummy_cid);
  143. return rc;
  144. }
  145. p_cxt = cxt_info.p_cxt;
  146. SET_FIELD(p_cxt->tstorm_ag_context.flags3,
  147. TSTORM_FCOE_CONN_AG_CTX_DUMMY_TIMER_CF_EN, 1);
  148. fcoe_pf_params->dummy_icid = (u16)dummy_cid;
  149. tmp = cpu_to_le16(fcoe_pf_params->num_tasks);
  150. p_data->func_params.num_tasks = tmp;
  151. p_data->func_params.log_page_size = fcoe_pf_params->log_page_size;
  152. p_data->func_params.debug_mode = fcoe_pf_params->debug_mode;
  153. DMA_REGPAIR_LE(p_data->q_params.glbl_q_params_addr,
  154. fcoe_pf_params->glbl_q_params_addr);
  155. tmp = cpu_to_le16(fcoe_pf_params->cq_num_entries);
  156. p_data->q_params.cq_num_entries = tmp;
  157. tmp = cpu_to_le16(fcoe_pf_params->cmdq_num_entries);
  158. p_data->q_params.cmdq_num_entries = tmp;
  159. tmp = fcoe_pf_params->num_cqs;
  160. p_data->q_params.num_queues = (u8)tmp;
  161. tmp = (u16)p_hwfn->hw_info.resc_start[QED_CMDQS_CQS];
  162. p_data->q_params.queue_relative_offset = (u8)tmp;
  163. for (i = 0; i < fcoe_pf_params->num_cqs; i++) {
  164. tmp = cpu_to_le16(p_hwfn->sbs_info[i]->igu_sb_id);
  165. p_data->q_params.cq_cmdq_sb_num_arr[i] = tmp;
  166. }
  167. p_data->q_params.cq_sb_pi = fcoe_pf_params->gl_rq_pi;
  168. p_data->q_params.cmdq_sb_pi = fcoe_pf_params->gl_cmd_pi;
  169. p_data->q_params.bdq_resource_id = FCOE_BDQ_ID(p_hwfn->port_id);
  170. DMA_REGPAIR_LE(p_data->q_params.bdq_pbl_base_address[BDQ_ID_RQ],
  171. fcoe_pf_params->bdq_pbl_base_addr[BDQ_ID_RQ]);
  172. p_data->q_params.bdq_pbl_num_entries[BDQ_ID_RQ] =
  173. fcoe_pf_params->bdq_pbl_num_entries[BDQ_ID_RQ];
  174. tmp = fcoe_pf_params->bdq_xoff_threshold[BDQ_ID_RQ];
  175. p_data->q_params.bdq_xoff_threshold[BDQ_ID_RQ] = cpu_to_le16(tmp);
  176. tmp = fcoe_pf_params->bdq_xon_threshold[BDQ_ID_RQ];
  177. p_data->q_params.bdq_xon_threshold[BDQ_ID_RQ] = cpu_to_le16(tmp);
  178. DMA_REGPAIR_LE(p_data->q_params.bdq_pbl_base_address[BDQ_ID_IMM_DATA],
  179. fcoe_pf_params->bdq_pbl_base_addr[BDQ_ID_IMM_DATA]);
  180. p_data->q_params.bdq_pbl_num_entries[BDQ_ID_IMM_DATA] =
  181. fcoe_pf_params->bdq_pbl_num_entries[BDQ_ID_IMM_DATA];
  182. tmp = fcoe_pf_params->bdq_xoff_threshold[BDQ_ID_IMM_DATA];
  183. p_data->q_params.bdq_xoff_threshold[BDQ_ID_IMM_DATA] = cpu_to_le16(tmp);
  184. tmp = fcoe_pf_params->bdq_xon_threshold[BDQ_ID_IMM_DATA];
  185. p_data->q_params.bdq_xon_threshold[BDQ_ID_IMM_DATA] = cpu_to_le16(tmp);
  186. tmp = fcoe_pf_params->rq_buffer_size;
  187. p_data->q_params.rq_buffer_size = cpu_to_le16(tmp);
  188. if (fcoe_pf_params->is_target) {
  189. SET_FIELD(p_data->q_params.q_validity,
  190. SCSI_INIT_FUNC_QUEUES_RQ_VALID, 1);
  191. if (p_data->q_params.bdq_pbl_num_entries[BDQ_ID_IMM_DATA])
  192. SET_FIELD(p_data->q_params.q_validity,
  193. SCSI_INIT_FUNC_QUEUES_IMM_DATA_VALID, 1);
  194. SET_FIELD(p_data->q_params.q_validity,
  195. SCSI_INIT_FUNC_QUEUES_CMD_VALID, 1);
  196. } else {
  197. SET_FIELD(p_data->q_params.q_validity,
  198. SCSI_INIT_FUNC_QUEUES_RQ_VALID, 1);
  199. }
  200. rc = qed_spq_post(p_hwfn, p_ent, NULL);
  201. return rc;
  202. }
  203. static int
  204. qed_sp_fcoe_conn_offload(struct qed_hwfn *p_hwfn,
  205. struct qed_fcoe_conn *p_conn,
  206. enum spq_mode comp_mode,
  207. struct qed_spq_comp_cb *p_comp_addr)
  208. {
  209. struct fcoe_conn_offload_ramrod_params *p_ramrod = NULL;
  210. struct fcoe_conn_offload_ramrod_data *p_data;
  211. struct qed_spq_entry *p_ent = NULL;
  212. struct qed_sp_init_data init_data;
  213. u16 pq_id = 0, tmp;
  214. int rc;
  215. /* Get SPQ entry */
  216. memset(&init_data, 0, sizeof(init_data));
  217. init_data.cid = p_conn->icid;
  218. init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
  219. init_data.comp_mode = comp_mode;
  220. init_data.p_comp_data = p_comp_addr;
  221. rc = qed_sp_init_request(p_hwfn, &p_ent,
  222. FCOE_RAMROD_CMD_ID_OFFLOAD_CONN,
  223. PROTOCOLID_FCOE, &init_data);
  224. if (rc)
  225. return rc;
  226. p_ramrod = &p_ent->ramrod.fcoe_conn_ofld;
  227. p_data = &p_ramrod->offload_ramrod_data;
  228. /* Transmission PQ is the first of the PF */
  229. pq_id = qed_get_qm_pq(p_hwfn, PROTOCOLID_FCOE, NULL);
  230. p_conn->physical_q0 = cpu_to_le16(pq_id);
  231. p_data->physical_q0 = cpu_to_le16(pq_id);
  232. p_data->conn_id = cpu_to_le16(p_conn->conn_id);
  233. DMA_REGPAIR_LE(p_data->sq_pbl_addr, p_conn->sq_pbl_addr);
  234. DMA_REGPAIR_LE(p_data->sq_curr_page_addr, p_conn->sq_curr_page_addr);
  235. DMA_REGPAIR_LE(p_data->sq_next_page_addr, p_conn->sq_next_page_addr);
  236. DMA_REGPAIR_LE(p_data->xferq_pbl_addr, p_conn->xferq_pbl_addr);
  237. DMA_REGPAIR_LE(p_data->xferq_curr_page_addr, p_conn->xferq_addr[0]);
  238. DMA_REGPAIR_LE(p_data->xferq_next_page_addr, p_conn->xferq_addr[1]);
  239. DMA_REGPAIR_LE(p_data->respq_pbl_addr, p_conn->confq_pbl_addr);
  240. DMA_REGPAIR_LE(p_data->respq_curr_page_addr, p_conn->confq_addr[0]);
  241. DMA_REGPAIR_LE(p_data->respq_next_page_addr, p_conn->confq_addr[1]);
  242. p_data->dst_mac_addr_lo = cpu_to_le16(p_conn->dst_mac_addr_lo);
  243. p_data->dst_mac_addr_mid = cpu_to_le16(p_conn->dst_mac_addr_mid);
  244. p_data->dst_mac_addr_hi = cpu_to_le16(p_conn->dst_mac_addr_hi);
  245. p_data->src_mac_addr_lo = cpu_to_le16(p_conn->src_mac_addr_lo);
  246. p_data->src_mac_addr_mid = cpu_to_le16(p_conn->src_mac_addr_mid);
  247. p_data->src_mac_addr_hi = cpu_to_le16(p_conn->src_mac_addr_hi);
  248. tmp = cpu_to_le16(p_conn->tx_max_fc_pay_len);
  249. p_data->tx_max_fc_pay_len = tmp;
  250. tmp = cpu_to_le16(p_conn->e_d_tov_timer_val);
  251. p_data->e_d_tov_timer_val = tmp;
  252. tmp = cpu_to_le16(p_conn->rec_tov_timer_val);
  253. p_data->rec_rr_tov_timer_val = tmp;
  254. tmp = cpu_to_le16(p_conn->rx_max_fc_pay_len);
  255. p_data->rx_max_fc_pay_len = tmp;
  256. p_data->vlan_tag = cpu_to_le16(p_conn->vlan_tag);
  257. p_data->s_id.addr_hi = p_conn->s_id.addr_hi;
  258. p_data->s_id.addr_mid = p_conn->s_id.addr_mid;
  259. p_data->s_id.addr_lo = p_conn->s_id.addr_lo;
  260. p_data->max_conc_seqs_c3 = p_conn->max_conc_seqs_c3;
  261. p_data->d_id.addr_hi = p_conn->d_id.addr_hi;
  262. p_data->d_id.addr_mid = p_conn->d_id.addr_mid;
  263. p_data->d_id.addr_lo = p_conn->d_id.addr_lo;
  264. p_data->flags = p_conn->flags;
  265. p_data->def_q_idx = p_conn->def_q_idx;
  266. return qed_spq_post(p_hwfn, p_ent, NULL);
  267. }
  268. static int
  269. qed_sp_fcoe_conn_destroy(struct qed_hwfn *p_hwfn,
  270. struct qed_fcoe_conn *p_conn,
  271. enum spq_mode comp_mode,
  272. struct qed_spq_comp_cb *p_comp_addr)
  273. {
  274. struct fcoe_conn_terminate_ramrod_params *p_ramrod = NULL;
  275. struct qed_spq_entry *p_ent = NULL;
  276. struct qed_sp_init_data init_data;
  277. int rc = 0;
  278. /* Get SPQ entry */
  279. memset(&init_data, 0, sizeof(init_data));
  280. init_data.cid = p_conn->icid;
  281. init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
  282. init_data.comp_mode = comp_mode;
  283. init_data.p_comp_data = p_comp_addr;
  284. rc = qed_sp_init_request(p_hwfn, &p_ent,
  285. FCOE_RAMROD_CMD_ID_TERMINATE_CONN,
  286. PROTOCOLID_FCOE, &init_data);
  287. if (rc)
  288. return rc;
  289. p_ramrod = &p_ent->ramrod.fcoe_conn_terminate;
  290. DMA_REGPAIR_LE(p_ramrod->terminate_ramrod_data.terminate_params_addr,
  291. p_conn->terminate_params);
  292. return qed_spq_post(p_hwfn, p_ent, NULL);
  293. }
  294. static int
  295. qed_sp_fcoe_func_stop(struct qed_hwfn *p_hwfn,
  296. enum spq_mode comp_mode,
  297. struct qed_spq_comp_cb *p_comp_addr)
  298. {
  299. struct qed_ptt *p_ptt = p_hwfn->p_main_ptt;
  300. struct qed_spq_entry *p_ent = NULL;
  301. struct qed_sp_init_data init_data;
  302. u32 active_segs = 0;
  303. int rc = 0;
  304. /* Get SPQ entry */
  305. memset(&init_data, 0, sizeof(init_data));
  306. init_data.cid = p_hwfn->pf_params.fcoe_pf_params.dummy_icid;
  307. init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
  308. init_data.comp_mode = comp_mode;
  309. init_data.p_comp_data = p_comp_addr;
  310. rc = qed_sp_init_request(p_hwfn, &p_ent,
  311. FCOE_RAMROD_CMD_ID_DESTROY_FUNC,
  312. PROTOCOLID_FCOE, &init_data);
  313. if (rc)
  314. return rc;
  315. active_segs = qed_rd(p_hwfn, p_ptt, TM_REG_PF_ENABLE_TASK);
  316. active_segs &= ~BIT(QED_CXT_FCOE_TID_SEG);
  317. qed_wr(p_hwfn, p_ptt, TM_REG_PF_ENABLE_TASK, active_segs);
  318. return qed_spq_post(p_hwfn, p_ent, NULL);
  319. }
  320. static int
  321. qed_fcoe_allocate_connection(struct qed_hwfn *p_hwfn,
  322. struct qed_fcoe_conn **p_out_conn)
  323. {
  324. struct qed_fcoe_conn *p_conn = NULL;
  325. void *p_addr;
  326. u32 i;
  327. spin_lock_bh(&p_hwfn->p_fcoe_info->lock);
  328. if (!list_empty(&p_hwfn->p_fcoe_info->free_list))
  329. p_conn =
  330. list_first_entry(&p_hwfn->p_fcoe_info->free_list,
  331. struct qed_fcoe_conn, list_entry);
  332. if (p_conn) {
  333. list_del(&p_conn->list_entry);
  334. spin_unlock_bh(&p_hwfn->p_fcoe_info->lock);
  335. *p_out_conn = p_conn;
  336. return 0;
  337. }
  338. spin_unlock_bh(&p_hwfn->p_fcoe_info->lock);
  339. p_conn = kzalloc(sizeof(*p_conn), GFP_KERNEL);
  340. if (!p_conn)
  341. return -ENOMEM;
  342. p_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
  343. QED_CHAIN_PAGE_SIZE,
  344. &p_conn->xferq_pbl_addr, GFP_KERNEL);
  345. if (!p_addr)
  346. goto nomem_pbl_xferq;
  347. p_conn->xferq_pbl_addr_virt_addr = p_addr;
  348. for (i = 0; i < ARRAY_SIZE(p_conn->xferq_addr); i++) {
  349. p_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
  350. QED_CHAIN_PAGE_SIZE,
  351. &p_conn->xferq_addr[i], GFP_KERNEL);
  352. if (!p_addr)
  353. goto nomem_xferq;
  354. p_conn->xferq_addr_virt_addr[i] = p_addr;
  355. p_addr = p_conn->xferq_pbl_addr_virt_addr;
  356. ((dma_addr_t *)p_addr)[i] = p_conn->xferq_addr[i];
  357. }
  358. p_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
  359. QED_CHAIN_PAGE_SIZE,
  360. &p_conn->confq_pbl_addr, GFP_KERNEL);
  361. if (!p_addr)
  362. goto nomem_xferq;
  363. p_conn->confq_pbl_addr_virt_addr = p_addr;
  364. for (i = 0; i < ARRAY_SIZE(p_conn->confq_addr); i++) {
  365. p_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
  366. QED_CHAIN_PAGE_SIZE,
  367. &p_conn->confq_addr[i], GFP_KERNEL);
  368. if (!p_addr)
  369. goto nomem_confq;
  370. p_conn->confq_addr_virt_addr[i] = p_addr;
  371. p_addr = p_conn->confq_pbl_addr_virt_addr;
  372. ((dma_addr_t *)p_addr)[i] = p_conn->confq_addr[i];
  373. }
  374. p_conn->free_on_delete = true;
  375. *p_out_conn = p_conn;
  376. return 0;
  377. nomem_confq:
  378. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  379. QED_CHAIN_PAGE_SIZE,
  380. p_conn->confq_pbl_addr_virt_addr,
  381. p_conn->confq_pbl_addr);
  382. for (i = 0; i < ARRAY_SIZE(p_conn->confq_addr); i++)
  383. if (p_conn->confq_addr_virt_addr[i])
  384. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  385. QED_CHAIN_PAGE_SIZE,
  386. p_conn->confq_addr_virt_addr[i],
  387. p_conn->confq_addr[i]);
  388. nomem_xferq:
  389. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  390. QED_CHAIN_PAGE_SIZE,
  391. p_conn->xferq_pbl_addr_virt_addr,
  392. p_conn->xferq_pbl_addr);
  393. for (i = 0; i < ARRAY_SIZE(p_conn->xferq_addr); i++)
  394. if (p_conn->xferq_addr_virt_addr[i])
  395. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  396. QED_CHAIN_PAGE_SIZE,
  397. p_conn->xferq_addr_virt_addr[i],
  398. p_conn->xferq_addr[i]);
  399. nomem_pbl_xferq:
  400. kfree(p_conn);
  401. return -ENOMEM;
  402. }
  403. static void qed_fcoe_free_connection(struct qed_hwfn *p_hwfn,
  404. struct qed_fcoe_conn *p_conn)
  405. {
  406. u32 i;
  407. if (!p_conn)
  408. return;
  409. if (p_conn->confq_pbl_addr_virt_addr)
  410. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  411. QED_CHAIN_PAGE_SIZE,
  412. p_conn->confq_pbl_addr_virt_addr,
  413. p_conn->confq_pbl_addr);
  414. for (i = 0; i < ARRAY_SIZE(p_conn->confq_addr); i++) {
  415. if (!p_conn->confq_addr_virt_addr[i])
  416. continue;
  417. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  418. QED_CHAIN_PAGE_SIZE,
  419. p_conn->confq_addr_virt_addr[i],
  420. p_conn->confq_addr[i]);
  421. }
  422. if (p_conn->xferq_pbl_addr_virt_addr)
  423. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  424. QED_CHAIN_PAGE_SIZE,
  425. p_conn->xferq_pbl_addr_virt_addr,
  426. p_conn->xferq_pbl_addr);
  427. for (i = 0; i < ARRAY_SIZE(p_conn->xferq_addr); i++) {
  428. if (!p_conn->xferq_addr_virt_addr[i])
  429. continue;
  430. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  431. QED_CHAIN_PAGE_SIZE,
  432. p_conn->xferq_addr_virt_addr[i],
  433. p_conn->xferq_addr[i]);
  434. }
  435. kfree(p_conn);
  436. }
  437. static void __iomem *qed_fcoe_get_db_addr(struct qed_hwfn *p_hwfn, u32 cid)
  438. {
  439. return (u8 __iomem *)p_hwfn->doorbells +
  440. qed_db_addr(cid, DQ_DEMS_LEGACY);
  441. }
  442. static void __iomem *qed_fcoe_get_primary_bdq_prod(struct qed_hwfn *p_hwfn,
  443. u8 bdq_id)
  444. {
  445. u8 bdq_function_id = FCOE_BDQ_ID(p_hwfn->port_id);
  446. return (u8 __iomem *)p_hwfn->regview + GTT_BAR0_MAP_REG_MSDM_RAM +
  447. MSTORM_SCSI_BDQ_EXT_PROD_OFFSET(bdq_function_id, bdq_id);
  448. }
  449. static void __iomem *qed_fcoe_get_secondary_bdq_prod(struct qed_hwfn *p_hwfn,
  450. u8 bdq_id)
  451. {
  452. u8 bdq_function_id = FCOE_BDQ_ID(p_hwfn->port_id);
  453. return (u8 __iomem *)p_hwfn->regview + GTT_BAR0_MAP_REG_TSDM_RAM +
  454. TSTORM_SCSI_BDQ_EXT_PROD_OFFSET(bdq_function_id, bdq_id);
  455. }
  456. struct qed_fcoe_info *qed_fcoe_alloc(struct qed_hwfn *p_hwfn)
  457. {
  458. struct qed_fcoe_info *p_fcoe_info;
  459. /* Allocate LL2's set struct */
  460. p_fcoe_info = kzalloc(sizeof(*p_fcoe_info), GFP_KERNEL);
  461. if (!p_fcoe_info) {
  462. DP_NOTICE(p_hwfn, "Failed to allocate qed_fcoe_info'\n");
  463. return NULL;
  464. }
  465. INIT_LIST_HEAD(&p_fcoe_info->free_list);
  466. return p_fcoe_info;
  467. }
  468. void qed_fcoe_setup(struct qed_hwfn *p_hwfn, struct qed_fcoe_info *p_fcoe_info)
  469. {
  470. struct fcoe_task_context *p_task_ctx = NULL;
  471. int rc;
  472. u32 i;
  473. spin_lock_init(&p_fcoe_info->lock);
  474. for (i = 0; i < p_hwfn->pf_params.fcoe_pf_params.num_tasks; i++) {
  475. rc = qed_cxt_get_task_ctx(p_hwfn, i,
  476. QED_CTX_WORKING_MEM,
  477. (void **)&p_task_ctx);
  478. if (rc)
  479. continue;
  480. memset(p_task_ctx, 0, sizeof(struct fcoe_task_context));
  481. SET_FIELD(p_task_ctx->timer_context.logical_client_0,
  482. TIMERS_CONTEXT_VALIDLC0, 1);
  483. SET_FIELD(p_task_ctx->timer_context.logical_client_1,
  484. TIMERS_CONTEXT_VALIDLC1, 1);
  485. SET_FIELD(p_task_ctx->tstorm_ag_context.flags0,
  486. TSTORM_FCOE_TASK_AG_CTX_CONNECTION_TYPE, 1);
  487. }
  488. }
  489. void qed_fcoe_free(struct qed_hwfn *p_hwfn, struct qed_fcoe_info *p_fcoe_info)
  490. {
  491. struct qed_fcoe_conn *p_conn = NULL;
  492. if (!p_fcoe_info)
  493. return;
  494. while (!list_empty(&p_fcoe_info->free_list)) {
  495. p_conn = list_first_entry(&p_fcoe_info->free_list,
  496. struct qed_fcoe_conn, list_entry);
  497. if (!p_conn)
  498. break;
  499. list_del(&p_conn->list_entry);
  500. qed_fcoe_free_connection(p_hwfn, p_conn);
  501. }
  502. kfree(p_fcoe_info);
  503. }
  504. static int
  505. qed_fcoe_acquire_connection(struct qed_hwfn *p_hwfn,
  506. struct qed_fcoe_conn *p_in_conn,
  507. struct qed_fcoe_conn **p_out_conn)
  508. {
  509. struct qed_fcoe_conn *p_conn = NULL;
  510. int rc = 0;
  511. u32 icid;
  512. spin_lock_bh(&p_hwfn->p_fcoe_info->lock);
  513. rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_FCOE, &icid);
  514. spin_unlock_bh(&p_hwfn->p_fcoe_info->lock);
  515. if (rc)
  516. return rc;
  517. /* Use input connection [if provided] or allocate a new one */
  518. if (p_in_conn) {
  519. p_conn = p_in_conn;
  520. } else {
  521. rc = qed_fcoe_allocate_connection(p_hwfn, &p_conn);
  522. if (rc) {
  523. spin_lock_bh(&p_hwfn->p_fcoe_info->lock);
  524. qed_cxt_release_cid(p_hwfn, icid);
  525. spin_unlock_bh(&p_hwfn->p_fcoe_info->lock);
  526. return rc;
  527. }
  528. }
  529. p_conn->icid = icid;
  530. p_conn->fw_cid = (p_hwfn->hw_info.opaque_fid << 16) | icid;
  531. *p_out_conn = p_conn;
  532. return rc;
  533. }
  534. static void qed_fcoe_release_connection(struct qed_hwfn *p_hwfn,
  535. struct qed_fcoe_conn *p_conn)
  536. {
  537. spin_lock_bh(&p_hwfn->p_fcoe_info->lock);
  538. list_add_tail(&p_conn->list_entry, &p_hwfn->p_fcoe_info->free_list);
  539. qed_cxt_release_cid(p_hwfn, p_conn->icid);
  540. spin_unlock_bh(&p_hwfn->p_fcoe_info->lock);
  541. }
  542. static void _qed_fcoe_get_tstats(struct qed_hwfn *p_hwfn,
  543. struct qed_ptt *p_ptt,
  544. struct qed_fcoe_stats *p_stats)
  545. {
  546. struct fcoe_rx_stat tstats;
  547. u32 tstats_addr;
  548. memset(&tstats, 0, sizeof(tstats));
  549. tstats_addr = BAR0_MAP_REG_TSDM_RAM +
  550. TSTORM_FCOE_RX_STATS_OFFSET(p_hwfn->rel_pf_id);
  551. qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, sizeof(tstats));
  552. p_stats->fcoe_rx_byte_cnt = HILO_64_REGPAIR(tstats.fcoe_rx_byte_cnt);
  553. p_stats->fcoe_rx_data_pkt_cnt =
  554. HILO_64_REGPAIR(tstats.fcoe_rx_data_pkt_cnt);
  555. p_stats->fcoe_rx_xfer_pkt_cnt =
  556. HILO_64_REGPAIR(tstats.fcoe_rx_xfer_pkt_cnt);
  557. p_stats->fcoe_rx_other_pkt_cnt =
  558. HILO_64_REGPAIR(tstats.fcoe_rx_other_pkt_cnt);
  559. p_stats->fcoe_silent_drop_pkt_cmdq_full_cnt =
  560. le32_to_cpu(tstats.fcoe_silent_drop_pkt_cmdq_full_cnt);
  561. p_stats->fcoe_silent_drop_pkt_rq_full_cnt =
  562. le32_to_cpu(tstats.fcoe_silent_drop_pkt_rq_full_cnt);
  563. p_stats->fcoe_silent_drop_pkt_crc_error_cnt =
  564. le32_to_cpu(tstats.fcoe_silent_drop_pkt_crc_error_cnt);
  565. p_stats->fcoe_silent_drop_pkt_task_invalid_cnt =
  566. le32_to_cpu(tstats.fcoe_silent_drop_pkt_task_invalid_cnt);
  567. p_stats->fcoe_silent_drop_total_pkt_cnt =
  568. le32_to_cpu(tstats.fcoe_silent_drop_total_pkt_cnt);
  569. }
  570. static void _qed_fcoe_get_pstats(struct qed_hwfn *p_hwfn,
  571. struct qed_ptt *p_ptt,
  572. struct qed_fcoe_stats *p_stats)
  573. {
  574. struct fcoe_tx_stat pstats;
  575. u32 pstats_addr;
  576. memset(&pstats, 0, sizeof(pstats));
  577. pstats_addr = BAR0_MAP_REG_PSDM_RAM +
  578. PSTORM_FCOE_TX_STATS_OFFSET(p_hwfn->rel_pf_id);
  579. qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, sizeof(pstats));
  580. p_stats->fcoe_tx_byte_cnt = HILO_64_REGPAIR(pstats.fcoe_tx_byte_cnt);
  581. p_stats->fcoe_tx_data_pkt_cnt =
  582. HILO_64_REGPAIR(pstats.fcoe_tx_data_pkt_cnt);
  583. p_stats->fcoe_tx_xfer_pkt_cnt =
  584. HILO_64_REGPAIR(pstats.fcoe_tx_xfer_pkt_cnt);
  585. p_stats->fcoe_tx_other_pkt_cnt =
  586. HILO_64_REGPAIR(pstats.fcoe_tx_other_pkt_cnt);
  587. }
  588. static int qed_fcoe_get_stats(struct qed_hwfn *p_hwfn,
  589. struct qed_fcoe_stats *p_stats)
  590. {
  591. struct qed_ptt *p_ptt;
  592. memset(p_stats, 0, sizeof(*p_stats));
  593. p_ptt = qed_ptt_acquire(p_hwfn);
  594. if (!p_ptt) {
  595. DP_ERR(p_hwfn, "Failed to acquire ptt\n");
  596. return -EINVAL;
  597. }
  598. _qed_fcoe_get_tstats(p_hwfn, p_ptt, p_stats);
  599. _qed_fcoe_get_pstats(p_hwfn, p_ptt, p_stats);
  600. qed_ptt_release(p_hwfn, p_ptt);
  601. return 0;
  602. }
  603. struct qed_hash_fcoe_con {
  604. struct hlist_node node;
  605. struct qed_fcoe_conn *con;
  606. };
  607. static int qed_fill_fcoe_dev_info(struct qed_dev *cdev,
  608. struct qed_dev_fcoe_info *info)
  609. {
  610. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  611. int rc;
  612. memset(info, 0, sizeof(*info));
  613. rc = qed_fill_dev_info(cdev, &info->common);
  614. info->primary_dbq_rq_addr =
  615. qed_fcoe_get_primary_bdq_prod(hwfn, BDQ_ID_RQ);
  616. info->secondary_bdq_rq_addr =
  617. qed_fcoe_get_secondary_bdq_prod(hwfn, BDQ_ID_RQ);
  618. return rc;
  619. }
  620. static void qed_register_fcoe_ops(struct qed_dev *cdev,
  621. struct qed_fcoe_cb_ops *ops, void *cookie)
  622. {
  623. cdev->protocol_ops.fcoe = ops;
  624. cdev->ops_cookie = cookie;
  625. }
  626. static struct qed_hash_fcoe_con *qed_fcoe_get_hash(struct qed_dev *cdev,
  627. u32 handle)
  628. {
  629. struct qed_hash_fcoe_con *hash_con = NULL;
  630. if (!(cdev->flags & QED_FLAG_STORAGE_STARTED))
  631. return NULL;
  632. hash_for_each_possible(cdev->connections, hash_con, node, handle) {
  633. if (hash_con->con->icid == handle)
  634. break;
  635. }
  636. if (!hash_con || (hash_con->con->icid != handle))
  637. return NULL;
  638. return hash_con;
  639. }
  640. static int qed_fcoe_stop(struct qed_dev *cdev)
  641. {
  642. int rc;
  643. if (!(cdev->flags & QED_FLAG_STORAGE_STARTED)) {
  644. DP_NOTICE(cdev, "fcoe already stopped\n");
  645. return 0;
  646. }
  647. if (!hash_empty(cdev->connections)) {
  648. DP_NOTICE(cdev,
  649. "Can't stop fcoe - not all connections were returned\n");
  650. return -EINVAL;
  651. }
  652. /* Stop the fcoe */
  653. rc = qed_sp_fcoe_func_stop(QED_LEADING_HWFN(cdev),
  654. QED_SPQ_MODE_EBLOCK, NULL);
  655. cdev->flags &= ~QED_FLAG_STORAGE_STARTED;
  656. return rc;
  657. }
  658. static int qed_fcoe_start(struct qed_dev *cdev, struct qed_fcoe_tid *tasks)
  659. {
  660. int rc;
  661. if (cdev->flags & QED_FLAG_STORAGE_STARTED) {
  662. DP_NOTICE(cdev, "fcoe already started;\n");
  663. return 0;
  664. }
  665. rc = qed_sp_fcoe_func_start(QED_LEADING_HWFN(cdev),
  666. QED_SPQ_MODE_EBLOCK, NULL);
  667. if (rc) {
  668. DP_NOTICE(cdev, "Failed to start fcoe\n");
  669. return rc;
  670. }
  671. cdev->flags |= QED_FLAG_STORAGE_STARTED;
  672. hash_init(cdev->connections);
  673. if (tasks) {
  674. struct qed_tid_mem *tid_info = kzalloc(sizeof(*tid_info),
  675. GFP_ATOMIC);
  676. if (!tid_info) {
  677. DP_NOTICE(cdev,
  678. "Failed to allocate tasks information\n");
  679. qed_fcoe_stop(cdev);
  680. return -ENOMEM;
  681. }
  682. rc = qed_cxt_get_tid_mem_info(QED_LEADING_HWFN(cdev), tid_info);
  683. if (rc) {
  684. DP_NOTICE(cdev, "Failed to gather task information\n");
  685. qed_fcoe_stop(cdev);
  686. kfree(tid_info);
  687. return rc;
  688. }
  689. /* Fill task information */
  690. tasks->size = tid_info->tid_size;
  691. tasks->num_tids_per_block = tid_info->num_tids_per_block;
  692. memcpy(tasks->blocks, tid_info->blocks,
  693. MAX_TID_BLOCKS_FCOE * sizeof(u8 *));
  694. kfree(tid_info);
  695. }
  696. return 0;
  697. }
  698. static int qed_fcoe_acquire_conn(struct qed_dev *cdev,
  699. u32 *handle,
  700. u32 *fw_cid, void __iomem **p_doorbell)
  701. {
  702. struct qed_hash_fcoe_con *hash_con;
  703. int rc;
  704. /* Allocate a hashed connection */
  705. hash_con = kzalloc(sizeof(*hash_con), GFP_KERNEL);
  706. if (!hash_con) {
  707. DP_NOTICE(cdev, "Failed to allocate hashed connection\n");
  708. return -ENOMEM;
  709. }
  710. /* Acquire the connection */
  711. rc = qed_fcoe_acquire_connection(QED_LEADING_HWFN(cdev), NULL,
  712. &hash_con->con);
  713. if (rc) {
  714. DP_NOTICE(cdev, "Failed to acquire Connection\n");
  715. kfree(hash_con);
  716. return rc;
  717. }
  718. /* Added the connection to hash table */
  719. *handle = hash_con->con->icid;
  720. *fw_cid = hash_con->con->fw_cid;
  721. hash_add(cdev->connections, &hash_con->node, *handle);
  722. if (p_doorbell)
  723. *p_doorbell = qed_fcoe_get_db_addr(QED_LEADING_HWFN(cdev),
  724. *handle);
  725. return 0;
  726. }
  727. static int qed_fcoe_release_conn(struct qed_dev *cdev, u32 handle)
  728. {
  729. struct qed_hash_fcoe_con *hash_con;
  730. hash_con = qed_fcoe_get_hash(cdev, handle);
  731. if (!hash_con) {
  732. DP_NOTICE(cdev, "Failed to find connection for handle %d\n",
  733. handle);
  734. return -EINVAL;
  735. }
  736. hlist_del(&hash_con->node);
  737. qed_fcoe_release_connection(QED_LEADING_HWFN(cdev), hash_con->con);
  738. kfree(hash_con);
  739. return 0;
  740. }
  741. static int qed_fcoe_offload_conn(struct qed_dev *cdev,
  742. u32 handle,
  743. struct qed_fcoe_params_offload *conn_info)
  744. {
  745. struct qed_hash_fcoe_con *hash_con;
  746. struct qed_fcoe_conn *con;
  747. hash_con = qed_fcoe_get_hash(cdev, handle);
  748. if (!hash_con) {
  749. DP_NOTICE(cdev, "Failed to find connection for handle %d\n",
  750. handle);
  751. return -EINVAL;
  752. }
  753. /* Update the connection with information from the params */
  754. con = hash_con->con;
  755. con->sq_pbl_addr = conn_info->sq_pbl_addr;
  756. con->sq_curr_page_addr = conn_info->sq_curr_page_addr;
  757. con->sq_next_page_addr = conn_info->sq_next_page_addr;
  758. con->tx_max_fc_pay_len = conn_info->tx_max_fc_pay_len;
  759. con->e_d_tov_timer_val = conn_info->e_d_tov_timer_val;
  760. con->rec_tov_timer_val = conn_info->rec_tov_timer_val;
  761. con->rx_max_fc_pay_len = conn_info->rx_max_fc_pay_len;
  762. con->vlan_tag = conn_info->vlan_tag;
  763. con->max_conc_seqs_c3 = conn_info->max_conc_seqs_c3;
  764. con->flags = conn_info->flags;
  765. con->def_q_idx = conn_info->def_q_idx;
  766. con->src_mac_addr_hi = (conn_info->src_mac[5] << 8) |
  767. conn_info->src_mac[4];
  768. con->src_mac_addr_mid = (conn_info->src_mac[3] << 8) |
  769. conn_info->src_mac[2];
  770. con->src_mac_addr_lo = (conn_info->src_mac[1] << 8) |
  771. conn_info->src_mac[0];
  772. con->dst_mac_addr_hi = (conn_info->dst_mac[5] << 8) |
  773. conn_info->dst_mac[4];
  774. con->dst_mac_addr_mid = (conn_info->dst_mac[3] << 8) |
  775. conn_info->dst_mac[2];
  776. con->dst_mac_addr_lo = (conn_info->dst_mac[1] << 8) |
  777. conn_info->dst_mac[0];
  778. con->s_id.addr_hi = conn_info->s_id.addr_hi;
  779. con->s_id.addr_mid = conn_info->s_id.addr_mid;
  780. con->s_id.addr_lo = conn_info->s_id.addr_lo;
  781. con->d_id.addr_hi = conn_info->d_id.addr_hi;
  782. con->d_id.addr_mid = conn_info->d_id.addr_mid;
  783. con->d_id.addr_lo = conn_info->d_id.addr_lo;
  784. return qed_sp_fcoe_conn_offload(QED_LEADING_HWFN(cdev), con,
  785. QED_SPQ_MODE_EBLOCK, NULL);
  786. }
  787. static int qed_fcoe_destroy_conn(struct qed_dev *cdev,
  788. u32 handle, dma_addr_t terminate_params)
  789. {
  790. struct qed_hash_fcoe_con *hash_con;
  791. struct qed_fcoe_conn *con;
  792. hash_con = qed_fcoe_get_hash(cdev, handle);
  793. if (!hash_con) {
  794. DP_NOTICE(cdev, "Failed to find connection for handle %d\n",
  795. handle);
  796. return -EINVAL;
  797. }
  798. /* Update the connection with information from the params */
  799. con = hash_con->con;
  800. con->terminate_params = terminate_params;
  801. return qed_sp_fcoe_conn_destroy(QED_LEADING_HWFN(cdev), con,
  802. QED_SPQ_MODE_EBLOCK, NULL);
  803. }
  804. static int qed_fcoe_stats(struct qed_dev *cdev, struct qed_fcoe_stats *stats)
  805. {
  806. return qed_fcoe_get_stats(QED_LEADING_HWFN(cdev), stats);
  807. }
  808. void qed_get_protocol_stats_fcoe(struct qed_dev *cdev,
  809. struct qed_mcp_fcoe_stats *stats)
  810. {
  811. struct qed_fcoe_stats proto_stats;
  812. /* Retrieve FW statistics */
  813. memset(&proto_stats, 0, sizeof(proto_stats));
  814. if (qed_fcoe_stats(cdev, &proto_stats)) {
  815. DP_VERBOSE(cdev, QED_MSG_STORAGE,
  816. "Failed to collect FCoE statistics\n");
  817. return;
  818. }
  819. /* Translate FW statistics into struct */
  820. stats->rx_pkts = proto_stats.fcoe_rx_data_pkt_cnt +
  821. proto_stats.fcoe_rx_xfer_pkt_cnt +
  822. proto_stats.fcoe_rx_other_pkt_cnt;
  823. stats->tx_pkts = proto_stats.fcoe_tx_data_pkt_cnt +
  824. proto_stats.fcoe_tx_xfer_pkt_cnt +
  825. proto_stats.fcoe_tx_other_pkt_cnt;
  826. stats->fcs_err = proto_stats.fcoe_silent_drop_pkt_crc_error_cnt;
  827. /* Request protocol driver to fill-in the rest */
  828. if (cdev->protocol_ops.fcoe && cdev->ops_cookie) {
  829. struct qed_fcoe_cb_ops *ops = cdev->protocol_ops.fcoe;
  830. void *cookie = cdev->ops_cookie;
  831. if (ops->get_login_failures)
  832. stats->login_failure = ops->get_login_failures(cookie);
  833. }
  834. }
  835. static const struct qed_fcoe_ops qed_fcoe_ops_pass = {
  836. .common = &qed_common_ops_pass,
  837. .ll2 = &qed_ll2_ops_pass,
  838. .fill_dev_info = &qed_fill_fcoe_dev_info,
  839. .start = &qed_fcoe_start,
  840. .stop = &qed_fcoe_stop,
  841. .register_ops = &qed_register_fcoe_ops,
  842. .acquire_conn = &qed_fcoe_acquire_conn,
  843. .release_conn = &qed_fcoe_release_conn,
  844. .offload_conn = &qed_fcoe_offload_conn,
  845. .destroy_conn = &qed_fcoe_destroy_conn,
  846. .get_stats = &qed_fcoe_stats,
  847. };
  848. const struct qed_fcoe_ops *qed_get_fcoe_ops(void)
  849. {
  850. return &qed_fcoe_ops_pass;
  851. }
  852. EXPORT_SYMBOL(qed_get_fcoe_ops);
  853. void qed_put_fcoe_ops(void)
  854. {
  855. }
  856. EXPORT_SYMBOL(qed_put_fcoe_ops);