qed_dcbx.c 62 KB

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  1. /* QLogic qed NIC Driver
  2. * Copyright (c) 2015-2017 QLogic Corporation
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and /or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/types.h>
  33. #include <asm/byteorder.h>
  34. #include <linux/bitops.h>
  35. #include <linux/dcbnl.h>
  36. #include <linux/errno.h>
  37. #include <linux/kernel.h>
  38. #include <linux/slab.h>
  39. #include <linux/string.h>
  40. #include "qed.h"
  41. #include "qed_cxt.h"
  42. #include "qed_dcbx.h"
  43. #include "qed_hsi.h"
  44. #include "qed_sp.h"
  45. #include "qed_sriov.h"
  46. #ifdef CONFIG_DCB
  47. #include <linux/qed/qed_eth_if.h>
  48. #endif
  49. #define QED_DCBX_MAX_MIB_READ_TRY (100)
  50. #define QED_ETH_TYPE_DEFAULT (0)
  51. #define QED_ETH_TYPE_ROCE (0x8915)
  52. #define QED_UDP_PORT_TYPE_ROCE_V2 (0x12B7)
  53. #define QED_ETH_TYPE_FCOE (0x8906)
  54. #define QED_TCP_PORT_ISCSI (0xCBC)
  55. #define QED_DCBX_INVALID_PRIORITY 0xFF
  56. /* Get Traffic Class from priority traffic class table, 4 bits represent
  57. * the traffic class corresponding to the priority.
  58. */
  59. #define QED_DCBX_PRIO2TC(prio_tc_tbl, prio) \
  60. ((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7)
  61. static const struct qed_dcbx_app_metadata qed_dcbx_app_update[] = {
  62. {DCBX_PROTOCOL_ISCSI, "ISCSI", QED_PCI_DEFAULT},
  63. {DCBX_PROTOCOL_FCOE, "FCOE", QED_PCI_DEFAULT},
  64. {DCBX_PROTOCOL_ROCE, "ROCE", QED_PCI_DEFAULT},
  65. {DCBX_PROTOCOL_ROCE_V2, "ROCE_V2", QED_PCI_DEFAULT},
  66. {DCBX_PROTOCOL_ETH, "ETH", QED_PCI_ETH}
  67. };
  68. static bool qed_dcbx_app_ethtype(u32 app_info_bitmap)
  69. {
  70. return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) ==
  71. DCBX_APP_SF_ETHTYPE);
  72. }
  73. static bool qed_dcbx_ieee_app_ethtype(u32 app_info_bitmap)
  74. {
  75. u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
  76. /* Old MFW */
  77. if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
  78. return qed_dcbx_app_ethtype(app_info_bitmap);
  79. return !!(mfw_val == DCBX_APP_SF_IEEE_ETHTYPE);
  80. }
  81. static bool qed_dcbx_app_port(u32 app_info_bitmap)
  82. {
  83. return !!(QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) ==
  84. DCBX_APP_SF_PORT);
  85. }
  86. static bool qed_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type)
  87. {
  88. u8 mfw_val = QED_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
  89. /* Old MFW */
  90. if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
  91. return qed_dcbx_app_port(app_info_bitmap);
  92. return !!(mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT);
  93. }
  94. static bool qed_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
  95. {
  96. bool ethtype;
  97. if (ieee)
  98. ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap);
  99. else
  100. ethtype = qed_dcbx_app_ethtype(app_info_bitmap);
  101. return !!(ethtype && (proto_id == QED_ETH_TYPE_DEFAULT));
  102. }
  103. static bool qed_dcbx_iscsi_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
  104. {
  105. bool port;
  106. if (ieee)
  107. port = qed_dcbx_ieee_app_port(app_info_bitmap,
  108. DCBX_APP_SF_IEEE_TCP_PORT);
  109. else
  110. port = qed_dcbx_app_port(app_info_bitmap);
  111. return !!(port && (proto_id == QED_TCP_PORT_ISCSI));
  112. }
  113. static bool qed_dcbx_fcoe_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
  114. {
  115. bool ethtype;
  116. if (ieee)
  117. ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap);
  118. else
  119. ethtype = qed_dcbx_app_ethtype(app_info_bitmap);
  120. return !!(ethtype && (proto_id == QED_ETH_TYPE_FCOE));
  121. }
  122. static bool qed_dcbx_roce_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
  123. {
  124. bool ethtype;
  125. if (ieee)
  126. ethtype = qed_dcbx_ieee_app_ethtype(app_info_bitmap);
  127. else
  128. ethtype = qed_dcbx_app_ethtype(app_info_bitmap);
  129. return !!(ethtype && (proto_id == QED_ETH_TYPE_ROCE));
  130. }
  131. static bool qed_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
  132. {
  133. bool port;
  134. if (ieee)
  135. port = qed_dcbx_ieee_app_port(app_info_bitmap,
  136. DCBX_APP_SF_IEEE_UDP_PORT);
  137. else
  138. port = qed_dcbx_app_port(app_info_bitmap);
  139. return !!(port && (proto_id == QED_UDP_PORT_TYPE_ROCE_V2));
  140. }
  141. static void
  142. qed_dcbx_dp_protocol(struct qed_hwfn *p_hwfn, struct qed_dcbx_results *p_data)
  143. {
  144. enum dcbx_protocol_type id;
  145. int i;
  146. DP_VERBOSE(p_hwfn, QED_MSG_DCB, "DCBX negotiated: %d\n",
  147. p_data->dcbx_enabled);
  148. for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) {
  149. id = qed_dcbx_app_update[i].id;
  150. DP_VERBOSE(p_hwfn, QED_MSG_DCB,
  151. "%s info: update %d, enable %d, prio %d, tc %d, num_tc %d\n",
  152. qed_dcbx_app_update[i].name, p_data->arr[id].update,
  153. p_data->arr[id].enable, p_data->arr[id].priority,
  154. p_data->arr[id].tc, p_hwfn->hw_info.num_tc);
  155. }
  156. }
  157. static void
  158. qed_dcbx_set_params(struct qed_dcbx_results *p_data,
  159. struct qed_hw_info *p_info,
  160. bool enable,
  161. bool update,
  162. u8 prio,
  163. u8 tc,
  164. enum dcbx_protocol_type type,
  165. enum qed_pci_personality personality)
  166. {
  167. /* PF update ramrod data */
  168. p_data->arr[type].update = update;
  169. p_data->arr[type].enable = enable;
  170. p_data->arr[type].priority = prio;
  171. p_data->arr[type].tc = tc;
  172. /* QM reconf data */
  173. if (p_info->personality == personality) {
  174. if (personality == QED_PCI_ETH)
  175. p_info->non_offload_tc = tc;
  176. else
  177. p_info->offload_tc = tc;
  178. }
  179. }
  180. /* Update app protocol data and hw_info fields with the TLV info */
  181. static void
  182. qed_dcbx_update_app_info(struct qed_dcbx_results *p_data,
  183. struct qed_hwfn *p_hwfn,
  184. bool enable,
  185. bool update,
  186. u8 prio, u8 tc, enum dcbx_protocol_type type)
  187. {
  188. struct qed_hw_info *p_info = &p_hwfn->hw_info;
  189. enum qed_pci_personality personality;
  190. enum dcbx_protocol_type id;
  191. char *name;
  192. int i;
  193. for (i = 0; i < ARRAY_SIZE(qed_dcbx_app_update); i++) {
  194. id = qed_dcbx_app_update[i].id;
  195. if (type != id)
  196. continue;
  197. personality = qed_dcbx_app_update[i].personality;
  198. name = qed_dcbx_app_update[i].name;
  199. qed_dcbx_set_params(p_data, p_info, enable, update,
  200. prio, tc, type, personality);
  201. }
  202. }
  203. static bool
  204. qed_dcbx_get_app_protocol_type(struct qed_hwfn *p_hwfn,
  205. u32 app_prio_bitmap,
  206. u16 id, enum dcbx_protocol_type *type, bool ieee)
  207. {
  208. if (qed_dcbx_fcoe_tlv(app_prio_bitmap, id, ieee)) {
  209. *type = DCBX_PROTOCOL_FCOE;
  210. } else if (qed_dcbx_roce_tlv(app_prio_bitmap, id, ieee)) {
  211. *type = DCBX_PROTOCOL_ROCE;
  212. } else if (qed_dcbx_iscsi_tlv(app_prio_bitmap, id, ieee)) {
  213. *type = DCBX_PROTOCOL_ISCSI;
  214. } else if (qed_dcbx_default_tlv(app_prio_bitmap, id, ieee)) {
  215. *type = DCBX_PROTOCOL_ETH;
  216. } else if (qed_dcbx_roce_v2_tlv(app_prio_bitmap, id, ieee)) {
  217. *type = DCBX_PROTOCOL_ROCE_V2;
  218. } else {
  219. *type = DCBX_MAX_PROTOCOL_TYPE;
  220. DP_ERR(p_hwfn,
  221. "No action required, App TLV id = 0x%x app_prio_bitmap = 0x%x\n",
  222. id, app_prio_bitmap);
  223. return false;
  224. }
  225. return true;
  226. }
  227. /* Parse app TLV's to update TC information in hw_info structure for
  228. * reconfiguring QM. Get protocol specific data for PF update ramrod command.
  229. */
  230. static int
  231. qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn,
  232. struct qed_dcbx_results *p_data,
  233. struct dcbx_app_priority_entry *p_tbl,
  234. u32 pri_tc_tbl, int count, u8 dcbx_version)
  235. {
  236. u8 tc, priority_map;
  237. enum dcbx_protocol_type type;
  238. bool enable, ieee;
  239. u16 protocol_id;
  240. int priority;
  241. int i;
  242. DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Num APP entries = %d\n", count);
  243. ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE);
  244. /* Parse APP TLV */
  245. for (i = 0; i < count; i++) {
  246. protocol_id = QED_MFW_GET_FIELD(p_tbl[i].entry,
  247. DCBX_APP_PROTOCOL_ID);
  248. priority_map = QED_MFW_GET_FIELD(p_tbl[i].entry,
  249. DCBX_APP_PRI_MAP);
  250. priority = ffs(priority_map) - 1;
  251. if (priority < 0) {
  252. DP_ERR(p_hwfn, "Invalid priority\n");
  253. return -EINVAL;
  254. }
  255. tc = QED_DCBX_PRIO2TC(pri_tc_tbl, priority);
  256. if (qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
  257. protocol_id, &type, ieee)) {
  258. /* ETH always have the enable bit reset, as it gets
  259. * vlan information per packet. For other protocols,
  260. * should be set according to the dcbx_enabled
  261. * indication, but we only got here if there was an
  262. * app tlv for the protocol, so dcbx must be enabled.
  263. */
  264. enable = !(type == DCBX_PROTOCOL_ETH);
  265. qed_dcbx_update_app_info(p_data, p_hwfn, enable, true,
  266. priority, tc, type);
  267. }
  268. }
  269. /* If RoCE-V2 TLV is not detected, driver need to use RoCE app
  270. * data for RoCE-v2 not the default app data.
  271. */
  272. if (!p_data->arr[DCBX_PROTOCOL_ROCE_V2].update &&
  273. p_data->arr[DCBX_PROTOCOL_ROCE].update) {
  274. tc = p_data->arr[DCBX_PROTOCOL_ROCE].tc;
  275. priority = p_data->arr[DCBX_PROTOCOL_ROCE].priority;
  276. qed_dcbx_update_app_info(p_data, p_hwfn, true, true,
  277. priority, tc, DCBX_PROTOCOL_ROCE_V2);
  278. }
  279. /* Update ramrod protocol data and hw_info fields
  280. * with default info when corresponding APP TLV's are not detected.
  281. * The enabled field has a different logic for ethernet as only for
  282. * ethernet dcb should disabled by default, as the information arrives
  283. * from the OS (unless an explicit app tlv was present).
  284. */
  285. tc = p_data->arr[DCBX_PROTOCOL_ETH].tc;
  286. priority = p_data->arr[DCBX_PROTOCOL_ETH].priority;
  287. for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) {
  288. if (p_data->arr[type].update)
  289. continue;
  290. enable = !(type == DCBX_PROTOCOL_ETH);
  291. qed_dcbx_update_app_info(p_data, p_hwfn, enable, true,
  292. priority, tc, type);
  293. }
  294. return 0;
  295. }
  296. /* Parse app TLV's to update TC information in hw_info structure for
  297. * reconfiguring QM. Get protocol specific data for PF update ramrod command.
  298. */
  299. static int qed_dcbx_process_mib_info(struct qed_hwfn *p_hwfn)
  300. {
  301. struct dcbx_app_priority_feature *p_app;
  302. struct dcbx_app_priority_entry *p_tbl;
  303. struct qed_dcbx_results data = { 0 };
  304. struct dcbx_ets_feature *p_ets;
  305. struct qed_hw_info *p_info;
  306. u32 pri_tc_tbl, flags;
  307. u8 dcbx_version;
  308. int num_entries;
  309. int rc = 0;
  310. flags = p_hwfn->p_dcbx_info->operational.flags;
  311. dcbx_version = QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION);
  312. p_app = &p_hwfn->p_dcbx_info->operational.features.app;
  313. p_tbl = p_app->app_pri_tbl;
  314. p_ets = &p_hwfn->p_dcbx_info->operational.features.ets;
  315. pri_tc_tbl = p_ets->pri_tc_tbl[0];
  316. p_info = &p_hwfn->hw_info;
  317. num_entries = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES);
  318. rc = qed_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl,
  319. num_entries, dcbx_version);
  320. if (rc)
  321. return rc;
  322. p_info->num_tc = QED_MFW_GET_FIELD(p_ets->flags, DCBX_ETS_MAX_TCS);
  323. data.pf_id = p_hwfn->rel_pf_id;
  324. data.dcbx_enabled = !!dcbx_version;
  325. qed_dcbx_dp_protocol(p_hwfn, &data);
  326. memcpy(&p_hwfn->p_dcbx_info->results, &data,
  327. sizeof(struct qed_dcbx_results));
  328. return 0;
  329. }
  330. static int
  331. qed_dcbx_copy_mib(struct qed_hwfn *p_hwfn,
  332. struct qed_ptt *p_ptt,
  333. struct qed_dcbx_mib_meta_data *p_data,
  334. enum qed_mib_read_type type)
  335. {
  336. u32 prefix_seq_num, suffix_seq_num;
  337. int read_count = 0;
  338. int rc = 0;
  339. /* The data is considered to be valid only if both sequence numbers are
  340. * the same.
  341. */
  342. do {
  343. if (type == QED_DCBX_REMOTE_LLDP_MIB) {
  344. qed_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote,
  345. p_data->addr, p_data->size);
  346. prefix_seq_num = p_data->lldp_remote->prefix_seq_num;
  347. suffix_seq_num = p_data->lldp_remote->suffix_seq_num;
  348. } else {
  349. qed_memcpy_from(p_hwfn, p_ptt, p_data->mib,
  350. p_data->addr, p_data->size);
  351. prefix_seq_num = p_data->mib->prefix_seq_num;
  352. suffix_seq_num = p_data->mib->suffix_seq_num;
  353. }
  354. read_count++;
  355. DP_VERBOSE(p_hwfn,
  356. QED_MSG_DCB,
  357. "mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n",
  358. type, read_count, prefix_seq_num, suffix_seq_num);
  359. } while ((prefix_seq_num != suffix_seq_num) &&
  360. (read_count < QED_DCBX_MAX_MIB_READ_TRY));
  361. if (read_count >= QED_DCBX_MAX_MIB_READ_TRY) {
  362. DP_ERR(p_hwfn,
  363. "MIB read err, mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n",
  364. type, read_count, prefix_seq_num, suffix_seq_num);
  365. rc = -EIO;
  366. }
  367. return rc;
  368. }
  369. static void
  370. qed_dcbx_get_priority_info(struct qed_hwfn *p_hwfn,
  371. struct qed_dcbx_app_prio *p_prio,
  372. struct qed_dcbx_results *p_results)
  373. {
  374. u8 val;
  375. p_prio->roce = QED_DCBX_INVALID_PRIORITY;
  376. p_prio->roce_v2 = QED_DCBX_INVALID_PRIORITY;
  377. p_prio->iscsi = QED_DCBX_INVALID_PRIORITY;
  378. p_prio->fcoe = QED_DCBX_INVALID_PRIORITY;
  379. if (p_results->arr[DCBX_PROTOCOL_ROCE].update &&
  380. p_results->arr[DCBX_PROTOCOL_ROCE].enable)
  381. p_prio->roce = p_results->arr[DCBX_PROTOCOL_ROCE].priority;
  382. if (p_results->arr[DCBX_PROTOCOL_ROCE_V2].update &&
  383. p_results->arr[DCBX_PROTOCOL_ROCE_V2].enable) {
  384. val = p_results->arr[DCBX_PROTOCOL_ROCE_V2].priority;
  385. p_prio->roce_v2 = val;
  386. }
  387. if (p_results->arr[DCBX_PROTOCOL_ISCSI].update &&
  388. p_results->arr[DCBX_PROTOCOL_ISCSI].enable)
  389. p_prio->iscsi = p_results->arr[DCBX_PROTOCOL_ISCSI].priority;
  390. if (p_results->arr[DCBX_PROTOCOL_FCOE].update &&
  391. p_results->arr[DCBX_PROTOCOL_FCOE].enable)
  392. p_prio->fcoe = p_results->arr[DCBX_PROTOCOL_FCOE].priority;
  393. if (p_results->arr[DCBX_PROTOCOL_ETH].update &&
  394. p_results->arr[DCBX_PROTOCOL_ETH].enable)
  395. p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority;
  396. DP_VERBOSE(p_hwfn, QED_MSG_DCB,
  397. "Priorities: iscsi %d, roce %d, roce v2 %d, fcoe %d, eth %d\n",
  398. p_prio->iscsi, p_prio->roce, p_prio->roce_v2, p_prio->fcoe,
  399. p_prio->eth);
  400. }
  401. static void
  402. qed_dcbx_get_app_data(struct qed_hwfn *p_hwfn,
  403. struct dcbx_app_priority_feature *p_app,
  404. struct dcbx_app_priority_entry *p_tbl,
  405. struct qed_dcbx_params *p_params, bool ieee)
  406. {
  407. struct qed_app_entry *entry;
  408. u8 pri_map;
  409. int i;
  410. p_params->app_willing = QED_MFW_GET_FIELD(p_app->flags,
  411. DCBX_APP_WILLING);
  412. p_params->app_valid = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ENABLED);
  413. p_params->app_error = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_ERROR);
  414. p_params->num_app_entries = QED_MFW_GET_FIELD(p_app->flags,
  415. DCBX_APP_NUM_ENTRIES);
  416. for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
  417. entry = &p_params->app_entry[i];
  418. if (ieee) {
  419. u8 sf_ieee;
  420. u32 val;
  421. sf_ieee = QED_MFW_GET_FIELD(p_tbl[i].entry,
  422. DCBX_APP_SF_IEEE);
  423. switch (sf_ieee) {
  424. case DCBX_APP_SF_IEEE_RESERVED:
  425. /* Old MFW */
  426. val = QED_MFW_GET_FIELD(p_tbl[i].entry,
  427. DCBX_APP_SF);
  428. entry->sf_ieee = val ?
  429. QED_DCBX_SF_IEEE_TCP_UDP_PORT :
  430. QED_DCBX_SF_IEEE_ETHTYPE;
  431. break;
  432. case DCBX_APP_SF_IEEE_ETHTYPE:
  433. entry->sf_ieee = QED_DCBX_SF_IEEE_ETHTYPE;
  434. break;
  435. case DCBX_APP_SF_IEEE_TCP_PORT:
  436. entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_PORT;
  437. break;
  438. case DCBX_APP_SF_IEEE_UDP_PORT:
  439. entry->sf_ieee = QED_DCBX_SF_IEEE_UDP_PORT;
  440. break;
  441. case DCBX_APP_SF_IEEE_TCP_UDP_PORT:
  442. entry->sf_ieee = QED_DCBX_SF_IEEE_TCP_UDP_PORT;
  443. break;
  444. }
  445. } else {
  446. entry->ethtype = !(QED_MFW_GET_FIELD(p_tbl[i].entry,
  447. DCBX_APP_SF));
  448. }
  449. pri_map = QED_MFW_GET_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP);
  450. entry->prio = ffs(pri_map) - 1;
  451. entry->proto_id = QED_MFW_GET_FIELD(p_tbl[i].entry,
  452. DCBX_APP_PROTOCOL_ID);
  453. qed_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
  454. entry->proto_id,
  455. &entry->proto_type, ieee);
  456. }
  457. DP_VERBOSE(p_hwfn, QED_MSG_DCB,
  458. "APP params: willing %d, valid %d error = %d\n",
  459. p_params->app_willing, p_params->app_valid,
  460. p_params->app_error);
  461. }
  462. static void
  463. qed_dcbx_get_pfc_data(struct qed_hwfn *p_hwfn,
  464. u32 pfc, struct qed_dcbx_params *p_params)
  465. {
  466. u8 pfc_map;
  467. p_params->pfc.willing = QED_MFW_GET_FIELD(pfc, DCBX_PFC_WILLING);
  468. p_params->pfc.max_tc = QED_MFW_GET_FIELD(pfc, DCBX_PFC_CAPS);
  469. p_params->pfc.enabled = QED_MFW_GET_FIELD(pfc, DCBX_PFC_ENABLED);
  470. pfc_map = QED_MFW_GET_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP);
  471. p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0);
  472. p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1);
  473. p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2);
  474. p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3);
  475. p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4);
  476. p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5);
  477. p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6);
  478. p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7);
  479. DP_VERBOSE(p_hwfn, QED_MSG_DCB,
  480. "PFC params: willing %d, pfc_bitmap %d\n",
  481. p_params->pfc.willing, pfc_map);
  482. }
  483. static void
  484. qed_dcbx_get_ets_data(struct qed_hwfn *p_hwfn,
  485. struct dcbx_ets_feature *p_ets,
  486. struct qed_dcbx_params *p_params)
  487. {
  488. u32 bw_map[2], tsa_map[2], pri_map;
  489. int i;
  490. p_params->ets_willing = QED_MFW_GET_FIELD(p_ets->flags,
  491. DCBX_ETS_WILLING);
  492. p_params->ets_enabled = QED_MFW_GET_FIELD(p_ets->flags,
  493. DCBX_ETS_ENABLED);
  494. p_params->ets_cbs = QED_MFW_GET_FIELD(p_ets->flags, DCBX_ETS_CBS);
  495. p_params->max_ets_tc = QED_MFW_GET_FIELD(p_ets->flags,
  496. DCBX_ETS_MAX_TCS);
  497. DP_VERBOSE(p_hwfn, QED_MSG_DCB,
  498. "ETS params: willing %d, ets_cbs %d pri_tc_tbl_0 %x max_ets_tc %d\n",
  499. p_params->ets_willing,
  500. p_params->ets_cbs,
  501. p_ets->pri_tc_tbl[0], p_params->max_ets_tc);
  502. /* 8 bit tsa and bw data corresponding to each of the 8 TC's are
  503. * encoded in a type u32 array of size 2.
  504. */
  505. bw_map[0] = be32_to_cpu(p_ets->tc_bw_tbl[0]);
  506. bw_map[1] = be32_to_cpu(p_ets->tc_bw_tbl[1]);
  507. tsa_map[0] = be32_to_cpu(p_ets->tc_tsa_tbl[0]);
  508. tsa_map[1] = be32_to_cpu(p_ets->tc_tsa_tbl[1]);
  509. pri_map = p_ets->pri_tc_tbl[0];
  510. for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) {
  511. p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i];
  512. p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i];
  513. p_params->ets_pri_tc_tbl[i] = QED_DCBX_PRIO2TC(pri_map, i);
  514. DP_VERBOSE(p_hwfn, QED_MSG_DCB,
  515. "elem %d bw_tbl %x tsa_tbl %x\n",
  516. i, p_params->ets_tc_bw_tbl[i],
  517. p_params->ets_tc_tsa_tbl[i]);
  518. }
  519. }
  520. static void
  521. qed_dcbx_get_common_params(struct qed_hwfn *p_hwfn,
  522. struct dcbx_app_priority_feature *p_app,
  523. struct dcbx_app_priority_entry *p_tbl,
  524. struct dcbx_ets_feature *p_ets,
  525. u32 pfc, struct qed_dcbx_params *p_params, bool ieee)
  526. {
  527. qed_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee);
  528. qed_dcbx_get_ets_data(p_hwfn, p_ets, p_params);
  529. qed_dcbx_get_pfc_data(p_hwfn, pfc, p_params);
  530. }
  531. static void
  532. qed_dcbx_get_local_params(struct qed_hwfn *p_hwfn,
  533. struct qed_ptt *p_ptt, struct qed_dcbx_get *params)
  534. {
  535. struct dcbx_features *p_feat;
  536. p_feat = &p_hwfn->p_dcbx_info->local_admin.features;
  537. qed_dcbx_get_common_params(p_hwfn, &p_feat->app,
  538. p_feat->app.app_pri_tbl, &p_feat->ets,
  539. p_feat->pfc, &params->local.params, false);
  540. params->local.valid = true;
  541. }
  542. static void
  543. qed_dcbx_get_remote_params(struct qed_hwfn *p_hwfn,
  544. struct qed_ptt *p_ptt, struct qed_dcbx_get *params)
  545. {
  546. struct dcbx_features *p_feat;
  547. p_feat = &p_hwfn->p_dcbx_info->remote.features;
  548. qed_dcbx_get_common_params(p_hwfn, &p_feat->app,
  549. p_feat->app.app_pri_tbl, &p_feat->ets,
  550. p_feat->pfc, &params->remote.params, false);
  551. params->remote.valid = true;
  552. }
  553. static void
  554. qed_dcbx_get_operational_params(struct qed_hwfn *p_hwfn,
  555. struct qed_ptt *p_ptt,
  556. struct qed_dcbx_get *params)
  557. {
  558. struct qed_dcbx_operational_params *p_operational;
  559. struct qed_dcbx_results *p_results;
  560. struct dcbx_features *p_feat;
  561. bool enabled, err;
  562. u32 flags;
  563. bool val;
  564. flags = p_hwfn->p_dcbx_info->operational.flags;
  565. /* If DCBx version is non zero, then negotiation
  566. * was successfuly performed
  567. */
  568. p_operational = &params->operational;
  569. enabled = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) !=
  570. DCBX_CONFIG_VERSION_DISABLED);
  571. if (!enabled) {
  572. p_operational->enabled = enabled;
  573. p_operational->valid = false;
  574. return;
  575. }
  576. p_feat = &p_hwfn->p_dcbx_info->operational.features;
  577. p_results = &p_hwfn->p_dcbx_info->results;
  578. val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) ==
  579. DCBX_CONFIG_VERSION_IEEE);
  580. p_operational->ieee = val;
  581. val = !!(QED_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) ==
  582. DCBX_CONFIG_VERSION_CEE);
  583. p_operational->cee = val;
  584. DP_VERBOSE(p_hwfn, QED_MSG_DCB, "Version support: ieee %d, cee %d\n",
  585. p_operational->ieee, p_operational->cee);
  586. qed_dcbx_get_common_params(p_hwfn, &p_feat->app,
  587. p_feat->app.app_pri_tbl, &p_feat->ets,
  588. p_feat->pfc, &params->operational.params,
  589. p_operational->ieee);
  590. qed_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio, p_results);
  591. err = QED_MFW_GET_FIELD(p_feat->app.flags, DCBX_APP_ERROR);
  592. p_operational->err = err;
  593. p_operational->enabled = enabled;
  594. p_operational->valid = true;
  595. }
  596. static void
  597. qed_dcbx_get_local_lldp_params(struct qed_hwfn *p_hwfn,
  598. struct qed_ptt *p_ptt,
  599. struct qed_dcbx_get *params)
  600. {
  601. struct lldp_config_params_s *p_local;
  602. p_local = &p_hwfn->p_dcbx_info->lldp_local[LLDP_NEAREST_BRIDGE];
  603. memcpy(params->lldp_local.local_chassis_id, p_local->local_chassis_id,
  604. ARRAY_SIZE(p_local->local_chassis_id));
  605. memcpy(params->lldp_local.local_port_id, p_local->local_port_id,
  606. ARRAY_SIZE(p_local->local_port_id));
  607. }
  608. static void
  609. qed_dcbx_get_remote_lldp_params(struct qed_hwfn *p_hwfn,
  610. struct qed_ptt *p_ptt,
  611. struct qed_dcbx_get *params)
  612. {
  613. struct lldp_status_params_s *p_remote;
  614. p_remote = &p_hwfn->p_dcbx_info->lldp_remote[LLDP_NEAREST_BRIDGE];
  615. memcpy(params->lldp_remote.peer_chassis_id, p_remote->peer_chassis_id,
  616. ARRAY_SIZE(p_remote->peer_chassis_id));
  617. memcpy(params->lldp_remote.peer_port_id, p_remote->peer_port_id,
  618. ARRAY_SIZE(p_remote->peer_port_id));
  619. }
  620. static int
  621. qed_dcbx_get_params(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
  622. struct qed_dcbx_get *p_params,
  623. enum qed_mib_read_type type)
  624. {
  625. switch (type) {
  626. case QED_DCBX_REMOTE_MIB:
  627. qed_dcbx_get_remote_params(p_hwfn, p_ptt, p_params);
  628. break;
  629. case QED_DCBX_LOCAL_MIB:
  630. qed_dcbx_get_local_params(p_hwfn, p_ptt, p_params);
  631. break;
  632. case QED_DCBX_OPERATIONAL_MIB:
  633. qed_dcbx_get_operational_params(p_hwfn, p_ptt, p_params);
  634. break;
  635. case QED_DCBX_REMOTE_LLDP_MIB:
  636. qed_dcbx_get_remote_lldp_params(p_hwfn, p_ptt, p_params);
  637. break;
  638. case QED_DCBX_LOCAL_LLDP_MIB:
  639. qed_dcbx_get_local_lldp_params(p_hwfn, p_ptt, p_params);
  640. break;
  641. default:
  642. DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
  643. return -EINVAL;
  644. }
  645. return 0;
  646. }
  647. static int
  648. qed_dcbx_read_local_lldp_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
  649. {
  650. struct qed_dcbx_mib_meta_data data;
  651. int rc = 0;
  652. memset(&data, 0, sizeof(data));
  653. data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
  654. lldp_config_params);
  655. data.lldp_local = p_hwfn->p_dcbx_info->lldp_local;
  656. data.size = sizeof(struct lldp_config_params_s);
  657. qed_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size);
  658. return rc;
  659. }
  660. static int
  661. qed_dcbx_read_remote_lldp_mib(struct qed_hwfn *p_hwfn,
  662. struct qed_ptt *p_ptt,
  663. enum qed_mib_read_type type)
  664. {
  665. struct qed_dcbx_mib_meta_data data;
  666. int rc = 0;
  667. memset(&data, 0, sizeof(data));
  668. data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
  669. lldp_status_params);
  670. data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote;
  671. data.size = sizeof(struct lldp_status_params_s);
  672. rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
  673. return rc;
  674. }
  675. static int
  676. qed_dcbx_read_operational_mib(struct qed_hwfn *p_hwfn,
  677. struct qed_ptt *p_ptt,
  678. enum qed_mib_read_type type)
  679. {
  680. struct qed_dcbx_mib_meta_data data;
  681. int rc = 0;
  682. memset(&data, 0, sizeof(data));
  683. data.addr = p_hwfn->mcp_info->port_addr +
  684. offsetof(struct public_port, operational_dcbx_mib);
  685. data.mib = &p_hwfn->p_dcbx_info->operational;
  686. data.size = sizeof(struct dcbx_mib);
  687. rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
  688. return rc;
  689. }
  690. static int
  691. qed_dcbx_read_remote_mib(struct qed_hwfn *p_hwfn,
  692. struct qed_ptt *p_ptt, enum qed_mib_read_type type)
  693. {
  694. struct qed_dcbx_mib_meta_data data;
  695. int rc = 0;
  696. memset(&data, 0, sizeof(data));
  697. data.addr = p_hwfn->mcp_info->port_addr +
  698. offsetof(struct public_port, remote_dcbx_mib);
  699. data.mib = &p_hwfn->p_dcbx_info->remote;
  700. data.size = sizeof(struct dcbx_mib);
  701. rc = qed_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
  702. return rc;
  703. }
  704. static int
  705. qed_dcbx_read_local_mib(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
  706. {
  707. struct qed_dcbx_mib_meta_data data;
  708. int rc = 0;
  709. memset(&data, 0, sizeof(data));
  710. data.addr = p_hwfn->mcp_info->port_addr +
  711. offsetof(struct public_port, local_admin_dcbx_mib);
  712. data.local_admin = &p_hwfn->p_dcbx_info->local_admin;
  713. data.size = sizeof(struct dcbx_local_params);
  714. qed_memcpy_from(p_hwfn, p_ptt, data.local_admin, data.addr, data.size);
  715. return rc;
  716. }
  717. static int qed_dcbx_read_mib(struct qed_hwfn *p_hwfn,
  718. struct qed_ptt *p_ptt, enum qed_mib_read_type type)
  719. {
  720. int rc = -EINVAL;
  721. switch (type) {
  722. case QED_DCBX_OPERATIONAL_MIB:
  723. rc = qed_dcbx_read_operational_mib(p_hwfn, p_ptt, type);
  724. break;
  725. case QED_DCBX_REMOTE_MIB:
  726. rc = qed_dcbx_read_remote_mib(p_hwfn, p_ptt, type);
  727. break;
  728. case QED_DCBX_LOCAL_MIB:
  729. rc = qed_dcbx_read_local_mib(p_hwfn, p_ptt);
  730. break;
  731. case QED_DCBX_REMOTE_LLDP_MIB:
  732. rc = qed_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type);
  733. break;
  734. case QED_DCBX_LOCAL_LLDP_MIB:
  735. rc = qed_dcbx_read_local_lldp_mib(p_hwfn, p_ptt);
  736. break;
  737. default:
  738. DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
  739. }
  740. return rc;
  741. }
  742. void qed_dcbx_aen(struct qed_hwfn *hwfn, u32 mib_type)
  743. {
  744. struct qed_common_cb_ops *op = hwfn->cdev->protocol_ops.common;
  745. void *cookie = hwfn->cdev->ops_cookie;
  746. if (cookie && op->dcbx_aen)
  747. op->dcbx_aen(cookie, &hwfn->p_dcbx_info->get, mib_type);
  748. }
  749. /* Read updated MIB.
  750. * Reconfigure QM and invoke PF update ramrod command if operational MIB
  751. * change is detected.
  752. */
  753. int
  754. qed_dcbx_mib_update_event(struct qed_hwfn *p_hwfn,
  755. struct qed_ptt *p_ptt, enum qed_mib_read_type type)
  756. {
  757. int rc = 0;
  758. rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type);
  759. if (rc)
  760. return rc;
  761. if (type == QED_DCBX_OPERATIONAL_MIB) {
  762. rc = qed_dcbx_process_mib_info(p_hwfn);
  763. if (!rc) {
  764. /* reconfigure tcs of QM queues according
  765. * to negotiation results
  766. */
  767. qed_qm_reconf(p_hwfn, p_ptt);
  768. /* update storm FW with negotiation results */
  769. qed_sp_pf_update(p_hwfn);
  770. }
  771. }
  772. qed_dcbx_get_params(p_hwfn, p_ptt, &p_hwfn->p_dcbx_info->get, type);
  773. qed_dcbx_aen(p_hwfn, type);
  774. return rc;
  775. }
  776. int qed_dcbx_info_alloc(struct qed_hwfn *p_hwfn)
  777. {
  778. int rc = 0;
  779. p_hwfn->p_dcbx_info = kzalloc(sizeof(*p_hwfn->p_dcbx_info), GFP_KERNEL);
  780. if (!p_hwfn->p_dcbx_info)
  781. rc = -ENOMEM;
  782. return rc;
  783. }
  784. void qed_dcbx_info_free(struct qed_hwfn *p_hwfn,
  785. struct qed_dcbx_info *p_dcbx_info)
  786. {
  787. kfree(p_hwfn->p_dcbx_info);
  788. }
  789. static void qed_dcbx_update_protocol_data(struct protocol_dcb_data *p_data,
  790. struct qed_dcbx_results *p_src,
  791. enum dcbx_protocol_type type)
  792. {
  793. p_data->dcb_enable_flag = p_src->arr[type].enable;
  794. p_data->dcb_priority = p_src->arr[type].priority;
  795. p_data->dcb_tc = p_src->arr[type].tc;
  796. }
  797. /* Set pf update ramrod command params */
  798. void qed_dcbx_set_pf_update_params(struct qed_dcbx_results *p_src,
  799. struct pf_update_ramrod_data *p_dest)
  800. {
  801. struct protocol_dcb_data *p_dcb_data;
  802. bool update_flag = false;
  803. p_dest->pf_id = p_src->pf_id;
  804. update_flag = p_src->arr[DCBX_PROTOCOL_FCOE].update;
  805. p_dest->update_fcoe_dcb_data_flag = update_flag;
  806. update_flag = p_src->arr[DCBX_PROTOCOL_ROCE].update;
  807. p_dest->update_roce_dcb_data_flag = update_flag;
  808. update_flag = p_src->arr[DCBX_PROTOCOL_ROCE_V2].update;
  809. p_dest->update_roce_dcb_data_flag = update_flag;
  810. update_flag = p_src->arr[DCBX_PROTOCOL_ISCSI].update;
  811. p_dest->update_iscsi_dcb_data_flag = update_flag;
  812. update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update;
  813. p_dest->update_eth_dcb_data_flag = update_flag;
  814. p_dcb_data = &p_dest->fcoe_dcb_data;
  815. qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_FCOE);
  816. p_dcb_data = &p_dest->roce_dcb_data;
  817. if (p_src->arr[DCBX_PROTOCOL_ROCE].update)
  818. qed_dcbx_update_protocol_data(p_dcb_data, p_src,
  819. DCBX_PROTOCOL_ROCE);
  820. if (p_src->arr[DCBX_PROTOCOL_ROCE_V2].update)
  821. qed_dcbx_update_protocol_data(p_dcb_data, p_src,
  822. DCBX_PROTOCOL_ROCE_V2);
  823. p_dcb_data = &p_dest->iscsi_dcb_data;
  824. qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ISCSI);
  825. p_dcb_data = &p_dest->eth_dcb_data;
  826. qed_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH);
  827. }
  828. #ifdef CONFIG_DCB
  829. static int qed_dcbx_query_params(struct qed_hwfn *p_hwfn,
  830. struct qed_dcbx_get *p_get,
  831. enum qed_mib_read_type type)
  832. {
  833. struct qed_ptt *p_ptt;
  834. int rc;
  835. if (IS_VF(p_hwfn->cdev))
  836. return -EINVAL;
  837. p_ptt = qed_ptt_acquire(p_hwfn);
  838. if (!p_ptt)
  839. return -EBUSY;
  840. rc = qed_dcbx_read_mib(p_hwfn, p_ptt, type);
  841. if (rc)
  842. goto out;
  843. rc = qed_dcbx_get_params(p_hwfn, p_ptt, p_get, type);
  844. out:
  845. qed_ptt_release(p_hwfn, p_ptt);
  846. return rc;
  847. }
  848. static void
  849. qed_dcbx_set_pfc_data(struct qed_hwfn *p_hwfn,
  850. u32 *pfc, struct qed_dcbx_params *p_params)
  851. {
  852. u8 pfc_map = 0;
  853. int i;
  854. if (p_params->pfc.willing)
  855. *pfc |= DCBX_PFC_WILLING_MASK;
  856. else
  857. *pfc &= ~DCBX_PFC_WILLING_MASK;
  858. if (p_params->pfc.enabled)
  859. *pfc |= DCBX_PFC_ENABLED_MASK;
  860. else
  861. *pfc &= ~DCBX_PFC_ENABLED_MASK;
  862. *pfc &= ~DCBX_PFC_CAPS_MASK;
  863. *pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_SHIFT;
  864. for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++)
  865. if (p_params->pfc.prio[i])
  866. pfc_map |= BIT(i);
  867. *pfc &= ~DCBX_PFC_PRI_EN_BITMAP_MASK;
  868. *pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_SHIFT);
  869. DP_VERBOSE(p_hwfn, QED_MSG_DCB, "pfc = 0x%x\n", *pfc);
  870. }
  871. static void
  872. qed_dcbx_set_ets_data(struct qed_hwfn *p_hwfn,
  873. struct dcbx_ets_feature *p_ets,
  874. struct qed_dcbx_params *p_params)
  875. {
  876. u8 *bw_map, *tsa_map;
  877. u32 val;
  878. int i;
  879. if (p_params->ets_willing)
  880. p_ets->flags |= DCBX_ETS_WILLING_MASK;
  881. else
  882. p_ets->flags &= ~DCBX_ETS_WILLING_MASK;
  883. if (p_params->ets_cbs)
  884. p_ets->flags |= DCBX_ETS_CBS_MASK;
  885. else
  886. p_ets->flags &= ~DCBX_ETS_CBS_MASK;
  887. if (p_params->ets_enabled)
  888. p_ets->flags |= DCBX_ETS_ENABLED_MASK;
  889. else
  890. p_ets->flags &= ~DCBX_ETS_ENABLED_MASK;
  891. p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK;
  892. p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_SHIFT;
  893. bw_map = (u8 *)&p_ets->tc_bw_tbl[0];
  894. tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0];
  895. p_ets->pri_tc_tbl[0] = 0;
  896. for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) {
  897. bw_map[i] = p_params->ets_tc_bw_tbl[i];
  898. tsa_map[i] = p_params->ets_tc_tsa_tbl[i];
  899. /* Copy the priority value to the corresponding 4 bits in the
  900. * traffic class table.
  901. */
  902. val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4));
  903. p_ets->pri_tc_tbl[0] |= val;
  904. }
  905. for (i = 0; i < 2; i++) {
  906. p_ets->tc_bw_tbl[i] = cpu_to_be32(p_ets->tc_bw_tbl[i]);
  907. p_ets->tc_tsa_tbl[i] = cpu_to_be32(p_ets->tc_tsa_tbl[i]);
  908. }
  909. }
  910. static void
  911. qed_dcbx_set_app_data(struct qed_hwfn *p_hwfn,
  912. struct dcbx_app_priority_feature *p_app,
  913. struct qed_dcbx_params *p_params, bool ieee)
  914. {
  915. u32 *entry;
  916. int i;
  917. if (p_params->app_willing)
  918. p_app->flags |= DCBX_APP_WILLING_MASK;
  919. else
  920. p_app->flags &= ~DCBX_APP_WILLING_MASK;
  921. if (p_params->app_valid)
  922. p_app->flags |= DCBX_APP_ENABLED_MASK;
  923. else
  924. p_app->flags &= ~DCBX_APP_ENABLED_MASK;
  925. p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK;
  926. p_app->flags |= (u32)p_params->num_app_entries <<
  927. DCBX_APP_NUM_ENTRIES_SHIFT;
  928. for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
  929. entry = &p_app->app_pri_tbl[i].entry;
  930. *entry = 0;
  931. if (ieee) {
  932. *entry &= ~(DCBX_APP_SF_IEEE_MASK | DCBX_APP_SF_MASK);
  933. switch (p_params->app_entry[i].sf_ieee) {
  934. case QED_DCBX_SF_IEEE_ETHTYPE:
  935. *entry |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE <<
  936. DCBX_APP_SF_IEEE_SHIFT);
  937. *entry |= ((u32)DCBX_APP_SF_ETHTYPE <<
  938. DCBX_APP_SF_SHIFT);
  939. break;
  940. case QED_DCBX_SF_IEEE_TCP_PORT:
  941. *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT <<
  942. DCBX_APP_SF_IEEE_SHIFT);
  943. *entry |= ((u32)DCBX_APP_SF_PORT <<
  944. DCBX_APP_SF_SHIFT);
  945. break;
  946. case QED_DCBX_SF_IEEE_UDP_PORT:
  947. *entry |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT <<
  948. DCBX_APP_SF_IEEE_SHIFT);
  949. *entry |= ((u32)DCBX_APP_SF_PORT <<
  950. DCBX_APP_SF_SHIFT);
  951. break;
  952. case QED_DCBX_SF_IEEE_TCP_UDP_PORT:
  953. *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT <<
  954. DCBX_APP_SF_IEEE_SHIFT);
  955. *entry |= ((u32)DCBX_APP_SF_PORT <<
  956. DCBX_APP_SF_SHIFT);
  957. break;
  958. }
  959. } else {
  960. *entry &= ~DCBX_APP_SF_MASK;
  961. if (p_params->app_entry[i].ethtype)
  962. *entry |= ((u32)DCBX_APP_SF_ETHTYPE <<
  963. DCBX_APP_SF_SHIFT);
  964. else
  965. *entry |= ((u32)DCBX_APP_SF_PORT <<
  966. DCBX_APP_SF_SHIFT);
  967. }
  968. *entry &= ~DCBX_APP_PROTOCOL_ID_MASK;
  969. *entry |= ((u32)p_params->app_entry[i].proto_id <<
  970. DCBX_APP_PROTOCOL_ID_SHIFT);
  971. *entry &= ~DCBX_APP_PRI_MAP_MASK;
  972. *entry |= ((u32)(p_params->app_entry[i].prio) <<
  973. DCBX_APP_PRI_MAP_SHIFT);
  974. }
  975. }
  976. static void
  977. qed_dcbx_set_local_params(struct qed_hwfn *p_hwfn,
  978. struct dcbx_local_params *local_admin,
  979. struct qed_dcbx_set *params)
  980. {
  981. bool ieee = false;
  982. local_admin->flags = 0;
  983. memcpy(&local_admin->features,
  984. &p_hwfn->p_dcbx_info->operational.features,
  985. sizeof(local_admin->features));
  986. if (params->enabled) {
  987. local_admin->config = params->ver_num;
  988. ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE);
  989. } else {
  990. local_admin->config = DCBX_CONFIG_VERSION_DISABLED;
  991. }
  992. if (params->override_flags & QED_DCBX_OVERRIDE_PFC_CFG)
  993. qed_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc,
  994. &params->config.params);
  995. if (params->override_flags & QED_DCBX_OVERRIDE_ETS_CFG)
  996. qed_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets,
  997. &params->config.params);
  998. if (params->override_flags & QED_DCBX_OVERRIDE_APP_CFG)
  999. qed_dcbx_set_app_data(p_hwfn, &local_admin->features.app,
  1000. &params->config.params, ieee);
  1001. }
  1002. int qed_dcbx_config_params(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
  1003. struct qed_dcbx_set *params, bool hw_commit)
  1004. {
  1005. struct dcbx_local_params local_admin;
  1006. struct qed_dcbx_mib_meta_data data;
  1007. u32 resp = 0, param = 0;
  1008. int rc = 0;
  1009. if (!hw_commit) {
  1010. memcpy(&p_hwfn->p_dcbx_info->set, params,
  1011. sizeof(struct qed_dcbx_set));
  1012. return 0;
  1013. }
  1014. /* clear set-parmas cache */
  1015. memset(&p_hwfn->p_dcbx_info->set, 0, sizeof(p_hwfn->p_dcbx_info->set));
  1016. memset(&local_admin, 0, sizeof(local_admin));
  1017. qed_dcbx_set_local_params(p_hwfn, &local_admin, params);
  1018. data.addr = p_hwfn->mcp_info->port_addr +
  1019. offsetof(struct public_port, local_admin_dcbx_mib);
  1020. data.local_admin = &local_admin;
  1021. data.size = sizeof(struct dcbx_local_params);
  1022. qed_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size);
  1023. rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX,
  1024. 1 << DRV_MB_PARAM_LLDP_SEND_SHIFT, &resp, &param);
  1025. if (rc)
  1026. DP_NOTICE(p_hwfn, "Failed to send DCBX update request\n");
  1027. return rc;
  1028. }
  1029. int qed_dcbx_get_config_params(struct qed_hwfn *p_hwfn,
  1030. struct qed_dcbx_set *params)
  1031. {
  1032. struct qed_dcbx_get *dcbx_info;
  1033. int rc;
  1034. if (p_hwfn->p_dcbx_info->set.config.valid) {
  1035. memcpy(params, &p_hwfn->p_dcbx_info->set,
  1036. sizeof(struct qed_dcbx_set));
  1037. return 0;
  1038. }
  1039. dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_KERNEL);
  1040. if (!dcbx_info)
  1041. return -ENOMEM;
  1042. memset(dcbx_info, 0, sizeof(*dcbx_info));
  1043. rc = qed_dcbx_query_params(p_hwfn, dcbx_info, QED_DCBX_OPERATIONAL_MIB);
  1044. if (rc) {
  1045. kfree(dcbx_info);
  1046. return rc;
  1047. }
  1048. p_hwfn->p_dcbx_info->set.override_flags = 0;
  1049. p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED;
  1050. if (dcbx_info->operational.cee)
  1051. p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE;
  1052. if (dcbx_info->operational.ieee)
  1053. p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE;
  1054. p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled;
  1055. memcpy(&p_hwfn->p_dcbx_info->set.config.params,
  1056. &dcbx_info->operational.params,
  1057. sizeof(struct qed_dcbx_admin_params));
  1058. p_hwfn->p_dcbx_info->set.config.valid = true;
  1059. memcpy(params, &p_hwfn->p_dcbx_info->set, sizeof(struct qed_dcbx_set));
  1060. kfree(dcbx_info);
  1061. return 0;
  1062. }
  1063. static struct qed_dcbx_get *qed_dcbnl_get_dcbx(struct qed_hwfn *hwfn,
  1064. enum qed_mib_read_type type)
  1065. {
  1066. struct qed_dcbx_get *dcbx_info;
  1067. dcbx_info = kzalloc(sizeof(*dcbx_info), GFP_KERNEL);
  1068. if (!dcbx_info)
  1069. return NULL;
  1070. memset(dcbx_info, 0, sizeof(*dcbx_info));
  1071. if (qed_dcbx_query_params(hwfn, dcbx_info, type)) {
  1072. kfree(dcbx_info);
  1073. return NULL;
  1074. }
  1075. if ((type == QED_DCBX_OPERATIONAL_MIB) &&
  1076. !dcbx_info->operational.enabled) {
  1077. DP_INFO(hwfn, "DCBX is not enabled/operational\n");
  1078. kfree(dcbx_info);
  1079. return NULL;
  1080. }
  1081. return dcbx_info;
  1082. }
  1083. static u8 qed_dcbnl_getstate(struct qed_dev *cdev)
  1084. {
  1085. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1086. struct qed_dcbx_get *dcbx_info;
  1087. bool enabled;
  1088. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1089. if (!dcbx_info)
  1090. return 0;
  1091. enabled = dcbx_info->operational.enabled;
  1092. DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", enabled);
  1093. kfree(dcbx_info);
  1094. return enabled;
  1095. }
  1096. static u8 qed_dcbnl_setstate(struct qed_dev *cdev, u8 state)
  1097. {
  1098. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1099. struct qed_dcbx_set dcbx_set;
  1100. struct qed_ptt *ptt;
  1101. int rc;
  1102. DP_VERBOSE(hwfn, QED_MSG_DCB, "DCB state = %d\n", state);
  1103. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1104. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1105. if (rc)
  1106. return 1;
  1107. dcbx_set.enabled = !!state;
  1108. ptt = qed_ptt_acquire(hwfn);
  1109. if (!ptt)
  1110. return 1;
  1111. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
  1112. qed_ptt_release(hwfn, ptt);
  1113. return rc ? 1 : 0;
  1114. }
  1115. static void qed_dcbnl_getpgtccfgtx(struct qed_dev *cdev, int tc, u8 *prio_type,
  1116. u8 *pgid, u8 *bw_pct, u8 *up_map)
  1117. {
  1118. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1119. struct qed_dcbx_get *dcbx_info;
  1120. DP_VERBOSE(hwfn, QED_MSG_DCB, "tc = %d\n", tc);
  1121. *prio_type = *pgid = *bw_pct = *up_map = 0;
  1122. if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) {
  1123. DP_INFO(hwfn, "Invalid tc %d\n", tc);
  1124. return;
  1125. }
  1126. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1127. if (!dcbx_info)
  1128. return;
  1129. *pgid = dcbx_info->operational.params.ets_pri_tc_tbl[tc];
  1130. kfree(dcbx_info);
  1131. }
  1132. static void qed_dcbnl_getpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 *bw_pct)
  1133. {
  1134. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1135. struct qed_dcbx_get *dcbx_info;
  1136. *bw_pct = 0;
  1137. DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d\n", pgid);
  1138. if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) {
  1139. DP_INFO(hwfn, "Invalid pgid %d\n", pgid);
  1140. return;
  1141. }
  1142. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1143. if (!dcbx_info)
  1144. return;
  1145. *bw_pct = dcbx_info->operational.params.ets_tc_bw_tbl[pgid];
  1146. DP_VERBOSE(hwfn, QED_MSG_DCB, "bw_pct = %d\n", *bw_pct);
  1147. kfree(dcbx_info);
  1148. }
  1149. static void qed_dcbnl_getpgtccfgrx(struct qed_dev *cdev, int tc, u8 *prio,
  1150. u8 *bwg_id, u8 *bw_pct, u8 *up_map)
  1151. {
  1152. DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n");
  1153. *prio = *bwg_id = *bw_pct = *up_map = 0;
  1154. }
  1155. static void qed_dcbnl_getpgbwgcfgrx(struct qed_dev *cdev,
  1156. int bwg_id, u8 *bw_pct)
  1157. {
  1158. DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n");
  1159. *bw_pct = 0;
  1160. }
  1161. static void qed_dcbnl_getpfccfg(struct qed_dev *cdev,
  1162. int priority, u8 *setting)
  1163. {
  1164. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1165. struct qed_dcbx_get *dcbx_info;
  1166. DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d\n", priority);
  1167. if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) {
  1168. DP_INFO(hwfn, "Invalid priority %d\n", priority);
  1169. return;
  1170. }
  1171. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1172. if (!dcbx_info)
  1173. return;
  1174. *setting = dcbx_info->operational.params.pfc.prio[priority];
  1175. DP_VERBOSE(hwfn, QED_MSG_DCB, "setting = %d\n", *setting);
  1176. kfree(dcbx_info);
  1177. }
  1178. static void qed_dcbnl_setpfccfg(struct qed_dev *cdev, int priority, u8 setting)
  1179. {
  1180. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1181. struct qed_dcbx_set dcbx_set;
  1182. struct qed_ptt *ptt;
  1183. int rc;
  1184. DP_VERBOSE(hwfn, QED_MSG_DCB, "priority = %d setting = %d\n",
  1185. priority, setting);
  1186. if (priority < 0 || priority >= QED_MAX_PFC_PRIORITIES) {
  1187. DP_INFO(hwfn, "Invalid priority %d\n", priority);
  1188. return;
  1189. }
  1190. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1191. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1192. if (rc)
  1193. return;
  1194. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG;
  1195. dcbx_set.config.params.pfc.prio[priority] = !!setting;
  1196. ptt = qed_ptt_acquire(hwfn);
  1197. if (!ptt)
  1198. return;
  1199. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
  1200. qed_ptt_release(hwfn, ptt);
  1201. }
  1202. static u8 qed_dcbnl_getcap(struct qed_dev *cdev, int capid, u8 *cap)
  1203. {
  1204. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1205. struct qed_dcbx_get *dcbx_info;
  1206. int rc = 0;
  1207. DP_VERBOSE(hwfn, QED_MSG_DCB, "capid = %d\n", capid);
  1208. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1209. if (!dcbx_info)
  1210. return 1;
  1211. switch (capid) {
  1212. case DCB_CAP_ATTR_PG:
  1213. case DCB_CAP_ATTR_PFC:
  1214. case DCB_CAP_ATTR_UP2TC:
  1215. case DCB_CAP_ATTR_GSP:
  1216. *cap = true;
  1217. break;
  1218. case DCB_CAP_ATTR_PG_TCS:
  1219. case DCB_CAP_ATTR_PFC_TCS:
  1220. *cap = 0x80;
  1221. break;
  1222. case DCB_CAP_ATTR_DCBX:
  1223. *cap = (DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE |
  1224. DCB_CAP_DCBX_VER_IEEE);
  1225. break;
  1226. default:
  1227. *cap = false;
  1228. rc = 1;
  1229. }
  1230. DP_VERBOSE(hwfn, QED_MSG_DCB, "id = %d caps = %d\n", capid, *cap);
  1231. kfree(dcbx_info);
  1232. return rc;
  1233. }
  1234. static int qed_dcbnl_getnumtcs(struct qed_dev *cdev, int tcid, u8 *num)
  1235. {
  1236. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1237. struct qed_dcbx_get *dcbx_info;
  1238. int rc = 0;
  1239. DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d\n", tcid);
  1240. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1241. if (!dcbx_info)
  1242. return -EINVAL;
  1243. switch (tcid) {
  1244. case DCB_NUMTCS_ATTR_PG:
  1245. *num = dcbx_info->operational.params.max_ets_tc;
  1246. break;
  1247. case DCB_NUMTCS_ATTR_PFC:
  1248. *num = dcbx_info->operational.params.pfc.max_tc;
  1249. break;
  1250. default:
  1251. rc = -EINVAL;
  1252. }
  1253. kfree(dcbx_info);
  1254. DP_VERBOSE(hwfn, QED_MSG_DCB, "numtcs = %d\n", *num);
  1255. return rc;
  1256. }
  1257. static u8 qed_dcbnl_getpfcstate(struct qed_dev *cdev)
  1258. {
  1259. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1260. struct qed_dcbx_get *dcbx_info;
  1261. bool enabled;
  1262. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1263. if (!dcbx_info)
  1264. return 0;
  1265. enabled = dcbx_info->operational.params.pfc.enabled;
  1266. DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d\n", enabled);
  1267. kfree(dcbx_info);
  1268. return enabled;
  1269. }
  1270. static u8 qed_dcbnl_getdcbx(struct qed_dev *cdev)
  1271. {
  1272. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1273. struct qed_dcbx_get *dcbx_info;
  1274. u8 mode = 0;
  1275. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1276. if (!dcbx_info)
  1277. return 0;
  1278. if (dcbx_info->operational.enabled)
  1279. mode |= DCB_CAP_DCBX_LLD_MANAGED;
  1280. if (dcbx_info->operational.ieee)
  1281. mode |= DCB_CAP_DCBX_VER_IEEE;
  1282. if (dcbx_info->operational.cee)
  1283. mode |= DCB_CAP_DCBX_VER_CEE;
  1284. DP_VERBOSE(hwfn, QED_MSG_DCB, "dcb mode = %d\n", mode);
  1285. kfree(dcbx_info);
  1286. return mode;
  1287. }
  1288. static void qed_dcbnl_setpgtccfgtx(struct qed_dev *cdev,
  1289. int tc,
  1290. u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map)
  1291. {
  1292. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1293. struct qed_dcbx_set dcbx_set;
  1294. struct qed_ptt *ptt;
  1295. int rc;
  1296. DP_VERBOSE(hwfn, QED_MSG_DCB,
  1297. "tc = %d pri_type = %d pgid = %d bw_pct = %d up_map = %d\n",
  1298. tc, pri_type, pgid, bw_pct, up_map);
  1299. if (tc < 0 || tc >= QED_MAX_PFC_PRIORITIES) {
  1300. DP_INFO(hwfn, "Invalid tc %d\n", tc);
  1301. return;
  1302. }
  1303. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1304. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1305. if (rc)
  1306. return;
  1307. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG;
  1308. dcbx_set.config.params.ets_pri_tc_tbl[tc] = pgid;
  1309. ptt = qed_ptt_acquire(hwfn);
  1310. if (!ptt)
  1311. return;
  1312. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
  1313. qed_ptt_release(hwfn, ptt);
  1314. }
  1315. static void qed_dcbnl_setpgtccfgrx(struct qed_dev *cdev, int prio,
  1316. u8 pri_type, u8 pgid, u8 bw_pct, u8 up_map)
  1317. {
  1318. DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n");
  1319. }
  1320. static void qed_dcbnl_setpgbwgcfgtx(struct qed_dev *cdev, int pgid, u8 bw_pct)
  1321. {
  1322. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1323. struct qed_dcbx_set dcbx_set;
  1324. struct qed_ptt *ptt;
  1325. int rc;
  1326. DP_VERBOSE(hwfn, QED_MSG_DCB, "pgid = %d bw_pct = %d\n", pgid, bw_pct);
  1327. if (pgid < 0 || pgid >= QED_MAX_PFC_PRIORITIES) {
  1328. DP_INFO(hwfn, "Invalid pgid %d\n", pgid);
  1329. return;
  1330. }
  1331. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1332. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1333. if (rc)
  1334. return;
  1335. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG;
  1336. dcbx_set.config.params.ets_tc_bw_tbl[pgid] = bw_pct;
  1337. ptt = qed_ptt_acquire(hwfn);
  1338. if (!ptt)
  1339. return;
  1340. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
  1341. qed_ptt_release(hwfn, ptt);
  1342. }
  1343. static void qed_dcbnl_setpgbwgcfgrx(struct qed_dev *cdev, int pgid, u8 bw_pct)
  1344. {
  1345. DP_INFO(QED_LEADING_HWFN(cdev), "Rx ETS is not supported\n");
  1346. }
  1347. static u8 qed_dcbnl_setall(struct qed_dev *cdev)
  1348. {
  1349. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1350. struct qed_dcbx_set dcbx_set;
  1351. struct qed_ptt *ptt;
  1352. int rc;
  1353. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1354. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1355. if (rc)
  1356. return 1;
  1357. ptt = qed_ptt_acquire(hwfn);
  1358. if (!ptt)
  1359. return 1;
  1360. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 1);
  1361. qed_ptt_release(hwfn, ptt);
  1362. return rc;
  1363. }
  1364. static int qed_dcbnl_setnumtcs(struct qed_dev *cdev, int tcid, u8 num)
  1365. {
  1366. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1367. struct qed_dcbx_set dcbx_set;
  1368. struct qed_ptt *ptt;
  1369. int rc;
  1370. DP_VERBOSE(hwfn, QED_MSG_DCB, "tcid = %d num = %d\n", tcid, num);
  1371. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1372. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1373. if (rc)
  1374. return 1;
  1375. switch (tcid) {
  1376. case DCB_NUMTCS_ATTR_PG:
  1377. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG;
  1378. dcbx_set.config.params.max_ets_tc = num;
  1379. break;
  1380. case DCB_NUMTCS_ATTR_PFC:
  1381. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG;
  1382. dcbx_set.config.params.pfc.max_tc = num;
  1383. break;
  1384. default:
  1385. DP_INFO(hwfn, "Invalid tcid %d\n", tcid);
  1386. return -EINVAL;
  1387. }
  1388. ptt = qed_ptt_acquire(hwfn);
  1389. if (!ptt)
  1390. return -EINVAL;
  1391. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
  1392. qed_ptt_release(hwfn, ptt);
  1393. return 0;
  1394. }
  1395. static void qed_dcbnl_setpfcstate(struct qed_dev *cdev, u8 state)
  1396. {
  1397. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1398. struct qed_dcbx_set dcbx_set;
  1399. struct qed_ptt *ptt;
  1400. int rc;
  1401. DP_VERBOSE(hwfn, QED_MSG_DCB, "new state = %d\n", state);
  1402. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1403. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1404. if (rc)
  1405. return;
  1406. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG;
  1407. dcbx_set.config.params.pfc.enabled = !!state;
  1408. ptt = qed_ptt_acquire(hwfn);
  1409. if (!ptt)
  1410. return;
  1411. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
  1412. qed_ptt_release(hwfn, ptt);
  1413. }
  1414. static int qed_dcbnl_getapp(struct qed_dev *cdev, u8 idtype, u16 idval)
  1415. {
  1416. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1417. struct qed_dcbx_get *dcbx_info;
  1418. struct qed_app_entry *entry;
  1419. bool ethtype;
  1420. u8 prio = 0;
  1421. int i;
  1422. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1423. if (!dcbx_info)
  1424. return -EINVAL;
  1425. ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE);
  1426. for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) {
  1427. entry = &dcbx_info->operational.params.app_entry[i];
  1428. if ((entry->ethtype == ethtype) && (entry->proto_id == idval)) {
  1429. prio = entry->prio;
  1430. break;
  1431. }
  1432. }
  1433. if (i == QED_DCBX_MAX_APP_PROTOCOL) {
  1434. DP_ERR(cdev, "App entry (%d, %d) not found\n", idtype, idval);
  1435. kfree(dcbx_info);
  1436. return -EINVAL;
  1437. }
  1438. kfree(dcbx_info);
  1439. return prio;
  1440. }
  1441. static int qed_dcbnl_setapp(struct qed_dev *cdev,
  1442. u8 idtype, u16 idval, u8 pri_map)
  1443. {
  1444. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1445. struct qed_dcbx_set dcbx_set;
  1446. struct qed_app_entry *entry;
  1447. struct qed_ptt *ptt;
  1448. bool ethtype;
  1449. int rc, i;
  1450. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1451. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1452. if (rc)
  1453. return -EINVAL;
  1454. ethtype = !!(idtype == DCB_APP_IDTYPE_ETHTYPE);
  1455. for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) {
  1456. entry = &dcbx_set.config.params.app_entry[i];
  1457. if ((entry->ethtype == ethtype) && (entry->proto_id == idval))
  1458. break;
  1459. /* First empty slot */
  1460. if (!entry->proto_id) {
  1461. dcbx_set.config.params.num_app_entries++;
  1462. break;
  1463. }
  1464. }
  1465. if (i == QED_DCBX_MAX_APP_PROTOCOL) {
  1466. DP_ERR(cdev, "App table is full\n");
  1467. return -EBUSY;
  1468. }
  1469. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG;
  1470. dcbx_set.config.params.app_entry[i].ethtype = ethtype;
  1471. dcbx_set.config.params.app_entry[i].proto_id = idval;
  1472. dcbx_set.config.params.app_entry[i].prio = pri_map;
  1473. ptt = qed_ptt_acquire(hwfn);
  1474. if (!ptt)
  1475. return -EBUSY;
  1476. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
  1477. qed_ptt_release(hwfn, ptt);
  1478. return rc;
  1479. }
  1480. static u8 qed_dcbnl_setdcbx(struct qed_dev *cdev, u8 mode)
  1481. {
  1482. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1483. struct qed_dcbx_set dcbx_set;
  1484. struct qed_ptt *ptt;
  1485. int rc;
  1486. DP_VERBOSE(hwfn, QED_MSG_DCB, "new mode = %x\n", mode);
  1487. if (!(mode & DCB_CAP_DCBX_VER_IEEE) && !(mode & DCB_CAP_DCBX_VER_CEE)) {
  1488. DP_INFO(hwfn, "Allowed mode is cee, ieee or both\n");
  1489. return 1;
  1490. }
  1491. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1492. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1493. if (rc)
  1494. return 1;
  1495. dcbx_set.ver_num = 0;
  1496. if (mode & DCB_CAP_DCBX_VER_CEE) {
  1497. dcbx_set.ver_num |= DCBX_CONFIG_VERSION_CEE;
  1498. dcbx_set.enabled = true;
  1499. }
  1500. if (mode & DCB_CAP_DCBX_VER_IEEE) {
  1501. dcbx_set.ver_num |= DCBX_CONFIG_VERSION_IEEE;
  1502. dcbx_set.enabled = true;
  1503. }
  1504. ptt = qed_ptt_acquire(hwfn);
  1505. if (!ptt)
  1506. return 1;
  1507. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
  1508. qed_ptt_release(hwfn, ptt);
  1509. return 0;
  1510. }
  1511. static u8 qed_dcbnl_getfeatcfg(struct qed_dev *cdev, int featid, u8 *flags)
  1512. {
  1513. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1514. struct qed_dcbx_get *dcbx_info;
  1515. DP_VERBOSE(hwfn, QED_MSG_DCB, "Feature id = %d\n", featid);
  1516. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1517. if (!dcbx_info)
  1518. return 1;
  1519. *flags = 0;
  1520. switch (featid) {
  1521. case DCB_FEATCFG_ATTR_PG:
  1522. if (dcbx_info->operational.params.ets_enabled)
  1523. *flags = DCB_FEATCFG_ENABLE;
  1524. else
  1525. *flags = DCB_FEATCFG_ERROR;
  1526. break;
  1527. case DCB_FEATCFG_ATTR_PFC:
  1528. if (dcbx_info->operational.params.pfc.enabled)
  1529. *flags = DCB_FEATCFG_ENABLE;
  1530. else
  1531. *flags = DCB_FEATCFG_ERROR;
  1532. break;
  1533. case DCB_FEATCFG_ATTR_APP:
  1534. if (dcbx_info->operational.params.app_valid)
  1535. *flags = DCB_FEATCFG_ENABLE;
  1536. else
  1537. *flags = DCB_FEATCFG_ERROR;
  1538. break;
  1539. default:
  1540. DP_INFO(hwfn, "Invalid feature-ID %d\n", featid);
  1541. kfree(dcbx_info);
  1542. return 1;
  1543. }
  1544. DP_VERBOSE(hwfn, QED_MSG_DCB, "flags = %d\n", *flags);
  1545. kfree(dcbx_info);
  1546. return 0;
  1547. }
  1548. static u8 qed_dcbnl_setfeatcfg(struct qed_dev *cdev, int featid, u8 flags)
  1549. {
  1550. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1551. struct qed_dcbx_set dcbx_set;
  1552. bool enabled, willing;
  1553. struct qed_ptt *ptt;
  1554. int rc;
  1555. DP_VERBOSE(hwfn, QED_MSG_DCB, "featid = %d flags = %d\n",
  1556. featid, flags);
  1557. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1558. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1559. if (rc)
  1560. return 1;
  1561. enabled = !!(flags & DCB_FEATCFG_ENABLE);
  1562. willing = !!(flags & DCB_FEATCFG_WILLING);
  1563. switch (featid) {
  1564. case DCB_FEATCFG_ATTR_PG:
  1565. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG;
  1566. dcbx_set.config.params.ets_enabled = enabled;
  1567. dcbx_set.config.params.ets_willing = willing;
  1568. break;
  1569. case DCB_FEATCFG_ATTR_PFC:
  1570. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG;
  1571. dcbx_set.config.params.pfc.enabled = enabled;
  1572. dcbx_set.config.params.pfc.willing = willing;
  1573. break;
  1574. case DCB_FEATCFG_ATTR_APP:
  1575. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG;
  1576. dcbx_set.config.params.app_willing = willing;
  1577. break;
  1578. default:
  1579. DP_INFO(hwfn, "Invalid feature-ID %d\n", featid);
  1580. return 1;
  1581. }
  1582. ptt = qed_ptt_acquire(hwfn);
  1583. if (!ptt)
  1584. return 1;
  1585. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
  1586. qed_ptt_release(hwfn, ptt);
  1587. return 0;
  1588. }
  1589. static int qed_dcbnl_peer_getappinfo(struct qed_dev *cdev,
  1590. struct dcb_peer_app_info *info,
  1591. u16 *app_count)
  1592. {
  1593. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1594. struct qed_dcbx_get *dcbx_info;
  1595. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB);
  1596. if (!dcbx_info)
  1597. return -EINVAL;
  1598. info->willing = dcbx_info->remote.params.app_willing;
  1599. info->error = dcbx_info->remote.params.app_error;
  1600. *app_count = dcbx_info->remote.params.num_app_entries;
  1601. kfree(dcbx_info);
  1602. return 0;
  1603. }
  1604. static int qed_dcbnl_peer_getapptable(struct qed_dev *cdev,
  1605. struct dcb_app *table)
  1606. {
  1607. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1608. struct qed_dcbx_get *dcbx_info;
  1609. int i;
  1610. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB);
  1611. if (!dcbx_info)
  1612. return -EINVAL;
  1613. for (i = 0; i < dcbx_info->remote.params.num_app_entries; i++) {
  1614. if (dcbx_info->remote.params.app_entry[i].ethtype)
  1615. table[i].selector = DCB_APP_IDTYPE_ETHTYPE;
  1616. else
  1617. table[i].selector = DCB_APP_IDTYPE_PORTNUM;
  1618. table[i].priority = dcbx_info->remote.params.app_entry[i].prio;
  1619. table[i].protocol =
  1620. dcbx_info->remote.params.app_entry[i].proto_id;
  1621. }
  1622. kfree(dcbx_info);
  1623. return 0;
  1624. }
  1625. static int qed_dcbnl_cee_peer_getpfc(struct qed_dev *cdev, struct cee_pfc *pfc)
  1626. {
  1627. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1628. struct qed_dcbx_get *dcbx_info;
  1629. int i;
  1630. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB);
  1631. if (!dcbx_info)
  1632. return -EINVAL;
  1633. for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++)
  1634. if (dcbx_info->remote.params.pfc.prio[i])
  1635. pfc->pfc_en |= BIT(i);
  1636. pfc->tcs_supported = dcbx_info->remote.params.pfc.max_tc;
  1637. DP_VERBOSE(hwfn, QED_MSG_DCB, "pfc state = %d tcs_supported = %d\n",
  1638. pfc->pfc_en, pfc->tcs_supported);
  1639. kfree(dcbx_info);
  1640. return 0;
  1641. }
  1642. static int qed_dcbnl_cee_peer_getpg(struct qed_dev *cdev, struct cee_pg *pg)
  1643. {
  1644. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1645. struct qed_dcbx_get *dcbx_info;
  1646. int i;
  1647. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_REMOTE_MIB);
  1648. if (!dcbx_info)
  1649. return -EINVAL;
  1650. pg->willing = dcbx_info->remote.params.ets_willing;
  1651. for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) {
  1652. pg->pg_bw[i] = dcbx_info->remote.params.ets_tc_bw_tbl[i];
  1653. pg->prio_pg[i] = dcbx_info->remote.params.ets_pri_tc_tbl[i];
  1654. }
  1655. DP_VERBOSE(hwfn, QED_MSG_DCB, "willing = %d", pg->willing);
  1656. kfree(dcbx_info);
  1657. return 0;
  1658. }
  1659. static int qed_dcbnl_get_ieee_pfc(struct qed_dev *cdev,
  1660. struct ieee_pfc *pfc, bool remote)
  1661. {
  1662. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1663. struct qed_dcbx_params *params;
  1664. struct qed_dcbx_get *dcbx_info;
  1665. int rc, i;
  1666. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1667. if (!dcbx_info)
  1668. return -EINVAL;
  1669. if (!dcbx_info->operational.ieee) {
  1670. DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n");
  1671. kfree(dcbx_info);
  1672. return -EINVAL;
  1673. }
  1674. if (remote) {
  1675. memset(dcbx_info, 0, sizeof(*dcbx_info));
  1676. rc = qed_dcbx_query_params(hwfn, dcbx_info,
  1677. QED_DCBX_REMOTE_MIB);
  1678. if (rc) {
  1679. kfree(dcbx_info);
  1680. return -EINVAL;
  1681. }
  1682. params = &dcbx_info->remote.params;
  1683. } else {
  1684. params = &dcbx_info->operational.params;
  1685. }
  1686. pfc->pfc_cap = params->pfc.max_tc;
  1687. pfc->pfc_en = 0;
  1688. for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++)
  1689. if (params->pfc.prio[i])
  1690. pfc->pfc_en |= BIT(i);
  1691. kfree(dcbx_info);
  1692. return 0;
  1693. }
  1694. static int qed_dcbnl_ieee_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc)
  1695. {
  1696. return qed_dcbnl_get_ieee_pfc(cdev, pfc, false);
  1697. }
  1698. static int qed_dcbnl_ieee_setpfc(struct qed_dev *cdev, struct ieee_pfc *pfc)
  1699. {
  1700. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1701. struct qed_dcbx_get *dcbx_info;
  1702. struct qed_dcbx_set dcbx_set;
  1703. struct qed_ptt *ptt;
  1704. int rc, i;
  1705. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1706. if (!dcbx_info)
  1707. return -EINVAL;
  1708. if (!dcbx_info->operational.ieee) {
  1709. DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n");
  1710. kfree(dcbx_info);
  1711. return -EINVAL;
  1712. }
  1713. kfree(dcbx_info);
  1714. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1715. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1716. if (rc)
  1717. return -EINVAL;
  1718. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_PFC_CFG;
  1719. for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++)
  1720. dcbx_set.config.params.pfc.prio[i] = !!(pfc->pfc_en & BIT(i));
  1721. ptt = qed_ptt_acquire(hwfn);
  1722. if (!ptt)
  1723. return -EINVAL;
  1724. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
  1725. qed_ptt_release(hwfn, ptt);
  1726. return rc;
  1727. }
  1728. static int qed_dcbnl_get_ieee_ets(struct qed_dev *cdev,
  1729. struct ieee_ets *ets, bool remote)
  1730. {
  1731. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1732. struct qed_dcbx_get *dcbx_info;
  1733. struct qed_dcbx_params *params;
  1734. int rc;
  1735. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1736. if (!dcbx_info)
  1737. return -EINVAL;
  1738. if (!dcbx_info->operational.ieee) {
  1739. DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n");
  1740. kfree(dcbx_info);
  1741. return -EINVAL;
  1742. }
  1743. if (remote) {
  1744. memset(dcbx_info, 0, sizeof(*dcbx_info));
  1745. rc = qed_dcbx_query_params(hwfn, dcbx_info,
  1746. QED_DCBX_REMOTE_MIB);
  1747. if (rc) {
  1748. kfree(dcbx_info);
  1749. return -EINVAL;
  1750. }
  1751. params = &dcbx_info->remote.params;
  1752. } else {
  1753. params = &dcbx_info->operational.params;
  1754. }
  1755. ets->ets_cap = params->max_ets_tc;
  1756. ets->willing = params->ets_willing;
  1757. ets->cbs = params->ets_cbs;
  1758. memcpy(ets->tc_tx_bw, params->ets_tc_bw_tbl, sizeof(ets->tc_tx_bw));
  1759. memcpy(ets->tc_tsa, params->ets_tc_tsa_tbl, sizeof(ets->tc_tsa));
  1760. memcpy(ets->prio_tc, params->ets_pri_tc_tbl, sizeof(ets->prio_tc));
  1761. kfree(dcbx_info);
  1762. return 0;
  1763. }
  1764. static int qed_dcbnl_ieee_getets(struct qed_dev *cdev, struct ieee_ets *ets)
  1765. {
  1766. return qed_dcbnl_get_ieee_ets(cdev, ets, false);
  1767. }
  1768. static int qed_dcbnl_ieee_setets(struct qed_dev *cdev, struct ieee_ets *ets)
  1769. {
  1770. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1771. struct qed_dcbx_get *dcbx_info;
  1772. struct qed_dcbx_set dcbx_set;
  1773. struct qed_ptt *ptt;
  1774. int rc;
  1775. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1776. if (!dcbx_info)
  1777. return -EINVAL;
  1778. if (!dcbx_info->operational.ieee) {
  1779. DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n");
  1780. kfree(dcbx_info);
  1781. return -EINVAL;
  1782. }
  1783. kfree(dcbx_info);
  1784. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1785. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1786. if (rc)
  1787. return -EINVAL;
  1788. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_ETS_CFG;
  1789. dcbx_set.config.params.max_ets_tc = ets->ets_cap;
  1790. dcbx_set.config.params.ets_willing = ets->willing;
  1791. dcbx_set.config.params.ets_cbs = ets->cbs;
  1792. memcpy(dcbx_set.config.params.ets_tc_bw_tbl, ets->tc_tx_bw,
  1793. sizeof(ets->tc_tx_bw));
  1794. memcpy(dcbx_set.config.params.ets_tc_tsa_tbl, ets->tc_tsa,
  1795. sizeof(ets->tc_tsa));
  1796. memcpy(dcbx_set.config.params.ets_pri_tc_tbl, ets->prio_tc,
  1797. sizeof(ets->prio_tc));
  1798. ptt = qed_ptt_acquire(hwfn);
  1799. if (!ptt)
  1800. return -EINVAL;
  1801. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
  1802. qed_ptt_release(hwfn, ptt);
  1803. return rc;
  1804. }
  1805. static int
  1806. qed_dcbnl_ieee_peer_getets(struct qed_dev *cdev, struct ieee_ets *ets)
  1807. {
  1808. return qed_dcbnl_get_ieee_ets(cdev, ets, true);
  1809. }
  1810. static int
  1811. qed_dcbnl_ieee_peer_getpfc(struct qed_dev *cdev, struct ieee_pfc *pfc)
  1812. {
  1813. return qed_dcbnl_get_ieee_pfc(cdev, pfc, true);
  1814. }
  1815. static int qed_dcbnl_ieee_getapp(struct qed_dev *cdev, struct dcb_app *app)
  1816. {
  1817. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1818. struct qed_dcbx_get *dcbx_info;
  1819. struct qed_app_entry *entry;
  1820. bool ethtype;
  1821. u8 prio = 0;
  1822. int i;
  1823. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1824. if (!dcbx_info)
  1825. return -EINVAL;
  1826. if (!dcbx_info->operational.ieee) {
  1827. DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n");
  1828. kfree(dcbx_info);
  1829. return -EINVAL;
  1830. }
  1831. /* ieee defines the selector field value for ethertype to be 1 */
  1832. ethtype = !!((app->selector - 1) == DCB_APP_IDTYPE_ETHTYPE);
  1833. for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) {
  1834. entry = &dcbx_info->operational.params.app_entry[i];
  1835. if ((entry->ethtype == ethtype) &&
  1836. (entry->proto_id == app->protocol)) {
  1837. prio = entry->prio;
  1838. break;
  1839. }
  1840. }
  1841. if (i == QED_DCBX_MAX_APP_PROTOCOL) {
  1842. DP_ERR(cdev, "App entry (%d, %d) not found\n", app->selector,
  1843. app->protocol);
  1844. kfree(dcbx_info);
  1845. return -EINVAL;
  1846. }
  1847. app->priority = ffs(prio) - 1;
  1848. kfree(dcbx_info);
  1849. return 0;
  1850. }
  1851. static int qed_dcbnl_ieee_setapp(struct qed_dev *cdev, struct dcb_app *app)
  1852. {
  1853. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  1854. struct qed_dcbx_get *dcbx_info;
  1855. struct qed_dcbx_set dcbx_set;
  1856. struct qed_app_entry *entry;
  1857. struct qed_ptt *ptt;
  1858. bool ethtype;
  1859. int rc, i;
  1860. if (app->priority < 0 || app->priority >= QED_MAX_PFC_PRIORITIES) {
  1861. DP_INFO(hwfn, "Invalid priority %d\n", app->priority);
  1862. return -EINVAL;
  1863. }
  1864. dcbx_info = qed_dcbnl_get_dcbx(hwfn, QED_DCBX_OPERATIONAL_MIB);
  1865. if (!dcbx_info)
  1866. return -EINVAL;
  1867. if (!dcbx_info->operational.ieee) {
  1868. DP_INFO(hwfn, "DCBX is not enabled/operational in IEEE mode\n");
  1869. kfree(dcbx_info);
  1870. return -EINVAL;
  1871. }
  1872. kfree(dcbx_info);
  1873. memset(&dcbx_set, 0, sizeof(dcbx_set));
  1874. rc = qed_dcbx_get_config_params(hwfn, &dcbx_set);
  1875. if (rc)
  1876. return -EINVAL;
  1877. /* ieee defines the selector field value for ethertype to be 1 */
  1878. ethtype = !!((app->selector - 1) == DCB_APP_IDTYPE_ETHTYPE);
  1879. for (i = 0; i < QED_DCBX_MAX_APP_PROTOCOL; i++) {
  1880. entry = &dcbx_set.config.params.app_entry[i];
  1881. if ((entry->ethtype == ethtype) &&
  1882. (entry->proto_id == app->protocol))
  1883. break;
  1884. /* First empty slot */
  1885. if (!entry->proto_id) {
  1886. dcbx_set.config.params.num_app_entries++;
  1887. break;
  1888. }
  1889. }
  1890. if (i == QED_DCBX_MAX_APP_PROTOCOL) {
  1891. DP_ERR(cdev, "App table is full\n");
  1892. return -EBUSY;
  1893. }
  1894. dcbx_set.override_flags |= QED_DCBX_OVERRIDE_APP_CFG;
  1895. dcbx_set.config.params.app_entry[i].ethtype = ethtype;
  1896. dcbx_set.config.params.app_entry[i].proto_id = app->protocol;
  1897. dcbx_set.config.params.app_entry[i].prio = BIT(app->priority);
  1898. ptt = qed_ptt_acquire(hwfn);
  1899. if (!ptt)
  1900. return -EBUSY;
  1901. rc = qed_dcbx_config_params(hwfn, ptt, &dcbx_set, 0);
  1902. qed_ptt_release(hwfn, ptt);
  1903. return rc;
  1904. }
  1905. const struct qed_eth_dcbnl_ops qed_dcbnl_ops_pass = {
  1906. .getstate = qed_dcbnl_getstate,
  1907. .setstate = qed_dcbnl_setstate,
  1908. .getpgtccfgtx = qed_dcbnl_getpgtccfgtx,
  1909. .getpgbwgcfgtx = qed_dcbnl_getpgbwgcfgtx,
  1910. .getpgtccfgrx = qed_dcbnl_getpgtccfgrx,
  1911. .getpgbwgcfgrx = qed_dcbnl_getpgbwgcfgrx,
  1912. .getpfccfg = qed_dcbnl_getpfccfg,
  1913. .setpfccfg = qed_dcbnl_setpfccfg,
  1914. .getcap = qed_dcbnl_getcap,
  1915. .getnumtcs = qed_dcbnl_getnumtcs,
  1916. .getpfcstate = qed_dcbnl_getpfcstate,
  1917. .getdcbx = qed_dcbnl_getdcbx,
  1918. .setpgtccfgtx = qed_dcbnl_setpgtccfgtx,
  1919. .setpgtccfgrx = qed_dcbnl_setpgtccfgrx,
  1920. .setpgbwgcfgtx = qed_dcbnl_setpgbwgcfgtx,
  1921. .setpgbwgcfgrx = qed_dcbnl_setpgbwgcfgrx,
  1922. .setall = qed_dcbnl_setall,
  1923. .setnumtcs = qed_dcbnl_setnumtcs,
  1924. .setpfcstate = qed_dcbnl_setpfcstate,
  1925. .setapp = qed_dcbnl_setapp,
  1926. .setdcbx = qed_dcbnl_setdcbx,
  1927. .setfeatcfg = qed_dcbnl_setfeatcfg,
  1928. .getfeatcfg = qed_dcbnl_getfeatcfg,
  1929. .getapp = qed_dcbnl_getapp,
  1930. .peer_getappinfo = qed_dcbnl_peer_getappinfo,
  1931. .peer_getapptable = qed_dcbnl_peer_getapptable,
  1932. .cee_peer_getpfc = qed_dcbnl_cee_peer_getpfc,
  1933. .cee_peer_getpg = qed_dcbnl_cee_peer_getpg,
  1934. .ieee_getpfc = qed_dcbnl_ieee_getpfc,
  1935. .ieee_setpfc = qed_dcbnl_ieee_setpfc,
  1936. .ieee_getets = qed_dcbnl_ieee_getets,
  1937. .ieee_setets = qed_dcbnl_ieee_setets,
  1938. .ieee_peer_getpfc = qed_dcbnl_ieee_peer_getpfc,
  1939. .ieee_peer_getets = qed_dcbnl_ieee_peer_getets,
  1940. .ieee_getapp = qed_dcbnl_ieee_getapp,
  1941. .ieee_setapp = qed_dcbnl_ieee_setapp,
  1942. };
  1943. #endif