en_netdev.c 96 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582
  1. /*
  2. * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. *
  32. */
  33. #include <linux/bpf.h>
  34. #include <linux/etherdevice.h>
  35. #include <linux/tcp.h>
  36. #include <linux/if_vlan.h>
  37. #include <linux/delay.h>
  38. #include <linux/slab.h>
  39. #include <linux/hash.h>
  40. #include <net/ip.h>
  41. #include <net/busy_poll.h>
  42. #include <net/vxlan.h>
  43. #include <net/devlink.h>
  44. #include <linux/mlx4/driver.h>
  45. #include <linux/mlx4/device.h>
  46. #include <linux/mlx4/cmd.h>
  47. #include <linux/mlx4/cq.h>
  48. #include "mlx4_en.h"
  49. #include "en_port.h"
  50. #define MLX4_EN_MAX_XDP_MTU ((int)(PAGE_SIZE - ETH_HLEN - (2 * VLAN_HLEN) - \
  51. XDP_PACKET_HEADROOM))
  52. int mlx4_en_setup_tc(struct net_device *dev, u8 up)
  53. {
  54. struct mlx4_en_priv *priv = netdev_priv(dev);
  55. int i;
  56. unsigned int offset = 0;
  57. if (up && up != MLX4_EN_NUM_UP)
  58. return -EINVAL;
  59. netdev_set_num_tc(dev, up);
  60. /* Partition Tx queues evenly amongst UP's */
  61. for (i = 0; i < up; i++) {
  62. netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
  63. offset += priv->num_tx_rings_p_up;
  64. }
  65. #ifdef CONFIG_MLX4_EN_DCB
  66. if (!mlx4_is_slave(priv->mdev->dev)) {
  67. if (up) {
  68. if (priv->dcbx_cap)
  69. priv->flags |= MLX4_EN_FLAG_DCB_ENABLED;
  70. } else {
  71. priv->flags &= ~MLX4_EN_FLAG_DCB_ENABLED;
  72. priv->cee_config.pfc_state = false;
  73. }
  74. }
  75. #endif /* CONFIG_MLX4_EN_DCB */
  76. return 0;
  77. }
  78. static int __mlx4_en_setup_tc(struct net_device *dev, u32 handle, __be16 proto,
  79. struct tc_to_netdev *tc)
  80. {
  81. if (tc->type != TC_SETUP_MQPRIO)
  82. return -EINVAL;
  83. return mlx4_en_setup_tc(dev, tc->tc);
  84. }
  85. #ifdef CONFIG_RFS_ACCEL
  86. struct mlx4_en_filter {
  87. struct list_head next;
  88. struct work_struct work;
  89. u8 ip_proto;
  90. __be32 src_ip;
  91. __be32 dst_ip;
  92. __be16 src_port;
  93. __be16 dst_port;
  94. int rxq_index;
  95. struct mlx4_en_priv *priv;
  96. u32 flow_id; /* RFS infrastructure id */
  97. int id; /* mlx4_en driver id */
  98. u64 reg_id; /* Flow steering API id */
  99. u8 activated; /* Used to prevent expiry before filter
  100. * is attached
  101. */
  102. struct hlist_node filter_chain;
  103. };
  104. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
  105. static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto)
  106. {
  107. switch (ip_proto) {
  108. case IPPROTO_UDP:
  109. return MLX4_NET_TRANS_RULE_ID_UDP;
  110. case IPPROTO_TCP:
  111. return MLX4_NET_TRANS_RULE_ID_TCP;
  112. default:
  113. return MLX4_NET_TRANS_RULE_NUM;
  114. }
  115. };
  116. /* Must not acquire state_lock, as its corresponding work_sync
  117. * is done under it.
  118. */
  119. static void mlx4_en_filter_work(struct work_struct *work)
  120. {
  121. struct mlx4_en_filter *filter = container_of(work,
  122. struct mlx4_en_filter,
  123. work);
  124. struct mlx4_en_priv *priv = filter->priv;
  125. struct mlx4_spec_list spec_tcp_udp = {
  126. .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto),
  127. {
  128. .tcp_udp = {
  129. .dst_port = filter->dst_port,
  130. .dst_port_msk = (__force __be16)-1,
  131. .src_port = filter->src_port,
  132. .src_port_msk = (__force __be16)-1,
  133. },
  134. },
  135. };
  136. struct mlx4_spec_list spec_ip = {
  137. .id = MLX4_NET_TRANS_RULE_ID_IPV4,
  138. {
  139. .ipv4 = {
  140. .dst_ip = filter->dst_ip,
  141. .dst_ip_msk = (__force __be32)-1,
  142. .src_ip = filter->src_ip,
  143. .src_ip_msk = (__force __be32)-1,
  144. },
  145. },
  146. };
  147. struct mlx4_spec_list spec_eth = {
  148. .id = MLX4_NET_TRANS_RULE_ID_ETH,
  149. };
  150. struct mlx4_net_trans_rule rule = {
  151. .list = LIST_HEAD_INIT(rule.list),
  152. .queue_mode = MLX4_NET_TRANS_Q_LIFO,
  153. .exclusive = 1,
  154. .allow_loopback = 1,
  155. .promisc_mode = MLX4_FS_REGULAR,
  156. .port = priv->port,
  157. .priority = MLX4_DOMAIN_RFS,
  158. };
  159. int rc;
  160. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  161. if (spec_tcp_udp.id >= MLX4_NET_TRANS_RULE_NUM) {
  162. en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n",
  163. filter->ip_proto);
  164. goto ignore;
  165. }
  166. list_add_tail(&spec_eth.list, &rule.list);
  167. list_add_tail(&spec_ip.list, &rule.list);
  168. list_add_tail(&spec_tcp_udp.list, &rule.list);
  169. rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
  170. memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
  171. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  172. filter->activated = 0;
  173. if (filter->reg_id) {
  174. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  175. if (rc && rc != -ENOENT)
  176. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  177. }
  178. rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
  179. if (rc)
  180. en_err(priv, "Error attaching flow. err = %d\n", rc);
  181. ignore:
  182. mlx4_en_filter_rfs_expire(priv);
  183. filter->activated = 1;
  184. }
  185. static inline struct hlist_head *
  186. filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  187. __be16 src_port, __be16 dst_port)
  188. {
  189. unsigned long l;
  190. int bucket_idx;
  191. l = (__force unsigned long)src_port |
  192. ((__force unsigned long)dst_port << 2);
  193. l ^= (__force unsigned long)(src_ip ^ dst_ip);
  194. bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
  195. return &priv->filter_hash[bucket_idx];
  196. }
  197. static struct mlx4_en_filter *
  198. mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
  199. __be32 dst_ip, u8 ip_proto, __be16 src_port,
  200. __be16 dst_port, u32 flow_id)
  201. {
  202. struct mlx4_en_filter *filter = NULL;
  203. filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
  204. if (!filter)
  205. return NULL;
  206. filter->priv = priv;
  207. filter->rxq_index = rxq_index;
  208. INIT_WORK(&filter->work, mlx4_en_filter_work);
  209. filter->src_ip = src_ip;
  210. filter->dst_ip = dst_ip;
  211. filter->ip_proto = ip_proto;
  212. filter->src_port = src_port;
  213. filter->dst_port = dst_port;
  214. filter->flow_id = flow_id;
  215. filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
  216. list_add_tail(&filter->next, &priv->filters);
  217. hlist_add_head(&filter->filter_chain,
  218. filter_hash_bucket(priv, src_ip, dst_ip, src_port,
  219. dst_port));
  220. return filter;
  221. }
  222. static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
  223. {
  224. struct mlx4_en_priv *priv = filter->priv;
  225. int rc;
  226. list_del(&filter->next);
  227. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  228. if (rc && rc != -ENOENT)
  229. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  230. kfree(filter);
  231. }
  232. static inline struct mlx4_en_filter *
  233. mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  234. u8 ip_proto, __be16 src_port, __be16 dst_port)
  235. {
  236. struct mlx4_en_filter *filter;
  237. struct mlx4_en_filter *ret = NULL;
  238. hlist_for_each_entry(filter,
  239. filter_hash_bucket(priv, src_ip, dst_ip,
  240. src_port, dst_port),
  241. filter_chain) {
  242. if (filter->src_ip == src_ip &&
  243. filter->dst_ip == dst_ip &&
  244. filter->ip_proto == ip_proto &&
  245. filter->src_port == src_port &&
  246. filter->dst_port == dst_port) {
  247. ret = filter;
  248. break;
  249. }
  250. }
  251. return ret;
  252. }
  253. static int
  254. mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
  255. u16 rxq_index, u32 flow_id)
  256. {
  257. struct mlx4_en_priv *priv = netdev_priv(net_dev);
  258. struct mlx4_en_filter *filter;
  259. const struct iphdr *ip;
  260. const __be16 *ports;
  261. u8 ip_proto;
  262. __be32 src_ip;
  263. __be32 dst_ip;
  264. __be16 src_port;
  265. __be16 dst_port;
  266. int nhoff = skb_network_offset(skb);
  267. int ret = 0;
  268. if (skb->protocol != htons(ETH_P_IP))
  269. return -EPROTONOSUPPORT;
  270. ip = (const struct iphdr *)(skb->data + nhoff);
  271. if (ip_is_fragment(ip))
  272. return -EPROTONOSUPPORT;
  273. if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP))
  274. return -EPROTONOSUPPORT;
  275. ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
  276. ip_proto = ip->protocol;
  277. src_ip = ip->saddr;
  278. dst_ip = ip->daddr;
  279. src_port = ports[0];
  280. dst_port = ports[1];
  281. spin_lock_bh(&priv->filters_lock);
  282. filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto,
  283. src_port, dst_port);
  284. if (filter) {
  285. if (filter->rxq_index == rxq_index)
  286. goto out;
  287. filter->rxq_index = rxq_index;
  288. } else {
  289. filter = mlx4_en_filter_alloc(priv, rxq_index,
  290. src_ip, dst_ip, ip_proto,
  291. src_port, dst_port, flow_id);
  292. if (!filter) {
  293. ret = -ENOMEM;
  294. goto err;
  295. }
  296. }
  297. queue_work(priv->mdev->workqueue, &filter->work);
  298. out:
  299. ret = filter->id;
  300. err:
  301. spin_unlock_bh(&priv->filters_lock);
  302. return ret;
  303. }
  304. void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv)
  305. {
  306. struct mlx4_en_filter *filter, *tmp;
  307. LIST_HEAD(del_list);
  308. spin_lock_bh(&priv->filters_lock);
  309. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  310. list_move(&filter->next, &del_list);
  311. hlist_del(&filter->filter_chain);
  312. }
  313. spin_unlock_bh(&priv->filters_lock);
  314. list_for_each_entry_safe(filter, tmp, &del_list, next) {
  315. cancel_work_sync(&filter->work);
  316. mlx4_en_filter_free(filter);
  317. }
  318. }
  319. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
  320. {
  321. struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
  322. LIST_HEAD(del_list);
  323. int i = 0;
  324. spin_lock_bh(&priv->filters_lock);
  325. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  326. if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
  327. break;
  328. if (filter->activated &&
  329. !work_pending(&filter->work) &&
  330. rps_may_expire_flow(priv->dev,
  331. filter->rxq_index, filter->flow_id,
  332. filter->id)) {
  333. list_move(&filter->next, &del_list);
  334. hlist_del(&filter->filter_chain);
  335. } else
  336. last_filter = filter;
  337. i++;
  338. }
  339. if (last_filter && (&last_filter->next != priv->filters.next))
  340. list_move(&priv->filters, &last_filter->next);
  341. spin_unlock_bh(&priv->filters_lock);
  342. list_for_each_entry_safe(filter, tmp, &del_list, next)
  343. mlx4_en_filter_free(filter);
  344. }
  345. #endif
  346. static int mlx4_en_vlan_rx_add_vid(struct net_device *dev,
  347. __be16 proto, u16 vid)
  348. {
  349. struct mlx4_en_priv *priv = netdev_priv(dev);
  350. struct mlx4_en_dev *mdev = priv->mdev;
  351. int err;
  352. int idx;
  353. en_dbg(HW, priv, "adding VLAN:%d\n", vid);
  354. set_bit(vid, priv->active_vlans);
  355. /* Add VID to port VLAN filter */
  356. mutex_lock(&mdev->state_lock);
  357. if (mdev->device_up && priv->port_up) {
  358. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  359. if (err) {
  360. en_err(priv, "Failed configuring VLAN filter\n");
  361. goto out;
  362. }
  363. }
  364. err = mlx4_register_vlan(mdev->dev, priv->port, vid, &idx);
  365. if (err)
  366. en_dbg(HW, priv, "Failed adding vlan %d\n", vid);
  367. out:
  368. mutex_unlock(&mdev->state_lock);
  369. return err;
  370. }
  371. static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev,
  372. __be16 proto, u16 vid)
  373. {
  374. struct mlx4_en_priv *priv = netdev_priv(dev);
  375. struct mlx4_en_dev *mdev = priv->mdev;
  376. int err = 0;
  377. en_dbg(HW, priv, "Killing VID:%d\n", vid);
  378. clear_bit(vid, priv->active_vlans);
  379. /* Remove VID from port VLAN filter */
  380. mutex_lock(&mdev->state_lock);
  381. mlx4_unregister_vlan(mdev->dev, priv->port, vid);
  382. if (mdev->device_up && priv->port_up) {
  383. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  384. if (err)
  385. en_err(priv, "Failed configuring VLAN filter\n");
  386. }
  387. mutex_unlock(&mdev->state_lock);
  388. return err;
  389. }
  390. static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
  391. {
  392. int i;
  393. for (i = ETH_ALEN - 1; i >= 0; --i) {
  394. dst_mac[i] = src_mac & 0xff;
  395. src_mac >>= 8;
  396. }
  397. memset(&dst_mac[ETH_ALEN], 0, 2);
  398. }
  399. static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv, unsigned char *addr,
  400. int qpn, u64 *reg_id)
  401. {
  402. int err;
  403. if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
  404. priv->mdev->dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
  405. return 0; /* do nothing */
  406. err = mlx4_tunnel_steer_add(priv->mdev->dev, addr, priv->port, qpn,
  407. MLX4_DOMAIN_NIC, reg_id);
  408. if (err) {
  409. en_err(priv, "failed to add vxlan steering rule, err %d\n", err);
  410. return err;
  411. }
  412. en_dbg(DRV, priv, "added vxlan steering rule, mac %pM reg_id %llx\n", addr, *reg_id);
  413. return 0;
  414. }
  415. static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
  416. unsigned char *mac, int *qpn, u64 *reg_id)
  417. {
  418. struct mlx4_en_dev *mdev = priv->mdev;
  419. struct mlx4_dev *dev = mdev->dev;
  420. int err;
  421. switch (dev->caps.steering_mode) {
  422. case MLX4_STEERING_MODE_B0: {
  423. struct mlx4_qp qp;
  424. u8 gid[16] = {0};
  425. qp.qpn = *qpn;
  426. memcpy(&gid[10], mac, ETH_ALEN);
  427. gid[5] = priv->port;
  428. err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
  429. break;
  430. }
  431. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  432. struct mlx4_spec_list spec_eth = { {NULL} };
  433. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  434. struct mlx4_net_trans_rule rule = {
  435. .queue_mode = MLX4_NET_TRANS_Q_FIFO,
  436. .exclusive = 0,
  437. .allow_loopback = 1,
  438. .promisc_mode = MLX4_FS_REGULAR,
  439. .priority = MLX4_DOMAIN_NIC,
  440. };
  441. rule.port = priv->port;
  442. rule.qpn = *qpn;
  443. INIT_LIST_HEAD(&rule.list);
  444. spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
  445. memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
  446. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  447. list_add_tail(&spec_eth.list, &rule.list);
  448. err = mlx4_flow_attach(dev, &rule, reg_id);
  449. break;
  450. }
  451. default:
  452. return -EINVAL;
  453. }
  454. if (err)
  455. en_warn(priv, "Failed Attaching Unicast\n");
  456. return err;
  457. }
  458. static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
  459. unsigned char *mac, int qpn, u64 reg_id)
  460. {
  461. struct mlx4_en_dev *mdev = priv->mdev;
  462. struct mlx4_dev *dev = mdev->dev;
  463. switch (dev->caps.steering_mode) {
  464. case MLX4_STEERING_MODE_B0: {
  465. struct mlx4_qp qp;
  466. u8 gid[16] = {0};
  467. qp.qpn = qpn;
  468. memcpy(&gid[10], mac, ETH_ALEN);
  469. gid[5] = priv->port;
  470. mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
  471. break;
  472. }
  473. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  474. mlx4_flow_detach(dev, reg_id);
  475. break;
  476. }
  477. default:
  478. en_err(priv, "Invalid steering mode.\n");
  479. }
  480. }
  481. static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
  482. {
  483. struct mlx4_en_dev *mdev = priv->mdev;
  484. struct mlx4_dev *dev = mdev->dev;
  485. int index = 0;
  486. int err = 0;
  487. int *qpn = &priv->base_qpn;
  488. u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
  489. en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
  490. priv->dev->dev_addr);
  491. index = mlx4_register_mac(dev, priv->port, mac);
  492. if (index < 0) {
  493. err = index;
  494. en_err(priv, "Failed adding MAC: %pM\n",
  495. priv->dev->dev_addr);
  496. return err;
  497. }
  498. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  499. int base_qpn = mlx4_get_base_qpn(dev, priv->port);
  500. *qpn = base_qpn + index;
  501. return 0;
  502. }
  503. err = mlx4_qp_reserve_range(dev, 1, 1, qpn, MLX4_RESERVE_A0_QP);
  504. en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
  505. if (err) {
  506. en_err(priv, "Failed to reserve qp for mac registration\n");
  507. mlx4_unregister_mac(dev, priv->port, mac);
  508. return err;
  509. }
  510. return 0;
  511. }
  512. static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
  513. {
  514. struct mlx4_en_dev *mdev = priv->mdev;
  515. struct mlx4_dev *dev = mdev->dev;
  516. int qpn = priv->base_qpn;
  517. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  518. u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
  519. en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
  520. priv->dev->dev_addr);
  521. mlx4_unregister_mac(dev, priv->port, mac);
  522. } else {
  523. en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n",
  524. priv->port, qpn);
  525. mlx4_qp_release_range(dev, qpn, 1);
  526. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  527. }
  528. }
  529. static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
  530. unsigned char *new_mac, unsigned char *prev_mac)
  531. {
  532. struct mlx4_en_dev *mdev = priv->mdev;
  533. struct mlx4_dev *dev = mdev->dev;
  534. int err = 0;
  535. u64 new_mac_u64 = mlx4_mac_to_u64(new_mac);
  536. if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
  537. struct hlist_head *bucket;
  538. unsigned int mac_hash;
  539. struct mlx4_mac_entry *entry;
  540. struct hlist_node *tmp;
  541. u64 prev_mac_u64 = mlx4_mac_to_u64(prev_mac);
  542. bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
  543. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  544. if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
  545. mlx4_en_uc_steer_release(priv, entry->mac,
  546. qpn, entry->reg_id);
  547. mlx4_unregister_mac(dev, priv->port,
  548. prev_mac_u64);
  549. hlist_del_rcu(&entry->hlist);
  550. synchronize_rcu();
  551. memcpy(entry->mac, new_mac, ETH_ALEN);
  552. entry->reg_id = 0;
  553. mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
  554. hlist_add_head_rcu(&entry->hlist,
  555. &priv->mac_hash[mac_hash]);
  556. mlx4_register_mac(dev, priv->port, new_mac_u64);
  557. err = mlx4_en_uc_steer_add(priv, new_mac,
  558. &qpn,
  559. &entry->reg_id);
  560. if (err)
  561. return err;
  562. if (priv->tunnel_reg_id) {
  563. mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
  564. priv->tunnel_reg_id = 0;
  565. }
  566. err = mlx4_en_tunnel_steer_add(priv, new_mac, qpn,
  567. &priv->tunnel_reg_id);
  568. return err;
  569. }
  570. }
  571. return -EINVAL;
  572. }
  573. return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
  574. }
  575. static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv,
  576. unsigned char new_mac[ETH_ALEN + 2])
  577. {
  578. int err = 0;
  579. if (priv->port_up) {
  580. /* Remove old MAC and insert the new one */
  581. err = mlx4_en_replace_mac(priv, priv->base_qpn,
  582. new_mac, priv->current_mac);
  583. if (err)
  584. en_err(priv, "Failed changing HW MAC address\n");
  585. } else
  586. en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
  587. if (!err)
  588. memcpy(priv->current_mac, new_mac, sizeof(priv->current_mac));
  589. return err;
  590. }
  591. static int mlx4_en_set_mac(struct net_device *dev, void *addr)
  592. {
  593. struct mlx4_en_priv *priv = netdev_priv(dev);
  594. struct mlx4_en_dev *mdev = priv->mdev;
  595. struct sockaddr *saddr = addr;
  596. unsigned char new_mac[ETH_ALEN + 2];
  597. int err;
  598. if (!is_valid_ether_addr(saddr->sa_data))
  599. return -EADDRNOTAVAIL;
  600. mutex_lock(&mdev->state_lock);
  601. memcpy(new_mac, saddr->sa_data, ETH_ALEN);
  602. err = mlx4_en_do_set_mac(priv, new_mac);
  603. if (!err)
  604. memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
  605. mutex_unlock(&mdev->state_lock);
  606. return err;
  607. }
  608. static void mlx4_en_clear_list(struct net_device *dev)
  609. {
  610. struct mlx4_en_priv *priv = netdev_priv(dev);
  611. struct mlx4_en_mc_list *tmp, *mc_to_del;
  612. list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
  613. list_del(&mc_to_del->list);
  614. kfree(mc_to_del);
  615. }
  616. }
  617. static void mlx4_en_cache_mclist(struct net_device *dev)
  618. {
  619. struct mlx4_en_priv *priv = netdev_priv(dev);
  620. struct netdev_hw_addr *ha;
  621. struct mlx4_en_mc_list *tmp;
  622. mlx4_en_clear_list(dev);
  623. netdev_for_each_mc_addr(ha, dev) {
  624. tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
  625. if (!tmp) {
  626. mlx4_en_clear_list(dev);
  627. return;
  628. }
  629. memcpy(tmp->addr, ha->addr, ETH_ALEN);
  630. list_add_tail(&tmp->list, &priv->mc_list);
  631. }
  632. }
  633. static void update_mclist_flags(struct mlx4_en_priv *priv,
  634. struct list_head *dst,
  635. struct list_head *src)
  636. {
  637. struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
  638. bool found;
  639. /* Find all the entries that should be removed from dst,
  640. * These are the entries that are not found in src
  641. */
  642. list_for_each_entry(dst_tmp, dst, list) {
  643. found = false;
  644. list_for_each_entry(src_tmp, src, list) {
  645. if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
  646. found = true;
  647. break;
  648. }
  649. }
  650. if (!found)
  651. dst_tmp->action = MCLIST_REM;
  652. }
  653. /* Add entries that exist in src but not in dst
  654. * mark them as need to add
  655. */
  656. list_for_each_entry(src_tmp, src, list) {
  657. found = false;
  658. list_for_each_entry(dst_tmp, dst, list) {
  659. if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
  660. dst_tmp->action = MCLIST_NONE;
  661. found = true;
  662. break;
  663. }
  664. }
  665. if (!found) {
  666. new_mc = kmemdup(src_tmp,
  667. sizeof(struct mlx4_en_mc_list),
  668. GFP_KERNEL);
  669. if (!new_mc)
  670. return;
  671. new_mc->action = MCLIST_ADD;
  672. list_add_tail(&new_mc->list, dst);
  673. }
  674. }
  675. }
  676. static void mlx4_en_set_rx_mode(struct net_device *dev)
  677. {
  678. struct mlx4_en_priv *priv = netdev_priv(dev);
  679. if (!priv->port_up)
  680. return;
  681. queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
  682. }
  683. static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
  684. struct mlx4_en_dev *mdev)
  685. {
  686. int err = 0;
  687. if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
  688. if (netif_msg_rx_status(priv))
  689. en_warn(priv, "Entering promiscuous mode\n");
  690. priv->flags |= MLX4_EN_FLAG_PROMISC;
  691. /* Enable promiscouos mode */
  692. switch (mdev->dev->caps.steering_mode) {
  693. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  694. err = mlx4_flow_steer_promisc_add(mdev->dev,
  695. priv->port,
  696. priv->base_qpn,
  697. MLX4_FS_ALL_DEFAULT);
  698. if (err)
  699. en_err(priv, "Failed enabling promiscuous mode\n");
  700. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  701. break;
  702. case MLX4_STEERING_MODE_B0:
  703. err = mlx4_unicast_promisc_add(mdev->dev,
  704. priv->base_qpn,
  705. priv->port);
  706. if (err)
  707. en_err(priv, "Failed enabling unicast promiscuous mode\n");
  708. /* Add the default qp number as multicast
  709. * promisc
  710. */
  711. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  712. err = mlx4_multicast_promisc_add(mdev->dev,
  713. priv->base_qpn,
  714. priv->port);
  715. if (err)
  716. en_err(priv, "Failed enabling multicast promiscuous mode\n");
  717. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  718. }
  719. break;
  720. case MLX4_STEERING_MODE_A0:
  721. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  722. priv->port,
  723. priv->base_qpn,
  724. 1);
  725. if (err)
  726. en_err(priv, "Failed enabling promiscuous mode\n");
  727. break;
  728. }
  729. /* Disable port multicast filter (unconditionally) */
  730. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  731. 0, MLX4_MCAST_DISABLE);
  732. if (err)
  733. en_err(priv, "Failed disabling multicast filter\n");
  734. }
  735. }
  736. static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
  737. struct mlx4_en_dev *mdev)
  738. {
  739. int err = 0;
  740. if (netif_msg_rx_status(priv))
  741. en_warn(priv, "Leaving promiscuous mode\n");
  742. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  743. /* Disable promiscouos mode */
  744. switch (mdev->dev->caps.steering_mode) {
  745. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  746. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  747. priv->port,
  748. MLX4_FS_ALL_DEFAULT);
  749. if (err)
  750. en_err(priv, "Failed disabling promiscuous mode\n");
  751. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  752. break;
  753. case MLX4_STEERING_MODE_B0:
  754. err = mlx4_unicast_promisc_remove(mdev->dev,
  755. priv->base_qpn,
  756. priv->port);
  757. if (err)
  758. en_err(priv, "Failed disabling unicast promiscuous mode\n");
  759. /* Disable Multicast promisc */
  760. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  761. err = mlx4_multicast_promisc_remove(mdev->dev,
  762. priv->base_qpn,
  763. priv->port);
  764. if (err)
  765. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  766. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  767. }
  768. break;
  769. case MLX4_STEERING_MODE_A0:
  770. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  771. priv->port,
  772. priv->base_qpn, 0);
  773. if (err)
  774. en_err(priv, "Failed disabling promiscuous mode\n");
  775. break;
  776. }
  777. }
  778. static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
  779. struct net_device *dev,
  780. struct mlx4_en_dev *mdev)
  781. {
  782. struct mlx4_en_mc_list *mclist, *tmp;
  783. u64 mcast_addr = 0;
  784. u8 mc_list[16] = {0};
  785. int err = 0;
  786. /* Enable/disable the multicast filter according to IFF_ALLMULTI */
  787. if (dev->flags & IFF_ALLMULTI) {
  788. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  789. 0, MLX4_MCAST_DISABLE);
  790. if (err)
  791. en_err(priv, "Failed disabling multicast filter\n");
  792. /* Add the default qp number as multicast promisc */
  793. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  794. switch (mdev->dev->caps.steering_mode) {
  795. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  796. err = mlx4_flow_steer_promisc_add(mdev->dev,
  797. priv->port,
  798. priv->base_qpn,
  799. MLX4_FS_MC_DEFAULT);
  800. break;
  801. case MLX4_STEERING_MODE_B0:
  802. err = mlx4_multicast_promisc_add(mdev->dev,
  803. priv->base_qpn,
  804. priv->port);
  805. break;
  806. case MLX4_STEERING_MODE_A0:
  807. break;
  808. }
  809. if (err)
  810. en_err(priv, "Failed entering multicast promisc mode\n");
  811. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  812. }
  813. } else {
  814. /* Disable Multicast promisc */
  815. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  816. switch (mdev->dev->caps.steering_mode) {
  817. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  818. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  819. priv->port,
  820. MLX4_FS_MC_DEFAULT);
  821. break;
  822. case MLX4_STEERING_MODE_B0:
  823. err = mlx4_multicast_promisc_remove(mdev->dev,
  824. priv->base_qpn,
  825. priv->port);
  826. break;
  827. case MLX4_STEERING_MODE_A0:
  828. break;
  829. }
  830. if (err)
  831. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  832. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  833. }
  834. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  835. 0, MLX4_MCAST_DISABLE);
  836. if (err)
  837. en_err(priv, "Failed disabling multicast filter\n");
  838. /* Flush mcast filter and init it with broadcast address */
  839. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
  840. 1, MLX4_MCAST_CONFIG);
  841. /* Update multicast list - we cache all addresses so they won't
  842. * change while HW is updated holding the command semaphor */
  843. netif_addr_lock_bh(dev);
  844. mlx4_en_cache_mclist(dev);
  845. netif_addr_unlock_bh(dev);
  846. list_for_each_entry(mclist, &priv->mc_list, list) {
  847. mcast_addr = mlx4_mac_to_u64(mclist->addr);
  848. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
  849. mcast_addr, 0, MLX4_MCAST_CONFIG);
  850. }
  851. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  852. 0, MLX4_MCAST_ENABLE);
  853. if (err)
  854. en_err(priv, "Failed enabling multicast filter\n");
  855. update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
  856. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  857. if (mclist->action == MCLIST_REM) {
  858. /* detach this address and delete from list */
  859. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  860. mc_list[5] = priv->port;
  861. err = mlx4_multicast_detach(mdev->dev,
  862. &priv->rss_map.indir_qp,
  863. mc_list,
  864. MLX4_PROT_ETH,
  865. mclist->reg_id);
  866. if (err)
  867. en_err(priv, "Fail to detach multicast address\n");
  868. if (mclist->tunnel_reg_id) {
  869. err = mlx4_flow_detach(priv->mdev->dev, mclist->tunnel_reg_id);
  870. if (err)
  871. en_err(priv, "Failed to detach multicast address\n");
  872. }
  873. /* remove from list */
  874. list_del(&mclist->list);
  875. kfree(mclist);
  876. } else if (mclist->action == MCLIST_ADD) {
  877. /* attach the address */
  878. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  879. /* needed for B0 steering support */
  880. mc_list[5] = priv->port;
  881. err = mlx4_multicast_attach(mdev->dev,
  882. &priv->rss_map.indir_qp,
  883. mc_list,
  884. priv->port, 0,
  885. MLX4_PROT_ETH,
  886. &mclist->reg_id);
  887. if (err)
  888. en_err(priv, "Fail to attach multicast address\n");
  889. err = mlx4_en_tunnel_steer_add(priv, &mc_list[10], priv->base_qpn,
  890. &mclist->tunnel_reg_id);
  891. if (err)
  892. en_err(priv, "Failed to attach multicast address\n");
  893. }
  894. }
  895. }
  896. }
  897. static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
  898. struct net_device *dev,
  899. struct mlx4_en_dev *mdev)
  900. {
  901. struct netdev_hw_addr *ha;
  902. struct mlx4_mac_entry *entry;
  903. struct hlist_node *tmp;
  904. bool found;
  905. u64 mac;
  906. int err = 0;
  907. struct hlist_head *bucket;
  908. unsigned int i;
  909. int removed = 0;
  910. u32 prev_flags;
  911. /* Note that we do not need to protect our mac_hash traversal with rcu,
  912. * since all modification code is protected by mdev->state_lock
  913. */
  914. /* find what to remove */
  915. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  916. bucket = &priv->mac_hash[i];
  917. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  918. found = false;
  919. netdev_for_each_uc_addr(ha, dev) {
  920. if (ether_addr_equal_64bits(entry->mac,
  921. ha->addr)) {
  922. found = true;
  923. break;
  924. }
  925. }
  926. /* MAC address of the port is not in uc list */
  927. if (ether_addr_equal_64bits(entry->mac,
  928. priv->current_mac))
  929. found = true;
  930. if (!found) {
  931. mac = mlx4_mac_to_u64(entry->mac);
  932. mlx4_en_uc_steer_release(priv, entry->mac,
  933. priv->base_qpn,
  934. entry->reg_id);
  935. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  936. hlist_del_rcu(&entry->hlist);
  937. kfree_rcu(entry, rcu);
  938. en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
  939. entry->mac, priv->port);
  940. ++removed;
  941. }
  942. }
  943. }
  944. /* if we didn't remove anything, there is no use in trying to add
  945. * again once we are in a forced promisc mode state
  946. */
  947. if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
  948. return;
  949. prev_flags = priv->flags;
  950. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  951. /* find what to add */
  952. netdev_for_each_uc_addr(ha, dev) {
  953. found = false;
  954. bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
  955. hlist_for_each_entry(entry, bucket, hlist) {
  956. if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
  957. found = true;
  958. break;
  959. }
  960. }
  961. if (!found) {
  962. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  963. if (!entry) {
  964. en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
  965. ha->addr, priv->port);
  966. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  967. break;
  968. }
  969. mac = mlx4_mac_to_u64(ha->addr);
  970. memcpy(entry->mac, ha->addr, ETH_ALEN);
  971. err = mlx4_register_mac(mdev->dev, priv->port, mac);
  972. if (err < 0) {
  973. en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
  974. ha->addr, priv->port, err);
  975. kfree(entry);
  976. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  977. break;
  978. }
  979. err = mlx4_en_uc_steer_add(priv, ha->addr,
  980. &priv->base_qpn,
  981. &entry->reg_id);
  982. if (err) {
  983. en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
  984. ha->addr, priv->port, err);
  985. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  986. kfree(entry);
  987. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  988. break;
  989. } else {
  990. unsigned int mac_hash;
  991. en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
  992. ha->addr, priv->port);
  993. mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
  994. bucket = &priv->mac_hash[mac_hash];
  995. hlist_add_head_rcu(&entry->hlist, bucket);
  996. }
  997. }
  998. }
  999. if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  1000. en_warn(priv, "Forcing promiscuous mode on port:%d\n",
  1001. priv->port);
  1002. } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  1003. en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
  1004. priv->port);
  1005. }
  1006. }
  1007. static void mlx4_en_do_set_rx_mode(struct work_struct *work)
  1008. {
  1009. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1010. rx_mode_task);
  1011. struct mlx4_en_dev *mdev = priv->mdev;
  1012. struct net_device *dev = priv->dev;
  1013. mutex_lock(&mdev->state_lock);
  1014. if (!mdev->device_up) {
  1015. en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
  1016. goto out;
  1017. }
  1018. if (!priv->port_up) {
  1019. en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
  1020. goto out;
  1021. }
  1022. if (!netif_carrier_ok(dev)) {
  1023. if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
  1024. if (priv->port_state.link_state) {
  1025. priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
  1026. netif_carrier_on(dev);
  1027. en_dbg(LINK, priv, "Link Up\n");
  1028. }
  1029. }
  1030. }
  1031. if (dev->priv_flags & IFF_UNICAST_FLT)
  1032. mlx4_en_do_uc_filter(priv, dev, mdev);
  1033. /* Promsicuous mode: disable all filters */
  1034. if ((dev->flags & IFF_PROMISC) ||
  1035. (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
  1036. mlx4_en_set_promisc_mode(priv, mdev);
  1037. goto out;
  1038. }
  1039. /* Not in promiscuous mode */
  1040. if (priv->flags & MLX4_EN_FLAG_PROMISC)
  1041. mlx4_en_clear_promisc_mode(priv, mdev);
  1042. mlx4_en_do_multicast(priv, dev, mdev);
  1043. out:
  1044. mutex_unlock(&mdev->state_lock);
  1045. }
  1046. #ifdef CONFIG_NET_POLL_CONTROLLER
  1047. static void mlx4_en_netpoll(struct net_device *dev)
  1048. {
  1049. struct mlx4_en_priv *priv = netdev_priv(dev);
  1050. struct mlx4_en_cq *cq;
  1051. int i;
  1052. for (i = 0; i < priv->tx_ring_num[TX]; i++) {
  1053. cq = priv->tx_cq[TX][i];
  1054. napi_schedule(&cq->napi);
  1055. }
  1056. }
  1057. #endif
  1058. static int mlx4_en_set_rss_steer_rules(struct mlx4_en_priv *priv)
  1059. {
  1060. u64 reg_id;
  1061. int err = 0;
  1062. int *qpn = &priv->base_qpn;
  1063. struct mlx4_mac_entry *entry;
  1064. err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, &reg_id);
  1065. if (err)
  1066. return err;
  1067. err = mlx4_en_tunnel_steer_add(priv, priv->dev->dev_addr, *qpn,
  1068. &priv->tunnel_reg_id);
  1069. if (err)
  1070. goto tunnel_err;
  1071. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  1072. if (!entry) {
  1073. err = -ENOMEM;
  1074. goto alloc_err;
  1075. }
  1076. memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
  1077. memcpy(priv->current_mac, entry->mac, sizeof(priv->current_mac));
  1078. entry->reg_id = reg_id;
  1079. hlist_add_head_rcu(&entry->hlist,
  1080. &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
  1081. return 0;
  1082. alloc_err:
  1083. if (priv->tunnel_reg_id)
  1084. mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
  1085. tunnel_err:
  1086. mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
  1087. return err;
  1088. }
  1089. static void mlx4_en_delete_rss_steer_rules(struct mlx4_en_priv *priv)
  1090. {
  1091. u64 mac;
  1092. unsigned int i;
  1093. int qpn = priv->base_qpn;
  1094. struct hlist_head *bucket;
  1095. struct hlist_node *tmp;
  1096. struct mlx4_mac_entry *entry;
  1097. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  1098. bucket = &priv->mac_hash[i];
  1099. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  1100. mac = mlx4_mac_to_u64(entry->mac);
  1101. en_dbg(DRV, priv, "Registering MAC:%pM for deleting\n",
  1102. entry->mac);
  1103. mlx4_en_uc_steer_release(priv, entry->mac,
  1104. qpn, entry->reg_id);
  1105. mlx4_unregister_mac(priv->mdev->dev, priv->port, mac);
  1106. hlist_del_rcu(&entry->hlist);
  1107. kfree_rcu(entry, rcu);
  1108. }
  1109. }
  1110. if (priv->tunnel_reg_id) {
  1111. mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
  1112. priv->tunnel_reg_id = 0;
  1113. }
  1114. }
  1115. static void mlx4_en_tx_timeout(struct net_device *dev)
  1116. {
  1117. struct mlx4_en_priv *priv = netdev_priv(dev);
  1118. struct mlx4_en_dev *mdev = priv->mdev;
  1119. int i;
  1120. if (netif_msg_timer(priv))
  1121. en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
  1122. for (i = 0; i < priv->tx_ring_num[TX]; i++) {
  1123. struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][i];
  1124. if (!netif_tx_queue_stopped(netdev_get_tx_queue(dev, i)))
  1125. continue;
  1126. en_warn(priv, "TX timeout on queue: %d, QP: 0x%x, CQ: 0x%x, Cons: 0x%x, Prod: 0x%x\n",
  1127. i, tx_ring->qpn, tx_ring->sp_cqn,
  1128. tx_ring->cons, tx_ring->prod);
  1129. }
  1130. priv->port_stats.tx_timeout++;
  1131. en_dbg(DRV, priv, "Scheduling watchdog\n");
  1132. queue_work(mdev->workqueue, &priv->watchdog_task);
  1133. }
  1134. static void
  1135. mlx4_en_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)
  1136. {
  1137. struct mlx4_en_priv *priv = netdev_priv(dev);
  1138. spin_lock_bh(&priv->stats_lock);
  1139. mlx4_en_fold_software_stats(dev);
  1140. netdev_stats_to_stats64(stats, &dev->stats);
  1141. spin_unlock_bh(&priv->stats_lock);
  1142. }
  1143. static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
  1144. {
  1145. struct mlx4_en_cq *cq;
  1146. int i, t;
  1147. /* If we haven't received a specific coalescing setting
  1148. * (module param), we set the moderation parameters as follows:
  1149. * - moder_cnt is set to the number of mtu sized packets to
  1150. * satisfy our coalescing target.
  1151. * - moder_time is set to a fixed value.
  1152. */
  1153. priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
  1154. priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
  1155. priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
  1156. priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
  1157. en_dbg(INTR, priv, "Default coalesing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
  1158. priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
  1159. /* Setup cq moderation params */
  1160. for (i = 0; i < priv->rx_ring_num; i++) {
  1161. cq = priv->rx_cq[i];
  1162. cq->moder_cnt = priv->rx_frames;
  1163. cq->moder_time = priv->rx_usecs;
  1164. priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
  1165. priv->last_moder_packets[i] = 0;
  1166. priv->last_moder_bytes[i] = 0;
  1167. }
  1168. for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1169. for (i = 0; i < priv->tx_ring_num[t]; i++) {
  1170. cq = priv->tx_cq[t][i];
  1171. cq->moder_cnt = priv->tx_frames;
  1172. cq->moder_time = priv->tx_usecs;
  1173. }
  1174. }
  1175. /* Reset auto-moderation params */
  1176. priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
  1177. priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
  1178. priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
  1179. priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
  1180. priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
  1181. priv->adaptive_rx_coal = 1;
  1182. priv->last_moder_jiffies = 0;
  1183. priv->last_moder_tx_packets = 0;
  1184. }
  1185. static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
  1186. {
  1187. unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
  1188. u32 pkt_rate_high, pkt_rate_low;
  1189. struct mlx4_en_cq *cq;
  1190. unsigned long packets;
  1191. unsigned long rate;
  1192. unsigned long avg_pkt_size;
  1193. unsigned long rx_packets;
  1194. unsigned long rx_bytes;
  1195. unsigned long rx_pkt_diff;
  1196. int moder_time;
  1197. int ring, err;
  1198. if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
  1199. return;
  1200. pkt_rate_low = READ_ONCE(priv->pkt_rate_low);
  1201. pkt_rate_high = READ_ONCE(priv->pkt_rate_high);
  1202. for (ring = 0; ring < priv->rx_ring_num; ring++) {
  1203. rx_packets = READ_ONCE(priv->rx_ring[ring]->packets);
  1204. rx_bytes = READ_ONCE(priv->rx_ring[ring]->bytes);
  1205. rx_pkt_diff = rx_packets - priv->last_moder_packets[ring];
  1206. packets = rx_pkt_diff;
  1207. rate = packets * HZ / period;
  1208. avg_pkt_size = packets ? (rx_bytes -
  1209. priv->last_moder_bytes[ring]) / packets : 0;
  1210. /* Apply auto-moderation only when packet rate
  1211. * exceeds a rate that it matters */
  1212. if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
  1213. avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
  1214. if (rate <= pkt_rate_low)
  1215. moder_time = priv->rx_usecs_low;
  1216. else if (rate >= pkt_rate_high)
  1217. moder_time = priv->rx_usecs_high;
  1218. else
  1219. moder_time = (rate - pkt_rate_low) *
  1220. (priv->rx_usecs_high - priv->rx_usecs_low) /
  1221. (pkt_rate_high - pkt_rate_low) +
  1222. priv->rx_usecs_low;
  1223. } else {
  1224. moder_time = priv->rx_usecs_low;
  1225. }
  1226. cq = priv->rx_cq[ring];
  1227. if (moder_time != priv->last_moder_time[ring] ||
  1228. cq->moder_cnt != priv->rx_frames) {
  1229. priv->last_moder_time[ring] = moder_time;
  1230. cq->moder_time = moder_time;
  1231. cq->moder_cnt = priv->rx_frames;
  1232. err = mlx4_en_set_cq_moder(priv, cq);
  1233. if (err)
  1234. en_err(priv, "Failed modifying moderation for cq:%d\n",
  1235. ring);
  1236. }
  1237. priv->last_moder_packets[ring] = rx_packets;
  1238. priv->last_moder_bytes[ring] = rx_bytes;
  1239. }
  1240. priv->last_moder_jiffies = jiffies;
  1241. }
  1242. static void mlx4_en_do_get_stats(struct work_struct *work)
  1243. {
  1244. struct delayed_work *delay = to_delayed_work(work);
  1245. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1246. stats_task);
  1247. struct mlx4_en_dev *mdev = priv->mdev;
  1248. int err;
  1249. mutex_lock(&mdev->state_lock);
  1250. if (mdev->device_up) {
  1251. if (priv->port_up) {
  1252. err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
  1253. if (err)
  1254. en_dbg(HW, priv, "Could not update stats\n");
  1255. mlx4_en_auto_moderation(priv);
  1256. }
  1257. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  1258. }
  1259. if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
  1260. mlx4_en_do_set_mac(priv, priv->current_mac);
  1261. mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
  1262. }
  1263. mutex_unlock(&mdev->state_lock);
  1264. }
  1265. /* mlx4_en_service_task - Run service task for tasks that needed to be done
  1266. * periodically
  1267. */
  1268. static void mlx4_en_service_task(struct work_struct *work)
  1269. {
  1270. struct delayed_work *delay = to_delayed_work(work);
  1271. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1272. service_task);
  1273. struct mlx4_en_dev *mdev = priv->mdev;
  1274. mutex_lock(&mdev->state_lock);
  1275. if (mdev->device_up) {
  1276. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  1277. mlx4_en_ptp_overflow_check(mdev);
  1278. mlx4_en_recover_from_oom(priv);
  1279. queue_delayed_work(mdev->workqueue, &priv->service_task,
  1280. SERVICE_TASK_DELAY);
  1281. }
  1282. mutex_unlock(&mdev->state_lock);
  1283. }
  1284. static void mlx4_en_linkstate(struct work_struct *work)
  1285. {
  1286. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1287. linkstate_task);
  1288. struct mlx4_en_dev *mdev = priv->mdev;
  1289. int linkstate = priv->link_state;
  1290. mutex_lock(&mdev->state_lock);
  1291. /* If observable port state changed set carrier state and
  1292. * report to system log */
  1293. if (priv->last_link_state != linkstate) {
  1294. if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
  1295. en_info(priv, "Link Down\n");
  1296. netif_carrier_off(priv->dev);
  1297. } else {
  1298. en_info(priv, "Link Up\n");
  1299. netif_carrier_on(priv->dev);
  1300. }
  1301. }
  1302. priv->last_link_state = linkstate;
  1303. mutex_unlock(&mdev->state_lock);
  1304. }
  1305. static int mlx4_en_init_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
  1306. {
  1307. struct mlx4_en_rx_ring *ring = priv->rx_ring[ring_idx];
  1308. int numa_node = priv->mdev->dev->numa_node;
  1309. if (!zalloc_cpumask_var(&ring->affinity_mask, GFP_KERNEL))
  1310. return -ENOMEM;
  1311. cpumask_set_cpu(cpumask_local_spread(ring_idx, numa_node),
  1312. ring->affinity_mask);
  1313. return 0;
  1314. }
  1315. static void mlx4_en_free_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
  1316. {
  1317. free_cpumask_var(priv->rx_ring[ring_idx]->affinity_mask);
  1318. }
  1319. static void mlx4_en_init_recycle_ring(struct mlx4_en_priv *priv,
  1320. int tx_ring_idx)
  1321. {
  1322. struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX_XDP][tx_ring_idx];
  1323. int rr_index = tx_ring_idx;
  1324. tx_ring->free_tx_desc = mlx4_en_recycle_tx_desc;
  1325. tx_ring->recycle_ring = priv->rx_ring[rr_index];
  1326. en_dbg(DRV, priv, "Set tx_ring[%d][%d]->recycle_ring = rx_ring[%d]\n",
  1327. TX_XDP, tx_ring_idx, rr_index);
  1328. }
  1329. int mlx4_en_start_port(struct net_device *dev)
  1330. {
  1331. struct mlx4_en_priv *priv = netdev_priv(dev);
  1332. struct mlx4_en_dev *mdev = priv->mdev;
  1333. struct mlx4_en_cq *cq;
  1334. struct mlx4_en_tx_ring *tx_ring;
  1335. int rx_index = 0;
  1336. int err = 0;
  1337. int i, t;
  1338. int j;
  1339. u8 mc_list[16] = {0};
  1340. if (priv->port_up) {
  1341. en_dbg(DRV, priv, "start port called while port already up\n");
  1342. return 0;
  1343. }
  1344. INIT_LIST_HEAD(&priv->mc_list);
  1345. INIT_LIST_HEAD(&priv->curr_list);
  1346. INIT_LIST_HEAD(&priv->ethtool_list);
  1347. memset(&priv->ethtool_rules[0], 0,
  1348. sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
  1349. /* Calculate Rx buf size */
  1350. dev->mtu = min(dev->mtu, priv->max_mtu);
  1351. mlx4_en_calc_rx_buf(dev);
  1352. en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
  1353. /* Configure rx cq's and rings */
  1354. err = mlx4_en_activate_rx_rings(priv);
  1355. if (err) {
  1356. en_err(priv, "Failed to activate RX rings\n");
  1357. return err;
  1358. }
  1359. for (i = 0; i < priv->rx_ring_num; i++) {
  1360. cq = priv->rx_cq[i];
  1361. err = mlx4_en_init_affinity_hint(priv, i);
  1362. if (err) {
  1363. en_err(priv, "Failed preparing IRQ affinity hint\n");
  1364. goto cq_err;
  1365. }
  1366. err = mlx4_en_activate_cq(priv, cq, i);
  1367. if (err) {
  1368. en_err(priv, "Failed activating Rx CQ\n");
  1369. mlx4_en_free_affinity_hint(priv, i);
  1370. goto cq_err;
  1371. }
  1372. for (j = 0; j < cq->size; j++) {
  1373. struct mlx4_cqe *cqe = NULL;
  1374. cqe = mlx4_en_get_cqe(cq->buf, j, priv->cqe_size) +
  1375. priv->cqe_factor;
  1376. cqe->owner_sr_opcode = MLX4_CQE_OWNER_MASK;
  1377. }
  1378. err = mlx4_en_set_cq_moder(priv, cq);
  1379. if (err) {
  1380. en_err(priv, "Failed setting cq moderation parameters\n");
  1381. mlx4_en_deactivate_cq(priv, cq);
  1382. mlx4_en_free_affinity_hint(priv, i);
  1383. goto cq_err;
  1384. }
  1385. mlx4_en_arm_cq(priv, cq);
  1386. priv->rx_ring[i]->cqn = cq->mcq.cqn;
  1387. ++rx_index;
  1388. }
  1389. /* Set qp number */
  1390. en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
  1391. err = mlx4_en_get_qp(priv);
  1392. if (err) {
  1393. en_err(priv, "Failed getting eth qp\n");
  1394. goto cq_err;
  1395. }
  1396. mdev->mac_removed[priv->port] = 0;
  1397. priv->counter_index =
  1398. mlx4_get_default_counter_index(mdev->dev, priv->port);
  1399. err = mlx4_en_config_rss_steer(priv);
  1400. if (err) {
  1401. en_err(priv, "Failed configuring rss steering\n");
  1402. goto mac_err;
  1403. }
  1404. err = mlx4_en_create_drop_qp(priv);
  1405. if (err)
  1406. goto rss_err;
  1407. /* Configure tx cq's and rings */
  1408. for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1409. u8 num_tx_rings_p_up = t == TX ?
  1410. priv->num_tx_rings_p_up : priv->tx_ring_num[t];
  1411. for (i = 0; i < priv->tx_ring_num[t]; i++) {
  1412. /* Configure cq */
  1413. cq = priv->tx_cq[t][i];
  1414. err = mlx4_en_activate_cq(priv, cq, i);
  1415. if (err) {
  1416. en_err(priv, "Failed allocating Tx CQ\n");
  1417. goto tx_err;
  1418. }
  1419. err = mlx4_en_set_cq_moder(priv, cq);
  1420. if (err) {
  1421. en_err(priv, "Failed setting cq moderation parameters\n");
  1422. mlx4_en_deactivate_cq(priv, cq);
  1423. goto tx_err;
  1424. }
  1425. en_dbg(DRV, priv,
  1426. "Resetting index of collapsed CQ:%d to -1\n", i);
  1427. cq->buf->wqe_index = cpu_to_be16(0xffff);
  1428. /* Configure ring */
  1429. tx_ring = priv->tx_ring[t][i];
  1430. err = mlx4_en_activate_tx_ring(priv, tx_ring,
  1431. cq->mcq.cqn,
  1432. i / num_tx_rings_p_up);
  1433. if (err) {
  1434. en_err(priv, "Failed allocating Tx ring\n");
  1435. mlx4_en_deactivate_cq(priv, cq);
  1436. goto tx_err;
  1437. }
  1438. if (t != TX_XDP) {
  1439. tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
  1440. tx_ring->recycle_ring = NULL;
  1441. } else {
  1442. mlx4_en_init_recycle_ring(priv, i);
  1443. }
  1444. /* Arm CQ for TX completions */
  1445. mlx4_en_arm_cq(priv, cq);
  1446. /* Set initial ownership of all Tx TXBBs to SW (1) */
  1447. for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
  1448. *((u32 *)(tx_ring->buf + j)) = 0xffffffff;
  1449. }
  1450. }
  1451. /* Configure port */
  1452. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  1453. priv->rx_skb_size + ETH_FCS_LEN,
  1454. priv->prof->tx_pause,
  1455. priv->prof->tx_ppp,
  1456. priv->prof->rx_pause,
  1457. priv->prof->rx_ppp);
  1458. if (err) {
  1459. en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
  1460. priv->port, err);
  1461. goto tx_err;
  1462. }
  1463. err = mlx4_SET_PORT_user_mtu(mdev->dev, priv->port, dev->mtu);
  1464. if (err) {
  1465. en_err(priv, "Failed to pass user MTU(%d) to Firmware for port %d, with error %d\n",
  1466. dev->mtu, priv->port, err);
  1467. goto tx_err;
  1468. }
  1469. /* Set default qp number */
  1470. err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
  1471. if (err) {
  1472. en_err(priv, "Failed setting default qp numbers\n");
  1473. goto tx_err;
  1474. }
  1475. if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
  1476. err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
  1477. if (err) {
  1478. en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
  1479. err);
  1480. goto tx_err;
  1481. }
  1482. }
  1483. /* Init port */
  1484. en_dbg(HW, priv, "Initializing port\n");
  1485. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  1486. if (err) {
  1487. en_err(priv, "Failed Initializing port\n");
  1488. goto tx_err;
  1489. }
  1490. /* Set Unicast and VXLAN steering rules */
  1491. if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0 &&
  1492. mlx4_en_set_rss_steer_rules(priv))
  1493. mlx4_warn(mdev, "Failed setting steering rules\n");
  1494. /* Attach rx QP to bradcast address */
  1495. eth_broadcast_addr(&mc_list[10]);
  1496. mc_list[5] = priv->port; /* needed for B0 steering support */
  1497. if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1498. priv->port, 0, MLX4_PROT_ETH,
  1499. &priv->broadcast_id))
  1500. mlx4_warn(mdev, "Failed Attaching Broadcast\n");
  1501. /* Must redo promiscuous mode setup. */
  1502. priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
  1503. /* Schedule multicast task to populate multicast list */
  1504. queue_work(mdev->workqueue, &priv->rx_mode_task);
  1505. if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  1506. udp_tunnel_get_rx_info(dev);
  1507. priv->port_up = true;
  1508. /* Process all completions if exist to prevent
  1509. * the queues freezing if they are full
  1510. */
  1511. for (i = 0; i < priv->rx_ring_num; i++) {
  1512. local_bh_disable();
  1513. napi_schedule(&priv->rx_cq[i]->napi);
  1514. local_bh_enable();
  1515. }
  1516. netif_tx_start_all_queues(dev);
  1517. netif_device_attach(dev);
  1518. return 0;
  1519. tx_err:
  1520. if (t == MLX4_EN_NUM_TX_TYPES) {
  1521. t--;
  1522. i = priv->tx_ring_num[t];
  1523. }
  1524. while (t >= 0) {
  1525. while (i--) {
  1526. mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]);
  1527. mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]);
  1528. }
  1529. if (!t--)
  1530. break;
  1531. i = priv->tx_ring_num[t];
  1532. }
  1533. mlx4_en_destroy_drop_qp(priv);
  1534. rss_err:
  1535. mlx4_en_release_rss_steer(priv);
  1536. mac_err:
  1537. mlx4_en_put_qp(priv);
  1538. cq_err:
  1539. while (rx_index--) {
  1540. mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]);
  1541. mlx4_en_free_affinity_hint(priv, rx_index);
  1542. }
  1543. for (i = 0; i < priv->rx_ring_num; i++)
  1544. mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
  1545. return err; /* need to close devices */
  1546. }
  1547. void mlx4_en_stop_port(struct net_device *dev, int detach)
  1548. {
  1549. struct mlx4_en_priv *priv = netdev_priv(dev);
  1550. struct mlx4_en_dev *mdev = priv->mdev;
  1551. struct mlx4_en_mc_list *mclist, *tmp;
  1552. struct ethtool_flow_id *flow, *tmp_flow;
  1553. int i, t;
  1554. u8 mc_list[16] = {0};
  1555. if (!priv->port_up) {
  1556. en_dbg(DRV, priv, "stop port called while port already down\n");
  1557. return;
  1558. }
  1559. /* close port*/
  1560. mlx4_CLOSE_PORT(mdev->dev, priv->port);
  1561. /* Synchronize with tx routine */
  1562. netif_tx_lock_bh(dev);
  1563. if (detach)
  1564. netif_device_detach(dev);
  1565. netif_tx_stop_all_queues(dev);
  1566. netif_tx_unlock_bh(dev);
  1567. netif_tx_disable(dev);
  1568. spin_lock_bh(&priv->stats_lock);
  1569. mlx4_en_fold_software_stats(dev);
  1570. /* Set port as not active */
  1571. priv->port_up = false;
  1572. spin_unlock_bh(&priv->stats_lock);
  1573. priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
  1574. /* Promsicuous mode */
  1575. if (mdev->dev->caps.steering_mode ==
  1576. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1577. priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
  1578. MLX4_EN_FLAG_MC_PROMISC);
  1579. mlx4_flow_steer_promisc_remove(mdev->dev,
  1580. priv->port,
  1581. MLX4_FS_ALL_DEFAULT);
  1582. mlx4_flow_steer_promisc_remove(mdev->dev,
  1583. priv->port,
  1584. MLX4_FS_MC_DEFAULT);
  1585. } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
  1586. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  1587. /* Disable promiscouos mode */
  1588. mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
  1589. priv->port);
  1590. /* Disable Multicast promisc */
  1591. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  1592. mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
  1593. priv->port);
  1594. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  1595. }
  1596. }
  1597. /* Detach All multicasts */
  1598. eth_broadcast_addr(&mc_list[10]);
  1599. mc_list[5] = priv->port; /* needed for B0 steering support */
  1600. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1601. MLX4_PROT_ETH, priv->broadcast_id);
  1602. list_for_each_entry(mclist, &priv->curr_list, list) {
  1603. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  1604. mc_list[5] = priv->port;
  1605. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp,
  1606. mc_list, MLX4_PROT_ETH, mclist->reg_id);
  1607. if (mclist->tunnel_reg_id)
  1608. mlx4_flow_detach(mdev->dev, mclist->tunnel_reg_id);
  1609. }
  1610. mlx4_en_clear_list(dev);
  1611. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  1612. list_del(&mclist->list);
  1613. kfree(mclist);
  1614. }
  1615. /* Flush multicast filter */
  1616. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
  1617. /* Remove flow steering rules for the port*/
  1618. if (mdev->dev->caps.steering_mode ==
  1619. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1620. ASSERT_RTNL();
  1621. list_for_each_entry_safe(flow, tmp_flow,
  1622. &priv->ethtool_list, list) {
  1623. mlx4_flow_detach(mdev->dev, flow->id);
  1624. list_del(&flow->list);
  1625. }
  1626. }
  1627. mlx4_en_destroy_drop_qp(priv);
  1628. /* Free TX Rings */
  1629. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1630. for (i = 0; i < priv->tx_ring_num[t]; i++) {
  1631. mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]);
  1632. mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]);
  1633. }
  1634. }
  1635. msleep(10);
  1636. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++)
  1637. for (i = 0; i < priv->tx_ring_num[t]; i++)
  1638. mlx4_en_free_tx_buf(dev, priv->tx_ring[t][i]);
  1639. if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
  1640. mlx4_en_delete_rss_steer_rules(priv);
  1641. /* Free RSS qps */
  1642. mlx4_en_release_rss_steer(priv);
  1643. /* Unregister Mac address for the port */
  1644. mlx4_en_put_qp(priv);
  1645. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN))
  1646. mdev->mac_removed[priv->port] = 1;
  1647. /* Free RX Rings */
  1648. for (i = 0; i < priv->rx_ring_num; i++) {
  1649. struct mlx4_en_cq *cq = priv->rx_cq[i];
  1650. napi_synchronize(&cq->napi);
  1651. mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
  1652. mlx4_en_deactivate_cq(priv, cq);
  1653. mlx4_en_free_affinity_hint(priv, i);
  1654. }
  1655. }
  1656. static void mlx4_en_restart(struct work_struct *work)
  1657. {
  1658. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1659. watchdog_task);
  1660. struct mlx4_en_dev *mdev = priv->mdev;
  1661. struct net_device *dev = priv->dev;
  1662. en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
  1663. rtnl_lock();
  1664. mutex_lock(&mdev->state_lock);
  1665. if (priv->port_up) {
  1666. mlx4_en_stop_port(dev, 1);
  1667. if (mlx4_en_start_port(dev))
  1668. en_err(priv, "Failed restarting port %d\n", priv->port);
  1669. }
  1670. mutex_unlock(&mdev->state_lock);
  1671. rtnl_unlock();
  1672. }
  1673. static void mlx4_en_clear_stats(struct net_device *dev)
  1674. {
  1675. struct mlx4_en_priv *priv = netdev_priv(dev);
  1676. struct mlx4_en_dev *mdev = priv->mdev;
  1677. struct mlx4_en_tx_ring **tx_ring;
  1678. int i;
  1679. if (!mlx4_is_slave(mdev->dev))
  1680. if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
  1681. en_dbg(HW, priv, "Failed dumping statistics\n");
  1682. memset(&priv->pstats, 0, sizeof(priv->pstats));
  1683. memset(&priv->pkstats, 0, sizeof(priv->pkstats));
  1684. memset(&priv->port_stats, 0, sizeof(priv->port_stats));
  1685. memset(&priv->rx_flowstats, 0, sizeof(priv->rx_flowstats));
  1686. memset(&priv->tx_flowstats, 0, sizeof(priv->tx_flowstats));
  1687. memset(&priv->rx_priority_flowstats, 0,
  1688. sizeof(priv->rx_priority_flowstats));
  1689. memset(&priv->tx_priority_flowstats, 0,
  1690. sizeof(priv->tx_priority_flowstats));
  1691. memset(&priv->pf_stats, 0, sizeof(priv->pf_stats));
  1692. tx_ring = priv->tx_ring[TX];
  1693. for (i = 0; i < priv->tx_ring_num[TX]; i++) {
  1694. tx_ring[i]->bytes = 0;
  1695. tx_ring[i]->packets = 0;
  1696. tx_ring[i]->tx_csum = 0;
  1697. tx_ring[i]->tx_dropped = 0;
  1698. tx_ring[i]->queue_stopped = 0;
  1699. tx_ring[i]->wake_queue = 0;
  1700. tx_ring[i]->tso_packets = 0;
  1701. tx_ring[i]->xmit_more = 0;
  1702. }
  1703. for (i = 0; i < priv->rx_ring_num; i++) {
  1704. priv->rx_ring[i]->bytes = 0;
  1705. priv->rx_ring[i]->packets = 0;
  1706. priv->rx_ring[i]->csum_ok = 0;
  1707. priv->rx_ring[i]->csum_none = 0;
  1708. priv->rx_ring[i]->csum_complete = 0;
  1709. }
  1710. }
  1711. static int mlx4_en_open(struct net_device *dev)
  1712. {
  1713. struct mlx4_en_priv *priv = netdev_priv(dev);
  1714. struct mlx4_en_dev *mdev = priv->mdev;
  1715. int err = 0;
  1716. mutex_lock(&mdev->state_lock);
  1717. if (!mdev->device_up) {
  1718. en_err(priv, "Cannot open - device down/disabled\n");
  1719. err = -EBUSY;
  1720. goto out;
  1721. }
  1722. /* Reset HW statistics and SW counters */
  1723. mlx4_en_clear_stats(dev);
  1724. err = mlx4_en_start_port(dev);
  1725. if (err)
  1726. en_err(priv, "Failed starting port:%d\n", priv->port);
  1727. out:
  1728. mutex_unlock(&mdev->state_lock);
  1729. return err;
  1730. }
  1731. static int mlx4_en_close(struct net_device *dev)
  1732. {
  1733. struct mlx4_en_priv *priv = netdev_priv(dev);
  1734. struct mlx4_en_dev *mdev = priv->mdev;
  1735. en_dbg(IFDOWN, priv, "Close port called\n");
  1736. mutex_lock(&mdev->state_lock);
  1737. mlx4_en_stop_port(dev, 0);
  1738. netif_carrier_off(dev);
  1739. mutex_unlock(&mdev->state_lock);
  1740. return 0;
  1741. }
  1742. static void mlx4_en_free_resources(struct mlx4_en_priv *priv)
  1743. {
  1744. int i, t;
  1745. #ifdef CONFIG_RFS_ACCEL
  1746. priv->dev->rx_cpu_rmap = NULL;
  1747. #endif
  1748. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1749. for (i = 0; i < priv->tx_ring_num[t]; i++) {
  1750. if (priv->tx_ring[t] && priv->tx_ring[t][i])
  1751. mlx4_en_destroy_tx_ring(priv,
  1752. &priv->tx_ring[t][i]);
  1753. if (priv->tx_cq[t] && priv->tx_cq[t][i])
  1754. mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]);
  1755. }
  1756. kfree(priv->tx_ring[t]);
  1757. kfree(priv->tx_cq[t]);
  1758. }
  1759. for (i = 0; i < priv->rx_ring_num; i++) {
  1760. if (priv->rx_ring[i])
  1761. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1762. priv->prof->rx_ring_size, priv->stride);
  1763. if (priv->rx_cq[i])
  1764. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1765. }
  1766. }
  1767. static int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
  1768. {
  1769. struct mlx4_en_port_profile *prof = priv->prof;
  1770. int i, t;
  1771. int node;
  1772. /* Create tx Rings */
  1773. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1774. for (i = 0; i < priv->tx_ring_num[t]; i++) {
  1775. node = cpu_to_node(i % num_online_cpus());
  1776. if (mlx4_en_create_cq(priv, &priv->tx_cq[t][i],
  1777. prof->tx_ring_size, i, t, node))
  1778. goto err;
  1779. if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[t][i],
  1780. prof->tx_ring_size,
  1781. TXBB_SIZE, node, i))
  1782. goto err;
  1783. }
  1784. }
  1785. /* Create rx Rings */
  1786. for (i = 0; i < priv->rx_ring_num; i++) {
  1787. node = cpu_to_node(i % num_online_cpus());
  1788. if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
  1789. prof->rx_ring_size, i, RX, node))
  1790. goto err;
  1791. if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
  1792. prof->rx_ring_size, priv->stride,
  1793. node))
  1794. goto err;
  1795. }
  1796. #ifdef CONFIG_RFS_ACCEL
  1797. priv->dev->rx_cpu_rmap = mlx4_get_cpu_rmap(priv->mdev->dev, priv->port);
  1798. #endif
  1799. return 0;
  1800. err:
  1801. en_err(priv, "Failed to allocate NIC resources\n");
  1802. for (i = 0; i < priv->rx_ring_num; i++) {
  1803. if (priv->rx_ring[i])
  1804. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1805. prof->rx_ring_size,
  1806. priv->stride);
  1807. if (priv->rx_cq[i])
  1808. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1809. }
  1810. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1811. for (i = 0; i < priv->tx_ring_num[t]; i++) {
  1812. if (priv->tx_ring[t][i])
  1813. mlx4_en_destroy_tx_ring(priv,
  1814. &priv->tx_ring[t][i]);
  1815. if (priv->tx_cq[t][i])
  1816. mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]);
  1817. }
  1818. }
  1819. return -ENOMEM;
  1820. }
  1821. static int mlx4_en_copy_priv(struct mlx4_en_priv *dst,
  1822. struct mlx4_en_priv *src,
  1823. struct mlx4_en_port_profile *prof)
  1824. {
  1825. int t;
  1826. memcpy(&dst->hwtstamp_config, &prof->hwtstamp_config,
  1827. sizeof(dst->hwtstamp_config));
  1828. dst->num_tx_rings_p_up = src->mdev->profile.num_tx_rings_p_up;
  1829. dst->rx_ring_num = prof->rx_ring_num;
  1830. dst->flags = prof->flags;
  1831. dst->mdev = src->mdev;
  1832. dst->port = src->port;
  1833. dst->dev = src->dev;
  1834. dst->prof = prof;
  1835. dst->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
  1836. DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
  1837. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1838. dst->tx_ring_num[t] = prof->tx_ring_num[t];
  1839. if (!dst->tx_ring_num[t])
  1840. continue;
  1841. dst->tx_ring[t] = kzalloc(sizeof(struct mlx4_en_tx_ring *) *
  1842. MAX_TX_RINGS, GFP_KERNEL);
  1843. if (!dst->tx_ring[t])
  1844. goto err_free_tx;
  1845. dst->tx_cq[t] = kzalloc(sizeof(struct mlx4_en_cq *) *
  1846. MAX_TX_RINGS, GFP_KERNEL);
  1847. if (!dst->tx_cq[t]) {
  1848. kfree(dst->tx_ring[t]);
  1849. goto err_free_tx;
  1850. }
  1851. }
  1852. return 0;
  1853. err_free_tx:
  1854. while (t--) {
  1855. kfree(dst->tx_ring[t]);
  1856. kfree(dst->tx_cq[t]);
  1857. }
  1858. return -ENOMEM;
  1859. }
  1860. static void mlx4_en_update_priv(struct mlx4_en_priv *dst,
  1861. struct mlx4_en_priv *src)
  1862. {
  1863. int t;
  1864. memcpy(dst->rx_ring, src->rx_ring,
  1865. sizeof(struct mlx4_en_rx_ring *) * src->rx_ring_num);
  1866. memcpy(dst->rx_cq, src->rx_cq,
  1867. sizeof(struct mlx4_en_cq *) * src->rx_ring_num);
  1868. memcpy(&dst->hwtstamp_config, &src->hwtstamp_config,
  1869. sizeof(dst->hwtstamp_config));
  1870. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1871. dst->tx_ring_num[t] = src->tx_ring_num[t];
  1872. dst->tx_ring[t] = src->tx_ring[t];
  1873. dst->tx_cq[t] = src->tx_cq[t];
  1874. }
  1875. dst->rx_ring_num = src->rx_ring_num;
  1876. memcpy(dst->prof, src->prof, sizeof(struct mlx4_en_port_profile));
  1877. }
  1878. int mlx4_en_try_alloc_resources(struct mlx4_en_priv *priv,
  1879. struct mlx4_en_priv *tmp,
  1880. struct mlx4_en_port_profile *prof,
  1881. bool carry_xdp_prog)
  1882. {
  1883. struct bpf_prog *xdp_prog;
  1884. int i, t;
  1885. mlx4_en_copy_priv(tmp, priv, prof);
  1886. if (mlx4_en_alloc_resources(tmp)) {
  1887. en_warn(priv,
  1888. "%s: Resource allocation failed, using previous configuration\n",
  1889. __func__);
  1890. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1891. kfree(tmp->tx_ring[t]);
  1892. kfree(tmp->tx_cq[t]);
  1893. }
  1894. return -ENOMEM;
  1895. }
  1896. /* All rx_rings has the same xdp_prog. Pick the first one. */
  1897. xdp_prog = rcu_dereference_protected(
  1898. priv->rx_ring[0]->xdp_prog,
  1899. lockdep_is_held(&priv->mdev->state_lock));
  1900. if (xdp_prog && carry_xdp_prog) {
  1901. xdp_prog = bpf_prog_add(xdp_prog, tmp->rx_ring_num);
  1902. if (IS_ERR(xdp_prog)) {
  1903. mlx4_en_free_resources(tmp);
  1904. return PTR_ERR(xdp_prog);
  1905. }
  1906. for (i = 0; i < tmp->rx_ring_num; i++)
  1907. rcu_assign_pointer(tmp->rx_ring[i]->xdp_prog,
  1908. xdp_prog);
  1909. }
  1910. return 0;
  1911. }
  1912. void mlx4_en_safe_replace_resources(struct mlx4_en_priv *priv,
  1913. struct mlx4_en_priv *tmp)
  1914. {
  1915. mlx4_en_free_resources(priv);
  1916. mlx4_en_update_priv(priv, tmp);
  1917. }
  1918. void mlx4_en_destroy_netdev(struct net_device *dev)
  1919. {
  1920. struct mlx4_en_priv *priv = netdev_priv(dev);
  1921. struct mlx4_en_dev *mdev = priv->mdev;
  1922. en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
  1923. /* Unregister device - this will close the port if it was up */
  1924. if (priv->registered) {
  1925. devlink_port_type_clear(mlx4_get_devlink_port(mdev->dev,
  1926. priv->port));
  1927. unregister_netdev(dev);
  1928. }
  1929. if (priv->allocated)
  1930. mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
  1931. cancel_delayed_work(&priv->stats_task);
  1932. cancel_delayed_work(&priv->service_task);
  1933. /* flush any pending task for this netdev */
  1934. flush_workqueue(mdev->workqueue);
  1935. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  1936. mlx4_en_remove_timestamp(mdev);
  1937. /* Detach the netdev so tasks would not attempt to access it */
  1938. mutex_lock(&mdev->state_lock);
  1939. mdev->pndev[priv->port] = NULL;
  1940. mdev->upper[priv->port] = NULL;
  1941. #ifdef CONFIG_RFS_ACCEL
  1942. mlx4_en_cleanup_filters(priv);
  1943. #endif
  1944. mlx4_en_free_resources(priv);
  1945. mutex_unlock(&mdev->state_lock);
  1946. free_netdev(dev);
  1947. }
  1948. static bool mlx4_en_check_xdp_mtu(struct net_device *dev, int mtu)
  1949. {
  1950. struct mlx4_en_priv *priv = netdev_priv(dev);
  1951. if (mtu > MLX4_EN_MAX_XDP_MTU) {
  1952. en_err(priv, "mtu:%d > max:%d when XDP prog is attached\n",
  1953. mtu, MLX4_EN_MAX_XDP_MTU);
  1954. return false;
  1955. }
  1956. return true;
  1957. }
  1958. static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
  1959. {
  1960. struct mlx4_en_priv *priv = netdev_priv(dev);
  1961. struct mlx4_en_dev *mdev = priv->mdev;
  1962. int err = 0;
  1963. en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
  1964. dev->mtu, new_mtu);
  1965. if (priv->tx_ring_num[TX_XDP] &&
  1966. !mlx4_en_check_xdp_mtu(dev, new_mtu))
  1967. return -EOPNOTSUPP;
  1968. dev->mtu = new_mtu;
  1969. if (netif_running(dev)) {
  1970. mutex_lock(&mdev->state_lock);
  1971. if (!mdev->device_up) {
  1972. /* NIC is probably restarting - let watchdog task reset
  1973. * the port */
  1974. en_dbg(DRV, priv, "Change MTU called with card down!?\n");
  1975. } else {
  1976. mlx4_en_stop_port(dev, 1);
  1977. err = mlx4_en_start_port(dev);
  1978. if (err) {
  1979. en_err(priv, "Failed restarting port:%d\n",
  1980. priv->port);
  1981. queue_work(mdev->workqueue, &priv->watchdog_task);
  1982. }
  1983. }
  1984. mutex_unlock(&mdev->state_lock);
  1985. }
  1986. return 0;
  1987. }
  1988. static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
  1989. {
  1990. struct mlx4_en_priv *priv = netdev_priv(dev);
  1991. struct mlx4_en_dev *mdev = priv->mdev;
  1992. struct hwtstamp_config config;
  1993. if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
  1994. return -EFAULT;
  1995. /* reserved for future extensions */
  1996. if (config.flags)
  1997. return -EINVAL;
  1998. /* device doesn't support time stamping */
  1999. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS))
  2000. return -EINVAL;
  2001. /* TX HW timestamp */
  2002. switch (config.tx_type) {
  2003. case HWTSTAMP_TX_OFF:
  2004. case HWTSTAMP_TX_ON:
  2005. break;
  2006. default:
  2007. return -ERANGE;
  2008. }
  2009. /* RX HW timestamp */
  2010. switch (config.rx_filter) {
  2011. case HWTSTAMP_FILTER_NONE:
  2012. break;
  2013. case HWTSTAMP_FILTER_ALL:
  2014. case HWTSTAMP_FILTER_SOME:
  2015. case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
  2016. case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
  2017. case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
  2018. case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
  2019. case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
  2020. case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
  2021. case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
  2022. case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
  2023. case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
  2024. case HWTSTAMP_FILTER_PTP_V2_EVENT:
  2025. case HWTSTAMP_FILTER_PTP_V2_SYNC:
  2026. case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
  2027. config.rx_filter = HWTSTAMP_FILTER_ALL;
  2028. break;
  2029. default:
  2030. return -ERANGE;
  2031. }
  2032. if (mlx4_en_reset_config(dev, config, dev->features)) {
  2033. config.tx_type = HWTSTAMP_TX_OFF;
  2034. config.rx_filter = HWTSTAMP_FILTER_NONE;
  2035. }
  2036. return copy_to_user(ifr->ifr_data, &config,
  2037. sizeof(config)) ? -EFAULT : 0;
  2038. }
  2039. static int mlx4_en_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)
  2040. {
  2041. struct mlx4_en_priv *priv = netdev_priv(dev);
  2042. return copy_to_user(ifr->ifr_data, &priv->hwtstamp_config,
  2043. sizeof(priv->hwtstamp_config)) ? -EFAULT : 0;
  2044. }
  2045. static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  2046. {
  2047. switch (cmd) {
  2048. case SIOCSHWTSTAMP:
  2049. return mlx4_en_hwtstamp_set(dev, ifr);
  2050. case SIOCGHWTSTAMP:
  2051. return mlx4_en_hwtstamp_get(dev, ifr);
  2052. default:
  2053. return -EOPNOTSUPP;
  2054. }
  2055. }
  2056. static netdev_features_t mlx4_en_fix_features(struct net_device *netdev,
  2057. netdev_features_t features)
  2058. {
  2059. struct mlx4_en_priv *en_priv = netdev_priv(netdev);
  2060. struct mlx4_en_dev *mdev = en_priv->mdev;
  2061. /* Since there is no support for separate RX C-TAG/S-TAG vlan accel
  2062. * enable/disable make sure S-TAG flag is always in same state as
  2063. * C-TAG.
  2064. */
  2065. if (features & NETIF_F_HW_VLAN_CTAG_RX &&
  2066. !(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))
  2067. features |= NETIF_F_HW_VLAN_STAG_RX;
  2068. else
  2069. features &= ~NETIF_F_HW_VLAN_STAG_RX;
  2070. return features;
  2071. }
  2072. static int mlx4_en_set_features(struct net_device *netdev,
  2073. netdev_features_t features)
  2074. {
  2075. struct mlx4_en_priv *priv = netdev_priv(netdev);
  2076. bool reset = false;
  2077. int ret = 0;
  2078. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXFCS)) {
  2079. en_info(priv, "Turn %s RX-FCS\n",
  2080. (features & NETIF_F_RXFCS) ? "ON" : "OFF");
  2081. reset = true;
  2082. }
  2083. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXALL)) {
  2084. u8 ignore_fcs_value = (features & NETIF_F_RXALL) ? 1 : 0;
  2085. en_info(priv, "Turn %s RX-ALL\n",
  2086. ignore_fcs_value ? "ON" : "OFF");
  2087. ret = mlx4_SET_PORT_fcs_check(priv->mdev->dev,
  2088. priv->port, ignore_fcs_value);
  2089. if (ret)
  2090. return ret;
  2091. }
  2092. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
  2093. en_info(priv, "Turn %s RX vlan strip offload\n",
  2094. (features & NETIF_F_HW_VLAN_CTAG_RX) ? "ON" : "OFF");
  2095. reset = true;
  2096. }
  2097. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_TX))
  2098. en_info(priv, "Turn %s TX vlan strip offload\n",
  2099. (features & NETIF_F_HW_VLAN_CTAG_TX) ? "ON" : "OFF");
  2100. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_STAG_TX))
  2101. en_info(priv, "Turn %s TX S-VLAN strip offload\n",
  2102. (features & NETIF_F_HW_VLAN_STAG_TX) ? "ON" : "OFF");
  2103. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_LOOPBACK)) {
  2104. en_info(priv, "Turn %s loopback\n",
  2105. (features & NETIF_F_LOOPBACK) ? "ON" : "OFF");
  2106. mlx4_en_update_loopback_state(netdev, features);
  2107. }
  2108. if (reset) {
  2109. ret = mlx4_en_reset_config(netdev, priv->hwtstamp_config,
  2110. features);
  2111. if (ret)
  2112. return ret;
  2113. }
  2114. return 0;
  2115. }
  2116. static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac)
  2117. {
  2118. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2119. struct mlx4_en_dev *mdev = en_priv->mdev;
  2120. return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac);
  2121. }
  2122. static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos,
  2123. __be16 vlan_proto)
  2124. {
  2125. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2126. struct mlx4_en_dev *mdev = en_priv->mdev;
  2127. return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos,
  2128. vlan_proto);
  2129. }
  2130. static int mlx4_en_set_vf_rate(struct net_device *dev, int vf, int min_tx_rate,
  2131. int max_tx_rate)
  2132. {
  2133. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2134. struct mlx4_en_dev *mdev = en_priv->mdev;
  2135. return mlx4_set_vf_rate(mdev->dev, en_priv->port, vf, min_tx_rate,
  2136. max_tx_rate);
  2137. }
  2138. static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting)
  2139. {
  2140. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2141. struct mlx4_en_dev *mdev = en_priv->mdev;
  2142. return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting);
  2143. }
  2144. static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf)
  2145. {
  2146. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2147. struct mlx4_en_dev *mdev = en_priv->mdev;
  2148. return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf);
  2149. }
  2150. static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state)
  2151. {
  2152. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2153. struct mlx4_en_dev *mdev = en_priv->mdev;
  2154. return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state);
  2155. }
  2156. static int mlx4_en_get_vf_stats(struct net_device *dev, int vf,
  2157. struct ifla_vf_stats *vf_stats)
  2158. {
  2159. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2160. struct mlx4_en_dev *mdev = en_priv->mdev;
  2161. return mlx4_get_vf_stats(mdev->dev, en_priv->port, vf, vf_stats);
  2162. }
  2163. #define PORT_ID_BYTE_LEN 8
  2164. static int mlx4_en_get_phys_port_id(struct net_device *dev,
  2165. struct netdev_phys_item_id *ppid)
  2166. {
  2167. struct mlx4_en_priv *priv = netdev_priv(dev);
  2168. struct mlx4_dev *mdev = priv->mdev->dev;
  2169. int i;
  2170. u64 phys_port_id = mdev->caps.phys_port_id[priv->port];
  2171. if (!phys_port_id)
  2172. return -EOPNOTSUPP;
  2173. ppid->id_len = sizeof(phys_port_id);
  2174. for (i = PORT_ID_BYTE_LEN - 1; i >= 0; --i) {
  2175. ppid->id[i] = phys_port_id & 0xff;
  2176. phys_port_id >>= 8;
  2177. }
  2178. return 0;
  2179. }
  2180. static void mlx4_en_add_vxlan_offloads(struct work_struct *work)
  2181. {
  2182. int ret;
  2183. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  2184. vxlan_add_task);
  2185. ret = mlx4_config_vxlan_port(priv->mdev->dev, priv->vxlan_port);
  2186. if (ret)
  2187. goto out;
  2188. ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
  2189. VXLAN_STEER_BY_OUTER_MAC, 1);
  2190. out:
  2191. if (ret) {
  2192. en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret);
  2193. return;
  2194. }
  2195. /* set offloads */
  2196. priv->dev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
  2197. NETIF_F_RXCSUM |
  2198. NETIF_F_TSO | NETIF_F_TSO6 |
  2199. NETIF_F_GSO_UDP_TUNNEL |
  2200. NETIF_F_GSO_UDP_TUNNEL_CSUM |
  2201. NETIF_F_GSO_PARTIAL;
  2202. }
  2203. static void mlx4_en_del_vxlan_offloads(struct work_struct *work)
  2204. {
  2205. int ret;
  2206. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  2207. vxlan_del_task);
  2208. /* unset offloads */
  2209. priv->dev->hw_enc_features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
  2210. NETIF_F_RXCSUM |
  2211. NETIF_F_TSO | NETIF_F_TSO6 |
  2212. NETIF_F_GSO_UDP_TUNNEL |
  2213. NETIF_F_GSO_UDP_TUNNEL_CSUM |
  2214. NETIF_F_GSO_PARTIAL);
  2215. ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
  2216. VXLAN_STEER_BY_OUTER_MAC, 0);
  2217. if (ret)
  2218. en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret);
  2219. priv->vxlan_port = 0;
  2220. }
  2221. static void mlx4_en_add_vxlan_port(struct net_device *dev,
  2222. struct udp_tunnel_info *ti)
  2223. {
  2224. struct mlx4_en_priv *priv = netdev_priv(dev);
  2225. __be16 port = ti->port;
  2226. __be16 current_port;
  2227. if (ti->type != UDP_TUNNEL_TYPE_VXLAN)
  2228. return;
  2229. if (ti->sa_family != AF_INET)
  2230. return;
  2231. if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  2232. return;
  2233. current_port = priv->vxlan_port;
  2234. if (current_port && current_port != port) {
  2235. en_warn(priv, "vxlan port %d configured, can't add port %d\n",
  2236. ntohs(current_port), ntohs(port));
  2237. return;
  2238. }
  2239. priv->vxlan_port = port;
  2240. queue_work(priv->mdev->workqueue, &priv->vxlan_add_task);
  2241. }
  2242. static void mlx4_en_del_vxlan_port(struct net_device *dev,
  2243. struct udp_tunnel_info *ti)
  2244. {
  2245. struct mlx4_en_priv *priv = netdev_priv(dev);
  2246. __be16 port = ti->port;
  2247. __be16 current_port;
  2248. if (ti->type != UDP_TUNNEL_TYPE_VXLAN)
  2249. return;
  2250. if (ti->sa_family != AF_INET)
  2251. return;
  2252. if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  2253. return;
  2254. current_port = priv->vxlan_port;
  2255. if (current_port != port) {
  2256. en_dbg(DRV, priv, "vxlan port %d isn't configured, ignoring\n", ntohs(port));
  2257. return;
  2258. }
  2259. queue_work(priv->mdev->workqueue, &priv->vxlan_del_task);
  2260. }
  2261. static netdev_features_t mlx4_en_features_check(struct sk_buff *skb,
  2262. struct net_device *dev,
  2263. netdev_features_t features)
  2264. {
  2265. features = vlan_features_check(skb, features);
  2266. features = vxlan_features_check(skb, features);
  2267. /* The ConnectX-3 doesn't support outer IPv6 checksums but it does
  2268. * support inner IPv6 checksums and segmentation so we need to
  2269. * strip that feature if this is an IPv6 encapsulated frame.
  2270. */
  2271. if (skb->encapsulation &&
  2272. (skb->ip_summed == CHECKSUM_PARTIAL)) {
  2273. struct mlx4_en_priv *priv = netdev_priv(dev);
  2274. if (!priv->vxlan_port ||
  2275. (ip_hdr(skb)->version != 4) ||
  2276. (udp_hdr(skb)->dest != priv->vxlan_port))
  2277. features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
  2278. }
  2279. return features;
  2280. }
  2281. static int mlx4_en_set_tx_maxrate(struct net_device *dev, int queue_index, u32 maxrate)
  2282. {
  2283. struct mlx4_en_priv *priv = netdev_priv(dev);
  2284. struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][queue_index];
  2285. struct mlx4_update_qp_params params;
  2286. int err;
  2287. if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT))
  2288. return -EOPNOTSUPP;
  2289. /* rate provided to us in Mbs, check if it fits into 12 bits, if not use Gbs */
  2290. if (maxrate >> 12) {
  2291. params.rate_unit = MLX4_QP_RATE_LIMIT_GBS;
  2292. params.rate_val = maxrate / 1000;
  2293. } else if (maxrate) {
  2294. params.rate_unit = MLX4_QP_RATE_LIMIT_MBS;
  2295. params.rate_val = maxrate;
  2296. } else { /* zero serves to revoke the QP rate-limitation */
  2297. params.rate_unit = 0;
  2298. params.rate_val = 0;
  2299. }
  2300. err = mlx4_update_qp(priv->mdev->dev, tx_ring->qpn, MLX4_UPDATE_QP_RATE_LIMIT,
  2301. &params);
  2302. return err;
  2303. }
  2304. static int mlx4_xdp_set(struct net_device *dev, struct bpf_prog *prog)
  2305. {
  2306. struct mlx4_en_priv *priv = netdev_priv(dev);
  2307. struct mlx4_en_dev *mdev = priv->mdev;
  2308. struct mlx4_en_port_profile new_prof;
  2309. struct bpf_prog *old_prog;
  2310. struct mlx4_en_priv *tmp;
  2311. int tx_changed = 0;
  2312. int xdp_ring_num;
  2313. int port_up = 0;
  2314. int err;
  2315. int i;
  2316. xdp_ring_num = prog ? priv->rx_ring_num : 0;
  2317. /* No need to reconfigure buffers when simply swapping the
  2318. * program for a new one.
  2319. */
  2320. if (priv->tx_ring_num[TX_XDP] == xdp_ring_num) {
  2321. if (prog) {
  2322. prog = bpf_prog_add(prog, priv->rx_ring_num - 1);
  2323. if (IS_ERR(prog))
  2324. return PTR_ERR(prog);
  2325. }
  2326. mutex_lock(&mdev->state_lock);
  2327. for (i = 0; i < priv->rx_ring_num; i++) {
  2328. old_prog = rcu_dereference_protected(
  2329. priv->rx_ring[i]->xdp_prog,
  2330. lockdep_is_held(&mdev->state_lock));
  2331. rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog);
  2332. if (old_prog)
  2333. bpf_prog_put(old_prog);
  2334. }
  2335. mutex_unlock(&mdev->state_lock);
  2336. return 0;
  2337. }
  2338. if (!mlx4_en_check_xdp_mtu(dev, dev->mtu))
  2339. return -EOPNOTSUPP;
  2340. tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
  2341. if (!tmp)
  2342. return -ENOMEM;
  2343. if (prog) {
  2344. prog = bpf_prog_add(prog, priv->rx_ring_num - 1);
  2345. if (IS_ERR(prog)) {
  2346. err = PTR_ERR(prog);
  2347. goto out;
  2348. }
  2349. }
  2350. mutex_lock(&mdev->state_lock);
  2351. memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
  2352. new_prof.tx_ring_num[TX_XDP] = xdp_ring_num;
  2353. if (priv->tx_ring_num[TX] + xdp_ring_num > MAX_TX_RINGS) {
  2354. tx_changed = 1;
  2355. new_prof.tx_ring_num[TX] =
  2356. MAX_TX_RINGS - ALIGN(xdp_ring_num, MLX4_EN_NUM_UP);
  2357. en_warn(priv, "Reducing the number of TX rings, to not exceed the max total rings number.\n");
  2358. }
  2359. err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, false);
  2360. if (err) {
  2361. if (prog)
  2362. bpf_prog_sub(prog, priv->rx_ring_num - 1);
  2363. goto unlock_out;
  2364. }
  2365. if (priv->port_up) {
  2366. port_up = 1;
  2367. mlx4_en_stop_port(dev, 1);
  2368. }
  2369. mlx4_en_safe_replace_resources(priv, tmp);
  2370. if (tx_changed)
  2371. netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
  2372. for (i = 0; i < priv->rx_ring_num; i++) {
  2373. old_prog = rcu_dereference_protected(
  2374. priv->rx_ring[i]->xdp_prog,
  2375. lockdep_is_held(&mdev->state_lock));
  2376. rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog);
  2377. if (old_prog)
  2378. bpf_prog_put(old_prog);
  2379. }
  2380. if (port_up) {
  2381. err = mlx4_en_start_port(dev);
  2382. if (err) {
  2383. en_err(priv, "Failed starting port %d for XDP change\n",
  2384. priv->port);
  2385. queue_work(mdev->workqueue, &priv->watchdog_task);
  2386. }
  2387. }
  2388. unlock_out:
  2389. mutex_unlock(&mdev->state_lock);
  2390. out:
  2391. kfree(tmp);
  2392. return err;
  2393. }
  2394. static bool mlx4_xdp_attached(struct net_device *dev)
  2395. {
  2396. struct mlx4_en_priv *priv = netdev_priv(dev);
  2397. return !!priv->tx_ring_num[TX_XDP];
  2398. }
  2399. static int mlx4_xdp(struct net_device *dev, struct netdev_xdp *xdp)
  2400. {
  2401. switch (xdp->command) {
  2402. case XDP_SETUP_PROG:
  2403. return mlx4_xdp_set(dev, xdp->prog);
  2404. case XDP_QUERY_PROG:
  2405. xdp->prog_attached = mlx4_xdp_attached(dev);
  2406. return 0;
  2407. default:
  2408. return -EINVAL;
  2409. }
  2410. }
  2411. static const struct net_device_ops mlx4_netdev_ops = {
  2412. .ndo_open = mlx4_en_open,
  2413. .ndo_stop = mlx4_en_close,
  2414. .ndo_start_xmit = mlx4_en_xmit,
  2415. .ndo_select_queue = mlx4_en_select_queue,
  2416. .ndo_get_stats64 = mlx4_en_get_stats64,
  2417. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  2418. .ndo_set_mac_address = mlx4_en_set_mac,
  2419. .ndo_validate_addr = eth_validate_addr,
  2420. .ndo_change_mtu = mlx4_en_change_mtu,
  2421. .ndo_do_ioctl = mlx4_en_ioctl,
  2422. .ndo_tx_timeout = mlx4_en_tx_timeout,
  2423. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  2424. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  2425. #ifdef CONFIG_NET_POLL_CONTROLLER
  2426. .ndo_poll_controller = mlx4_en_netpoll,
  2427. #endif
  2428. .ndo_set_features = mlx4_en_set_features,
  2429. .ndo_fix_features = mlx4_en_fix_features,
  2430. .ndo_setup_tc = __mlx4_en_setup_tc,
  2431. #ifdef CONFIG_RFS_ACCEL
  2432. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  2433. #endif
  2434. .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
  2435. .ndo_udp_tunnel_add = mlx4_en_add_vxlan_port,
  2436. .ndo_udp_tunnel_del = mlx4_en_del_vxlan_port,
  2437. .ndo_features_check = mlx4_en_features_check,
  2438. .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
  2439. .ndo_xdp = mlx4_xdp,
  2440. };
  2441. static const struct net_device_ops mlx4_netdev_ops_master = {
  2442. .ndo_open = mlx4_en_open,
  2443. .ndo_stop = mlx4_en_close,
  2444. .ndo_start_xmit = mlx4_en_xmit,
  2445. .ndo_select_queue = mlx4_en_select_queue,
  2446. .ndo_get_stats64 = mlx4_en_get_stats64,
  2447. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  2448. .ndo_set_mac_address = mlx4_en_set_mac,
  2449. .ndo_validate_addr = eth_validate_addr,
  2450. .ndo_change_mtu = mlx4_en_change_mtu,
  2451. .ndo_tx_timeout = mlx4_en_tx_timeout,
  2452. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  2453. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  2454. .ndo_set_vf_mac = mlx4_en_set_vf_mac,
  2455. .ndo_set_vf_vlan = mlx4_en_set_vf_vlan,
  2456. .ndo_set_vf_rate = mlx4_en_set_vf_rate,
  2457. .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk,
  2458. .ndo_set_vf_link_state = mlx4_en_set_vf_link_state,
  2459. .ndo_get_vf_stats = mlx4_en_get_vf_stats,
  2460. .ndo_get_vf_config = mlx4_en_get_vf_config,
  2461. #ifdef CONFIG_NET_POLL_CONTROLLER
  2462. .ndo_poll_controller = mlx4_en_netpoll,
  2463. #endif
  2464. .ndo_set_features = mlx4_en_set_features,
  2465. .ndo_fix_features = mlx4_en_fix_features,
  2466. .ndo_setup_tc = __mlx4_en_setup_tc,
  2467. #ifdef CONFIG_RFS_ACCEL
  2468. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  2469. #endif
  2470. .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
  2471. .ndo_udp_tunnel_add = mlx4_en_add_vxlan_port,
  2472. .ndo_udp_tunnel_del = mlx4_en_del_vxlan_port,
  2473. .ndo_features_check = mlx4_en_features_check,
  2474. .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
  2475. .ndo_xdp = mlx4_xdp,
  2476. };
  2477. struct mlx4_en_bond {
  2478. struct work_struct work;
  2479. struct mlx4_en_priv *priv;
  2480. int is_bonded;
  2481. struct mlx4_port_map port_map;
  2482. };
  2483. static void mlx4_en_bond_work(struct work_struct *work)
  2484. {
  2485. struct mlx4_en_bond *bond = container_of(work,
  2486. struct mlx4_en_bond,
  2487. work);
  2488. int err = 0;
  2489. struct mlx4_dev *dev = bond->priv->mdev->dev;
  2490. if (bond->is_bonded) {
  2491. if (!mlx4_is_bonded(dev)) {
  2492. err = mlx4_bond(dev);
  2493. if (err)
  2494. en_err(bond->priv, "Fail to bond device\n");
  2495. }
  2496. if (!err) {
  2497. err = mlx4_port_map_set(dev, &bond->port_map);
  2498. if (err)
  2499. en_err(bond->priv, "Fail to set port map [%d][%d]: %d\n",
  2500. bond->port_map.port1,
  2501. bond->port_map.port2,
  2502. err);
  2503. }
  2504. } else if (mlx4_is_bonded(dev)) {
  2505. err = mlx4_unbond(dev);
  2506. if (err)
  2507. en_err(bond->priv, "Fail to unbond device\n");
  2508. }
  2509. dev_put(bond->priv->dev);
  2510. kfree(bond);
  2511. }
  2512. static int mlx4_en_queue_bond_work(struct mlx4_en_priv *priv, int is_bonded,
  2513. u8 v2p_p1, u8 v2p_p2)
  2514. {
  2515. struct mlx4_en_bond *bond = NULL;
  2516. bond = kzalloc(sizeof(*bond), GFP_ATOMIC);
  2517. if (!bond)
  2518. return -ENOMEM;
  2519. INIT_WORK(&bond->work, mlx4_en_bond_work);
  2520. bond->priv = priv;
  2521. bond->is_bonded = is_bonded;
  2522. bond->port_map.port1 = v2p_p1;
  2523. bond->port_map.port2 = v2p_p2;
  2524. dev_hold(priv->dev);
  2525. queue_work(priv->mdev->workqueue, &bond->work);
  2526. return 0;
  2527. }
  2528. int mlx4_en_netdev_event(struct notifier_block *this,
  2529. unsigned long event, void *ptr)
  2530. {
  2531. struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
  2532. u8 port = 0;
  2533. struct mlx4_en_dev *mdev;
  2534. struct mlx4_dev *dev;
  2535. int i, num_eth_ports = 0;
  2536. bool do_bond = true;
  2537. struct mlx4_en_priv *priv;
  2538. u8 v2p_port1 = 0;
  2539. u8 v2p_port2 = 0;
  2540. if (!net_eq(dev_net(ndev), &init_net))
  2541. return NOTIFY_DONE;
  2542. mdev = container_of(this, struct mlx4_en_dev, nb);
  2543. dev = mdev->dev;
  2544. /* Go into this mode only when two network devices set on two ports
  2545. * of the same mlx4 device are slaves of the same bonding master
  2546. */
  2547. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) {
  2548. ++num_eth_ports;
  2549. if (!port && (mdev->pndev[i] == ndev))
  2550. port = i;
  2551. mdev->upper[i] = mdev->pndev[i] ?
  2552. netdev_master_upper_dev_get(mdev->pndev[i]) : NULL;
  2553. /* condition not met: network device is a slave */
  2554. if (!mdev->upper[i])
  2555. do_bond = false;
  2556. if (num_eth_ports < 2)
  2557. continue;
  2558. /* condition not met: same master */
  2559. if (mdev->upper[i] != mdev->upper[i-1])
  2560. do_bond = false;
  2561. }
  2562. /* condition not met: 2 salves */
  2563. do_bond = (num_eth_ports == 2) ? do_bond : false;
  2564. /* handle only events that come with enough info */
  2565. if ((do_bond && (event != NETDEV_BONDING_INFO)) || !port)
  2566. return NOTIFY_DONE;
  2567. priv = netdev_priv(ndev);
  2568. if (do_bond) {
  2569. struct netdev_notifier_bonding_info *notifier_info = ptr;
  2570. struct netdev_bonding_info *bonding_info =
  2571. &notifier_info->bonding_info;
  2572. /* required mode 1, 2 or 4 */
  2573. if ((bonding_info->master.bond_mode != BOND_MODE_ACTIVEBACKUP) &&
  2574. (bonding_info->master.bond_mode != BOND_MODE_XOR) &&
  2575. (bonding_info->master.bond_mode != BOND_MODE_8023AD))
  2576. do_bond = false;
  2577. /* require exactly 2 slaves */
  2578. if (bonding_info->master.num_slaves != 2)
  2579. do_bond = false;
  2580. /* calc v2p */
  2581. if (do_bond) {
  2582. if (bonding_info->master.bond_mode ==
  2583. BOND_MODE_ACTIVEBACKUP) {
  2584. /* in active-backup mode virtual ports are
  2585. * mapped to the physical port of the active
  2586. * slave */
  2587. if (bonding_info->slave.state ==
  2588. BOND_STATE_BACKUP) {
  2589. if (port == 1) {
  2590. v2p_port1 = 2;
  2591. v2p_port2 = 2;
  2592. } else {
  2593. v2p_port1 = 1;
  2594. v2p_port2 = 1;
  2595. }
  2596. } else { /* BOND_STATE_ACTIVE */
  2597. if (port == 1) {
  2598. v2p_port1 = 1;
  2599. v2p_port2 = 1;
  2600. } else {
  2601. v2p_port1 = 2;
  2602. v2p_port2 = 2;
  2603. }
  2604. }
  2605. } else { /* Active-Active */
  2606. /* in active-active mode a virtual port is
  2607. * mapped to the native physical port if and only
  2608. * if the physical port is up */
  2609. __s8 link = bonding_info->slave.link;
  2610. if (port == 1)
  2611. v2p_port2 = 2;
  2612. else
  2613. v2p_port1 = 1;
  2614. if ((link == BOND_LINK_UP) ||
  2615. (link == BOND_LINK_FAIL)) {
  2616. if (port == 1)
  2617. v2p_port1 = 1;
  2618. else
  2619. v2p_port2 = 2;
  2620. } else { /* BOND_LINK_DOWN || BOND_LINK_BACK */
  2621. if (port == 1)
  2622. v2p_port1 = 2;
  2623. else
  2624. v2p_port2 = 1;
  2625. }
  2626. }
  2627. }
  2628. }
  2629. mlx4_en_queue_bond_work(priv, do_bond,
  2630. v2p_port1, v2p_port2);
  2631. return NOTIFY_DONE;
  2632. }
  2633. void mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev *dev,
  2634. struct mlx4_en_stats_bitmap *stats_bitmap,
  2635. u8 rx_ppp, u8 rx_pause,
  2636. u8 tx_ppp, u8 tx_pause)
  2637. {
  2638. int last_i = NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PF_STATS;
  2639. if (!mlx4_is_slave(dev) &&
  2640. (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN)) {
  2641. mutex_lock(&stats_bitmap->mutex);
  2642. bitmap_clear(stats_bitmap->bitmap, last_i, NUM_FLOW_STATS);
  2643. if (rx_ppp)
  2644. bitmap_set(stats_bitmap->bitmap, last_i,
  2645. NUM_FLOW_PRIORITY_STATS_RX);
  2646. last_i += NUM_FLOW_PRIORITY_STATS_RX;
  2647. if (rx_pause && !(rx_ppp))
  2648. bitmap_set(stats_bitmap->bitmap, last_i,
  2649. NUM_FLOW_STATS_RX);
  2650. last_i += NUM_FLOW_STATS_RX;
  2651. if (tx_ppp)
  2652. bitmap_set(stats_bitmap->bitmap, last_i,
  2653. NUM_FLOW_PRIORITY_STATS_TX);
  2654. last_i += NUM_FLOW_PRIORITY_STATS_TX;
  2655. if (tx_pause && !(tx_ppp))
  2656. bitmap_set(stats_bitmap->bitmap, last_i,
  2657. NUM_FLOW_STATS_TX);
  2658. last_i += NUM_FLOW_STATS_TX;
  2659. mutex_unlock(&stats_bitmap->mutex);
  2660. }
  2661. }
  2662. void mlx4_en_set_stats_bitmap(struct mlx4_dev *dev,
  2663. struct mlx4_en_stats_bitmap *stats_bitmap,
  2664. u8 rx_ppp, u8 rx_pause,
  2665. u8 tx_ppp, u8 tx_pause)
  2666. {
  2667. int last_i = 0;
  2668. mutex_init(&stats_bitmap->mutex);
  2669. bitmap_zero(stats_bitmap->bitmap, NUM_ALL_STATS);
  2670. if (mlx4_is_slave(dev)) {
  2671. bitmap_set(stats_bitmap->bitmap, last_i +
  2672. MLX4_FIND_NETDEV_STAT(rx_packets), 1);
  2673. bitmap_set(stats_bitmap->bitmap, last_i +
  2674. MLX4_FIND_NETDEV_STAT(tx_packets), 1);
  2675. bitmap_set(stats_bitmap->bitmap, last_i +
  2676. MLX4_FIND_NETDEV_STAT(rx_bytes), 1);
  2677. bitmap_set(stats_bitmap->bitmap, last_i +
  2678. MLX4_FIND_NETDEV_STAT(tx_bytes), 1);
  2679. bitmap_set(stats_bitmap->bitmap, last_i +
  2680. MLX4_FIND_NETDEV_STAT(rx_dropped), 1);
  2681. bitmap_set(stats_bitmap->bitmap, last_i +
  2682. MLX4_FIND_NETDEV_STAT(tx_dropped), 1);
  2683. } else {
  2684. bitmap_set(stats_bitmap->bitmap, last_i, NUM_MAIN_STATS);
  2685. }
  2686. last_i += NUM_MAIN_STATS;
  2687. bitmap_set(stats_bitmap->bitmap, last_i, NUM_PORT_STATS);
  2688. last_i += NUM_PORT_STATS;
  2689. if (mlx4_is_master(dev))
  2690. bitmap_set(stats_bitmap->bitmap, last_i,
  2691. NUM_PF_STATS);
  2692. last_i += NUM_PF_STATS;
  2693. mlx4_en_update_pfc_stats_bitmap(dev, stats_bitmap,
  2694. rx_ppp, rx_pause,
  2695. tx_ppp, tx_pause);
  2696. last_i += NUM_FLOW_STATS;
  2697. if (!mlx4_is_slave(dev))
  2698. bitmap_set(stats_bitmap->bitmap, last_i, NUM_PKT_STATS);
  2699. last_i += NUM_PKT_STATS;
  2700. bitmap_set(stats_bitmap->bitmap, last_i, NUM_XDP_STATS);
  2701. last_i += NUM_XDP_STATS;
  2702. }
  2703. int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
  2704. struct mlx4_en_port_profile *prof)
  2705. {
  2706. struct net_device *dev;
  2707. struct mlx4_en_priv *priv;
  2708. int i, t;
  2709. int err;
  2710. dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
  2711. MAX_TX_RINGS, MAX_RX_RINGS);
  2712. if (dev == NULL)
  2713. return -ENOMEM;
  2714. netif_set_real_num_tx_queues(dev, prof->tx_ring_num[TX]);
  2715. netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
  2716. SET_NETDEV_DEV(dev, &mdev->dev->persist->pdev->dev);
  2717. dev->dev_port = port - 1;
  2718. /*
  2719. * Initialize driver private data
  2720. */
  2721. priv = netdev_priv(dev);
  2722. memset(priv, 0, sizeof(struct mlx4_en_priv));
  2723. priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
  2724. spin_lock_init(&priv->stats_lock);
  2725. INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
  2726. INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
  2727. INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
  2728. INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
  2729. INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task);
  2730. INIT_WORK(&priv->vxlan_add_task, mlx4_en_add_vxlan_offloads);
  2731. INIT_WORK(&priv->vxlan_del_task, mlx4_en_del_vxlan_offloads);
  2732. #ifdef CONFIG_RFS_ACCEL
  2733. INIT_LIST_HEAD(&priv->filters);
  2734. spin_lock_init(&priv->filters_lock);
  2735. #endif
  2736. priv->dev = dev;
  2737. priv->mdev = mdev;
  2738. priv->ddev = &mdev->pdev->dev;
  2739. priv->prof = prof;
  2740. priv->port = port;
  2741. priv->port_up = false;
  2742. priv->flags = prof->flags;
  2743. priv->pflags = MLX4_EN_PRIV_FLAGS_BLUEFLAME;
  2744. priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
  2745. MLX4_WQE_CTRL_SOLICITED);
  2746. priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up;
  2747. priv->tx_work_limit = MLX4_EN_DEFAULT_TX_WORK;
  2748. netdev_rss_key_fill(priv->rss_key, sizeof(priv->rss_key));
  2749. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  2750. priv->tx_ring_num[t] = prof->tx_ring_num[t];
  2751. if (!priv->tx_ring_num[t])
  2752. continue;
  2753. priv->tx_ring[t] = kzalloc(sizeof(struct mlx4_en_tx_ring *) *
  2754. MAX_TX_RINGS, GFP_KERNEL);
  2755. if (!priv->tx_ring[t]) {
  2756. err = -ENOMEM;
  2757. goto err_free_tx;
  2758. }
  2759. priv->tx_cq[t] = kzalloc(sizeof(struct mlx4_en_cq *) *
  2760. MAX_TX_RINGS, GFP_KERNEL);
  2761. if (!priv->tx_cq[t]) {
  2762. kfree(priv->tx_ring[t]);
  2763. err = -ENOMEM;
  2764. goto out;
  2765. }
  2766. }
  2767. priv->rx_ring_num = prof->rx_ring_num;
  2768. priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
  2769. priv->cqe_size = mdev->dev->caps.cqe_size;
  2770. priv->mac_index = -1;
  2771. priv->msg_enable = MLX4_EN_MSG_LEVEL;
  2772. #ifdef CONFIG_MLX4_EN_DCB
  2773. if (!mlx4_is_slave(priv->mdev->dev)) {
  2774. priv->dcbx_cap = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_HOST |
  2775. DCB_CAP_DCBX_VER_IEEE;
  2776. priv->flags |= MLX4_EN_DCB_ENABLED;
  2777. priv->cee_config.pfc_state = false;
  2778. for (i = 0; i < MLX4_EN_NUM_UP; i++)
  2779. priv->cee_config.dcb_pfc[i] = pfc_disabled;
  2780. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) {
  2781. dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
  2782. } else {
  2783. en_info(priv, "enabling only PFC DCB ops\n");
  2784. dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops;
  2785. }
  2786. }
  2787. #endif
  2788. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
  2789. INIT_HLIST_HEAD(&priv->mac_hash[i]);
  2790. /* Query for default mac and max mtu */
  2791. priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
  2792. if (mdev->dev->caps.rx_checksum_flags_port[priv->port] &
  2793. MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP)
  2794. priv->flags |= MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP;
  2795. /* Set default MAC */
  2796. dev->addr_len = ETH_ALEN;
  2797. mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
  2798. if (!is_valid_ether_addr(dev->dev_addr)) {
  2799. en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n",
  2800. priv->port, dev->dev_addr);
  2801. err = -EINVAL;
  2802. goto out;
  2803. } else if (mlx4_is_slave(priv->mdev->dev) &&
  2804. (priv->mdev->dev->port_random_macs & 1 << priv->port)) {
  2805. /* Random MAC was assigned in mlx4_slave_cap
  2806. * in mlx4_core module
  2807. */
  2808. dev->addr_assign_type |= NET_ADDR_RANDOM;
  2809. en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr);
  2810. }
  2811. memcpy(priv->current_mac, dev->dev_addr, sizeof(priv->current_mac));
  2812. priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
  2813. DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
  2814. err = mlx4_en_alloc_resources(priv);
  2815. if (err)
  2816. goto out;
  2817. /* Initialize time stamping config */
  2818. priv->hwtstamp_config.flags = 0;
  2819. priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;
  2820. priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
  2821. /* Allocate page for receive rings */
  2822. err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
  2823. MLX4_EN_PAGE_SIZE);
  2824. if (err) {
  2825. en_err(priv, "Failed to allocate page for rx qps\n");
  2826. goto out;
  2827. }
  2828. priv->allocated = 1;
  2829. /*
  2830. * Initialize netdev entry points
  2831. */
  2832. if (mlx4_is_master(priv->mdev->dev))
  2833. dev->netdev_ops = &mlx4_netdev_ops_master;
  2834. else
  2835. dev->netdev_ops = &mlx4_netdev_ops;
  2836. dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
  2837. netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
  2838. netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
  2839. dev->ethtool_ops = &mlx4_en_ethtool_ops;
  2840. /*
  2841. * Set driver features
  2842. */
  2843. dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
  2844. if (mdev->LSO_support)
  2845. dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
  2846. dev->vlan_features = dev->hw_features;
  2847. dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
  2848. dev->features = dev->hw_features | NETIF_F_HIGHDMA |
  2849. NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
  2850. NETIF_F_HW_VLAN_CTAG_FILTER;
  2851. dev->hw_features |= NETIF_F_LOOPBACK |
  2852. NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
  2853. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) {
  2854. dev->features |= NETIF_F_HW_VLAN_STAG_RX |
  2855. NETIF_F_HW_VLAN_STAG_FILTER;
  2856. dev->hw_features |= NETIF_F_HW_VLAN_STAG_RX;
  2857. }
  2858. if (mlx4_is_slave(mdev->dev)) {
  2859. bool vlan_offload_disabled;
  2860. int phv;
  2861. err = get_phv_bit(mdev->dev, port, &phv);
  2862. if (!err && phv) {
  2863. dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
  2864. priv->pflags |= MLX4_EN_PRIV_FLAGS_PHV;
  2865. }
  2866. err = mlx4_get_is_vlan_offload_disabled(mdev->dev, port,
  2867. &vlan_offload_disabled);
  2868. if (!err && vlan_offload_disabled) {
  2869. dev->hw_features &= ~(NETIF_F_HW_VLAN_CTAG_TX |
  2870. NETIF_F_HW_VLAN_CTAG_RX |
  2871. NETIF_F_HW_VLAN_STAG_TX |
  2872. NETIF_F_HW_VLAN_STAG_RX);
  2873. dev->features &= ~(NETIF_F_HW_VLAN_CTAG_TX |
  2874. NETIF_F_HW_VLAN_CTAG_RX |
  2875. NETIF_F_HW_VLAN_STAG_TX |
  2876. NETIF_F_HW_VLAN_STAG_RX);
  2877. }
  2878. } else {
  2879. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PHV_EN &&
  2880. !(mdev->dev->caps.flags2 &
  2881. MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))
  2882. dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
  2883. }
  2884. if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP)
  2885. dev->hw_features |= NETIF_F_RXFCS;
  2886. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS)
  2887. dev->hw_features |= NETIF_F_RXALL;
  2888. if (mdev->dev->caps.steering_mode ==
  2889. MLX4_STEERING_MODE_DEVICE_MANAGED &&
  2890. mdev->dev->caps.dmfs_high_steer_mode != MLX4_STEERING_DMFS_A0_STATIC)
  2891. dev->hw_features |= NETIF_F_NTUPLE;
  2892. if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
  2893. dev->priv_flags |= IFF_UNICAST_FLT;
  2894. /* Setting a default hash function value */
  2895. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP) {
  2896. priv->rss_hash_fn = ETH_RSS_HASH_TOP;
  2897. } else if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR) {
  2898. priv->rss_hash_fn = ETH_RSS_HASH_XOR;
  2899. } else {
  2900. en_warn(priv,
  2901. "No RSS hash capabilities exposed, using Toeplitz\n");
  2902. priv->rss_hash_fn = ETH_RSS_HASH_TOP;
  2903. }
  2904. if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
  2905. dev->hw_features |= NETIF_F_GSO_UDP_TUNNEL |
  2906. NETIF_F_GSO_UDP_TUNNEL_CSUM |
  2907. NETIF_F_GSO_PARTIAL;
  2908. dev->features |= NETIF_F_GSO_UDP_TUNNEL |
  2909. NETIF_F_GSO_UDP_TUNNEL_CSUM |
  2910. NETIF_F_GSO_PARTIAL;
  2911. dev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM;
  2912. }
  2913. /* MTU range: 46 - hw-specific max */
  2914. dev->min_mtu = MLX4_EN_MIN_MTU;
  2915. dev->max_mtu = priv->max_mtu;
  2916. mdev->pndev[port] = dev;
  2917. mdev->upper[port] = NULL;
  2918. netif_carrier_off(dev);
  2919. mlx4_en_set_default_moderation(priv);
  2920. en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num[TX]);
  2921. en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
  2922. mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
  2923. /* Configure port */
  2924. mlx4_en_calc_rx_buf(dev);
  2925. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  2926. priv->rx_skb_size + ETH_FCS_LEN,
  2927. prof->tx_pause, prof->tx_ppp,
  2928. prof->rx_pause, prof->rx_ppp);
  2929. if (err) {
  2930. en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
  2931. priv->port, err);
  2932. goto out;
  2933. }
  2934. if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
  2935. err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
  2936. if (err) {
  2937. en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
  2938. err);
  2939. goto out;
  2940. }
  2941. }
  2942. /* Init port */
  2943. en_warn(priv, "Initializing port\n");
  2944. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  2945. if (err) {
  2946. en_err(priv, "Failed Initializing port\n");
  2947. goto out;
  2948. }
  2949. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  2950. /* Initialize time stamp mechanism */
  2951. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  2952. mlx4_en_init_timestamp(mdev);
  2953. queue_delayed_work(mdev->workqueue, &priv->service_task,
  2954. SERVICE_TASK_DELAY);
  2955. mlx4_en_set_stats_bitmap(mdev->dev, &priv->stats_bitmap,
  2956. mdev->profile.prof[priv->port].rx_ppp,
  2957. mdev->profile.prof[priv->port].rx_pause,
  2958. mdev->profile.prof[priv->port].tx_ppp,
  2959. mdev->profile.prof[priv->port].tx_pause);
  2960. err = register_netdev(dev);
  2961. if (err) {
  2962. en_err(priv, "Netdev registration failed for port %d\n", port);
  2963. goto out;
  2964. }
  2965. priv->registered = 1;
  2966. devlink_port_type_eth_set(mlx4_get_devlink_port(mdev->dev, priv->port),
  2967. dev);
  2968. return 0;
  2969. err_free_tx:
  2970. while (t--) {
  2971. kfree(priv->tx_ring[t]);
  2972. kfree(priv->tx_cq[t]);
  2973. }
  2974. out:
  2975. mlx4_en_destroy_netdev(dev);
  2976. return err;
  2977. }
  2978. int mlx4_en_reset_config(struct net_device *dev,
  2979. struct hwtstamp_config ts_config,
  2980. netdev_features_t features)
  2981. {
  2982. struct mlx4_en_priv *priv = netdev_priv(dev);
  2983. struct mlx4_en_dev *mdev = priv->mdev;
  2984. struct mlx4_en_port_profile new_prof;
  2985. struct mlx4_en_priv *tmp;
  2986. int port_up = 0;
  2987. int err = 0;
  2988. if (priv->hwtstamp_config.tx_type == ts_config.tx_type &&
  2989. priv->hwtstamp_config.rx_filter == ts_config.rx_filter &&
  2990. !DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
  2991. !DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS))
  2992. return 0; /* Nothing to change */
  2993. if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
  2994. (features & NETIF_F_HW_VLAN_CTAG_RX) &&
  2995. (priv->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE)) {
  2996. en_warn(priv, "Can't turn ON rx vlan offload while time-stamping rx filter is ON\n");
  2997. return -EINVAL;
  2998. }
  2999. tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
  3000. if (!tmp)
  3001. return -ENOMEM;
  3002. mutex_lock(&mdev->state_lock);
  3003. memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
  3004. memcpy(&new_prof.hwtstamp_config, &ts_config, sizeof(ts_config));
  3005. err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true);
  3006. if (err)
  3007. goto out;
  3008. if (priv->port_up) {
  3009. port_up = 1;
  3010. mlx4_en_stop_port(dev, 1);
  3011. }
  3012. en_warn(priv, "Changing device configuration rx filter(%x) rx vlan(%x)\n",
  3013. ts_config.rx_filter,
  3014. !!(features & NETIF_F_HW_VLAN_CTAG_RX));
  3015. mlx4_en_safe_replace_resources(priv, tmp);
  3016. if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
  3017. if (features & NETIF_F_HW_VLAN_CTAG_RX)
  3018. dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
  3019. else
  3020. dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
  3021. } else if (ts_config.rx_filter == HWTSTAMP_FILTER_NONE) {
  3022. /* RX time-stamping is OFF, update the RX vlan offload
  3023. * to the latest wanted state
  3024. */
  3025. if (dev->wanted_features & NETIF_F_HW_VLAN_CTAG_RX)
  3026. dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
  3027. else
  3028. dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
  3029. }
  3030. if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) {
  3031. if (features & NETIF_F_RXFCS)
  3032. dev->features |= NETIF_F_RXFCS;
  3033. else
  3034. dev->features &= ~NETIF_F_RXFCS;
  3035. }
  3036. /* RX vlan offload and RX time-stamping can't co-exist !
  3037. * Regardless of the caller's choice,
  3038. * Turn Off RX vlan offload in case of time-stamping is ON
  3039. */
  3040. if (ts_config.rx_filter != HWTSTAMP_FILTER_NONE) {
  3041. if (dev->features & NETIF_F_HW_VLAN_CTAG_RX)
  3042. en_warn(priv, "Turning off RX vlan offload since RX time-stamping is ON\n");
  3043. dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
  3044. }
  3045. if (port_up) {
  3046. err = mlx4_en_start_port(dev);
  3047. if (err)
  3048. en_err(priv, "Failed starting port\n");
  3049. }
  3050. out:
  3051. mutex_unlock(&mdev->state_lock);
  3052. kfree(tmp);
  3053. if (!err)
  3054. netdev_features_change(dev);
  3055. return err;
  3056. }