octeon_mailbox.c 8.8 KB

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  1. /**********************************************************************
  2. * Author: Cavium, Inc.
  3. *
  4. * Contact: support@cavium.com
  5. * Please include "LiquidIO" in the subject.
  6. *
  7. * Copyright (c) 2003-2016 Cavium, Inc.
  8. *
  9. * This file is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License, Version 2, as
  11. * published by the Free Software Foundation.
  12. *
  13. * This file is distributed in the hope that it will be useful, but
  14. * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
  15. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
  16. * NONINFRINGEMENT. See the GNU General Public License for more details.
  17. ***********************************************************************/
  18. #include <linux/pci.h>
  19. #include <linux/netdevice.h>
  20. #include "liquidio_common.h"
  21. #include "octeon_droq.h"
  22. #include "octeon_iq.h"
  23. #include "response_manager.h"
  24. #include "octeon_device.h"
  25. #include "octeon_main.h"
  26. #include "octeon_mailbox.h"
  27. /**
  28. * octeon_mbox_read:
  29. * @oct: Pointer mailbox
  30. *
  31. * Reads the 8-bytes of data from the mbox register
  32. * Writes back the acknowldgement inidcating completion of read
  33. */
  34. int octeon_mbox_read(struct octeon_mbox *mbox)
  35. {
  36. union octeon_mbox_message msg;
  37. int ret = 0;
  38. spin_lock(&mbox->lock);
  39. msg.u64 = readq(mbox->mbox_read_reg);
  40. if ((msg.u64 == OCTEON_PFVFACK) || (msg.u64 == OCTEON_PFVFSIG)) {
  41. spin_unlock(&mbox->lock);
  42. return 0;
  43. }
  44. if (mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVING) {
  45. mbox->mbox_req.data[mbox->mbox_req.recv_len - 1] = msg.u64;
  46. mbox->mbox_req.recv_len++;
  47. } else {
  48. if (mbox->state & OCTEON_MBOX_STATE_RESPONSE_RECEIVING) {
  49. mbox->mbox_resp.data[mbox->mbox_resp.recv_len - 1] =
  50. msg.u64;
  51. mbox->mbox_resp.recv_len++;
  52. } else {
  53. if ((mbox->state & OCTEON_MBOX_STATE_IDLE) &&
  54. (msg.s.type == OCTEON_MBOX_REQUEST)) {
  55. mbox->state &= ~OCTEON_MBOX_STATE_IDLE;
  56. mbox->state |=
  57. OCTEON_MBOX_STATE_REQUEST_RECEIVING;
  58. mbox->mbox_req.msg.u64 = msg.u64;
  59. mbox->mbox_req.q_no = mbox->q_no;
  60. mbox->mbox_req.recv_len = 1;
  61. } else {
  62. if ((mbox->state &
  63. OCTEON_MBOX_STATE_RESPONSE_PENDING) &&
  64. (msg.s.type == OCTEON_MBOX_RESPONSE)) {
  65. mbox->state &=
  66. ~OCTEON_MBOX_STATE_RESPONSE_PENDING;
  67. mbox->state |=
  68. OCTEON_MBOX_STATE_RESPONSE_RECEIVING
  69. ;
  70. mbox->mbox_resp.msg.u64 = msg.u64;
  71. mbox->mbox_resp.q_no = mbox->q_no;
  72. mbox->mbox_resp.recv_len = 1;
  73. } else {
  74. writeq(OCTEON_PFVFERR,
  75. mbox->mbox_read_reg);
  76. mbox->state |= OCTEON_MBOX_STATE_ERROR;
  77. spin_unlock(&mbox->lock);
  78. return 1;
  79. }
  80. }
  81. }
  82. }
  83. if (mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVING) {
  84. if (mbox->mbox_req.recv_len < msg.s.len) {
  85. ret = 0;
  86. } else {
  87. mbox->state &= ~OCTEON_MBOX_STATE_REQUEST_RECEIVING;
  88. mbox->state |= OCTEON_MBOX_STATE_REQUEST_RECEIVED;
  89. ret = 1;
  90. }
  91. } else {
  92. if (mbox->state & OCTEON_MBOX_STATE_RESPONSE_RECEIVING) {
  93. if (mbox->mbox_resp.recv_len < msg.s.len) {
  94. ret = 0;
  95. } else {
  96. mbox->state &=
  97. ~OCTEON_MBOX_STATE_RESPONSE_RECEIVING;
  98. mbox->state |=
  99. OCTEON_MBOX_STATE_RESPONSE_RECEIVED;
  100. ret = 1;
  101. }
  102. } else {
  103. WARN_ON(1);
  104. }
  105. }
  106. writeq(OCTEON_PFVFACK, mbox->mbox_read_reg);
  107. spin_unlock(&mbox->lock);
  108. return ret;
  109. }
  110. /**
  111. * octeon_mbox_write:
  112. * @oct: Pointer Octeon Device
  113. * @mbox_cmd: Cmd to send to mailbox.
  114. *
  115. * Populates the queue specific mbox structure
  116. * with cmd information.
  117. * Write the cmd to mbox register
  118. */
  119. int octeon_mbox_write(struct octeon_device *oct,
  120. struct octeon_mbox_cmd *mbox_cmd)
  121. {
  122. struct octeon_mbox *mbox = oct->mbox[mbox_cmd->q_no];
  123. u32 count, i, ret = OCTEON_MBOX_STATUS_SUCCESS;
  124. long timeout = LIO_MBOX_WRITE_WAIT_TIME;
  125. unsigned long flags;
  126. spin_lock_irqsave(&mbox->lock, flags);
  127. if ((mbox_cmd->msg.s.type == OCTEON_MBOX_RESPONSE) &&
  128. !(mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVED)) {
  129. spin_unlock_irqrestore(&mbox->lock, flags);
  130. return OCTEON_MBOX_STATUS_FAILED;
  131. }
  132. if ((mbox_cmd->msg.s.type == OCTEON_MBOX_REQUEST) &&
  133. !(mbox->state & OCTEON_MBOX_STATE_IDLE)) {
  134. spin_unlock_irqrestore(&mbox->lock, flags);
  135. return OCTEON_MBOX_STATUS_BUSY;
  136. }
  137. if (mbox_cmd->msg.s.type == OCTEON_MBOX_REQUEST) {
  138. memcpy(&mbox->mbox_resp, mbox_cmd,
  139. sizeof(struct octeon_mbox_cmd));
  140. mbox->state = OCTEON_MBOX_STATE_RESPONSE_PENDING;
  141. }
  142. spin_unlock_irqrestore(&mbox->lock, flags);
  143. count = 0;
  144. while (readq(mbox->mbox_write_reg) != OCTEON_PFVFSIG) {
  145. schedule_timeout_uninterruptible(timeout);
  146. if (count++ == LIO_MBOX_WRITE_WAIT_CNT) {
  147. ret = OCTEON_MBOX_STATUS_FAILED;
  148. break;
  149. }
  150. }
  151. if (ret == OCTEON_MBOX_STATUS_SUCCESS) {
  152. writeq(mbox_cmd->msg.u64, mbox->mbox_write_reg);
  153. for (i = 0; i < (u32)(mbox_cmd->msg.s.len - 1); i++) {
  154. count = 0;
  155. while (readq(mbox->mbox_write_reg) !=
  156. OCTEON_PFVFACK) {
  157. schedule_timeout_uninterruptible(timeout);
  158. if (count++ == LIO_MBOX_WRITE_WAIT_CNT) {
  159. ret = OCTEON_MBOX_STATUS_FAILED;
  160. break;
  161. }
  162. }
  163. writeq(mbox_cmd->data[i], mbox->mbox_write_reg);
  164. }
  165. }
  166. spin_lock_irqsave(&mbox->lock, flags);
  167. if (mbox_cmd->msg.s.type == OCTEON_MBOX_RESPONSE) {
  168. mbox->state = OCTEON_MBOX_STATE_IDLE;
  169. writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg);
  170. } else {
  171. if ((!mbox_cmd->msg.s.resp_needed) ||
  172. (ret == OCTEON_MBOX_STATUS_FAILED)) {
  173. mbox->state &= ~OCTEON_MBOX_STATE_RESPONSE_PENDING;
  174. if (!(mbox->state &
  175. (OCTEON_MBOX_STATE_REQUEST_RECEIVING |
  176. OCTEON_MBOX_STATE_REQUEST_RECEIVED)))
  177. mbox->state = OCTEON_MBOX_STATE_IDLE;
  178. }
  179. }
  180. spin_unlock_irqrestore(&mbox->lock, flags);
  181. return ret;
  182. }
  183. /**
  184. * octeon_mbox_process_cmd:
  185. * @mbox: Pointer mailbox
  186. * @mbox_cmd: Pointer to command received
  187. *
  188. * Process the cmd received in mbox
  189. */
  190. static int octeon_mbox_process_cmd(struct octeon_mbox *mbox,
  191. struct octeon_mbox_cmd *mbox_cmd)
  192. {
  193. struct octeon_device *oct = mbox->oct_dev;
  194. switch (mbox_cmd->msg.s.cmd) {
  195. case OCTEON_VF_ACTIVE:
  196. dev_dbg(&oct->pci_dev->dev, "got vfactive sending data back\n");
  197. mbox_cmd->msg.s.type = OCTEON_MBOX_RESPONSE;
  198. mbox_cmd->msg.s.resp_needed = 1;
  199. mbox_cmd->msg.s.len = 2;
  200. mbox_cmd->data[0] = 0; /* VF version is in mbox_cmd->data[0] */
  201. ((struct lio_version *)&mbox_cmd->data[0])->major =
  202. LIQUIDIO_BASE_MAJOR_VERSION;
  203. ((struct lio_version *)&mbox_cmd->data[0])->minor =
  204. LIQUIDIO_BASE_MINOR_VERSION;
  205. ((struct lio_version *)&mbox_cmd->data[0])->micro =
  206. LIQUIDIO_BASE_MICRO_VERSION;
  207. memcpy(mbox_cmd->msg.s.params, (uint8_t *)&oct->pfvf_hsword, 6);
  208. /* Sending core cofig info to the corresponding active VF.*/
  209. octeon_mbox_write(oct, mbox_cmd);
  210. break;
  211. case OCTEON_VF_FLR_REQUEST:
  212. dev_info(&oct->pci_dev->dev,
  213. "got a request for FLR from VF that owns DPI ring %u\n",
  214. mbox->q_no);
  215. pcie_capability_set_word(
  216. oct->sriov_info.dpiring_to_vfpcidev_lut[mbox->q_no],
  217. PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
  218. break;
  219. case OCTEON_PF_CHANGED_VF_MACADDR:
  220. if (OCTEON_CN23XX_VF(oct))
  221. octeon_pf_changed_vf_macaddr(oct,
  222. mbox_cmd->msg.s.params);
  223. break;
  224. default:
  225. break;
  226. }
  227. return 0;
  228. }
  229. /**
  230. *octeon_mbox_process_message:
  231. *
  232. * Process the received mbox message.
  233. */
  234. int octeon_mbox_process_message(struct octeon_mbox *mbox)
  235. {
  236. struct octeon_mbox_cmd mbox_cmd;
  237. unsigned long flags;
  238. spin_lock_irqsave(&mbox->lock, flags);
  239. if (mbox->state & OCTEON_MBOX_STATE_ERROR) {
  240. if (mbox->state & (OCTEON_MBOX_STATE_RESPONSE_PENDING |
  241. OCTEON_MBOX_STATE_RESPONSE_RECEIVING)) {
  242. memcpy(&mbox_cmd, &mbox->mbox_resp,
  243. sizeof(struct octeon_mbox_cmd));
  244. mbox->state = OCTEON_MBOX_STATE_IDLE;
  245. writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg);
  246. spin_unlock_irqrestore(&mbox->lock, flags);
  247. mbox_cmd.recv_status = 1;
  248. if (mbox_cmd.fn)
  249. mbox_cmd.fn(mbox->oct_dev, &mbox_cmd,
  250. mbox_cmd.fn_arg);
  251. return 0;
  252. }
  253. mbox->state = OCTEON_MBOX_STATE_IDLE;
  254. writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg);
  255. spin_unlock_irqrestore(&mbox->lock, flags);
  256. return 0;
  257. }
  258. if (mbox->state & OCTEON_MBOX_STATE_RESPONSE_RECEIVED) {
  259. memcpy(&mbox_cmd, &mbox->mbox_resp,
  260. sizeof(struct octeon_mbox_cmd));
  261. mbox->state = OCTEON_MBOX_STATE_IDLE;
  262. writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg);
  263. spin_unlock_irqrestore(&mbox->lock, flags);
  264. mbox_cmd.recv_status = 0;
  265. if (mbox_cmd.fn)
  266. mbox_cmd.fn(mbox->oct_dev, &mbox_cmd, mbox_cmd.fn_arg);
  267. return 0;
  268. }
  269. if (mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVED) {
  270. memcpy(&mbox_cmd, &mbox->mbox_req,
  271. sizeof(struct octeon_mbox_cmd));
  272. if (!mbox_cmd.msg.s.resp_needed) {
  273. mbox->state &= ~OCTEON_MBOX_STATE_REQUEST_RECEIVED;
  274. if (!(mbox->state &
  275. OCTEON_MBOX_STATE_RESPONSE_PENDING))
  276. mbox->state = OCTEON_MBOX_STATE_IDLE;
  277. writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg);
  278. }
  279. spin_unlock_irqrestore(&mbox->lock, flags);
  280. octeon_mbox_process_cmd(mbox, &mbox_cmd);
  281. return 0;
  282. }
  283. WARN_ON(1);
  284. return 0;
  285. }