bnxt_ethtool.c 60 KB

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  1. /* Broadcom NetXtreme-C/E network driver.
  2. *
  3. * Copyright (c) 2014-2016 Broadcom Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation.
  8. */
  9. #include <linux/ctype.h>
  10. #include <linux/stringify.h>
  11. #include <linux/ethtool.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/pci.h>
  14. #include <linux/etherdevice.h>
  15. #include <linux/crc32.h>
  16. #include <linux/firmware.h>
  17. #include "bnxt_hsi.h"
  18. #include "bnxt.h"
  19. #include "bnxt_ethtool.h"
  20. #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */
  21. #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */
  22. #define FLASH_NVRAM_TIMEOUT ((HWRM_CMD_TIMEOUT) * 100)
  23. #define FLASH_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
  24. #define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
  25. static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen);
  26. static u32 bnxt_get_msglevel(struct net_device *dev)
  27. {
  28. struct bnxt *bp = netdev_priv(dev);
  29. return bp->msg_enable;
  30. }
  31. static void bnxt_set_msglevel(struct net_device *dev, u32 value)
  32. {
  33. struct bnxt *bp = netdev_priv(dev);
  34. bp->msg_enable = value;
  35. }
  36. static int bnxt_get_coalesce(struct net_device *dev,
  37. struct ethtool_coalesce *coal)
  38. {
  39. struct bnxt *bp = netdev_priv(dev);
  40. memset(coal, 0, sizeof(*coal));
  41. coal->rx_coalesce_usecs = bp->rx_coal_ticks;
  42. /* 2 completion records per rx packet */
  43. coal->rx_max_coalesced_frames = bp->rx_coal_bufs / 2;
  44. coal->rx_coalesce_usecs_irq = bp->rx_coal_ticks_irq;
  45. coal->rx_max_coalesced_frames_irq = bp->rx_coal_bufs_irq / 2;
  46. coal->tx_coalesce_usecs = bp->tx_coal_ticks;
  47. coal->tx_max_coalesced_frames = bp->tx_coal_bufs;
  48. coal->tx_coalesce_usecs_irq = bp->tx_coal_ticks_irq;
  49. coal->tx_max_coalesced_frames_irq = bp->tx_coal_bufs_irq;
  50. coal->stats_block_coalesce_usecs = bp->stats_coal_ticks;
  51. return 0;
  52. }
  53. static int bnxt_set_coalesce(struct net_device *dev,
  54. struct ethtool_coalesce *coal)
  55. {
  56. struct bnxt *bp = netdev_priv(dev);
  57. bool update_stats = false;
  58. int rc = 0;
  59. bp->rx_coal_ticks = coal->rx_coalesce_usecs;
  60. /* 2 completion records per rx packet */
  61. bp->rx_coal_bufs = coal->rx_max_coalesced_frames * 2;
  62. bp->rx_coal_ticks_irq = coal->rx_coalesce_usecs_irq;
  63. bp->rx_coal_bufs_irq = coal->rx_max_coalesced_frames_irq * 2;
  64. bp->tx_coal_ticks = coal->tx_coalesce_usecs;
  65. bp->tx_coal_bufs = coal->tx_max_coalesced_frames;
  66. bp->tx_coal_ticks_irq = coal->tx_coalesce_usecs_irq;
  67. bp->tx_coal_bufs_irq = coal->tx_max_coalesced_frames_irq;
  68. if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) {
  69. u32 stats_ticks = coal->stats_block_coalesce_usecs;
  70. stats_ticks = clamp_t(u32, stats_ticks,
  71. BNXT_MIN_STATS_COAL_TICKS,
  72. BNXT_MAX_STATS_COAL_TICKS);
  73. stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS);
  74. bp->stats_coal_ticks = stats_ticks;
  75. update_stats = true;
  76. }
  77. if (netif_running(dev)) {
  78. if (update_stats) {
  79. rc = bnxt_close_nic(bp, true, false);
  80. if (!rc)
  81. rc = bnxt_open_nic(bp, true, false);
  82. } else {
  83. rc = bnxt_hwrm_set_coal(bp);
  84. }
  85. }
  86. return rc;
  87. }
  88. #define BNXT_NUM_STATS 21
  89. #define BNXT_RX_STATS_ENTRY(counter) \
  90. { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
  91. #define BNXT_TX_STATS_ENTRY(counter) \
  92. { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
  93. static const struct {
  94. long offset;
  95. char string[ETH_GSTRING_LEN];
  96. } bnxt_port_stats_arr[] = {
  97. BNXT_RX_STATS_ENTRY(rx_64b_frames),
  98. BNXT_RX_STATS_ENTRY(rx_65b_127b_frames),
  99. BNXT_RX_STATS_ENTRY(rx_128b_255b_frames),
  100. BNXT_RX_STATS_ENTRY(rx_256b_511b_frames),
  101. BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames),
  102. BNXT_RX_STATS_ENTRY(rx_1024b_1518_frames),
  103. BNXT_RX_STATS_ENTRY(rx_good_vlan_frames),
  104. BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames),
  105. BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames),
  106. BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames),
  107. BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames),
  108. BNXT_RX_STATS_ENTRY(rx_total_frames),
  109. BNXT_RX_STATS_ENTRY(rx_ucast_frames),
  110. BNXT_RX_STATS_ENTRY(rx_mcast_frames),
  111. BNXT_RX_STATS_ENTRY(rx_bcast_frames),
  112. BNXT_RX_STATS_ENTRY(rx_fcs_err_frames),
  113. BNXT_RX_STATS_ENTRY(rx_ctrl_frames),
  114. BNXT_RX_STATS_ENTRY(rx_pause_frames),
  115. BNXT_RX_STATS_ENTRY(rx_pfc_frames),
  116. BNXT_RX_STATS_ENTRY(rx_align_err_frames),
  117. BNXT_RX_STATS_ENTRY(rx_ovrsz_frames),
  118. BNXT_RX_STATS_ENTRY(rx_jbr_frames),
  119. BNXT_RX_STATS_ENTRY(rx_mtu_err_frames),
  120. BNXT_RX_STATS_ENTRY(rx_tagged_frames),
  121. BNXT_RX_STATS_ENTRY(rx_double_tagged_frames),
  122. BNXT_RX_STATS_ENTRY(rx_good_frames),
  123. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0),
  124. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1),
  125. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2),
  126. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3),
  127. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4),
  128. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5),
  129. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6),
  130. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7),
  131. BNXT_RX_STATS_ENTRY(rx_undrsz_frames),
  132. BNXT_RX_STATS_ENTRY(rx_eee_lpi_events),
  133. BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration),
  134. BNXT_RX_STATS_ENTRY(rx_bytes),
  135. BNXT_RX_STATS_ENTRY(rx_runt_bytes),
  136. BNXT_RX_STATS_ENTRY(rx_runt_frames),
  137. BNXT_TX_STATS_ENTRY(tx_64b_frames),
  138. BNXT_TX_STATS_ENTRY(tx_65b_127b_frames),
  139. BNXT_TX_STATS_ENTRY(tx_128b_255b_frames),
  140. BNXT_TX_STATS_ENTRY(tx_256b_511b_frames),
  141. BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames),
  142. BNXT_TX_STATS_ENTRY(tx_1024b_1518_frames),
  143. BNXT_TX_STATS_ENTRY(tx_good_vlan_frames),
  144. BNXT_TX_STATS_ENTRY(tx_1519b_2047_frames),
  145. BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames),
  146. BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames),
  147. BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames),
  148. BNXT_TX_STATS_ENTRY(tx_good_frames),
  149. BNXT_TX_STATS_ENTRY(tx_total_frames),
  150. BNXT_TX_STATS_ENTRY(tx_ucast_frames),
  151. BNXT_TX_STATS_ENTRY(tx_mcast_frames),
  152. BNXT_TX_STATS_ENTRY(tx_bcast_frames),
  153. BNXT_TX_STATS_ENTRY(tx_pause_frames),
  154. BNXT_TX_STATS_ENTRY(tx_pfc_frames),
  155. BNXT_TX_STATS_ENTRY(tx_jabber_frames),
  156. BNXT_TX_STATS_ENTRY(tx_fcs_err_frames),
  157. BNXT_TX_STATS_ENTRY(tx_err),
  158. BNXT_TX_STATS_ENTRY(tx_fifo_underruns),
  159. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0),
  160. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1),
  161. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2),
  162. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3),
  163. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4),
  164. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5),
  165. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6),
  166. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7),
  167. BNXT_TX_STATS_ENTRY(tx_eee_lpi_events),
  168. BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration),
  169. BNXT_TX_STATS_ENTRY(tx_total_collisions),
  170. BNXT_TX_STATS_ENTRY(tx_bytes),
  171. };
  172. #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
  173. static int bnxt_get_sset_count(struct net_device *dev, int sset)
  174. {
  175. struct bnxt *bp = netdev_priv(dev);
  176. switch (sset) {
  177. case ETH_SS_STATS: {
  178. int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
  179. if (bp->flags & BNXT_FLAG_PORT_STATS)
  180. num_stats += BNXT_NUM_PORT_STATS;
  181. return num_stats;
  182. }
  183. default:
  184. return -EOPNOTSUPP;
  185. }
  186. }
  187. static void bnxt_get_ethtool_stats(struct net_device *dev,
  188. struct ethtool_stats *stats, u64 *buf)
  189. {
  190. u32 i, j = 0;
  191. struct bnxt *bp = netdev_priv(dev);
  192. u32 buf_size = sizeof(struct ctx_hw_stats) * bp->cp_nr_rings;
  193. u32 stat_fields = sizeof(struct ctx_hw_stats) / 8;
  194. memset(buf, 0, buf_size);
  195. if (!bp->bnapi)
  196. return;
  197. for (i = 0; i < bp->cp_nr_rings; i++) {
  198. struct bnxt_napi *bnapi = bp->bnapi[i];
  199. struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
  200. __le64 *hw_stats = (__le64 *)cpr->hw_stats;
  201. int k;
  202. for (k = 0; k < stat_fields; j++, k++)
  203. buf[j] = le64_to_cpu(hw_stats[k]);
  204. buf[j++] = cpr->rx_l4_csum_errors;
  205. }
  206. if (bp->flags & BNXT_FLAG_PORT_STATS) {
  207. __le64 *port_stats = (__le64 *)bp->hw_rx_port_stats;
  208. for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) {
  209. buf[j] = le64_to_cpu(*(port_stats +
  210. bnxt_port_stats_arr[i].offset));
  211. }
  212. }
  213. }
  214. static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
  215. {
  216. struct bnxt *bp = netdev_priv(dev);
  217. u32 i;
  218. switch (stringset) {
  219. /* The number of strings must match BNXT_NUM_STATS defined above. */
  220. case ETH_SS_STATS:
  221. for (i = 0; i < bp->cp_nr_rings; i++) {
  222. sprintf(buf, "[%d]: rx_ucast_packets", i);
  223. buf += ETH_GSTRING_LEN;
  224. sprintf(buf, "[%d]: rx_mcast_packets", i);
  225. buf += ETH_GSTRING_LEN;
  226. sprintf(buf, "[%d]: rx_bcast_packets", i);
  227. buf += ETH_GSTRING_LEN;
  228. sprintf(buf, "[%d]: rx_discards", i);
  229. buf += ETH_GSTRING_LEN;
  230. sprintf(buf, "[%d]: rx_drops", i);
  231. buf += ETH_GSTRING_LEN;
  232. sprintf(buf, "[%d]: rx_ucast_bytes", i);
  233. buf += ETH_GSTRING_LEN;
  234. sprintf(buf, "[%d]: rx_mcast_bytes", i);
  235. buf += ETH_GSTRING_LEN;
  236. sprintf(buf, "[%d]: rx_bcast_bytes", i);
  237. buf += ETH_GSTRING_LEN;
  238. sprintf(buf, "[%d]: tx_ucast_packets", i);
  239. buf += ETH_GSTRING_LEN;
  240. sprintf(buf, "[%d]: tx_mcast_packets", i);
  241. buf += ETH_GSTRING_LEN;
  242. sprintf(buf, "[%d]: tx_bcast_packets", i);
  243. buf += ETH_GSTRING_LEN;
  244. sprintf(buf, "[%d]: tx_discards", i);
  245. buf += ETH_GSTRING_LEN;
  246. sprintf(buf, "[%d]: tx_drops", i);
  247. buf += ETH_GSTRING_LEN;
  248. sprintf(buf, "[%d]: tx_ucast_bytes", i);
  249. buf += ETH_GSTRING_LEN;
  250. sprintf(buf, "[%d]: tx_mcast_bytes", i);
  251. buf += ETH_GSTRING_LEN;
  252. sprintf(buf, "[%d]: tx_bcast_bytes", i);
  253. buf += ETH_GSTRING_LEN;
  254. sprintf(buf, "[%d]: tpa_packets", i);
  255. buf += ETH_GSTRING_LEN;
  256. sprintf(buf, "[%d]: tpa_bytes", i);
  257. buf += ETH_GSTRING_LEN;
  258. sprintf(buf, "[%d]: tpa_events", i);
  259. buf += ETH_GSTRING_LEN;
  260. sprintf(buf, "[%d]: tpa_aborts", i);
  261. buf += ETH_GSTRING_LEN;
  262. sprintf(buf, "[%d]: rx_l4_csum_errors", i);
  263. buf += ETH_GSTRING_LEN;
  264. }
  265. if (bp->flags & BNXT_FLAG_PORT_STATS) {
  266. for (i = 0; i < BNXT_NUM_PORT_STATS; i++) {
  267. strcpy(buf, bnxt_port_stats_arr[i].string);
  268. buf += ETH_GSTRING_LEN;
  269. }
  270. }
  271. break;
  272. default:
  273. netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n",
  274. stringset);
  275. break;
  276. }
  277. }
  278. static void bnxt_get_ringparam(struct net_device *dev,
  279. struct ethtool_ringparam *ering)
  280. {
  281. struct bnxt *bp = netdev_priv(dev);
  282. ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT;
  283. ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT;
  284. ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT;
  285. ering->rx_pending = bp->rx_ring_size;
  286. ering->rx_jumbo_pending = bp->rx_agg_ring_size;
  287. ering->tx_pending = bp->tx_ring_size;
  288. }
  289. static int bnxt_set_ringparam(struct net_device *dev,
  290. struct ethtool_ringparam *ering)
  291. {
  292. struct bnxt *bp = netdev_priv(dev);
  293. if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) ||
  294. (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) ||
  295. (ering->tx_pending <= MAX_SKB_FRAGS))
  296. return -EINVAL;
  297. if (netif_running(dev))
  298. bnxt_close_nic(bp, false, false);
  299. bp->rx_ring_size = ering->rx_pending;
  300. bp->tx_ring_size = ering->tx_pending;
  301. bnxt_set_ring_params(bp);
  302. if (netif_running(dev))
  303. return bnxt_open_nic(bp, false, false);
  304. return 0;
  305. }
  306. static void bnxt_get_channels(struct net_device *dev,
  307. struct ethtool_channels *channel)
  308. {
  309. struct bnxt *bp = netdev_priv(dev);
  310. int max_rx_rings, max_tx_rings, tcs;
  311. bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
  312. channel->max_combined = min_t(int, max_rx_rings, max_tx_rings);
  313. if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
  314. max_rx_rings = 0;
  315. max_tx_rings = 0;
  316. }
  317. tcs = netdev_get_num_tc(dev);
  318. if (tcs > 1)
  319. max_tx_rings /= tcs;
  320. channel->max_rx = max_rx_rings;
  321. channel->max_tx = max_tx_rings;
  322. channel->max_other = 0;
  323. if (bp->flags & BNXT_FLAG_SHARED_RINGS) {
  324. channel->combined_count = bp->rx_nr_rings;
  325. if (BNXT_CHIP_TYPE_NITRO_A0(bp))
  326. channel->combined_count--;
  327. } else {
  328. if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) {
  329. channel->rx_count = bp->rx_nr_rings;
  330. channel->tx_count = bp->tx_nr_rings_per_tc;
  331. }
  332. }
  333. }
  334. static int bnxt_set_channels(struct net_device *dev,
  335. struct ethtool_channels *channel)
  336. {
  337. struct bnxt *bp = netdev_priv(dev);
  338. int req_tx_rings, req_rx_rings, tcs;
  339. bool sh = false;
  340. int tx_xdp = 0;
  341. int rc = 0;
  342. if (channel->other_count)
  343. return -EINVAL;
  344. if (!channel->combined_count &&
  345. (!channel->rx_count || !channel->tx_count))
  346. return -EINVAL;
  347. if (channel->combined_count &&
  348. (channel->rx_count || channel->tx_count))
  349. return -EINVAL;
  350. if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count ||
  351. channel->tx_count))
  352. return -EINVAL;
  353. if (channel->combined_count)
  354. sh = true;
  355. tcs = netdev_get_num_tc(dev);
  356. req_tx_rings = sh ? channel->combined_count : channel->tx_count;
  357. req_rx_rings = sh ? channel->combined_count : channel->rx_count;
  358. if (bp->tx_nr_rings_xdp) {
  359. if (!sh) {
  360. netdev_err(dev, "Only combined mode supported when XDP is enabled.\n");
  361. return -EINVAL;
  362. }
  363. tx_xdp = req_rx_rings;
  364. }
  365. rc = bnxt_reserve_rings(bp, req_tx_rings, req_rx_rings, tcs, tx_xdp);
  366. if (rc) {
  367. netdev_warn(dev, "Unable to allocate the requested rings\n");
  368. return rc;
  369. }
  370. if (netif_running(dev)) {
  371. if (BNXT_PF(bp)) {
  372. /* TODO CHIMP_FW: Send message to all VF's
  373. * before PF unload
  374. */
  375. }
  376. rc = bnxt_close_nic(bp, true, false);
  377. if (rc) {
  378. netdev_err(bp->dev, "Set channel failure rc :%x\n",
  379. rc);
  380. return rc;
  381. }
  382. }
  383. if (sh) {
  384. bp->flags |= BNXT_FLAG_SHARED_RINGS;
  385. bp->rx_nr_rings = channel->combined_count;
  386. bp->tx_nr_rings_per_tc = channel->combined_count;
  387. } else {
  388. bp->flags &= ~BNXT_FLAG_SHARED_RINGS;
  389. bp->rx_nr_rings = channel->rx_count;
  390. bp->tx_nr_rings_per_tc = channel->tx_count;
  391. }
  392. bp->tx_nr_rings_xdp = tx_xdp;
  393. bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp;
  394. if (tcs > 1)
  395. bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp;
  396. bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) :
  397. bp->tx_nr_rings + bp->rx_nr_rings;
  398. bp->num_stat_ctxs = bp->cp_nr_rings;
  399. /* After changing number of rx channels, update NTUPLE feature. */
  400. netdev_update_features(dev);
  401. if (netif_running(dev)) {
  402. rc = bnxt_open_nic(bp, true, false);
  403. if ((!rc) && BNXT_PF(bp)) {
  404. /* TODO CHIMP_FW: Send message to all VF's
  405. * to renable
  406. */
  407. }
  408. }
  409. return rc;
  410. }
  411. #ifdef CONFIG_RFS_ACCEL
  412. static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd,
  413. u32 *rule_locs)
  414. {
  415. int i, j = 0;
  416. cmd->data = bp->ntp_fltr_count;
  417. for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
  418. struct hlist_head *head;
  419. struct bnxt_ntuple_filter *fltr;
  420. head = &bp->ntp_fltr_hash_tbl[i];
  421. rcu_read_lock();
  422. hlist_for_each_entry_rcu(fltr, head, hash) {
  423. if (j == cmd->rule_cnt)
  424. break;
  425. rule_locs[j++] = fltr->sw_id;
  426. }
  427. rcu_read_unlock();
  428. if (j == cmd->rule_cnt)
  429. break;
  430. }
  431. cmd->rule_cnt = j;
  432. return 0;
  433. }
  434. static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)
  435. {
  436. struct ethtool_rx_flow_spec *fs =
  437. (struct ethtool_rx_flow_spec *)&cmd->fs;
  438. struct bnxt_ntuple_filter *fltr;
  439. struct flow_keys *fkeys;
  440. int i, rc = -EINVAL;
  441. if (fs->location < 0 || fs->location >= BNXT_NTP_FLTR_MAX_FLTR)
  442. return rc;
  443. for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
  444. struct hlist_head *head;
  445. head = &bp->ntp_fltr_hash_tbl[i];
  446. rcu_read_lock();
  447. hlist_for_each_entry_rcu(fltr, head, hash) {
  448. if (fltr->sw_id == fs->location)
  449. goto fltr_found;
  450. }
  451. rcu_read_unlock();
  452. }
  453. return rc;
  454. fltr_found:
  455. fkeys = &fltr->fkeys;
  456. if (fkeys->basic.n_proto == htons(ETH_P_IP)) {
  457. if (fkeys->basic.ip_proto == IPPROTO_TCP)
  458. fs->flow_type = TCP_V4_FLOW;
  459. else if (fkeys->basic.ip_proto == IPPROTO_UDP)
  460. fs->flow_type = UDP_V4_FLOW;
  461. else
  462. goto fltr_err;
  463. fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src;
  464. fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0);
  465. fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst;
  466. fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0);
  467. fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src;
  468. fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0);
  469. fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst;
  470. fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0);
  471. } else {
  472. int i;
  473. if (fkeys->basic.ip_proto == IPPROTO_TCP)
  474. fs->flow_type = TCP_V6_FLOW;
  475. else if (fkeys->basic.ip_proto == IPPROTO_UDP)
  476. fs->flow_type = UDP_V6_FLOW;
  477. else
  478. goto fltr_err;
  479. *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] =
  480. fkeys->addrs.v6addrs.src;
  481. *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] =
  482. fkeys->addrs.v6addrs.dst;
  483. for (i = 0; i < 4; i++) {
  484. fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0);
  485. fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0);
  486. }
  487. fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src;
  488. fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0);
  489. fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst;
  490. fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0);
  491. }
  492. fs->ring_cookie = fltr->rxq;
  493. rc = 0;
  494. fltr_err:
  495. rcu_read_unlock();
  496. return rc;
  497. }
  498. #endif
  499. static u64 get_ethtool_ipv4_rss(struct bnxt *bp)
  500. {
  501. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4)
  502. return RXH_IP_SRC | RXH_IP_DST;
  503. return 0;
  504. }
  505. static u64 get_ethtool_ipv6_rss(struct bnxt *bp)
  506. {
  507. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6)
  508. return RXH_IP_SRC | RXH_IP_DST;
  509. return 0;
  510. }
  511. static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
  512. {
  513. cmd->data = 0;
  514. switch (cmd->flow_type) {
  515. case TCP_V4_FLOW:
  516. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4)
  517. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  518. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  519. cmd->data |= get_ethtool_ipv4_rss(bp);
  520. break;
  521. case UDP_V4_FLOW:
  522. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
  523. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  524. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  525. /* fall through */
  526. case SCTP_V4_FLOW:
  527. case AH_ESP_V4_FLOW:
  528. case AH_V4_FLOW:
  529. case ESP_V4_FLOW:
  530. case IPV4_FLOW:
  531. cmd->data |= get_ethtool_ipv4_rss(bp);
  532. break;
  533. case TCP_V6_FLOW:
  534. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6)
  535. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  536. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  537. cmd->data |= get_ethtool_ipv6_rss(bp);
  538. break;
  539. case UDP_V6_FLOW:
  540. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
  541. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  542. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  543. /* fall through */
  544. case SCTP_V6_FLOW:
  545. case AH_ESP_V6_FLOW:
  546. case AH_V6_FLOW:
  547. case ESP_V6_FLOW:
  548. case IPV6_FLOW:
  549. cmd->data |= get_ethtool_ipv6_rss(bp);
  550. break;
  551. }
  552. return 0;
  553. }
  554. #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)
  555. #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST)
  556. static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
  557. {
  558. u32 rss_hash_cfg = bp->rss_hash_cfg;
  559. int tuple, rc = 0;
  560. if (cmd->data == RXH_4TUPLE)
  561. tuple = 4;
  562. else if (cmd->data == RXH_2TUPLE)
  563. tuple = 2;
  564. else if (!cmd->data)
  565. tuple = 0;
  566. else
  567. return -EINVAL;
  568. if (cmd->flow_type == TCP_V4_FLOW) {
  569. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
  570. if (tuple == 4)
  571. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
  572. } else if (cmd->flow_type == UDP_V4_FLOW) {
  573. if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
  574. return -EINVAL;
  575. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
  576. if (tuple == 4)
  577. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
  578. } else if (cmd->flow_type == TCP_V6_FLOW) {
  579. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
  580. if (tuple == 4)
  581. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
  582. } else if (cmd->flow_type == UDP_V6_FLOW) {
  583. if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
  584. return -EINVAL;
  585. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
  586. if (tuple == 4)
  587. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
  588. } else if (tuple == 4) {
  589. return -EINVAL;
  590. }
  591. switch (cmd->flow_type) {
  592. case TCP_V4_FLOW:
  593. case UDP_V4_FLOW:
  594. case SCTP_V4_FLOW:
  595. case AH_ESP_V4_FLOW:
  596. case AH_V4_FLOW:
  597. case ESP_V4_FLOW:
  598. case IPV4_FLOW:
  599. if (tuple == 2)
  600. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
  601. else if (!tuple)
  602. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
  603. break;
  604. case TCP_V6_FLOW:
  605. case UDP_V6_FLOW:
  606. case SCTP_V6_FLOW:
  607. case AH_ESP_V6_FLOW:
  608. case AH_V6_FLOW:
  609. case ESP_V6_FLOW:
  610. case IPV6_FLOW:
  611. if (tuple == 2)
  612. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
  613. else if (!tuple)
  614. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
  615. break;
  616. }
  617. if (bp->rss_hash_cfg == rss_hash_cfg)
  618. return 0;
  619. bp->rss_hash_cfg = rss_hash_cfg;
  620. if (netif_running(bp->dev)) {
  621. bnxt_close_nic(bp, false, false);
  622. rc = bnxt_open_nic(bp, false, false);
  623. }
  624. return rc;
  625. }
  626. static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
  627. u32 *rule_locs)
  628. {
  629. struct bnxt *bp = netdev_priv(dev);
  630. int rc = 0;
  631. switch (cmd->cmd) {
  632. #ifdef CONFIG_RFS_ACCEL
  633. case ETHTOOL_GRXRINGS:
  634. cmd->data = bp->rx_nr_rings;
  635. break;
  636. case ETHTOOL_GRXCLSRLCNT:
  637. cmd->rule_cnt = bp->ntp_fltr_count;
  638. cmd->data = BNXT_NTP_FLTR_MAX_FLTR;
  639. break;
  640. case ETHTOOL_GRXCLSRLALL:
  641. rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs);
  642. break;
  643. case ETHTOOL_GRXCLSRULE:
  644. rc = bnxt_grxclsrule(bp, cmd);
  645. break;
  646. #endif
  647. case ETHTOOL_GRXFH:
  648. rc = bnxt_grxfh(bp, cmd);
  649. break;
  650. default:
  651. rc = -EOPNOTSUPP;
  652. break;
  653. }
  654. return rc;
  655. }
  656. static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
  657. {
  658. struct bnxt *bp = netdev_priv(dev);
  659. int rc;
  660. switch (cmd->cmd) {
  661. case ETHTOOL_SRXFH:
  662. rc = bnxt_srxfh(bp, cmd);
  663. break;
  664. default:
  665. rc = -EOPNOTSUPP;
  666. break;
  667. }
  668. return rc;
  669. }
  670. static u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
  671. {
  672. return HW_HASH_INDEX_SIZE;
  673. }
  674. static u32 bnxt_get_rxfh_key_size(struct net_device *dev)
  675. {
  676. return HW_HASH_KEY_SIZE;
  677. }
  678. static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
  679. u8 *hfunc)
  680. {
  681. struct bnxt *bp = netdev_priv(dev);
  682. struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
  683. int i = 0;
  684. if (hfunc)
  685. *hfunc = ETH_RSS_HASH_TOP;
  686. if (indir)
  687. for (i = 0; i < HW_HASH_INDEX_SIZE; i++)
  688. indir[i] = le16_to_cpu(vnic->rss_table[i]);
  689. if (key)
  690. memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE);
  691. return 0;
  692. }
  693. static void bnxt_get_drvinfo(struct net_device *dev,
  694. struct ethtool_drvinfo *info)
  695. {
  696. struct bnxt *bp = netdev_priv(dev);
  697. char *pkglog;
  698. char *pkgver = NULL;
  699. pkglog = kmalloc(BNX_PKG_LOG_MAX_LENGTH, GFP_KERNEL);
  700. if (pkglog)
  701. pkgver = bnxt_get_pkgver(dev, pkglog, BNX_PKG_LOG_MAX_LENGTH);
  702. strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
  703. strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
  704. if (pkgver && *pkgver != 0 && isdigit(*pkgver))
  705. snprintf(info->fw_version, sizeof(info->fw_version) - 1,
  706. "%s pkg %s", bp->fw_ver_str, pkgver);
  707. else
  708. strlcpy(info->fw_version, bp->fw_ver_str,
  709. sizeof(info->fw_version));
  710. strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
  711. info->n_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
  712. info->testinfo_len = BNXT_NUM_TESTS(bp);
  713. /* TODO CHIMP_FW: eeprom dump details */
  714. info->eedump_len = 0;
  715. /* TODO CHIMP FW: reg dump details */
  716. info->regdump_len = 0;
  717. kfree(pkglog);
  718. }
  719. u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause)
  720. {
  721. u32 speed_mask = 0;
  722. /* TODO: support 25GB, 40GB, 50GB with different cable type */
  723. /* set the advertised speeds */
  724. if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB)
  725. speed_mask |= ADVERTISED_100baseT_Full;
  726. if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB)
  727. speed_mask |= ADVERTISED_1000baseT_Full;
  728. if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB)
  729. speed_mask |= ADVERTISED_2500baseX_Full;
  730. if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB)
  731. speed_mask |= ADVERTISED_10000baseT_Full;
  732. if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB)
  733. speed_mask |= ADVERTISED_40000baseCR4_Full;
  734. if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH)
  735. speed_mask |= ADVERTISED_Pause;
  736. else if (fw_pause & BNXT_LINK_PAUSE_TX)
  737. speed_mask |= ADVERTISED_Asym_Pause;
  738. else if (fw_pause & BNXT_LINK_PAUSE_RX)
  739. speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
  740. return speed_mask;
  741. }
  742. #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\
  743. { \
  744. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \
  745. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  746. 100baseT_Full); \
  747. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \
  748. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  749. 1000baseT_Full); \
  750. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \
  751. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  752. 10000baseT_Full); \
  753. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \
  754. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  755. 25000baseCR_Full); \
  756. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \
  757. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  758. 40000baseCR4_Full);\
  759. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \
  760. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  761. 50000baseCR2_Full);\
  762. if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \
  763. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  764. Pause); \
  765. if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \
  766. ethtool_link_ksettings_add_link_mode( \
  767. lk_ksettings, name, Asym_Pause);\
  768. } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \
  769. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  770. Asym_Pause); \
  771. } \
  772. }
  773. #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \
  774. { \
  775. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  776. 100baseT_Full) || \
  777. ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  778. 100baseT_Half)) \
  779. (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \
  780. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  781. 1000baseT_Full) || \
  782. ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  783. 1000baseT_Half)) \
  784. (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \
  785. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  786. 10000baseT_Full)) \
  787. (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \
  788. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  789. 25000baseCR_Full)) \
  790. (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \
  791. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  792. 40000baseCR4_Full)) \
  793. (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \
  794. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  795. 50000baseCR2_Full)) \
  796. (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \
  797. }
  798. static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info,
  799. struct ethtool_link_ksettings *lk_ksettings)
  800. {
  801. u16 fw_speeds = link_info->advertising;
  802. u8 fw_pause = 0;
  803. if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
  804. fw_pause = link_info->auto_pause_setting;
  805. BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising);
  806. }
  807. static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info,
  808. struct ethtool_link_ksettings *lk_ksettings)
  809. {
  810. u16 fw_speeds = link_info->lp_auto_link_speeds;
  811. u8 fw_pause = 0;
  812. if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
  813. fw_pause = link_info->lp_pause;
  814. BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings,
  815. lp_advertising);
  816. }
  817. static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info,
  818. struct ethtool_link_ksettings *lk_ksettings)
  819. {
  820. u16 fw_speeds = link_info->support_speeds;
  821. BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported);
  822. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause);
  823. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  824. Asym_Pause);
  825. if (link_info->support_auto_speeds)
  826. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  827. Autoneg);
  828. }
  829. u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
  830. {
  831. switch (fw_link_speed) {
  832. case BNXT_LINK_SPEED_100MB:
  833. return SPEED_100;
  834. case BNXT_LINK_SPEED_1GB:
  835. return SPEED_1000;
  836. case BNXT_LINK_SPEED_2_5GB:
  837. return SPEED_2500;
  838. case BNXT_LINK_SPEED_10GB:
  839. return SPEED_10000;
  840. case BNXT_LINK_SPEED_20GB:
  841. return SPEED_20000;
  842. case BNXT_LINK_SPEED_25GB:
  843. return SPEED_25000;
  844. case BNXT_LINK_SPEED_40GB:
  845. return SPEED_40000;
  846. case BNXT_LINK_SPEED_50GB:
  847. return SPEED_50000;
  848. default:
  849. return SPEED_UNKNOWN;
  850. }
  851. }
  852. static int bnxt_get_link_ksettings(struct net_device *dev,
  853. struct ethtool_link_ksettings *lk_ksettings)
  854. {
  855. struct bnxt *bp = netdev_priv(dev);
  856. struct bnxt_link_info *link_info = &bp->link_info;
  857. struct ethtool_link_settings *base = &lk_ksettings->base;
  858. u32 ethtool_speed;
  859. ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported);
  860. bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings);
  861. ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising);
  862. if (link_info->autoneg) {
  863. bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings);
  864. ethtool_link_ksettings_add_link_mode(lk_ksettings,
  865. advertising, Autoneg);
  866. base->autoneg = AUTONEG_ENABLE;
  867. if (link_info->phy_link_status == BNXT_LINK_LINK)
  868. bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings);
  869. ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
  870. if (!netif_carrier_ok(dev))
  871. base->duplex = DUPLEX_UNKNOWN;
  872. else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
  873. base->duplex = DUPLEX_FULL;
  874. else
  875. base->duplex = DUPLEX_HALF;
  876. } else {
  877. base->autoneg = AUTONEG_DISABLE;
  878. ethtool_speed =
  879. bnxt_fw_to_ethtool_speed(link_info->req_link_speed);
  880. base->duplex = DUPLEX_HALF;
  881. if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL)
  882. base->duplex = DUPLEX_FULL;
  883. }
  884. base->speed = ethtool_speed;
  885. base->port = PORT_NONE;
  886. if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
  887. base->port = PORT_TP;
  888. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  889. TP);
  890. ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
  891. TP);
  892. } else {
  893. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  894. FIBRE);
  895. ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
  896. FIBRE);
  897. if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC)
  898. base->port = PORT_DA;
  899. else if (link_info->media_type ==
  900. PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE)
  901. base->port = PORT_FIBRE;
  902. }
  903. base->phy_address = link_info->phy_addr;
  904. return 0;
  905. }
  906. static u32 bnxt_get_fw_speed(struct net_device *dev, u16 ethtool_speed)
  907. {
  908. struct bnxt *bp = netdev_priv(dev);
  909. struct bnxt_link_info *link_info = &bp->link_info;
  910. u16 support_spds = link_info->support_speeds;
  911. u32 fw_speed = 0;
  912. switch (ethtool_speed) {
  913. case SPEED_100:
  914. if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
  915. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB;
  916. break;
  917. case SPEED_1000:
  918. if (support_spds & BNXT_LINK_SPEED_MSK_1GB)
  919. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB;
  920. break;
  921. case SPEED_2500:
  922. if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
  923. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB;
  924. break;
  925. case SPEED_10000:
  926. if (support_spds & BNXT_LINK_SPEED_MSK_10GB)
  927. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB;
  928. break;
  929. case SPEED_20000:
  930. if (support_spds & BNXT_LINK_SPEED_MSK_20GB)
  931. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB;
  932. break;
  933. case SPEED_25000:
  934. if (support_spds & BNXT_LINK_SPEED_MSK_25GB)
  935. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB;
  936. break;
  937. case SPEED_40000:
  938. if (support_spds & BNXT_LINK_SPEED_MSK_40GB)
  939. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB;
  940. break;
  941. case SPEED_50000:
  942. if (support_spds & BNXT_LINK_SPEED_MSK_50GB)
  943. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB;
  944. break;
  945. default:
  946. netdev_err(dev, "unsupported speed!\n");
  947. break;
  948. }
  949. return fw_speed;
  950. }
  951. u16 bnxt_get_fw_auto_link_speeds(u32 advertising)
  952. {
  953. u16 fw_speed_mask = 0;
  954. /* only support autoneg at speed 100, 1000, and 10000 */
  955. if (advertising & (ADVERTISED_100baseT_Full |
  956. ADVERTISED_100baseT_Half)) {
  957. fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB;
  958. }
  959. if (advertising & (ADVERTISED_1000baseT_Full |
  960. ADVERTISED_1000baseT_Half)) {
  961. fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB;
  962. }
  963. if (advertising & ADVERTISED_10000baseT_Full)
  964. fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB;
  965. if (advertising & ADVERTISED_40000baseCR4_Full)
  966. fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB;
  967. return fw_speed_mask;
  968. }
  969. static int bnxt_set_link_ksettings(struct net_device *dev,
  970. const struct ethtool_link_ksettings *lk_ksettings)
  971. {
  972. struct bnxt *bp = netdev_priv(dev);
  973. struct bnxt_link_info *link_info = &bp->link_info;
  974. const struct ethtool_link_settings *base = &lk_ksettings->base;
  975. bool set_pause = false;
  976. u16 fw_advertising = 0;
  977. u32 speed;
  978. int rc = 0;
  979. if (!BNXT_SINGLE_PF(bp))
  980. return -EOPNOTSUPP;
  981. if (base->autoneg == AUTONEG_ENABLE) {
  982. BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings,
  983. advertising);
  984. link_info->autoneg |= BNXT_AUTONEG_SPEED;
  985. if (!fw_advertising)
  986. link_info->advertising = link_info->support_auto_speeds;
  987. else
  988. link_info->advertising = fw_advertising;
  989. /* any change to autoneg will cause link change, therefore the
  990. * driver should put back the original pause setting in autoneg
  991. */
  992. set_pause = true;
  993. } else {
  994. u16 fw_speed;
  995. u8 phy_type = link_info->phy_type;
  996. if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET ||
  997. phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ||
  998. link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
  999. netdev_err(dev, "10GBase-T devices must autoneg\n");
  1000. rc = -EINVAL;
  1001. goto set_setting_exit;
  1002. }
  1003. if (base->duplex == DUPLEX_HALF) {
  1004. netdev_err(dev, "HALF DUPLEX is not supported!\n");
  1005. rc = -EINVAL;
  1006. goto set_setting_exit;
  1007. }
  1008. speed = base->speed;
  1009. fw_speed = bnxt_get_fw_speed(dev, speed);
  1010. if (!fw_speed) {
  1011. rc = -EINVAL;
  1012. goto set_setting_exit;
  1013. }
  1014. link_info->req_link_speed = fw_speed;
  1015. link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
  1016. link_info->autoneg = 0;
  1017. link_info->advertising = 0;
  1018. }
  1019. if (netif_running(dev))
  1020. rc = bnxt_hwrm_set_link_setting(bp, set_pause, false);
  1021. set_setting_exit:
  1022. return rc;
  1023. }
  1024. static void bnxt_get_pauseparam(struct net_device *dev,
  1025. struct ethtool_pauseparam *epause)
  1026. {
  1027. struct bnxt *bp = netdev_priv(dev);
  1028. struct bnxt_link_info *link_info = &bp->link_info;
  1029. if (BNXT_VF(bp))
  1030. return;
  1031. epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL);
  1032. epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX);
  1033. epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
  1034. }
  1035. static int bnxt_set_pauseparam(struct net_device *dev,
  1036. struct ethtool_pauseparam *epause)
  1037. {
  1038. int rc = 0;
  1039. struct bnxt *bp = netdev_priv(dev);
  1040. struct bnxt_link_info *link_info = &bp->link_info;
  1041. if (!BNXT_SINGLE_PF(bp))
  1042. return -EOPNOTSUPP;
  1043. if (epause->autoneg) {
  1044. if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
  1045. return -EINVAL;
  1046. link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
  1047. if (bp->hwrm_spec_code >= 0x10201)
  1048. link_info->req_flow_ctrl =
  1049. PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE;
  1050. } else {
  1051. /* when transition from auto pause to force pause,
  1052. * force a link change
  1053. */
  1054. if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
  1055. link_info->force_link_chng = true;
  1056. link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL;
  1057. link_info->req_flow_ctrl = 0;
  1058. }
  1059. if (epause->rx_pause)
  1060. link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX;
  1061. if (epause->tx_pause)
  1062. link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
  1063. if (netif_running(dev))
  1064. rc = bnxt_hwrm_set_pause(bp);
  1065. return rc;
  1066. }
  1067. static u32 bnxt_get_link(struct net_device *dev)
  1068. {
  1069. struct bnxt *bp = netdev_priv(dev);
  1070. /* TODO: handle MF, VF, driver close case */
  1071. return bp->link_info.link_up;
  1072. }
  1073. static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
  1074. u16 ext, u16 *index, u32 *item_length,
  1075. u32 *data_length);
  1076. static int bnxt_flash_nvram(struct net_device *dev,
  1077. u16 dir_type,
  1078. u16 dir_ordinal,
  1079. u16 dir_ext,
  1080. u16 dir_attr,
  1081. const u8 *data,
  1082. size_t data_len)
  1083. {
  1084. struct bnxt *bp = netdev_priv(dev);
  1085. int rc;
  1086. struct hwrm_nvm_write_input req = {0};
  1087. dma_addr_t dma_handle;
  1088. u8 *kmem;
  1089. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1);
  1090. req.dir_type = cpu_to_le16(dir_type);
  1091. req.dir_ordinal = cpu_to_le16(dir_ordinal);
  1092. req.dir_ext = cpu_to_le16(dir_ext);
  1093. req.dir_attr = cpu_to_le16(dir_attr);
  1094. req.dir_data_length = cpu_to_le32(data_len);
  1095. kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle,
  1096. GFP_KERNEL);
  1097. if (!kmem) {
  1098. netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
  1099. (unsigned)data_len);
  1100. return -ENOMEM;
  1101. }
  1102. memcpy(kmem, data, data_len);
  1103. req.host_src_addr = cpu_to_le64(dma_handle);
  1104. rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT);
  1105. dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle);
  1106. return rc;
  1107. }
  1108. static int bnxt_firmware_reset(struct net_device *dev,
  1109. u16 dir_type)
  1110. {
  1111. struct bnxt *bp = netdev_priv(dev);
  1112. struct hwrm_fw_reset_input req = {0};
  1113. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1);
  1114. /* TODO: Support ASAP ChiMP self-reset (e.g. upon PF driver unload) */
  1115. /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
  1116. /* (e.g. when firmware isn't already running) */
  1117. switch (dir_type) {
  1118. case BNX_DIR_TYPE_CHIMP_PATCH:
  1119. case BNX_DIR_TYPE_BOOTCODE:
  1120. case BNX_DIR_TYPE_BOOTCODE_2:
  1121. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
  1122. /* Self-reset ChiMP upon next PCIe reset: */
  1123. req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
  1124. break;
  1125. case BNX_DIR_TYPE_APE_FW:
  1126. case BNX_DIR_TYPE_APE_PATCH:
  1127. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
  1128. /* Self-reset APE upon next PCIe reset: */
  1129. req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
  1130. break;
  1131. case BNX_DIR_TYPE_KONG_FW:
  1132. case BNX_DIR_TYPE_KONG_PATCH:
  1133. req.embedded_proc_type =
  1134. FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
  1135. break;
  1136. case BNX_DIR_TYPE_BONO_FW:
  1137. case BNX_DIR_TYPE_BONO_PATCH:
  1138. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
  1139. break;
  1140. default:
  1141. return -EINVAL;
  1142. }
  1143. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1144. }
  1145. static int bnxt_flash_firmware(struct net_device *dev,
  1146. u16 dir_type,
  1147. const u8 *fw_data,
  1148. size_t fw_size)
  1149. {
  1150. int rc = 0;
  1151. u16 code_type;
  1152. u32 stored_crc;
  1153. u32 calculated_crc;
  1154. struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data;
  1155. switch (dir_type) {
  1156. case BNX_DIR_TYPE_BOOTCODE:
  1157. case BNX_DIR_TYPE_BOOTCODE_2:
  1158. code_type = CODE_BOOT;
  1159. break;
  1160. case BNX_DIR_TYPE_CHIMP_PATCH:
  1161. code_type = CODE_CHIMP_PATCH;
  1162. break;
  1163. case BNX_DIR_TYPE_APE_FW:
  1164. code_type = CODE_MCTP_PASSTHRU;
  1165. break;
  1166. case BNX_DIR_TYPE_APE_PATCH:
  1167. code_type = CODE_APE_PATCH;
  1168. break;
  1169. case BNX_DIR_TYPE_KONG_FW:
  1170. code_type = CODE_KONG_FW;
  1171. break;
  1172. case BNX_DIR_TYPE_KONG_PATCH:
  1173. code_type = CODE_KONG_PATCH;
  1174. break;
  1175. case BNX_DIR_TYPE_BONO_FW:
  1176. code_type = CODE_BONO_FW;
  1177. break;
  1178. case BNX_DIR_TYPE_BONO_PATCH:
  1179. code_type = CODE_BONO_PATCH;
  1180. break;
  1181. default:
  1182. netdev_err(dev, "Unsupported directory entry type: %u\n",
  1183. dir_type);
  1184. return -EINVAL;
  1185. }
  1186. if (fw_size < sizeof(struct bnxt_fw_header)) {
  1187. netdev_err(dev, "Invalid firmware file size: %u\n",
  1188. (unsigned int)fw_size);
  1189. return -EINVAL;
  1190. }
  1191. if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) {
  1192. netdev_err(dev, "Invalid firmware signature: %08X\n",
  1193. le32_to_cpu(header->signature));
  1194. return -EINVAL;
  1195. }
  1196. if (header->code_type != code_type) {
  1197. netdev_err(dev, "Expected firmware type: %d, read: %d\n",
  1198. code_type, header->code_type);
  1199. return -EINVAL;
  1200. }
  1201. if (header->device != DEVICE_CUMULUS_FAMILY) {
  1202. netdev_err(dev, "Expected firmware device family %d, read: %d\n",
  1203. DEVICE_CUMULUS_FAMILY, header->device);
  1204. return -EINVAL;
  1205. }
  1206. /* Confirm the CRC32 checksum of the file: */
  1207. stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
  1208. sizeof(stored_crc)));
  1209. calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
  1210. if (calculated_crc != stored_crc) {
  1211. netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
  1212. (unsigned long)stored_crc,
  1213. (unsigned long)calculated_crc);
  1214. return -EINVAL;
  1215. }
  1216. rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
  1217. 0, 0, fw_data, fw_size);
  1218. if (rc == 0) /* Firmware update successful */
  1219. rc = bnxt_firmware_reset(dev, dir_type);
  1220. return rc;
  1221. }
  1222. static int bnxt_flash_microcode(struct net_device *dev,
  1223. u16 dir_type,
  1224. const u8 *fw_data,
  1225. size_t fw_size)
  1226. {
  1227. struct bnxt_ucode_trailer *trailer;
  1228. u32 calculated_crc;
  1229. u32 stored_crc;
  1230. int rc = 0;
  1231. if (fw_size < sizeof(struct bnxt_ucode_trailer)) {
  1232. netdev_err(dev, "Invalid microcode file size: %u\n",
  1233. (unsigned int)fw_size);
  1234. return -EINVAL;
  1235. }
  1236. trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size -
  1237. sizeof(*trailer)));
  1238. if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) {
  1239. netdev_err(dev, "Invalid microcode trailer signature: %08X\n",
  1240. le32_to_cpu(trailer->sig));
  1241. return -EINVAL;
  1242. }
  1243. if (le16_to_cpu(trailer->dir_type) != dir_type) {
  1244. netdev_err(dev, "Expected microcode type: %d, read: %d\n",
  1245. dir_type, le16_to_cpu(trailer->dir_type));
  1246. return -EINVAL;
  1247. }
  1248. if (le16_to_cpu(trailer->trailer_length) <
  1249. sizeof(struct bnxt_ucode_trailer)) {
  1250. netdev_err(dev, "Invalid microcode trailer length: %d\n",
  1251. le16_to_cpu(trailer->trailer_length));
  1252. return -EINVAL;
  1253. }
  1254. /* Confirm the CRC32 checksum of the file: */
  1255. stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
  1256. sizeof(stored_crc)));
  1257. calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
  1258. if (calculated_crc != stored_crc) {
  1259. netdev_err(dev,
  1260. "CRC32 (%08lX) does not match calculated: %08lX\n",
  1261. (unsigned long)stored_crc,
  1262. (unsigned long)calculated_crc);
  1263. return -EINVAL;
  1264. }
  1265. rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
  1266. 0, 0, fw_data, fw_size);
  1267. return rc;
  1268. }
  1269. static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type)
  1270. {
  1271. switch (dir_type) {
  1272. case BNX_DIR_TYPE_CHIMP_PATCH:
  1273. case BNX_DIR_TYPE_BOOTCODE:
  1274. case BNX_DIR_TYPE_BOOTCODE_2:
  1275. case BNX_DIR_TYPE_APE_FW:
  1276. case BNX_DIR_TYPE_APE_PATCH:
  1277. case BNX_DIR_TYPE_KONG_FW:
  1278. case BNX_DIR_TYPE_KONG_PATCH:
  1279. case BNX_DIR_TYPE_BONO_FW:
  1280. case BNX_DIR_TYPE_BONO_PATCH:
  1281. return true;
  1282. }
  1283. return false;
  1284. }
  1285. static bool bnxt_dir_type_is_other_exec_format(u16 dir_type)
  1286. {
  1287. switch (dir_type) {
  1288. case BNX_DIR_TYPE_AVS:
  1289. case BNX_DIR_TYPE_EXP_ROM_MBA:
  1290. case BNX_DIR_TYPE_PCIE:
  1291. case BNX_DIR_TYPE_TSCF_UCODE:
  1292. case BNX_DIR_TYPE_EXT_PHY:
  1293. case BNX_DIR_TYPE_CCM:
  1294. case BNX_DIR_TYPE_ISCSI_BOOT:
  1295. case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
  1296. case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
  1297. return true;
  1298. }
  1299. return false;
  1300. }
  1301. static bool bnxt_dir_type_is_executable(u16 dir_type)
  1302. {
  1303. return bnxt_dir_type_is_ape_bin_format(dir_type) ||
  1304. bnxt_dir_type_is_other_exec_format(dir_type);
  1305. }
  1306. static int bnxt_flash_firmware_from_file(struct net_device *dev,
  1307. u16 dir_type,
  1308. const char *filename)
  1309. {
  1310. const struct firmware *fw;
  1311. int rc;
  1312. rc = request_firmware(&fw, filename, &dev->dev);
  1313. if (rc != 0) {
  1314. netdev_err(dev, "Error %d requesting firmware file: %s\n",
  1315. rc, filename);
  1316. return rc;
  1317. }
  1318. if (bnxt_dir_type_is_ape_bin_format(dir_type) == true)
  1319. rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
  1320. else if (bnxt_dir_type_is_other_exec_format(dir_type) == true)
  1321. rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
  1322. else
  1323. rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
  1324. 0, 0, fw->data, fw->size);
  1325. release_firmware(fw);
  1326. return rc;
  1327. }
  1328. static int bnxt_flash_package_from_file(struct net_device *dev,
  1329. char *filename, u32 install_type)
  1330. {
  1331. struct bnxt *bp = netdev_priv(dev);
  1332. struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr;
  1333. struct hwrm_nvm_install_update_input install = {0};
  1334. const struct firmware *fw;
  1335. u32 item_len;
  1336. u16 index;
  1337. int rc;
  1338. bnxt_hwrm_fw_set_time(bp);
  1339. if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
  1340. BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
  1341. &index, &item_len, NULL) != 0) {
  1342. netdev_err(dev, "PKG update area not created in nvram\n");
  1343. return -ENOBUFS;
  1344. }
  1345. rc = request_firmware(&fw, filename, &dev->dev);
  1346. if (rc != 0) {
  1347. netdev_err(dev, "PKG error %d requesting file: %s\n",
  1348. rc, filename);
  1349. return rc;
  1350. }
  1351. if (fw->size > item_len) {
  1352. netdev_err(dev, "PKG insufficient update area in nvram: %lu",
  1353. (unsigned long)fw->size);
  1354. rc = -EFBIG;
  1355. } else {
  1356. dma_addr_t dma_handle;
  1357. u8 *kmem;
  1358. struct hwrm_nvm_modify_input modify = {0};
  1359. bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1);
  1360. modify.dir_idx = cpu_to_le16(index);
  1361. modify.len = cpu_to_le32(fw->size);
  1362. kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size,
  1363. &dma_handle, GFP_KERNEL);
  1364. if (!kmem) {
  1365. netdev_err(dev,
  1366. "dma_alloc_coherent failure, length = %u\n",
  1367. (unsigned int)fw->size);
  1368. rc = -ENOMEM;
  1369. } else {
  1370. memcpy(kmem, fw->data, fw->size);
  1371. modify.host_src_addr = cpu_to_le64(dma_handle);
  1372. rc = hwrm_send_message(bp, &modify, sizeof(modify),
  1373. FLASH_PACKAGE_TIMEOUT);
  1374. dma_free_coherent(&bp->pdev->dev, fw->size, kmem,
  1375. dma_handle);
  1376. }
  1377. }
  1378. release_firmware(fw);
  1379. if (rc)
  1380. return rc;
  1381. if ((install_type & 0xffff) == 0)
  1382. install_type >>= 16;
  1383. bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1);
  1384. install.install_type = cpu_to_le32(install_type);
  1385. mutex_lock(&bp->hwrm_cmd_lock);
  1386. rc = _hwrm_send_message(bp, &install, sizeof(install),
  1387. INSTALL_PACKAGE_TIMEOUT);
  1388. if (rc) {
  1389. rc = -EOPNOTSUPP;
  1390. goto flash_pkg_exit;
  1391. }
  1392. if (resp->error_code) {
  1393. u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err;
  1394. if (error_code == NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) {
  1395. install.flags |= cpu_to_le16(
  1396. NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG);
  1397. rc = _hwrm_send_message(bp, &install, sizeof(install),
  1398. INSTALL_PACKAGE_TIMEOUT);
  1399. if (rc) {
  1400. rc = -EOPNOTSUPP;
  1401. goto flash_pkg_exit;
  1402. }
  1403. }
  1404. }
  1405. if (resp->result) {
  1406. netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
  1407. (s8)resp->result, (int)resp->problem_item);
  1408. rc = -ENOPKG;
  1409. }
  1410. flash_pkg_exit:
  1411. mutex_unlock(&bp->hwrm_cmd_lock);
  1412. return rc;
  1413. }
  1414. static int bnxt_flash_device(struct net_device *dev,
  1415. struct ethtool_flash *flash)
  1416. {
  1417. if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) {
  1418. netdev_err(dev, "flashdev not supported from a virtual function\n");
  1419. return -EINVAL;
  1420. }
  1421. if (flash->region == ETHTOOL_FLASH_ALL_REGIONS ||
  1422. flash->region > 0xffff)
  1423. return bnxt_flash_package_from_file(dev, flash->data,
  1424. flash->region);
  1425. return bnxt_flash_firmware_from_file(dev, flash->region, flash->data);
  1426. }
  1427. static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
  1428. {
  1429. struct bnxt *bp = netdev_priv(dev);
  1430. int rc;
  1431. struct hwrm_nvm_get_dir_info_input req = {0};
  1432. struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr;
  1433. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1);
  1434. mutex_lock(&bp->hwrm_cmd_lock);
  1435. rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1436. if (!rc) {
  1437. *entries = le32_to_cpu(output->entries);
  1438. *length = le32_to_cpu(output->entry_length);
  1439. }
  1440. mutex_unlock(&bp->hwrm_cmd_lock);
  1441. return rc;
  1442. }
  1443. static int bnxt_get_eeprom_len(struct net_device *dev)
  1444. {
  1445. /* The -1 return value allows the entire 32-bit range of offsets to be
  1446. * passed via the ethtool command-line utility.
  1447. */
  1448. return -1;
  1449. }
  1450. static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
  1451. {
  1452. struct bnxt *bp = netdev_priv(dev);
  1453. int rc;
  1454. u32 dir_entries;
  1455. u32 entry_length;
  1456. u8 *buf;
  1457. size_t buflen;
  1458. dma_addr_t dma_handle;
  1459. struct hwrm_nvm_get_dir_entries_input req = {0};
  1460. rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
  1461. if (rc != 0)
  1462. return rc;
  1463. /* Insert 2 bytes of directory info (count and size of entries) */
  1464. if (len < 2)
  1465. return -EINVAL;
  1466. *data++ = dir_entries;
  1467. *data++ = entry_length;
  1468. len -= 2;
  1469. memset(data, 0xff, len);
  1470. buflen = dir_entries * entry_length;
  1471. buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle,
  1472. GFP_KERNEL);
  1473. if (!buf) {
  1474. netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
  1475. (unsigned)buflen);
  1476. return -ENOMEM;
  1477. }
  1478. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1);
  1479. req.host_dest_addr = cpu_to_le64(dma_handle);
  1480. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1481. if (rc == 0)
  1482. memcpy(data, buf, len > buflen ? buflen : len);
  1483. dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle);
  1484. return rc;
  1485. }
  1486. static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
  1487. u32 length, u8 *data)
  1488. {
  1489. struct bnxt *bp = netdev_priv(dev);
  1490. int rc;
  1491. u8 *buf;
  1492. dma_addr_t dma_handle;
  1493. struct hwrm_nvm_read_input req = {0};
  1494. buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle,
  1495. GFP_KERNEL);
  1496. if (!buf) {
  1497. netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
  1498. (unsigned)length);
  1499. return -ENOMEM;
  1500. }
  1501. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1);
  1502. req.host_dest_addr = cpu_to_le64(dma_handle);
  1503. req.dir_idx = cpu_to_le16(index);
  1504. req.offset = cpu_to_le32(offset);
  1505. req.len = cpu_to_le32(length);
  1506. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1507. if (rc == 0)
  1508. memcpy(data, buf, length);
  1509. dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle);
  1510. return rc;
  1511. }
  1512. static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
  1513. u16 ext, u16 *index, u32 *item_length,
  1514. u32 *data_length)
  1515. {
  1516. struct bnxt *bp = netdev_priv(dev);
  1517. int rc;
  1518. struct hwrm_nvm_find_dir_entry_input req = {0};
  1519. struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr;
  1520. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1);
  1521. req.enables = 0;
  1522. req.dir_idx = 0;
  1523. req.dir_type = cpu_to_le16(type);
  1524. req.dir_ordinal = cpu_to_le16(ordinal);
  1525. req.dir_ext = cpu_to_le16(ext);
  1526. req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
  1527. rc = hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1528. if (rc == 0) {
  1529. if (index)
  1530. *index = le16_to_cpu(output->dir_idx);
  1531. if (item_length)
  1532. *item_length = le32_to_cpu(output->dir_item_length);
  1533. if (data_length)
  1534. *data_length = le32_to_cpu(output->dir_data_length);
  1535. }
  1536. return rc;
  1537. }
  1538. static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen)
  1539. {
  1540. char *retval = NULL;
  1541. char *p;
  1542. char *value;
  1543. int field = 0;
  1544. if (datalen < 1)
  1545. return NULL;
  1546. /* null-terminate the log data (removing last '\n'): */
  1547. data[datalen - 1] = 0;
  1548. for (p = data; *p != 0; p++) {
  1549. field = 0;
  1550. retval = NULL;
  1551. while (*p != 0 && *p != '\n') {
  1552. value = p;
  1553. while (*p != 0 && *p != '\t' && *p != '\n')
  1554. p++;
  1555. if (field == desired_field)
  1556. retval = value;
  1557. if (*p != '\t')
  1558. break;
  1559. *p = 0;
  1560. field++;
  1561. p++;
  1562. }
  1563. if (*p == 0)
  1564. break;
  1565. *p = 0;
  1566. }
  1567. return retval;
  1568. }
  1569. static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen)
  1570. {
  1571. u16 index = 0;
  1572. u32 datalen;
  1573. if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG,
  1574. BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
  1575. &index, NULL, &datalen) != 0)
  1576. return NULL;
  1577. memset(buf, 0, buflen);
  1578. if (bnxt_get_nvram_item(dev, index, 0, datalen, buf) != 0)
  1579. return NULL;
  1580. return bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, buf,
  1581. datalen);
  1582. }
  1583. static int bnxt_get_eeprom(struct net_device *dev,
  1584. struct ethtool_eeprom *eeprom,
  1585. u8 *data)
  1586. {
  1587. u32 index;
  1588. u32 offset;
  1589. if (eeprom->offset == 0) /* special offset value to get directory */
  1590. return bnxt_get_nvram_directory(dev, eeprom->len, data);
  1591. index = eeprom->offset >> 24;
  1592. offset = eeprom->offset & 0xffffff;
  1593. if (index == 0) {
  1594. netdev_err(dev, "unsupported index value: %d\n", index);
  1595. return -EINVAL;
  1596. }
  1597. return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data);
  1598. }
  1599. static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
  1600. {
  1601. struct bnxt *bp = netdev_priv(dev);
  1602. struct hwrm_nvm_erase_dir_entry_input req = {0};
  1603. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1);
  1604. req.dir_idx = cpu_to_le16(index);
  1605. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1606. }
  1607. static int bnxt_set_eeprom(struct net_device *dev,
  1608. struct ethtool_eeprom *eeprom,
  1609. u8 *data)
  1610. {
  1611. struct bnxt *bp = netdev_priv(dev);
  1612. u8 index, dir_op;
  1613. u16 type, ext, ordinal, attr;
  1614. if (!BNXT_PF(bp)) {
  1615. netdev_err(dev, "NVM write not supported from a virtual function\n");
  1616. return -EINVAL;
  1617. }
  1618. type = eeprom->magic >> 16;
  1619. if (type == 0xffff) { /* special value for directory operations */
  1620. index = eeprom->magic & 0xff;
  1621. dir_op = eeprom->magic >> 8;
  1622. if (index == 0)
  1623. return -EINVAL;
  1624. switch (dir_op) {
  1625. case 0x0e: /* erase */
  1626. if (eeprom->offset != ~eeprom->magic)
  1627. return -EINVAL;
  1628. return bnxt_erase_nvram_directory(dev, index - 1);
  1629. default:
  1630. return -EINVAL;
  1631. }
  1632. }
  1633. /* Create or re-write an NVM item: */
  1634. if (bnxt_dir_type_is_executable(type) == true)
  1635. return -EOPNOTSUPP;
  1636. ext = eeprom->magic & 0xffff;
  1637. ordinal = eeprom->offset >> 16;
  1638. attr = eeprom->offset & 0xffff;
  1639. return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data,
  1640. eeprom->len);
  1641. }
  1642. static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata)
  1643. {
  1644. struct bnxt *bp = netdev_priv(dev);
  1645. struct ethtool_eee *eee = &bp->eee;
  1646. struct bnxt_link_info *link_info = &bp->link_info;
  1647. u32 advertising =
  1648. _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0);
  1649. int rc = 0;
  1650. if (!BNXT_SINGLE_PF(bp))
  1651. return -EOPNOTSUPP;
  1652. if (!(bp->flags & BNXT_FLAG_EEE_CAP))
  1653. return -EOPNOTSUPP;
  1654. if (!edata->eee_enabled)
  1655. goto eee_ok;
  1656. if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
  1657. netdev_warn(dev, "EEE requires autoneg\n");
  1658. return -EINVAL;
  1659. }
  1660. if (edata->tx_lpi_enabled) {
  1661. if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi ||
  1662. edata->tx_lpi_timer < bp->lpi_tmr_lo)) {
  1663. netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n",
  1664. bp->lpi_tmr_lo, bp->lpi_tmr_hi);
  1665. return -EINVAL;
  1666. } else if (!bp->lpi_tmr_hi) {
  1667. edata->tx_lpi_timer = eee->tx_lpi_timer;
  1668. }
  1669. }
  1670. if (!edata->advertised) {
  1671. edata->advertised = advertising & eee->supported;
  1672. } else if (edata->advertised & ~advertising) {
  1673. netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
  1674. edata->advertised, advertising);
  1675. return -EINVAL;
  1676. }
  1677. eee->advertised = edata->advertised;
  1678. eee->tx_lpi_enabled = edata->tx_lpi_enabled;
  1679. eee->tx_lpi_timer = edata->tx_lpi_timer;
  1680. eee_ok:
  1681. eee->eee_enabled = edata->eee_enabled;
  1682. if (netif_running(dev))
  1683. rc = bnxt_hwrm_set_link_setting(bp, false, true);
  1684. return rc;
  1685. }
  1686. static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata)
  1687. {
  1688. struct bnxt *bp = netdev_priv(dev);
  1689. if (!(bp->flags & BNXT_FLAG_EEE_CAP))
  1690. return -EOPNOTSUPP;
  1691. *edata = bp->eee;
  1692. if (!bp->eee.eee_enabled) {
  1693. /* Preserve tx_lpi_timer so that the last value will be used
  1694. * by default when it is re-enabled.
  1695. */
  1696. edata->advertised = 0;
  1697. edata->tx_lpi_enabled = 0;
  1698. }
  1699. if (!bp->eee.eee_active)
  1700. edata->lp_advertised = 0;
  1701. return 0;
  1702. }
  1703. static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
  1704. u16 page_number, u16 start_addr,
  1705. u16 data_length, u8 *buf)
  1706. {
  1707. struct hwrm_port_phy_i2c_read_input req = {0};
  1708. struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
  1709. int rc, byte_offset = 0;
  1710. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
  1711. req.i2c_slave_addr = i2c_addr;
  1712. req.page_number = cpu_to_le16(page_number);
  1713. req.port_id = cpu_to_le16(bp->pf.port_id);
  1714. do {
  1715. u16 xfer_size;
  1716. xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
  1717. data_length -= xfer_size;
  1718. req.page_offset = cpu_to_le16(start_addr + byte_offset);
  1719. req.data_length = xfer_size;
  1720. req.enables = cpu_to_le32(start_addr + byte_offset ?
  1721. PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0);
  1722. mutex_lock(&bp->hwrm_cmd_lock);
  1723. rc = _hwrm_send_message(bp, &req, sizeof(req),
  1724. HWRM_CMD_TIMEOUT);
  1725. if (!rc)
  1726. memcpy(buf + byte_offset, output->data, xfer_size);
  1727. mutex_unlock(&bp->hwrm_cmd_lock);
  1728. byte_offset += xfer_size;
  1729. } while (!rc && data_length > 0);
  1730. return rc;
  1731. }
  1732. static int bnxt_get_module_info(struct net_device *dev,
  1733. struct ethtool_modinfo *modinfo)
  1734. {
  1735. struct bnxt *bp = netdev_priv(dev);
  1736. struct hwrm_port_phy_i2c_read_input req = {0};
  1737. struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
  1738. int rc;
  1739. /* No point in going further if phy status indicates
  1740. * module is not inserted or if it is powered down or
  1741. * if it is of type 10GBase-T
  1742. */
  1743. if (bp->link_info.module_status >
  1744. PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
  1745. return -EOPNOTSUPP;
  1746. /* This feature is not supported in older firmware versions */
  1747. if (bp->hwrm_spec_code < 0x10202)
  1748. return -EOPNOTSUPP;
  1749. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
  1750. req.i2c_slave_addr = I2C_DEV_ADDR_A0;
  1751. req.page_number = 0;
  1752. req.page_offset = cpu_to_le16(SFP_EEPROM_SFF_8472_COMP_ADDR);
  1753. req.data_length = SFP_EEPROM_SFF_8472_COMP_SIZE;
  1754. req.port_id = cpu_to_le16(bp->pf.port_id);
  1755. mutex_lock(&bp->hwrm_cmd_lock);
  1756. rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1757. if (!rc) {
  1758. u32 module_id = le32_to_cpu(output->data[0]);
  1759. switch (module_id) {
  1760. case SFF_MODULE_ID_SFP:
  1761. modinfo->type = ETH_MODULE_SFF_8472;
  1762. modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
  1763. break;
  1764. case SFF_MODULE_ID_QSFP:
  1765. case SFF_MODULE_ID_QSFP_PLUS:
  1766. modinfo->type = ETH_MODULE_SFF_8436;
  1767. modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
  1768. break;
  1769. case SFF_MODULE_ID_QSFP28:
  1770. modinfo->type = ETH_MODULE_SFF_8636;
  1771. modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
  1772. break;
  1773. default:
  1774. rc = -EOPNOTSUPP;
  1775. break;
  1776. }
  1777. }
  1778. mutex_unlock(&bp->hwrm_cmd_lock);
  1779. return rc;
  1780. }
  1781. static int bnxt_get_module_eeprom(struct net_device *dev,
  1782. struct ethtool_eeprom *eeprom,
  1783. u8 *data)
  1784. {
  1785. struct bnxt *bp = netdev_priv(dev);
  1786. u16 start = eeprom->offset, length = eeprom->len;
  1787. int rc = 0;
  1788. memset(data, 0, eeprom->len);
  1789. /* Read A0 portion of the EEPROM */
  1790. if (start < ETH_MODULE_SFF_8436_LEN) {
  1791. if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN)
  1792. length = ETH_MODULE_SFF_8436_LEN - start;
  1793. rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0,
  1794. start, length, data);
  1795. if (rc)
  1796. return rc;
  1797. start += length;
  1798. data += length;
  1799. length = eeprom->len - length;
  1800. }
  1801. /* Read A2 portion of the EEPROM */
  1802. if (length) {
  1803. start -= ETH_MODULE_SFF_8436_LEN;
  1804. bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1, start,
  1805. length, data);
  1806. }
  1807. return rc;
  1808. }
  1809. static int bnxt_nway_reset(struct net_device *dev)
  1810. {
  1811. int rc = 0;
  1812. struct bnxt *bp = netdev_priv(dev);
  1813. struct bnxt_link_info *link_info = &bp->link_info;
  1814. if (!BNXT_SINGLE_PF(bp))
  1815. return -EOPNOTSUPP;
  1816. if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
  1817. return -EINVAL;
  1818. if (netif_running(dev))
  1819. rc = bnxt_hwrm_set_link_setting(bp, true, false);
  1820. return rc;
  1821. }
  1822. static int bnxt_set_phys_id(struct net_device *dev,
  1823. enum ethtool_phys_id_state state)
  1824. {
  1825. struct hwrm_port_led_cfg_input req = {0};
  1826. struct bnxt *bp = netdev_priv(dev);
  1827. struct bnxt_pf_info *pf = &bp->pf;
  1828. struct bnxt_led_cfg *led_cfg;
  1829. u8 led_state;
  1830. __le16 duration;
  1831. int i, rc;
  1832. if (!bp->num_leds || BNXT_VF(bp))
  1833. return -EOPNOTSUPP;
  1834. if (state == ETHTOOL_ID_ACTIVE) {
  1835. led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT;
  1836. duration = cpu_to_le16(500);
  1837. } else if (state == ETHTOOL_ID_INACTIVE) {
  1838. led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT;
  1839. duration = cpu_to_le16(0);
  1840. } else {
  1841. return -EINVAL;
  1842. }
  1843. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1);
  1844. req.port_id = cpu_to_le16(pf->port_id);
  1845. req.num_leds = bp->num_leds;
  1846. led_cfg = (struct bnxt_led_cfg *)&req.led0_id;
  1847. for (i = 0; i < bp->num_leds; i++, led_cfg++) {
  1848. req.enables |= BNXT_LED_DFLT_ENABLES(i);
  1849. led_cfg->led_id = bp->leds[i].led_id;
  1850. led_cfg->led_state = led_state;
  1851. led_cfg->led_blink_on = duration;
  1852. led_cfg->led_blink_off = duration;
  1853. led_cfg->led_group_id = bp->leds[i].led_group_id;
  1854. }
  1855. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1856. if (rc)
  1857. rc = -EIO;
  1858. return rc;
  1859. }
  1860. const struct ethtool_ops bnxt_ethtool_ops = {
  1861. .get_link_ksettings = bnxt_get_link_ksettings,
  1862. .set_link_ksettings = bnxt_set_link_ksettings,
  1863. .get_pauseparam = bnxt_get_pauseparam,
  1864. .set_pauseparam = bnxt_set_pauseparam,
  1865. .get_drvinfo = bnxt_get_drvinfo,
  1866. .get_coalesce = bnxt_get_coalesce,
  1867. .set_coalesce = bnxt_set_coalesce,
  1868. .get_msglevel = bnxt_get_msglevel,
  1869. .set_msglevel = bnxt_set_msglevel,
  1870. .get_sset_count = bnxt_get_sset_count,
  1871. .get_strings = bnxt_get_strings,
  1872. .get_ethtool_stats = bnxt_get_ethtool_stats,
  1873. .set_ringparam = bnxt_set_ringparam,
  1874. .get_ringparam = bnxt_get_ringparam,
  1875. .get_channels = bnxt_get_channels,
  1876. .set_channels = bnxt_set_channels,
  1877. .get_rxnfc = bnxt_get_rxnfc,
  1878. .set_rxnfc = bnxt_set_rxnfc,
  1879. .get_rxfh_indir_size = bnxt_get_rxfh_indir_size,
  1880. .get_rxfh_key_size = bnxt_get_rxfh_key_size,
  1881. .get_rxfh = bnxt_get_rxfh,
  1882. .flash_device = bnxt_flash_device,
  1883. .get_eeprom_len = bnxt_get_eeprom_len,
  1884. .get_eeprom = bnxt_get_eeprom,
  1885. .set_eeprom = bnxt_set_eeprom,
  1886. .get_link = bnxt_get_link,
  1887. .get_eee = bnxt_get_eee,
  1888. .set_eee = bnxt_set_eee,
  1889. .get_module_info = bnxt_get_module_info,
  1890. .get_module_eeprom = bnxt_get_module_eeprom,
  1891. .nway_reset = bnxt_nway_reset,
  1892. .set_phys_id = bnxt_set_phys_id,
  1893. };