xgene_enet_sgmac.h 1.7 KB

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  1. /* Applied Micro X-Gene SoC Ethernet Driver
  2. *
  3. * Copyright (c) 2014, Applied Micro Circuits Corporation
  4. * Authors: Iyappan Subramanian <isubramanian@apm.com>
  5. * Keyur Chudgar <kchudgar@apm.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the
  9. * Free Software Foundation; either version 2 of the License, or (at your
  10. * option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  19. */
  20. #ifndef __XGENE_ENET_SGMAC_H__
  21. #define __XGENE_ENET_SGMAC_H__
  22. #define PHY_ADDR(src) (((src)<<8) & GENMASK(12, 8))
  23. #define REG_ADDR(src) ((src) & GENMASK(4, 0))
  24. #define PHY_CONTROL(src) ((src) & GENMASK(15, 0))
  25. #define LINK_SPEED(src) (((src) & GENMASK(11, 10)) >> 10)
  26. #define INT_PHY_ADDR 0x1e
  27. #define SGMII_TBI_CONTROL_ADDR 0x44
  28. #define SGMII_CONTROL_ADDR 0x00
  29. #define SGMII_STATUS_ADDR 0x04
  30. #define SGMII_BASE_PAGE_ABILITY_ADDR 0x14
  31. #define AUTO_NEG_COMPLETE BIT(5)
  32. #define LINK_STATUS BIT(2)
  33. #define LINK_UP BIT(15)
  34. #define MPA_IDLE_WITH_QMI_EMPTY BIT(12)
  35. #define SG_RX_DV_GATE_REG_0_ADDR 0x05fc
  36. #define SGMII_EN 0x1
  37. enum xgene_phy_speed {
  38. PHY_SPEED_10,
  39. PHY_SPEED_100,
  40. PHY_SPEED_1000
  41. };
  42. extern const struct xgene_mac_ops xgene_sgmac_ops;
  43. extern const struct xgene_port_ops xgene_sgport_ops;
  44. #endif /* __XGENE_ENET_SGMAC_H__ */