atmel-ebi.c 20 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792
  1. /*
  2. * EBI driver for Atmel chips
  3. * inspired by the fsl weim bus driver
  4. *
  5. * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/clk.h>
  12. #include <linux/io.h>
  13. #include <linux/mfd/syscon.h>
  14. #include <linux/mfd/syscon/atmel-matrix.h>
  15. #include <linux/mfd/syscon/atmel-smc.h>
  16. #include <linux/init.h>
  17. #include <linux/of_device.h>
  18. #include <linux/regmap.h>
  19. struct at91sam9_smc_timings {
  20. u32 ncs_rd_setup_ns;
  21. u32 nrd_setup_ns;
  22. u32 ncs_wr_setup_ns;
  23. u32 nwe_setup_ns;
  24. u32 ncs_rd_pulse_ns;
  25. u32 nrd_pulse_ns;
  26. u32 ncs_wr_pulse_ns;
  27. u32 nwe_pulse_ns;
  28. u32 nrd_cycle_ns;
  29. u32 nwe_cycle_ns;
  30. u32 tdf_ns;
  31. };
  32. struct at91sam9_smc_generic_fields {
  33. struct regmap_field *setup;
  34. struct regmap_field *pulse;
  35. struct regmap_field *cycle;
  36. struct regmap_field *mode;
  37. };
  38. struct at91sam9_ebi_dev_config {
  39. struct at91sam9_smc_timings timings;
  40. u32 mode;
  41. };
  42. struct at91_ebi_dev_config {
  43. int cs;
  44. union {
  45. struct at91sam9_ebi_dev_config sam9;
  46. };
  47. };
  48. struct at91_ebi;
  49. struct at91_ebi_dev {
  50. struct list_head node;
  51. struct at91_ebi *ebi;
  52. u32 mode;
  53. int numcs;
  54. struct at91_ebi_dev_config configs[];
  55. };
  56. struct at91_ebi_caps {
  57. unsigned int available_cs;
  58. const struct reg_field *ebi_csa;
  59. void (*get_config)(struct at91_ebi_dev *ebid,
  60. struct at91_ebi_dev_config *conf);
  61. int (*xlate_config)(struct at91_ebi_dev *ebid,
  62. struct device_node *configs_np,
  63. struct at91_ebi_dev_config *conf);
  64. int (*apply_config)(struct at91_ebi_dev *ebid,
  65. struct at91_ebi_dev_config *conf);
  66. int (*init)(struct at91_ebi *ebi);
  67. };
  68. struct at91_ebi {
  69. struct clk *clk;
  70. struct regmap *matrix;
  71. struct {
  72. struct regmap *regmap;
  73. struct clk *clk;
  74. } smc;
  75. struct regmap_field *ebi_csa;
  76. struct device *dev;
  77. const struct at91_ebi_caps *caps;
  78. struct list_head devs;
  79. union {
  80. struct at91sam9_smc_generic_fields sam9;
  81. };
  82. };
  83. static void at91sam9_ebi_get_config(struct at91_ebi_dev *ebid,
  84. struct at91_ebi_dev_config *conf)
  85. {
  86. struct at91sam9_smc_generic_fields *fields = &ebid->ebi->sam9;
  87. unsigned int clk_period = NSEC_PER_SEC / clk_get_rate(ebid->ebi->clk);
  88. struct at91sam9_ebi_dev_config *config = &conf->sam9;
  89. struct at91sam9_smc_timings *timings = &config->timings;
  90. unsigned int val;
  91. regmap_fields_read(fields->mode, conf->cs, &val);
  92. config->mode = val & ~AT91_SMC_TDF;
  93. val = (val & AT91_SMC_TDF) >> 16;
  94. timings->tdf_ns = clk_period * val;
  95. regmap_fields_read(fields->setup, conf->cs, &val);
  96. timings->ncs_rd_setup_ns = (val >> 24) & 0x1f;
  97. timings->ncs_rd_setup_ns += ((val >> 29) & 0x1) * 128;
  98. timings->ncs_rd_setup_ns *= clk_period;
  99. timings->nrd_setup_ns = (val >> 16) & 0x1f;
  100. timings->nrd_setup_ns += ((val >> 21) & 0x1) * 128;
  101. timings->nrd_setup_ns *= clk_period;
  102. timings->ncs_wr_setup_ns = (val >> 8) & 0x1f;
  103. timings->ncs_wr_setup_ns += ((val >> 13) & 0x1) * 128;
  104. timings->ncs_wr_setup_ns *= clk_period;
  105. timings->nwe_setup_ns = val & 0x1f;
  106. timings->nwe_setup_ns += ((val >> 5) & 0x1) * 128;
  107. timings->nwe_setup_ns *= clk_period;
  108. regmap_fields_read(fields->pulse, conf->cs, &val);
  109. timings->ncs_rd_pulse_ns = (val >> 24) & 0x3f;
  110. timings->ncs_rd_pulse_ns += ((val >> 30) & 0x1) * 256;
  111. timings->ncs_rd_pulse_ns *= clk_period;
  112. timings->nrd_pulse_ns = (val >> 16) & 0x3f;
  113. timings->nrd_pulse_ns += ((val >> 22) & 0x1) * 256;
  114. timings->nrd_pulse_ns *= clk_period;
  115. timings->ncs_wr_pulse_ns = (val >> 8) & 0x3f;
  116. timings->ncs_wr_pulse_ns += ((val >> 14) & 0x1) * 256;
  117. timings->ncs_wr_pulse_ns *= clk_period;
  118. timings->nwe_pulse_ns = val & 0x3f;
  119. timings->nwe_pulse_ns += ((val >> 6) & 0x1) * 256;
  120. timings->nwe_pulse_ns *= clk_period;
  121. regmap_fields_read(fields->cycle, conf->cs, &val);
  122. timings->nrd_cycle_ns = (val >> 16) & 0x7f;
  123. timings->nrd_cycle_ns += ((val >> 23) & 0x3) * 256;
  124. timings->nrd_cycle_ns *= clk_period;
  125. timings->nwe_cycle_ns = val & 0x7f;
  126. timings->nwe_cycle_ns += ((val >> 7) & 0x3) * 256;
  127. timings->nwe_cycle_ns *= clk_period;
  128. }
  129. static int at91_xlate_timing(struct device_node *np, const char *prop,
  130. u32 *val, bool *required)
  131. {
  132. if (!of_property_read_u32(np, prop, val)) {
  133. *required = true;
  134. return 0;
  135. }
  136. if (*required)
  137. return -EINVAL;
  138. return 0;
  139. }
  140. static int at91sam9_smc_xslate_timings(struct at91_ebi_dev *ebid,
  141. struct device_node *np,
  142. struct at91sam9_smc_timings *timings,
  143. bool *required)
  144. {
  145. int ret;
  146. ret = at91_xlate_timing(np, "atmel,smc-ncs-rd-setup-ns",
  147. &timings->ncs_rd_setup_ns, required);
  148. if (ret)
  149. goto out;
  150. ret = at91_xlate_timing(np, "atmel,smc-nrd-setup-ns",
  151. &timings->nrd_setup_ns, required);
  152. if (ret)
  153. goto out;
  154. ret = at91_xlate_timing(np, "atmel,smc-ncs-wr-setup-ns",
  155. &timings->ncs_wr_setup_ns, required);
  156. if (ret)
  157. goto out;
  158. ret = at91_xlate_timing(np, "atmel,smc-nwe-setup-ns",
  159. &timings->nwe_setup_ns, required);
  160. if (ret)
  161. goto out;
  162. ret = at91_xlate_timing(np, "atmel,smc-ncs-rd-pulse-ns",
  163. &timings->ncs_rd_pulse_ns, required);
  164. if (ret)
  165. goto out;
  166. ret = at91_xlate_timing(np, "atmel,smc-nrd-pulse-ns",
  167. &timings->nrd_pulse_ns, required);
  168. if (ret)
  169. goto out;
  170. ret = at91_xlate_timing(np, "atmel,smc-ncs-wr-pulse-ns",
  171. &timings->ncs_wr_pulse_ns, required);
  172. if (ret)
  173. goto out;
  174. ret = at91_xlate_timing(np, "atmel,smc-nwe-pulse-ns",
  175. &timings->nwe_pulse_ns, required);
  176. if (ret)
  177. goto out;
  178. ret = at91_xlate_timing(np, "atmel,smc-nwe-cycle-ns",
  179. &timings->nwe_cycle_ns, required);
  180. if (ret)
  181. goto out;
  182. ret = at91_xlate_timing(np, "atmel,smc-nrd-cycle-ns",
  183. &timings->nrd_cycle_ns, required);
  184. if (ret)
  185. goto out;
  186. ret = at91_xlate_timing(np, "atmel,smc-tdf-ns",
  187. &timings->tdf_ns, required);
  188. out:
  189. if (ret)
  190. dev_err(ebid->ebi->dev,
  191. "missing or invalid timings definition in %s",
  192. np->full_name);
  193. return ret;
  194. }
  195. static int at91sam9_ebi_xslate_config(struct at91_ebi_dev *ebid,
  196. struct device_node *np,
  197. struct at91_ebi_dev_config *conf)
  198. {
  199. struct at91sam9_ebi_dev_config *config = &conf->sam9;
  200. bool required = false;
  201. const char *tmp_str;
  202. u32 tmp;
  203. int ret;
  204. ret = of_property_read_u32(np, "atmel,smc-bus-width", &tmp);
  205. if (!ret) {
  206. switch (tmp) {
  207. case 8:
  208. config->mode |= AT91_SMC_DBW_8;
  209. break;
  210. case 16:
  211. config->mode |= AT91_SMC_DBW_16;
  212. break;
  213. case 32:
  214. config->mode |= AT91_SMC_DBW_32;
  215. break;
  216. default:
  217. return -EINVAL;
  218. }
  219. required = true;
  220. }
  221. if (of_property_read_bool(np, "atmel,smc-tdf-optimized")) {
  222. config->mode |= AT91_SMC_TDFMODE_OPTIMIZED;
  223. required = true;
  224. }
  225. tmp_str = NULL;
  226. of_property_read_string(np, "atmel,smc-byte-access-type", &tmp_str);
  227. if (tmp_str && !strcmp(tmp_str, "write")) {
  228. config->mode |= AT91_SMC_BAT_WRITE;
  229. required = true;
  230. }
  231. tmp_str = NULL;
  232. of_property_read_string(np, "atmel,smc-read-mode", &tmp_str);
  233. if (tmp_str && !strcmp(tmp_str, "nrd")) {
  234. config->mode |= AT91_SMC_READMODE_NRD;
  235. required = true;
  236. }
  237. tmp_str = NULL;
  238. of_property_read_string(np, "atmel,smc-write-mode", &tmp_str);
  239. if (tmp_str && !strcmp(tmp_str, "nwe")) {
  240. config->mode |= AT91_SMC_WRITEMODE_NWE;
  241. required = true;
  242. }
  243. tmp_str = NULL;
  244. of_property_read_string(np, "atmel,smc-exnw-mode", &tmp_str);
  245. if (tmp_str) {
  246. if (!strcmp(tmp_str, "frozen"))
  247. config->mode |= AT91_SMC_EXNWMODE_FROZEN;
  248. else if (!strcmp(tmp_str, "ready"))
  249. config->mode |= AT91_SMC_EXNWMODE_READY;
  250. else if (strcmp(tmp_str, "disabled"))
  251. return -EINVAL;
  252. required = true;
  253. }
  254. ret = of_property_read_u32(np, "atmel,smc-page-mode", &tmp);
  255. if (!ret) {
  256. switch (tmp) {
  257. case 4:
  258. config->mode |= AT91_SMC_PS_4;
  259. break;
  260. case 8:
  261. config->mode |= AT91_SMC_PS_8;
  262. break;
  263. case 16:
  264. config->mode |= AT91_SMC_PS_16;
  265. break;
  266. case 32:
  267. config->mode |= AT91_SMC_PS_32;
  268. break;
  269. default:
  270. return -EINVAL;
  271. }
  272. config->mode |= AT91_SMC_PMEN;
  273. required = true;
  274. }
  275. ret = at91sam9_smc_xslate_timings(ebid, np, &config->timings,
  276. &required);
  277. if (ret)
  278. return ret;
  279. return required;
  280. }
  281. static int at91sam9_ebi_apply_config(struct at91_ebi_dev *ebid,
  282. struct at91_ebi_dev_config *conf)
  283. {
  284. unsigned int clk_rate = clk_get_rate(ebid->ebi->clk);
  285. unsigned int clk_period = NSEC_PER_SEC / clk_rate;
  286. struct at91sam9_ebi_dev_config *config = &conf->sam9;
  287. struct at91sam9_smc_timings *timings = &config->timings;
  288. struct at91sam9_smc_generic_fields *fields = &ebid->ebi->sam9;
  289. u32 coded_val;
  290. u32 val;
  291. coded_val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
  292. timings->ncs_rd_setup_ns);
  293. val = AT91SAM9_SMC_NCS_NRDSETUP(coded_val);
  294. coded_val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
  295. timings->nrd_setup_ns);
  296. val |= AT91SAM9_SMC_NRDSETUP(coded_val);
  297. coded_val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
  298. timings->ncs_wr_setup_ns);
  299. val |= AT91SAM9_SMC_NCS_WRSETUP(coded_val);
  300. coded_val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
  301. timings->nwe_setup_ns);
  302. val |= AT91SAM9_SMC_NWESETUP(coded_val);
  303. regmap_fields_write(fields->setup, conf->cs, val);
  304. coded_val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
  305. timings->ncs_rd_pulse_ns);
  306. val = AT91SAM9_SMC_NCS_NRDPULSE(coded_val);
  307. coded_val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
  308. timings->nrd_pulse_ns);
  309. val |= AT91SAM9_SMC_NRDPULSE(coded_val);
  310. coded_val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
  311. timings->ncs_wr_pulse_ns);
  312. val |= AT91SAM9_SMC_NCS_WRPULSE(coded_val);
  313. coded_val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
  314. timings->nwe_pulse_ns);
  315. val |= AT91SAM9_SMC_NWEPULSE(coded_val);
  316. regmap_fields_write(fields->pulse, conf->cs, val);
  317. coded_val = at91sam9_smc_cycle_ns_to_cycles(clk_rate,
  318. timings->nrd_cycle_ns);
  319. val = AT91SAM9_SMC_NRDCYCLE(coded_val);
  320. coded_val = at91sam9_smc_cycle_ns_to_cycles(clk_rate,
  321. timings->nwe_cycle_ns);
  322. val |= AT91SAM9_SMC_NWECYCLE(coded_val);
  323. regmap_fields_write(fields->cycle, conf->cs, val);
  324. val = DIV_ROUND_UP(timings->tdf_ns, clk_period);
  325. if (val > AT91_SMC_TDF_MAX)
  326. val = AT91_SMC_TDF_MAX;
  327. regmap_fields_write(fields->mode, conf->cs,
  328. config->mode | AT91_SMC_TDF_(val));
  329. return 0;
  330. }
  331. static int at91sam9_ebi_init(struct at91_ebi *ebi)
  332. {
  333. struct at91sam9_smc_generic_fields *fields = &ebi->sam9;
  334. struct reg_field field = REG_FIELD(0, 0, 31);
  335. field.id_size = fls(ebi->caps->available_cs);
  336. field.id_offset = AT91SAM9_SMC_GENERIC_BLK_SZ;
  337. field.reg = AT91SAM9_SMC_SETUP(AT91SAM9_SMC_GENERIC);
  338. fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
  339. field);
  340. if (IS_ERR(fields->setup))
  341. return PTR_ERR(fields->setup);
  342. field.reg = AT91SAM9_SMC_PULSE(AT91SAM9_SMC_GENERIC);
  343. fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
  344. field);
  345. if (IS_ERR(fields->pulse))
  346. return PTR_ERR(fields->pulse);
  347. field.reg = AT91SAM9_SMC_CYCLE(AT91SAM9_SMC_GENERIC);
  348. fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
  349. field);
  350. if (IS_ERR(fields->cycle))
  351. return PTR_ERR(fields->cycle);
  352. field.reg = AT91SAM9_SMC_MODE(AT91SAM9_SMC_GENERIC);
  353. fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
  354. field);
  355. return PTR_ERR_OR_ZERO(fields->mode);
  356. }
  357. static int sama5d3_ebi_init(struct at91_ebi *ebi)
  358. {
  359. struct at91sam9_smc_generic_fields *fields = &ebi->sam9;
  360. struct reg_field field = REG_FIELD(0, 0, 31);
  361. field.id_size = fls(ebi->caps->available_cs);
  362. field.id_offset = SAMA5_SMC_GENERIC_BLK_SZ;
  363. field.reg = AT91SAM9_SMC_SETUP(SAMA5_SMC_GENERIC);
  364. fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
  365. field);
  366. if (IS_ERR(fields->setup))
  367. return PTR_ERR(fields->setup);
  368. field.reg = AT91SAM9_SMC_PULSE(SAMA5_SMC_GENERIC);
  369. fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
  370. field);
  371. if (IS_ERR(fields->pulse))
  372. return PTR_ERR(fields->pulse);
  373. field.reg = AT91SAM9_SMC_CYCLE(SAMA5_SMC_GENERIC);
  374. fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
  375. field);
  376. if (IS_ERR(fields->cycle))
  377. return PTR_ERR(fields->cycle);
  378. field.reg = SAMA5_SMC_MODE(SAMA5_SMC_GENERIC);
  379. fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
  380. field);
  381. return PTR_ERR_OR_ZERO(fields->mode);
  382. }
  383. static int at91_ebi_dev_setup(struct at91_ebi *ebi, struct device_node *np,
  384. int reg_cells)
  385. {
  386. const struct at91_ebi_caps *caps = ebi->caps;
  387. struct at91_ebi_dev_config conf = { };
  388. struct device *dev = ebi->dev;
  389. struct at91_ebi_dev *ebid;
  390. unsigned long cslines = 0;
  391. int ret, numcs = 0, nentries, i;
  392. bool apply = false;
  393. u32 cs;
  394. nentries = of_property_count_elems_of_size(np, "reg",
  395. reg_cells * sizeof(u32));
  396. for (i = 0; i < nentries; i++) {
  397. ret = of_property_read_u32_index(np, "reg", i * reg_cells,
  398. &cs);
  399. if (ret)
  400. return ret;
  401. if (cs >= AT91_MATRIX_EBI_NUM_CS ||
  402. !(ebi->caps->available_cs & BIT(cs))) {
  403. dev_err(dev, "invalid reg property in %s\n",
  404. np->full_name);
  405. return -EINVAL;
  406. }
  407. if (!test_and_set_bit(cs, &cslines))
  408. numcs++;
  409. }
  410. if (!numcs) {
  411. dev_err(dev, "invalid reg property in %s\n", np->full_name);
  412. return -EINVAL;
  413. }
  414. ebid = devm_kzalloc(ebi->dev,
  415. sizeof(*ebid) + (numcs * sizeof(*ebid->configs)),
  416. GFP_KERNEL);
  417. if (!ebid)
  418. return -ENOMEM;
  419. ebid->ebi = ebi;
  420. ret = caps->xlate_config(ebid, np, &conf);
  421. if (ret < 0)
  422. return ret;
  423. else if (ret)
  424. apply = true;
  425. i = 0;
  426. for_each_set_bit(cs, &cslines, AT91_MATRIX_EBI_NUM_CS) {
  427. ebid->configs[i].cs = cs;
  428. if (apply) {
  429. conf.cs = cs;
  430. ret = caps->apply_config(ebid, &conf);
  431. if (ret)
  432. return ret;
  433. }
  434. caps->get_config(ebid, &ebid->configs[i]);
  435. /*
  436. * Attach the EBI device to the generic SMC logic if at least
  437. * one "atmel,smc-" property is present.
  438. */
  439. if (ebi->ebi_csa && apply)
  440. regmap_field_update_bits(ebi->ebi_csa,
  441. BIT(cs), 0);
  442. i++;
  443. }
  444. list_add_tail(&ebid->node, &ebi->devs);
  445. return 0;
  446. }
  447. static const struct reg_field at91sam9260_ebi_csa =
  448. REG_FIELD(AT91SAM9260_MATRIX_EBICSA, 0,
  449. AT91_MATRIX_EBI_NUM_CS - 1);
  450. static const struct at91_ebi_caps at91sam9260_ebi_caps = {
  451. .available_cs = 0xff,
  452. .ebi_csa = &at91sam9260_ebi_csa,
  453. .get_config = at91sam9_ebi_get_config,
  454. .xlate_config = at91sam9_ebi_xslate_config,
  455. .apply_config = at91sam9_ebi_apply_config,
  456. .init = at91sam9_ebi_init,
  457. };
  458. static const struct reg_field at91sam9261_ebi_csa =
  459. REG_FIELD(AT91SAM9261_MATRIX_EBICSA, 0,
  460. AT91_MATRIX_EBI_NUM_CS - 1);
  461. static const struct at91_ebi_caps at91sam9261_ebi_caps = {
  462. .available_cs = 0xff,
  463. .ebi_csa = &at91sam9261_ebi_csa,
  464. .get_config = at91sam9_ebi_get_config,
  465. .xlate_config = at91sam9_ebi_xslate_config,
  466. .apply_config = at91sam9_ebi_apply_config,
  467. .init = at91sam9_ebi_init,
  468. };
  469. static const struct reg_field at91sam9263_ebi0_csa =
  470. REG_FIELD(AT91SAM9263_MATRIX_EBI0CSA, 0,
  471. AT91_MATRIX_EBI_NUM_CS - 1);
  472. static const struct at91_ebi_caps at91sam9263_ebi0_caps = {
  473. .available_cs = 0x3f,
  474. .ebi_csa = &at91sam9263_ebi0_csa,
  475. .get_config = at91sam9_ebi_get_config,
  476. .xlate_config = at91sam9_ebi_xslate_config,
  477. .apply_config = at91sam9_ebi_apply_config,
  478. .init = at91sam9_ebi_init,
  479. };
  480. static const struct reg_field at91sam9263_ebi1_csa =
  481. REG_FIELD(AT91SAM9263_MATRIX_EBI1CSA, 0,
  482. AT91_MATRIX_EBI_NUM_CS - 1);
  483. static const struct at91_ebi_caps at91sam9263_ebi1_caps = {
  484. .available_cs = 0x7,
  485. .ebi_csa = &at91sam9263_ebi1_csa,
  486. .get_config = at91sam9_ebi_get_config,
  487. .xlate_config = at91sam9_ebi_xslate_config,
  488. .apply_config = at91sam9_ebi_apply_config,
  489. .init = at91sam9_ebi_init,
  490. };
  491. static const struct reg_field at91sam9rl_ebi_csa =
  492. REG_FIELD(AT91SAM9RL_MATRIX_EBICSA, 0,
  493. AT91_MATRIX_EBI_NUM_CS - 1);
  494. static const struct at91_ebi_caps at91sam9rl_ebi_caps = {
  495. .available_cs = 0x3f,
  496. .ebi_csa = &at91sam9rl_ebi_csa,
  497. .get_config = at91sam9_ebi_get_config,
  498. .xlate_config = at91sam9_ebi_xslate_config,
  499. .apply_config = at91sam9_ebi_apply_config,
  500. .init = at91sam9_ebi_init,
  501. };
  502. static const struct reg_field at91sam9g45_ebi_csa =
  503. REG_FIELD(AT91SAM9G45_MATRIX_EBICSA, 0,
  504. AT91_MATRIX_EBI_NUM_CS - 1);
  505. static const struct at91_ebi_caps at91sam9g45_ebi_caps = {
  506. .available_cs = 0x3f,
  507. .ebi_csa = &at91sam9g45_ebi_csa,
  508. .get_config = at91sam9_ebi_get_config,
  509. .xlate_config = at91sam9_ebi_xslate_config,
  510. .apply_config = at91sam9_ebi_apply_config,
  511. .init = at91sam9_ebi_init,
  512. };
  513. static const struct at91_ebi_caps at91sam9x5_ebi_caps = {
  514. .available_cs = 0x3f,
  515. .ebi_csa = &at91sam9263_ebi0_csa,
  516. .get_config = at91sam9_ebi_get_config,
  517. .xlate_config = at91sam9_ebi_xslate_config,
  518. .apply_config = at91sam9_ebi_apply_config,
  519. .init = at91sam9_ebi_init,
  520. };
  521. static const struct at91_ebi_caps sama5d3_ebi_caps = {
  522. .available_cs = 0xf,
  523. .get_config = at91sam9_ebi_get_config,
  524. .xlate_config = at91sam9_ebi_xslate_config,
  525. .apply_config = at91sam9_ebi_apply_config,
  526. .init = sama5d3_ebi_init,
  527. };
  528. static const struct of_device_id at91_ebi_id_table[] = {
  529. {
  530. .compatible = "atmel,at91sam9260-ebi",
  531. .data = &at91sam9260_ebi_caps,
  532. },
  533. {
  534. .compatible = "atmel,at91sam9261-ebi",
  535. .data = &at91sam9261_ebi_caps,
  536. },
  537. {
  538. .compatible = "atmel,at91sam9263-ebi0",
  539. .data = &at91sam9263_ebi0_caps,
  540. },
  541. {
  542. .compatible = "atmel,at91sam9263-ebi1",
  543. .data = &at91sam9263_ebi1_caps,
  544. },
  545. {
  546. .compatible = "atmel,at91sam9rl-ebi",
  547. .data = &at91sam9rl_ebi_caps,
  548. },
  549. {
  550. .compatible = "atmel,at91sam9g45-ebi",
  551. .data = &at91sam9g45_ebi_caps,
  552. },
  553. {
  554. .compatible = "atmel,at91sam9x5-ebi",
  555. .data = &at91sam9x5_ebi_caps,
  556. },
  557. {
  558. .compatible = "atmel,sama5d3-ebi",
  559. .data = &sama5d3_ebi_caps,
  560. },
  561. { /* sentinel */ }
  562. };
  563. static int at91_ebi_dev_disable(struct at91_ebi *ebi, struct device_node *np)
  564. {
  565. struct device *dev = ebi->dev;
  566. struct property *newprop;
  567. newprop = devm_kzalloc(dev, sizeof(*newprop), GFP_KERNEL);
  568. if (!newprop)
  569. return -ENOMEM;
  570. newprop->name = devm_kstrdup(dev, "status", GFP_KERNEL);
  571. if (!newprop->name)
  572. return -ENOMEM;
  573. newprop->value = devm_kstrdup(dev, "disabled", GFP_KERNEL);
  574. if (!newprop->value)
  575. return -ENOMEM;
  576. newprop->length = sizeof("disabled");
  577. return of_update_property(np, newprop);
  578. }
  579. static int at91_ebi_probe(struct platform_device *pdev)
  580. {
  581. struct device *dev = &pdev->dev;
  582. struct device_node *child, *np = dev->of_node, *smc_np;
  583. const struct of_device_id *match;
  584. struct at91_ebi *ebi;
  585. int ret, reg_cells;
  586. struct clk *clk;
  587. u32 val;
  588. match = of_match_device(at91_ebi_id_table, dev);
  589. if (!match || !match->data)
  590. return -EINVAL;
  591. ebi = devm_kzalloc(dev, sizeof(*ebi), GFP_KERNEL);
  592. if (!ebi)
  593. return -ENOMEM;
  594. INIT_LIST_HEAD(&ebi->devs);
  595. ebi->caps = match->data;
  596. ebi->dev = dev;
  597. clk = devm_clk_get(dev, NULL);
  598. if (IS_ERR(clk))
  599. return PTR_ERR(clk);
  600. ebi->clk = clk;
  601. smc_np = of_parse_phandle(dev->of_node, "atmel,smc", 0);
  602. ebi->smc.regmap = syscon_node_to_regmap(smc_np);
  603. if (IS_ERR(ebi->smc.regmap))
  604. return PTR_ERR(ebi->smc.regmap);
  605. ebi->smc.clk = of_clk_get(smc_np, 0);
  606. if (IS_ERR(ebi->smc.clk)) {
  607. if (PTR_ERR(ebi->smc.clk) != -ENOENT)
  608. return PTR_ERR(ebi->smc.clk);
  609. ebi->smc.clk = NULL;
  610. }
  611. ret = clk_prepare_enable(ebi->smc.clk);
  612. if (ret)
  613. return ret;
  614. /*
  615. * The sama5d3 does not provide an EBICSA register and thus does need
  616. * to access the matrix registers.
  617. */
  618. if (ebi->caps->ebi_csa) {
  619. ebi->matrix =
  620. syscon_regmap_lookup_by_phandle(np, "atmel,matrix");
  621. if (IS_ERR(ebi->matrix))
  622. return PTR_ERR(ebi->matrix);
  623. ebi->ebi_csa = regmap_field_alloc(ebi->matrix,
  624. *ebi->caps->ebi_csa);
  625. if (IS_ERR(ebi->ebi_csa))
  626. return PTR_ERR(ebi->ebi_csa);
  627. }
  628. ret = ebi->caps->init(ebi);
  629. if (ret)
  630. return ret;
  631. ret = of_property_read_u32(np, "#address-cells", &val);
  632. if (ret) {
  633. dev_err(dev, "missing #address-cells property\n");
  634. return ret;
  635. }
  636. reg_cells = val;
  637. ret = of_property_read_u32(np, "#size-cells", &val);
  638. if (ret) {
  639. dev_err(dev, "missing #address-cells property\n");
  640. return ret;
  641. }
  642. reg_cells += val;
  643. for_each_available_child_of_node(np, child) {
  644. if (!of_find_property(child, "reg", NULL))
  645. continue;
  646. ret = at91_ebi_dev_setup(ebi, child, reg_cells);
  647. if (ret) {
  648. dev_err(dev, "failed to configure EBI bus for %s, disabling the device",
  649. child->full_name);
  650. ret = at91_ebi_dev_disable(ebi, child);
  651. if (ret)
  652. return ret;
  653. }
  654. }
  655. return of_platform_populate(np, NULL, NULL, dev);
  656. }
  657. static struct platform_driver at91_ebi_driver = {
  658. .driver = {
  659. .name = "atmel-ebi",
  660. .of_match_table = at91_ebi_id_table,
  661. },
  662. };
  663. builtin_platform_driver_probe(at91_ebi_driver, at91_ebi_probe);