mxl111sf-i2c.c 18 KB

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  1. /*
  2. * mxl111sf-i2c.c - driver for the MaxLinear MXL111SF
  3. *
  4. * Copyright (C) 2010-2014 Michael Krufky <mkrufky@linuxtv.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. */
  16. #include "mxl111sf-i2c.h"
  17. #include "mxl111sf.h"
  18. /* SW-I2C ----------------------------------------------------------------- */
  19. #define SW_I2C_ADDR 0x1a
  20. #define SW_I2C_EN 0x02
  21. #define SW_SCL_OUT 0x04
  22. #define SW_SDA_OUT 0x08
  23. #define SW_SDA_IN 0x04
  24. #define SW_I2C_BUSY_ADDR 0x2f
  25. #define SW_I2C_BUSY 0x02
  26. static int mxl111sf_i2c_bitbang_sendbyte(struct mxl111sf_state *state,
  27. u8 byte)
  28. {
  29. int i, ret;
  30. u8 data = 0;
  31. mxl_i2c("(0x%02x)", byte);
  32. ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data);
  33. if (mxl_fail(ret))
  34. goto fail;
  35. for (i = 0; i < 8; i++) {
  36. data = (byte & (0x80 >> i)) ? SW_SDA_OUT : 0;
  37. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  38. 0x10 | SW_I2C_EN | data);
  39. if (mxl_fail(ret))
  40. goto fail;
  41. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  42. 0x10 | SW_I2C_EN | data | SW_SCL_OUT);
  43. if (mxl_fail(ret))
  44. goto fail;
  45. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  46. 0x10 | SW_I2C_EN | data);
  47. if (mxl_fail(ret))
  48. goto fail;
  49. }
  50. /* last bit was 0 so we need to release SDA */
  51. if (!(byte & 1)) {
  52. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  53. 0x10 | SW_I2C_EN | SW_SDA_OUT);
  54. if (mxl_fail(ret))
  55. goto fail;
  56. }
  57. /* CLK high for ACK readback */
  58. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  59. 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
  60. if (mxl_fail(ret))
  61. goto fail;
  62. ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data);
  63. if (mxl_fail(ret))
  64. goto fail;
  65. /* drop the CLK after getting ACK, SDA will go high right away */
  66. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  67. 0x10 | SW_I2C_EN | SW_SDA_OUT);
  68. if (mxl_fail(ret))
  69. goto fail;
  70. if (data & SW_SDA_IN)
  71. ret = -EIO;
  72. fail:
  73. return ret;
  74. }
  75. static int mxl111sf_i2c_bitbang_recvbyte(struct mxl111sf_state *state,
  76. u8 *pbyte)
  77. {
  78. int i, ret;
  79. u8 byte = 0;
  80. u8 data = 0;
  81. mxl_i2c("()");
  82. *pbyte = 0;
  83. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  84. 0x10 | SW_I2C_EN | SW_SDA_OUT);
  85. if (mxl_fail(ret))
  86. goto fail;
  87. for (i = 0; i < 8; i++) {
  88. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  89. 0x10 | SW_I2C_EN |
  90. SW_SCL_OUT | SW_SDA_OUT);
  91. if (mxl_fail(ret))
  92. goto fail;
  93. ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data);
  94. if (mxl_fail(ret))
  95. goto fail;
  96. if (data & SW_SDA_IN)
  97. byte |= (0x80 >> i);
  98. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  99. 0x10 | SW_I2C_EN | SW_SDA_OUT);
  100. if (mxl_fail(ret))
  101. goto fail;
  102. }
  103. *pbyte = byte;
  104. fail:
  105. return ret;
  106. }
  107. static int mxl111sf_i2c_start(struct mxl111sf_state *state)
  108. {
  109. int ret;
  110. mxl_i2c("()");
  111. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  112. 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
  113. if (mxl_fail(ret))
  114. goto fail;
  115. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  116. 0x10 | SW_I2C_EN | SW_SCL_OUT);
  117. if (mxl_fail(ret))
  118. goto fail;
  119. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  120. 0x10 | SW_I2C_EN); /* start */
  121. mxl_fail(ret);
  122. fail:
  123. return ret;
  124. }
  125. static int mxl111sf_i2c_stop(struct mxl111sf_state *state)
  126. {
  127. int ret;
  128. mxl_i2c("()");
  129. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  130. 0x10 | SW_I2C_EN); /* stop */
  131. if (mxl_fail(ret))
  132. goto fail;
  133. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  134. 0x10 | SW_I2C_EN | SW_SCL_OUT);
  135. if (mxl_fail(ret))
  136. goto fail;
  137. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  138. 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
  139. if (mxl_fail(ret))
  140. goto fail;
  141. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  142. 0x10 | SW_SCL_OUT | SW_SDA_OUT);
  143. mxl_fail(ret);
  144. fail:
  145. return ret;
  146. }
  147. static int mxl111sf_i2c_ack(struct mxl111sf_state *state)
  148. {
  149. int ret;
  150. u8 b = 0;
  151. mxl_i2c("()");
  152. ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &b);
  153. if (mxl_fail(ret))
  154. goto fail;
  155. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  156. 0x10 | SW_I2C_EN);
  157. if (mxl_fail(ret))
  158. goto fail;
  159. /* pull SDA low */
  160. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  161. 0x10 | SW_I2C_EN | SW_SCL_OUT);
  162. if (mxl_fail(ret))
  163. goto fail;
  164. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  165. 0x10 | SW_I2C_EN | SW_SDA_OUT);
  166. mxl_fail(ret);
  167. fail:
  168. return ret;
  169. }
  170. static int mxl111sf_i2c_nack(struct mxl111sf_state *state)
  171. {
  172. int ret;
  173. mxl_i2c("()");
  174. /* SDA high to signal last byte read from slave */
  175. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  176. 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
  177. if (mxl_fail(ret))
  178. goto fail;
  179. ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
  180. 0x10 | SW_I2C_EN | SW_SDA_OUT);
  181. mxl_fail(ret);
  182. fail:
  183. return ret;
  184. }
  185. /* ------------------------------------------------------------------------ */
  186. static int mxl111sf_i2c_sw_xfer_msg(struct mxl111sf_state *state,
  187. struct i2c_msg *msg)
  188. {
  189. int i, ret;
  190. mxl_i2c("()");
  191. if (msg->flags & I2C_M_RD) {
  192. ret = mxl111sf_i2c_start(state);
  193. if (mxl_fail(ret))
  194. goto fail;
  195. ret = mxl111sf_i2c_bitbang_sendbyte(state,
  196. (msg->addr << 1) | 0x01);
  197. if (mxl_fail(ret)) {
  198. mxl111sf_i2c_stop(state);
  199. goto fail;
  200. }
  201. for (i = 0; i < msg->len; i++) {
  202. ret = mxl111sf_i2c_bitbang_recvbyte(state,
  203. &msg->buf[i]);
  204. if (mxl_fail(ret)) {
  205. mxl111sf_i2c_stop(state);
  206. goto fail;
  207. }
  208. if (i < msg->len - 1)
  209. mxl111sf_i2c_ack(state);
  210. }
  211. mxl111sf_i2c_nack(state);
  212. ret = mxl111sf_i2c_stop(state);
  213. if (mxl_fail(ret))
  214. goto fail;
  215. } else {
  216. ret = mxl111sf_i2c_start(state);
  217. if (mxl_fail(ret))
  218. goto fail;
  219. ret = mxl111sf_i2c_bitbang_sendbyte(state,
  220. (msg->addr << 1) & 0xfe);
  221. if (mxl_fail(ret)) {
  222. mxl111sf_i2c_stop(state);
  223. goto fail;
  224. }
  225. for (i = 0; i < msg->len; i++) {
  226. ret = mxl111sf_i2c_bitbang_sendbyte(state,
  227. msg->buf[i]);
  228. if (mxl_fail(ret)) {
  229. mxl111sf_i2c_stop(state);
  230. goto fail;
  231. }
  232. }
  233. /* FIXME: we only want to do this on the last transaction */
  234. mxl111sf_i2c_stop(state);
  235. }
  236. fail:
  237. return ret;
  238. }
  239. /* HW-I2C ----------------------------------------------------------------- */
  240. #define USB_WRITE_I2C_CMD 0x99
  241. #define USB_READ_I2C_CMD 0xdd
  242. #define USB_END_I2C_CMD 0xfe
  243. #define USB_WRITE_I2C_CMD_LEN 26
  244. #define USB_READ_I2C_CMD_LEN 24
  245. #define I2C_MUX_REG 0x30
  246. #define I2C_CONTROL_REG 0x00
  247. #define I2C_SLAVE_ADDR_REG 0x08
  248. #define I2C_DATA_REG 0x0c
  249. #define I2C_INT_STATUS_REG 0x10
  250. static int mxl111sf_i2c_send_data(struct mxl111sf_state *state,
  251. u8 index, u8 *wdata)
  252. {
  253. int ret = mxl111sf_ctrl_msg(state->d, wdata[0],
  254. &wdata[1], 25, NULL, 0);
  255. mxl_fail(ret);
  256. return ret;
  257. }
  258. static int mxl111sf_i2c_get_data(struct mxl111sf_state *state,
  259. u8 index, u8 *wdata, u8 *rdata)
  260. {
  261. int ret = mxl111sf_ctrl_msg(state->d, wdata[0],
  262. &wdata[1], 25, rdata, 24);
  263. mxl_fail(ret);
  264. return ret;
  265. }
  266. static u8 mxl111sf_i2c_check_status(struct mxl111sf_state *state)
  267. {
  268. u8 status = 0;
  269. u8 buf[26];
  270. mxl_i2c_adv("()");
  271. buf[0] = USB_READ_I2C_CMD;
  272. buf[1] = 0x00;
  273. buf[2] = I2C_INT_STATUS_REG;
  274. buf[3] = 0x00;
  275. buf[4] = 0x00;
  276. buf[5] = USB_END_I2C_CMD;
  277. mxl111sf_i2c_get_data(state, 0, buf, buf);
  278. if (buf[1] & 0x04)
  279. status = 1;
  280. return status;
  281. }
  282. static u8 mxl111sf_i2c_check_fifo(struct mxl111sf_state *state)
  283. {
  284. u8 status = 0;
  285. u8 buf[26];
  286. mxl_i2c("()");
  287. buf[0] = USB_READ_I2C_CMD;
  288. buf[1] = 0x00;
  289. buf[2] = I2C_MUX_REG;
  290. buf[3] = 0x00;
  291. buf[4] = 0x00;
  292. buf[5] = I2C_INT_STATUS_REG;
  293. buf[6] = 0x00;
  294. buf[7] = 0x00;
  295. buf[8] = USB_END_I2C_CMD;
  296. mxl111sf_i2c_get_data(state, 0, buf, buf);
  297. if (0x08 == (buf[1] & 0x08))
  298. status = 1;
  299. if ((buf[5] & 0x02) == 0x02)
  300. mxl_i2c("(buf[5] & 0x02) == 0x02"); /* FIXME */
  301. return status;
  302. }
  303. static int mxl111sf_i2c_readagain(struct mxl111sf_state *state,
  304. u8 count, u8 *rbuf)
  305. {
  306. u8 i2c_w_data[26];
  307. u8 i2c_r_data[24];
  308. u8 i = 0;
  309. u8 fifo_status = 0;
  310. int status = 0;
  311. mxl_i2c("read %d bytes", count);
  312. while ((fifo_status == 0) && (i++ < 5))
  313. fifo_status = mxl111sf_i2c_check_fifo(state);
  314. i2c_w_data[0] = 0xDD;
  315. i2c_w_data[1] = 0x00;
  316. for (i = 2; i < 26; i++)
  317. i2c_w_data[i] = 0xFE;
  318. for (i = 0; i < count; i++) {
  319. i2c_w_data[2+(i*3)] = 0x0C;
  320. i2c_w_data[3+(i*3)] = 0x00;
  321. i2c_w_data[4+(i*3)] = 0x00;
  322. }
  323. mxl111sf_i2c_get_data(state, 0, i2c_w_data, i2c_r_data);
  324. /* Check for I2C NACK status */
  325. if (mxl111sf_i2c_check_status(state) == 1) {
  326. mxl_i2c("error!");
  327. } else {
  328. for (i = 0; i < count; i++) {
  329. rbuf[i] = i2c_r_data[(i*3)+1];
  330. mxl_i2c("%02x\t %02x",
  331. i2c_r_data[(i*3)+1],
  332. i2c_r_data[(i*3)+2]);
  333. }
  334. status = 1;
  335. }
  336. return status;
  337. }
  338. #define HWI2C400 1
  339. static int mxl111sf_i2c_hw_xfer_msg(struct mxl111sf_state *state,
  340. struct i2c_msg *msg)
  341. {
  342. int i, k, ret = 0;
  343. u16 index = 0;
  344. u8 buf[26];
  345. u8 i2c_r_data[24];
  346. u16 block_len;
  347. u16 left_over_len;
  348. u8 rd_status[8];
  349. u8 ret_status;
  350. u8 readbuff[26];
  351. mxl_i2c("addr: 0x%02x, read buff len: %d, write buff len: %d",
  352. msg->addr, (msg->flags & I2C_M_RD) ? msg->len : 0,
  353. (!(msg->flags & I2C_M_RD)) ? msg->len : 0);
  354. for (index = 0; index < 26; index++)
  355. buf[index] = USB_END_I2C_CMD;
  356. /* command to indicate data payload is destined for I2C interface */
  357. buf[0] = USB_WRITE_I2C_CMD;
  358. buf[1] = 0x00;
  359. /* enable I2C interface */
  360. buf[2] = I2C_MUX_REG;
  361. buf[3] = 0x80;
  362. buf[4] = 0x00;
  363. /* enable I2C interface */
  364. buf[5] = I2C_MUX_REG;
  365. buf[6] = 0x81;
  366. buf[7] = 0x00;
  367. /* set Timeout register on I2C interface */
  368. buf[8] = 0x14;
  369. buf[9] = 0xff;
  370. buf[10] = 0x00;
  371. #if 0
  372. /* enable Interrupts on I2C interface */
  373. buf[8] = 0x24;
  374. buf[9] = 0xF7;
  375. buf[10] = 0x00;
  376. #endif
  377. buf[11] = 0x24;
  378. buf[12] = 0xF7;
  379. buf[13] = 0x00;
  380. ret = mxl111sf_i2c_send_data(state, 0, buf);
  381. /* write data on I2C bus */
  382. if (!(msg->flags & I2C_M_RD) && (msg->len > 0)) {
  383. mxl_i2c("%d\t%02x", msg->len, msg->buf[0]);
  384. /* control register on I2C interface to initialize I2C bus */
  385. buf[2] = I2C_CONTROL_REG;
  386. buf[3] = 0x5E;
  387. buf[4] = (HWI2C400) ? 0x03 : 0x0D;
  388. /* I2C Slave device Address */
  389. buf[5] = I2C_SLAVE_ADDR_REG;
  390. buf[6] = (msg->addr);
  391. buf[7] = 0x00;
  392. buf[8] = USB_END_I2C_CMD;
  393. ret = mxl111sf_i2c_send_data(state, 0, buf);
  394. /* check for slave device status */
  395. if (mxl111sf_i2c_check_status(state) == 1) {
  396. mxl_i2c("NACK writing slave address %02x",
  397. msg->addr);
  398. /* if NACK, stop I2C bus and exit */
  399. buf[2] = I2C_CONTROL_REG;
  400. buf[3] = 0x4E;
  401. buf[4] = (HWI2C400) ? 0x03 : 0x0D;
  402. ret = -EIO;
  403. goto exit;
  404. }
  405. /* I2C interface can do I2C operations in block of 8 bytes of
  406. I2C data. calculation to figure out number of blocks of i2c
  407. data required to program */
  408. block_len = (msg->len / 8);
  409. left_over_len = (msg->len % 8);
  410. index = 0;
  411. mxl_i2c("block_len %d, left_over_len %d",
  412. block_len, left_over_len);
  413. for (index = 0; index < block_len; index++) {
  414. for (i = 0; i < 8; i++) {
  415. /* write data on I2C interface */
  416. buf[2+(i*3)] = I2C_DATA_REG;
  417. buf[3+(i*3)] = msg->buf[(index*8)+i];
  418. buf[4+(i*3)] = 0x00;
  419. }
  420. ret = mxl111sf_i2c_send_data(state, 0, buf);
  421. /* check for I2C NACK status */
  422. if (mxl111sf_i2c_check_status(state) == 1) {
  423. mxl_i2c("NACK writing slave address %02x",
  424. msg->addr);
  425. /* if NACK, stop I2C bus and exit */
  426. buf[2] = I2C_CONTROL_REG;
  427. buf[3] = 0x4E;
  428. buf[4] = (HWI2C400) ? 0x03 : 0x0D;
  429. ret = -EIO;
  430. goto exit;
  431. }
  432. }
  433. if (left_over_len) {
  434. for (k = 0; k < 26; k++)
  435. buf[k] = USB_END_I2C_CMD;
  436. buf[0] = 0x99;
  437. buf[1] = 0x00;
  438. for (i = 0; i < left_over_len; i++) {
  439. buf[2+(i*3)] = I2C_DATA_REG;
  440. buf[3+(i*3)] = msg->buf[(index*8)+i];
  441. mxl_i2c("index = %d %d data %d",
  442. index, i, msg->buf[(index*8)+i]);
  443. buf[4+(i*3)] = 0x00;
  444. }
  445. ret = mxl111sf_i2c_send_data(state, 0, buf);
  446. /* check for I2C NACK status */
  447. if (mxl111sf_i2c_check_status(state) == 1) {
  448. mxl_i2c("NACK writing slave address %02x",
  449. msg->addr);
  450. /* if NACK, stop I2C bus and exit */
  451. buf[2] = I2C_CONTROL_REG;
  452. buf[3] = 0x4E;
  453. buf[4] = (HWI2C400) ? 0x03 : 0x0D;
  454. ret = -EIO;
  455. goto exit;
  456. }
  457. }
  458. /* issue I2C STOP after write */
  459. buf[2] = I2C_CONTROL_REG;
  460. buf[3] = 0x4E;
  461. buf[4] = (HWI2C400) ? 0x03 : 0x0D;
  462. }
  463. /* read data from I2C bus */
  464. if ((msg->flags & I2C_M_RD) && (msg->len > 0)) {
  465. mxl_i2c("read buf len %d", msg->len);
  466. /* command to indicate data payload is
  467. destined for I2C interface */
  468. buf[2] = I2C_CONTROL_REG;
  469. buf[3] = 0xDF;
  470. buf[4] = (HWI2C400) ? 0x03 : 0x0D;
  471. /* I2C xfer length */
  472. buf[5] = 0x14;
  473. buf[6] = (msg->len & 0xFF);
  474. buf[7] = 0;
  475. /* I2C slave device Address */
  476. buf[8] = I2C_SLAVE_ADDR_REG;
  477. buf[9] = msg->addr;
  478. buf[10] = 0x00;
  479. buf[11] = USB_END_I2C_CMD;
  480. ret = mxl111sf_i2c_send_data(state, 0, buf);
  481. /* check for I2C NACK status */
  482. if (mxl111sf_i2c_check_status(state) == 1) {
  483. mxl_i2c("NACK reading slave address %02x",
  484. msg->addr);
  485. /* if NACK, stop I2C bus and exit */
  486. buf[2] = I2C_CONTROL_REG;
  487. buf[3] = 0xC7;
  488. buf[4] = (HWI2C400) ? 0x03 : 0x0D;
  489. ret = -EIO;
  490. goto exit;
  491. }
  492. /* I2C interface can do I2C operations in block of 8 bytes of
  493. I2C data. calculation to figure out number of blocks of
  494. i2c data required to program */
  495. block_len = ((msg->len) / 8);
  496. left_over_len = ((msg->len) % 8);
  497. index = 0;
  498. mxl_i2c("block_len %d, left_over_len %d",
  499. block_len, left_over_len);
  500. /* command to read data from I2C interface */
  501. buf[0] = USB_READ_I2C_CMD;
  502. buf[1] = 0x00;
  503. for (index = 0; index < block_len; index++) {
  504. /* setup I2C read request packet on I2C interface */
  505. for (i = 0; i < 8; i++) {
  506. buf[2+(i*3)] = I2C_DATA_REG;
  507. buf[3+(i*3)] = 0x00;
  508. buf[4+(i*3)] = 0x00;
  509. }
  510. ret = mxl111sf_i2c_get_data(state, 0, buf, i2c_r_data);
  511. /* check for I2C NACK status */
  512. if (mxl111sf_i2c_check_status(state) == 1) {
  513. mxl_i2c("NACK reading slave address %02x",
  514. msg->addr);
  515. /* if NACK, stop I2C bus and exit */
  516. buf[2] = I2C_CONTROL_REG;
  517. buf[3] = 0xC7;
  518. buf[4] = (HWI2C400) ? 0x03 : 0x0D;
  519. ret = -EIO;
  520. goto exit;
  521. }
  522. /* copy data from i2c data payload to read buffer */
  523. for (i = 0; i < 8; i++) {
  524. rd_status[i] = i2c_r_data[(i*3)+2];
  525. if (rd_status[i] == 0x04) {
  526. if (i < 7) {
  527. mxl_i2c("i2c fifo empty! @ %d",
  528. i);
  529. msg->buf[(index*8)+i] =
  530. i2c_r_data[(i*3)+1];
  531. /* read again */
  532. ret_status =
  533. mxl111sf_i2c_readagain(
  534. state, 8-(i+1),
  535. readbuff);
  536. if (ret_status == 1) {
  537. for (k = 0;
  538. k < 8-(i+1);
  539. k++) {
  540. msg->buf[(index*8)+(k+i+1)] =
  541. readbuff[k];
  542. mxl_i2c("read data: %02x\t %02x",
  543. msg->buf[(index*8)+(k+i)],
  544. (index*8)+(k+i));
  545. mxl_i2c("read data: %02x\t %02x",
  546. msg->buf[(index*8)+(k+i+1)],
  547. readbuff[k]);
  548. }
  549. goto stop_copy;
  550. } else {
  551. mxl_i2c("readagain ERROR!");
  552. }
  553. } else {
  554. msg->buf[(index*8)+i] =
  555. i2c_r_data[(i*3)+1];
  556. }
  557. } else {
  558. msg->buf[(index*8)+i] =
  559. i2c_r_data[(i*3)+1];
  560. }
  561. }
  562. stop_copy:
  563. ;
  564. }
  565. if (left_over_len) {
  566. for (k = 0; k < 26; k++)
  567. buf[k] = USB_END_I2C_CMD;
  568. buf[0] = 0xDD;
  569. buf[1] = 0x00;
  570. for (i = 0; i < left_over_len; i++) {
  571. buf[2+(i*3)] = I2C_DATA_REG;
  572. buf[3+(i*3)] = 0x00;
  573. buf[4+(i*3)] = 0x00;
  574. }
  575. ret = mxl111sf_i2c_get_data(state, 0, buf,
  576. i2c_r_data);
  577. /* check for I2C NACK status */
  578. if (mxl111sf_i2c_check_status(state) == 1) {
  579. mxl_i2c("NACK reading slave address %02x",
  580. msg->addr);
  581. /* if NACK, stop I2C bus and exit */
  582. buf[2] = I2C_CONTROL_REG;
  583. buf[3] = 0xC7;
  584. buf[4] = (HWI2C400) ? 0x03 : 0x0D;
  585. ret = -EIO;
  586. goto exit;
  587. }
  588. for (i = 0; i < left_over_len; i++) {
  589. msg->buf[(block_len*8)+i] =
  590. i2c_r_data[(i*3)+1];
  591. mxl_i2c("read data: %02x\t %02x",
  592. i2c_r_data[(i*3)+1],
  593. i2c_r_data[(i*3)+2]);
  594. }
  595. }
  596. /* indicate I2C interface to issue NACK
  597. after next I2C read op */
  598. buf[0] = USB_WRITE_I2C_CMD;
  599. buf[1] = 0x00;
  600. /* control register */
  601. buf[2] = I2C_CONTROL_REG;
  602. buf[3] = 0x17;
  603. buf[4] = (HWI2C400) ? 0x03 : 0x0D;
  604. buf[5] = USB_END_I2C_CMD;
  605. ret = mxl111sf_i2c_send_data(state, 0, buf);
  606. /* control register */
  607. buf[2] = I2C_CONTROL_REG;
  608. buf[3] = 0xC7;
  609. buf[4] = (HWI2C400) ? 0x03 : 0x0D;
  610. }
  611. exit:
  612. /* STOP and disable I2C MUX */
  613. buf[0] = USB_WRITE_I2C_CMD;
  614. buf[1] = 0x00;
  615. /* de-initilize I2C BUS */
  616. buf[5] = USB_END_I2C_CMD;
  617. mxl111sf_i2c_send_data(state, 0, buf);
  618. /* Control Register */
  619. buf[2] = I2C_CONTROL_REG;
  620. buf[3] = 0xDF;
  621. buf[4] = 0x03;
  622. /* disable I2C interface */
  623. buf[5] = I2C_MUX_REG;
  624. buf[6] = 0x00;
  625. buf[7] = 0x00;
  626. /* de-initilize I2C BUS */
  627. buf[8] = USB_END_I2C_CMD;
  628. mxl111sf_i2c_send_data(state, 0, buf);
  629. /* disable I2C interface */
  630. buf[2] = I2C_MUX_REG;
  631. buf[3] = 0x81;
  632. buf[4] = 0x00;
  633. /* disable I2C interface */
  634. buf[5] = I2C_MUX_REG;
  635. buf[6] = 0x00;
  636. buf[7] = 0x00;
  637. /* disable I2C interface */
  638. buf[8] = I2C_MUX_REG;
  639. buf[9] = 0x00;
  640. buf[10] = 0x00;
  641. buf[11] = USB_END_I2C_CMD;
  642. mxl111sf_i2c_send_data(state, 0, buf);
  643. return ret;
  644. }
  645. /* ------------------------------------------------------------------------ */
  646. int mxl111sf_i2c_xfer(struct i2c_adapter *adap,
  647. struct i2c_msg msg[], int num)
  648. {
  649. struct dvb_usb_device *d = i2c_get_adapdata(adap);
  650. struct mxl111sf_state *state = d->priv;
  651. int hwi2c = (state->chip_rev > MXL111SF_V6);
  652. int i, ret;
  653. if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
  654. return -EAGAIN;
  655. for (i = 0; i < num; i++) {
  656. ret = (hwi2c) ?
  657. mxl111sf_i2c_hw_xfer_msg(state, &msg[i]) :
  658. mxl111sf_i2c_sw_xfer_msg(state, &msg[i]);
  659. if (mxl_fail(ret)) {
  660. mxl_debug_adv("failed with error %d on i2c transaction %d of %d, %sing %d bytes to/from 0x%02x",
  661. ret, i+1, num,
  662. (msg[i].flags & I2C_M_RD) ?
  663. "read" : "writ",
  664. msg[i].len, msg[i].addr);
  665. break;
  666. }
  667. }
  668. mutex_unlock(&d->i2c_mutex);
  669. return i == num ? num : -EREMOTEIO;
  670. }