gsc-core.c 30 KB

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  1. /*
  2. * Copyright (c) 2011 - 2012 Samsung Electronics Co., Ltd.
  3. * http://www.samsung.com
  4. *
  5. * Samsung EXYNOS5 SoC series G-Scaler driver
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published
  9. * by the Free Software Foundation, either version 2 of the License,
  10. * or (at your option) any later version.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <linux/errno.h>
  16. #include <linux/bug.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/workqueue.h>
  19. #include <linux/device.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/list.h>
  22. #include <linux/io.h>
  23. #include <linux/slab.h>
  24. #include <linux/clk.h>
  25. #include <linux/of.h>
  26. #include <linux/of_device.h>
  27. #include <media/v4l2-ioctl.h>
  28. #include "gsc-core.h"
  29. static const struct gsc_fmt gsc_formats[] = {
  30. {
  31. .name = "RGB565",
  32. .pixelformat = V4L2_PIX_FMT_RGB565X,
  33. .depth = { 16 },
  34. .color = GSC_RGB,
  35. .num_planes = 1,
  36. .num_comp = 1,
  37. }, {
  38. .name = "BGRX-8-8-8-8, 32 bpp",
  39. .pixelformat = V4L2_PIX_FMT_BGR32,
  40. .depth = { 32 },
  41. .color = GSC_RGB,
  42. .num_planes = 1,
  43. .num_comp = 1,
  44. }, {
  45. .name = "YUV 4:2:2 packed, YCbYCr",
  46. .pixelformat = V4L2_PIX_FMT_YUYV,
  47. .depth = { 16 },
  48. .color = GSC_YUV422,
  49. .yorder = GSC_LSB_Y,
  50. .corder = GSC_CBCR,
  51. .num_planes = 1,
  52. .num_comp = 1,
  53. .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8,
  54. }, {
  55. .name = "YUV 4:2:2 packed, CbYCrY",
  56. .pixelformat = V4L2_PIX_FMT_UYVY,
  57. .depth = { 16 },
  58. .color = GSC_YUV422,
  59. .yorder = GSC_LSB_C,
  60. .corder = GSC_CBCR,
  61. .num_planes = 1,
  62. .num_comp = 1,
  63. .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8,
  64. }, {
  65. .name = "YUV 4:2:2 packed, CrYCbY",
  66. .pixelformat = V4L2_PIX_FMT_VYUY,
  67. .depth = { 16 },
  68. .color = GSC_YUV422,
  69. .yorder = GSC_LSB_C,
  70. .corder = GSC_CRCB,
  71. .num_planes = 1,
  72. .num_comp = 1,
  73. .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8,
  74. }, {
  75. .name = "YUV 4:2:2 packed, YCrYCb",
  76. .pixelformat = V4L2_PIX_FMT_YVYU,
  77. .depth = { 16 },
  78. .color = GSC_YUV422,
  79. .yorder = GSC_LSB_Y,
  80. .corder = GSC_CRCB,
  81. .num_planes = 1,
  82. .num_comp = 1,
  83. .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8,
  84. }, {
  85. .name = "YUV 4:4:4 planar, YCbYCr",
  86. .pixelformat = V4L2_PIX_FMT_YUV32,
  87. .depth = { 32 },
  88. .color = GSC_YUV444,
  89. .yorder = GSC_LSB_Y,
  90. .corder = GSC_CBCR,
  91. .num_planes = 1,
  92. .num_comp = 1,
  93. }, {
  94. .name = "YUV 4:2:2 planar, Y/Cb/Cr",
  95. .pixelformat = V4L2_PIX_FMT_YUV422P,
  96. .depth = { 16 },
  97. .color = GSC_YUV422,
  98. .yorder = GSC_LSB_Y,
  99. .corder = GSC_CBCR,
  100. .num_planes = 1,
  101. .num_comp = 3,
  102. }, {
  103. .name = "YUV 4:2:2 planar, Y/CbCr",
  104. .pixelformat = V4L2_PIX_FMT_NV16,
  105. .depth = { 16 },
  106. .color = GSC_YUV422,
  107. .yorder = GSC_LSB_Y,
  108. .corder = GSC_CBCR,
  109. .num_planes = 1,
  110. .num_comp = 2,
  111. }, {
  112. .name = "YUV 4:2:2 non-contig, Y/CbCr",
  113. .pixelformat = V4L2_PIX_FMT_NV16M,
  114. .depth = { 8, 8 },
  115. .color = GSC_YUV422,
  116. .yorder = GSC_LSB_Y,
  117. .corder = GSC_CBCR,
  118. .num_planes = 2,
  119. .num_comp = 2,
  120. }, {
  121. .name = "YUV 4:2:2 planar, Y/CrCb",
  122. .pixelformat = V4L2_PIX_FMT_NV61,
  123. .depth = { 16 },
  124. .color = GSC_YUV422,
  125. .yorder = GSC_LSB_Y,
  126. .corder = GSC_CRCB,
  127. .num_planes = 1,
  128. .num_comp = 2,
  129. }, {
  130. .name = "YUV 4:2:2 non-contig, Y/CrCb",
  131. .pixelformat = V4L2_PIX_FMT_NV61M,
  132. .depth = { 8, 8 },
  133. .color = GSC_YUV422,
  134. .yorder = GSC_LSB_Y,
  135. .corder = GSC_CRCB,
  136. .num_planes = 2,
  137. .num_comp = 2,
  138. }, {
  139. .name = "YUV 4:2:0 planar, YCbCr",
  140. .pixelformat = V4L2_PIX_FMT_YUV420,
  141. .depth = { 12 },
  142. .color = GSC_YUV420,
  143. .yorder = GSC_LSB_Y,
  144. .corder = GSC_CBCR,
  145. .num_planes = 1,
  146. .num_comp = 3,
  147. }, {
  148. .name = "YUV 4:2:0 planar, YCrCb",
  149. .pixelformat = V4L2_PIX_FMT_YVU420,
  150. .depth = { 12 },
  151. .color = GSC_YUV420,
  152. .yorder = GSC_LSB_Y,
  153. .corder = GSC_CRCB,
  154. .num_planes = 1,
  155. .num_comp = 3,
  156. }, {
  157. .name = "YUV 4:2:0 planar, Y/CbCr",
  158. .pixelformat = V4L2_PIX_FMT_NV12,
  159. .depth = { 12 },
  160. .color = GSC_YUV420,
  161. .yorder = GSC_LSB_Y,
  162. .corder = GSC_CBCR,
  163. .num_planes = 1,
  164. .num_comp = 2,
  165. }, {
  166. .name = "YUV 4:2:0 planar, Y/CrCb",
  167. .pixelformat = V4L2_PIX_FMT_NV21,
  168. .depth = { 12 },
  169. .color = GSC_YUV420,
  170. .yorder = GSC_LSB_Y,
  171. .corder = GSC_CRCB,
  172. .num_planes = 1,
  173. .num_comp = 2,
  174. }, {
  175. .name = "YUV 4:2:0 non-contig. 2p, Y/CrCb",
  176. .pixelformat = V4L2_PIX_FMT_NV21M,
  177. .depth = { 8, 4 },
  178. .color = GSC_YUV420,
  179. .yorder = GSC_LSB_Y,
  180. .corder = GSC_CRCB,
  181. .num_planes = 2,
  182. .num_comp = 2,
  183. }, {
  184. .name = "YUV 4:2:0 non-contig. 2p, Y/CbCr",
  185. .pixelformat = V4L2_PIX_FMT_NV12M,
  186. .depth = { 8, 4 },
  187. .color = GSC_YUV420,
  188. .yorder = GSC_LSB_Y,
  189. .corder = GSC_CBCR,
  190. .num_planes = 2,
  191. .num_comp = 2,
  192. }, {
  193. .name = "YUV 4:2:0 non-contig. 3p, Y/Cb/Cr",
  194. .pixelformat = V4L2_PIX_FMT_YUV420M,
  195. .depth = { 8, 2, 2 },
  196. .color = GSC_YUV420,
  197. .yorder = GSC_LSB_Y,
  198. .corder = GSC_CBCR,
  199. .num_planes = 3,
  200. .num_comp = 3,
  201. }, {
  202. .name = "YUV 4:2:0 non-contig. 3p, Y/Cr/Cb",
  203. .pixelformat = V4L2_PIX_FMT_YVU420M,
  204. .depth = { 8, 2, 2 },
  205. .color = GSC_YUV420,
  206. .yorder = GSC_LSB_Y,
  207. .corder = GSC_CRCB,
  208. .num_planes = 3,
  209. .num_comp = 3,
  210. }, {
  211. .name = "YUV 4:2:0 n.c. 2p, Y/CbCr tiled",
  212. .pixelformat = V4L2_PIX_FMT_NV12MT_16X16,
  213. .depth = { 8, 4 },
  214. .color = GSC_YUV420,
  215. .yorder = GSC_LSB_Y,
  216. .corder = GSC_CBCR,
  217. .num_planes = 2,
  218. .num_comp = 2,
  219. }
  220. };
  221. const struct gsc_fmt *get_format(int index)
  222. {
  223. if (index >= ARRAY_SIZE(gsc_formats))
  224. return NULL;
  225. return (struct gsc_fmt *)&gsc_formats[index];
  226. }
  227. const struct gsc_fmt *find_fmt(u32 *pixelformat, u32 *mbus_code, u32 index)
  228. {
  229. const struct gsc_fmt *fmt, *def_fmt = NULL;
  230. unsigned int i;
  231. if (index >= ARRAY_SIZE(gsc_formats))
  232. return NULL;
  233. for (i = 0; i < ARRAY_SIZE(gsc_formats); ++i) {
  234. fmt = get_format(i);
  235. if (pixelformat && fmt->pixelformat == *pixelformat)
  236. return fmt;
  237. if (mbus_code && fmt->mbus_code == *mbus_code)
  238. return fmt;
  239. if (index == i)
  240. def_fmt = fmt;
  241. }
  242. return def_fmt;
  243. }
  244. void gsc_set_frame_size(struct gsc_frame *frame, int width, int height)
  245. {
  246. frame->f_width = width;
  247. frame->f_height = height;
  248. frame->crop.width = width;
  249. frame->crop.height = height;
  250. frame->crop.left = 0;
  251. frame->crop.top = 0;
  252. }
  253. int gsc_cal_prescaler_ratio(struct gsc_variant *var, u32 src, u32 dst,
  254. u32 *ratio)
  255. {
  256. if ((dst > src) || (dst >= src / var->poly_sc_down_max)) {
  257. *ratio = 1;
  258. return 0;
  259. }
  260. if ((src / var->poly_sc_down_max / var->pre_sc_down_max) > dst) {
  261. pr_err("Exceeded maximum downscaling ratio (1/16))");
  262. return -EINVAL;
  263. }
  264. *ratio = (dst > (src / 8)) ? 2 : 4;
  265. return 0;
  266. }
  267. void gsc_get_prescaler_shfactor(u32 hratio, u32 vratio, u32 *sh)
  268. {
  269. if (hratio == 4 && vratio == 4)
  270. *sh = 4;
  271. else if ((hratio == 4 && vratio == 2) ||
  272. (hratio == 2 && vratio == 4))
  273. *sh = 3;
  274. else if ((hratio == 4 && vratio == 1) ||
  275. (hratio == 1 && vratio == 4) ||
  276. (hratio == 2 && vratio == 2))
  277. *sh = 2;
  278. else if (hratio == 1 && vratio == 1)
  279. *sh = 0;
  280. else
  281. *sh = 1;
  282. }
  283. void gsc_check_src_scale_info(struct gsc_variant *var,
  284. struct gsc_frame *s_frame, u32 *wratio,
  285. u32 tx, u32 ty, u32 *hratio)
  286. {
  287. int remainder = 0, walign, halign;
  288. if (is_yuv420(s_frame->fmt->color)) {
  289. walign = GSC_SC_ALIGN_4;
  290. halign = GSC_SC_ALIGN_4;
  291. } else if (is_yuv422(s_frame->fmt->color)) {
  292. walign = GSC_SC_ALIGN_4;
  293. halign = GSC_SC_ALIGN_2;
  294. } else {
  295. walign = GSC_SC_ALIGN_2;
  296. halign = GSC_SC_ALIGN_2;
  297. }
  298. remainder = s_frame->crop.width % (*wratio * walign);
  299. if (remainder) {
  300. s_frame->crop.width -= remainder;
  301. gsc_cal_prescaler_ratio(var, s_frame->crop.width, tx, wratio);
  302. pr_info("cropped src width size is recalculated from %d to %d",
  303. s_frame->crop.width + remainder, s_frame->crop.width);
  304. }
  305. remainder = s_frame->crop.height % (*hratio * halign);
  306. if (remainder) {
  307. s_frame->crop.height -= remainder;
  308. gsc_cal_prescaler_ratio(var, s_frame->crop.height, ty, hratio);
  309. pr_info("cropped src height size is recalculated from %d to %d",
  310. s_frame->crop.height + remainder, s_frame->crop.height);
  311. }
  312. }
  313. int gsc_enum_fmt_mplane(struct v4l2_fmtdesc *f)
  314. {
  315. const struct gsc_fmt *fmt;
  316. fmt = find_fmt(NULL, NULL, f->index);
  317. if (!fmt)
  318. return -EINVAL;
  319. strlcpy(f->description, fmt->name, sizeof(f->description));
  320. f->pixelformat = fmt->pixelformat;
  321. return 0;
  322. }
  323. static int get_plane_info(struct gsc_frame *frm, u32 addr, u32 *index, u32 *ret_addr)
  324. {
  325. if (frm->addr.y == addr) {
  326. *index = 0;
  327. *ret_addr = frm->addr.y;
  328. } else if (frm->addr.cb == addr) {
  329. *index = 1;
  330. *ret_addr = frm->addr.cb;
  331. } else if (frm->addr.cr == addr) {
  332. *index = 2;
  333. *ret_addr = frm->addr.cr;
  334. } else {
  335. pr_err("Plane address is wrong");
  336. return -EINVAL;
  337. }
  338. return 0;
  339. }
  340. void gsc_set_prefbuf(struct gsc_dev *gsc, struct gsc_frame *frm)
  341. {
  342. u32 f_chk_addr, f_chk_len, s_chk_addr, s_chk_len;
  343. f_chk_addr = f_chk_len = s_chk_addr = s_chk_len = 0;
  344. f_chk_addr = frm->addr.y;
  345. f_chk_len = frm->payload[0];
  346. if (frm->fmt->num_planes == 2) {
  347. s_chk_addr = frm->addr.cb;
  348. s_chk_len = frm->payload[1];
  349. } else if (frm->fmt->num_planes == 3) {
  350. u32 low_addr, low_plane, mid_addr, mid_plane;
  351. u32 high_addr, high_plane;
  352. u32 t_min, t_max;
  353. t_min = min3(frm->addr.y, frm->addr.cb, frm->addr.cr);
  354. if (get_plane_info(frm, t_min, &low_plane, &low_addr))
  355. return;
  356. t_max = max3(frm->addr.y, frm->addr.cb, frm->addr.cr);
  357. if (get_plane_info(frm, t_max, &high_plane, &high_addr))
  358. return;
  359. mid_plane = 3 - (low_plane + high_plane);
  360. if (mid_plane == 0)
  361. mid_addr = frm->addr.y;
  362. else if (mid_plane == 1)
  363. mid_addr = frm->addr.cb;
  364. else if (mid_plane == 2)
  365. mid_addr = frm->addr.cr;
  366. else
  367. return;
  368. f_chk_addr = low_addr;
  369. if (mid_addr + frm->payload[mid_plane] - low_addr >
  370. high_addr + frm->payload[high_plane] - mid_addr) {
  371. f_chk_len = frm->payload[low_plane];
  372. s_chk_addr = mid_addr;
  373. s_chk_len = high_addr +
  374. frm->payload[high_plane] - mid_addr;
  375. } else {
  376. f_chk_len = mid_addr +
  377. frm->payload[mid_plane] - low_addr;
  378. s_chk_addr = high_addr;
  379. s_chk_len = frm->payload[high_plane];
  380. }
  381. }
  382. pr_debug("f_addr = 0x%08x, f_len = %d, s_addr = 0x%08x, s_len = %d\n",
  383. f_chk_addr, f_chk_len, s_chk_addr, s_chk_len);
  384. }
  385. int gsc_try_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f)
  386. {
  387. struct gsc_dev *gsc = ctx->gsc_dev;
  388. struct gsc_variant *variant = gsc->variant;
  389. struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp;
  390. const struct gsc_fmt *fmt;
  391. u32 max_w, max_h, mod_x, mod_y;
  392. u32 min_w, min_h, tmp_w, tmp_h;
  393. int i;
  394. pr_debug("user put w: %d, h: %d", pix_mp->width, pix_mp->height);
  395. fmt = find_fmt(&pix_mp->pixelformat, NULL, 0);
  396. if (!fmt) {
  397. pr_err("pixelformat format (0x%X) invalid\n",
  398. pix_mp->pixelformat);
  399. return -EINVAL;
  400. }
  401. if (pix_mp->field == V4L2_FIELD_ANY)
  402. pix_mp->field = V4L2_FIELD_NONE;
  403. else if (pix_mp->field != V4L2_FIELD_NONE) {
  404. pr_debug("Not supported field order(%d)\n", pix_mp->field);
  405. return -EINVAL;
  406. }
  407. max_w = variant->pix_max->target_rot_dis_w;
  408. max_h = variant->pix_max->target_rot_dis_h;
  409. mod_x = ffs(variant->pix_align->org_w) - 1;
  410. if (is_yuv420(fmt->color))
  411. mod_y = ffs(variant->pix_align->org_h) - 1;
  412. else
  413. mod_y = ffs(variant->pix_align->org_h) - 2;
  414. if (V4L2_TYPE_IS_OUTPUT(f->type)) {
  415. min_w = variant->pix_min->org_w;
  416. min_h = variant->pix_min->org_h;
  417. } else {
  418. min_w = variant->pix_min->target_rot_dis_w;
  419. min_h = variant->pix_min->target_rot_dis_h;
  420. }
  421. pr_debug("mod_x: %d, mod_y: %d, max_w: %d, max_h = %d",
  422. mod_x, mod_y, max_w, max_h);
  423. /* To check if image size is modified to adjust parameter against
  424. hardware abilities */
  425. tmp_w = pix_mp->width;
  426. tmp_h = pix_mp->height;
  427. v4l_bound_align_image(&pix_mp->width, min_w, max_w, mod_x,
  428. &pix_mp->height, min_h, max_h, mod_y, 0);
  429. if (tmp_w != pix_mp->width || tmp_h != pix_mp->height)
  430. pr_debug("Image size has been modified from %dx%d to %dx%d\n",
  431. tmp_w, tmp_h, pix_mp->width, pix_mp->height);
  432. pix_mp->num_planes = fmt->num_planes;
  433. if (pix_mp->width >= 1280) /* HD */
  434. pix_mp->colorspace = V4L2_COLORSPACE_REC709;
  435. else /* SD */
  436. pix_mp->colorspace = V4L2_COLORSPACE_SMPTE170M;
  437. for (i = 0; i < pix_mp->num_planes; ++i) {
  438. struct v4l2_plane_pix_format *plane_fmt = &pix_mp->plane_fmt[i];
  439. u32 bpl = plane_fmt->bytesperline;
  440. if (fmt->num_comp == 1 && /* Packed */
  441. (bpl == 0 || (bpl * 8 / fmt->depth[i]) < pix_mp->width))
  442. bpl = pix_mp->width * fmt->depth[i] / 8;
  443. if (fmt->num_comp > 1 && /* Planar */
  444. (bpl == 0 || bpl < pix_mp->width))
  445. bpl = pix_mp->width;
  446. if (i != 0 && fmt->num_comp == 3)
  447. bpl /= 2;
  448. plane_fmt->bytesperline = bpl;
  449. plane_fmt->sizeimage = max(pix_mp->width * pix_mp->height *
  450. fmt->depth[i] / 8,
  451. plane_fmt->sizeimage);
  452. pr_debug("[%d]: bpl: %d, sizeimage: %d",
  453. i, bpl, pix_mp->plane_fmt[i].sizeimage);
  454. }
  455. return 0;
  456. }
  457. int gsc_g_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f)
  458. {
  459. struct gsc_frame *frame;
  460. struct v4l2_pix_format_mplane *pix_mp;
  461. int i;
  462. frame = ctx_get_frame(ctx, f->type);
  463. if (IS_ERR(frame))
  464. return PTR_ERR(frame);
  465. pix_mp = &f->fmt.pix_mp;
  466. pix_mp->width = frame->f_width;
  467. pix_mp->height = frame->f_height;
  468. pix_mp->field = V4L2_FIELD_NONE;
  469. pix_mp->pixelformat = frame->fmt->pixelformat;
  470. pix_mp->colorspace = V4L2_COLORSPACE_REC709;
  471. pix_mp->num_planes = frame->fmt->num_planes;
  472. for (i = 0; i < pix_mp->num_planes; ++i) {
  473. pix_mp->plane_fmt[i].bytesperline = (frame->f_width *
  474. frame->fmt->depth[i]) / 8;
  475. pix_mp->plane_fmt[i].sizeimage =
  476. pix_mp->plane_fmt[i].bytesperline * frame->f_height;
  477. }
  478. return 0;
  479. }
  480. void gsc_check_crop_change(u32 tmp_w, u32 tmp_h, u32 *w, u32 *h)
  481. {
  482. if (tmp_w != *w || tmp_h != *h) {
  483. pr_info("Cropped size has been modified from %dx%d to %dx%d",
  484. *w, *h, tmp_w, tmp_h);
  485. *w = tmp_w;
  486. *h = tmp_h;
  487. }
  488. }
  489. int gsc_g_crop(struct gsc_ctx *ctx, struct v4l2_crop *cr)
  490. {
  491. struct gsc_frame *frame;
  492. frame = ctx_get_frame(ctx, cr->type);
  493. if (IS_ERR(frame))
  494. return PTR_ERR(frame);
  495. cr->c = frame->crop;
  496. return 0;
  497. }
  498. int gsc_try_crop(struct gsc_ctx *ctx, struct v4l2_crop *cr)
  499. {
  500. struct gsc_frame *f;
  501. struct gsc_dev *gsc = ctx->gsc_dev;
  502. struct gsc_variant *variant = gsc->variant;
  503. u32 mod_x = 0, mod_y = 0, tmp_w, tmp_h;
  504. u32 min_w, min_h, max_w, max_h;
  505. if (cr->c.top < 0 || cr->c.left < 0) {
  506. pr_err("doesn't support negative values for top & left\n");
  507. return -EINVAL;
  508. }
  509. pr_debug("user put w: %d, h: %d", cr->c.width, cr->c.height);
  510. if (cr->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  511. f = &ctx->d_frame;
  512. else if (cr->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
  513. f = &ctx->s_frame;
  514. else
  515. return -EINVAL;
  516. max_w = f->f_width;
  517. max_h = f->f_height;
  518. tmp_w = cr->c.width;
  519. tmp_h = cr->c.height;
  520. if (V4L2_TYPE_IS_OUTPUT(cr->type)) {
  521. if ((is_yuv422(f->fmt->color) && f->fmt->num_comp == 1) ||
  522. is_rgb(f->fmt->color))
  523. min_w = 32;
  524. else
  525. min_w = 64;
  526. if ((is_yuv422(f->fmt->color) && f->fmt->num_comp == 3) ||
  527. is_yuv420(f->fmt->color))
  528. min_h = 32;
  529. else
  530. min_h = 16;
  531. } else {
  532. if (is_yuv420(f->fmt->color) || is_yuv422(f->fmt->color))
  533. mod_x = ffs(variant->pix_align->target_w) - 1;
  534. if (is_yuv420(f->fmt->color))
  535. mod_y = ffs(variant->pix_align->target_h) - 1;
  536. if (ctx->gsc_ctrls.rotate->val == 90 ||
  537. ctx->gsc_ctrls.rotate->val == 270) {
  538. max_w = f->f_height;
  539. max_h = f->f_width;
  540. min_w = variant->pix_min->target_rot_en_w;
  541. min_h = variant->pix_min->target_rot_en_h;
  542. tmp_w = cr->c.height;
  543. tmp_h = cr->c.width;
  544. } else {
  545. min_w = variant->pix_min->target_rot_dis_w;
  546. min_h = variant->pix_min->target_rot_dis_h;
  547. }
  548. }
  549. pr_debug("mod_x: %d, mod_y: %d, min_w: %d, min_h = %d",
  550. mod_x, mod_y, min_w, min_h);
  551. pr_debug("tmp_w : %d, tmp_h : %d", tmp_w, tmp_h);
  552. v4l_bound_align_image(&tmp_w, min_w, max_w, mod_x,
  553. &tmp_h, min_h, max_h, mod_y, 0);
  554. if (!V4L2_TYPE_IS_OUTPUT(cr->type) &&
  555. (ctx->gsc_ctrls.rotate->val == 90 ||
  556. ctx->gsc_ctrls.rotate->val == 270))
  557. gsc_check_crop_change(tmp_h, tmp_w,
  558. &cr->c.width, &cr->c.height);
  559. else
  560. gsc_check_crop_change(tmp_w, tmp_h,
  561. &cr->c.width, &cr->c.height);
  562. /* adjust left/top if cropping rectangle is out of bounds */
  563. /* Need to add code to algin left value with 2's multiple */
  564. if (cr->c.left + tmp_w > max_w)
  565. cr->c.left = max_w - tmp_w;
  566. if (cr->c.top + tmp_h > max_h)
  567. cr->c.top = max_h - tmp_h;
  568. if ((is_yuv420(f->fmt->color) || is_yuv422(f->fmt->color)) &&
  569. cr->c.left & 1)
  570. cr->c.left -= 1;
  571. pr_debug("Aligned l:%d, t:%d, w:%d, h:%d, f_w: %d, f_h: %d",
  572. cr->c.left, cr->c.top, cr->c.width, cr->c.height, max_w, max_h);
  573. return 0;
  574. }
  575. int gsc_check_scaler_ratio(struct gsc_variant *var, int sw, int sh, int dw,
  576. int dh, int rot, int out_path)
  577. {
  578. int tmp_w, tmp_h, sc_down_max;
  579. if (out_path == GSC_DMA)
  580. sc_down_max = var->sc_down_max;
  581. else
  582. sc_down_max = var->local_sc_down;
  583. if (rot == 90 || rot == 270) {
  584. tmp_w = dh;
  585. tmp_h = dw;
  586. } else {
  587. tmp_w = dw;
  588. tmp_h = dh;
  589. }
  590. if ((sw / tmp_w) > sc_down_max ||
  591. (sh / tmp_h) > sc_down_max ||
  592. (tmp_w / sw) > var->sc_up_max ||
  593. (tmp_h / sh) > var->sc_up_max)
  594. return -EINVAL;
  595. return 0;
  596. }
  597. int gsc_set_scaler_info(struct gsc_ctx *ctx)
  598. {
  599. struct gsc_scaler *sc = &ctx->scaler;
  600. struct gsc_frame *s_frame = &ctx->s_frame;
  601. struct gsc_frame *d_frame = &ctx->d_frame;
  602. struct gsc_variant *variant = ctx->gsc_dev->variant;
  603. struct device *dev = &ctx->gsc_dev->pdev->dev;
  604. int tx, ty;
  605. int ret;
  606. ret = gsc_check_scaler_ratio(variant, s_frame->crop.width,
  607. s_frame->crop.height, d_frame->crop.width, d_frame->crop.height,
  608. ctx->gsc_ctrls.rotate->val, ctx->out_path);
  609. if (ret) {
  610. pr_err("out of scaler range");
  611. return ret;
  612. }
  613. if (ctx->gsc_ctrls.rotate->val == 90 ||
  614. ctx->gsc_ctrls.rotate->val == 270) {
  615. ty = d_frame->crop.width;
  616. tx = d_frame->crop.height;
  617. } else {
  618. tx = d_frame->crop.width;
  619. ty = d_frame->crop.height;
  620. }
  621. if (tx <= 0 || ty <= 0) {
  622. dev_err(dev, "Invalid target size: %dx%d", tx, ty);
  623. return -EINVAL;
  624. }
  625. ret = gsc_cal_prescaler_ratio(variant, s_frame->crop.width,
  626. tx, &sc->pre_hratio);
  627. if (ret) {
  628. pr_err("Horizontal scale ratio is out of range");
  629. return ret;
  630. }
  631. ret = gsc_cal_prescaler_ratio(variant, s_frame->crop.height,
  632. ty, &sc->pre_vratio);
  633. if (ret) {
  634. pr_err("Vertical scale ratio is out of range");
  635. return ret;
  636. }
  637. gsc_check_src_scale_info(variant, s_frame, &sc->pre_hratio,
  638. tx, ty, &sc->pre_vratio);
  639. gsc_get_prescaler_shfactor(sc->pre_hratio, sc->pre_vratio,
  640. &sc->pre_shfactor);
  641. sc->main_hratio = (s_frame->crop.width << 16) / tx;
  642. sc->main_vratio = (s_frame->crop.height << 16) / ty;
  643. pr_debug("scaler input/output size : sx = %d, sy = %d, tx = %d, ty = %d",
  644. s_frame->crop.width, s_frame->crop.height, tx, ty);
  645. pr_debug("scaler ratio info : pre_shfactor : %d, pre_h : %d",
  646. sc->pre_shfactor, sc->pre_hratio);
  647. pr_debug("pre_v :%d, main_h : %d, main_v : %d",
  648. sc->pre_vratio, sc->main_hratio, sc->main_vratio);
  649. return 0;
  650. }
  651. static int __gsc_s_ctrl(struct gsc_ctx *ctx, struct v4l2_ctrl *ctrl)
  652. {
  653. struct gsc_dev *gsc = ctx->gsc_dev;
  654. struct gsc_variant *variant = gsc->variant;
  655. unsigned int flags = GSC_DST_FMT | GSC_SRC_FMT;
  656. int ret = 0;
  657. if (ctrl->flags & V4L2_CTRL_FLAG_INACTIVE)
  658. return 0;
  659. switch (ctrl->id) {
  660. case V4L2_CID_HFLIP:
  661. ctx->hflip = ctrl->val;
  662. break;
  663. case V4L2_CID_VFLIP:
  664. ctx->vflip = ctrl->val;
  665. break;
  666. case V4L2_CID_ROTATE:
  667. if ((ctx->state & flags) == flags) {
  668. ret = gsc_check_scaler_ratio(variant,
  669. ctx->s_frame.crop.width,
  670. ctx->s_frame.crop.height,
  671. ctx->d_frame.crop.width,
  672. ctx->d_frame.crop.height,
  673. ctx->gsc_ctrls.rotate->val,
  674. ctx->out_path);
  675. if (ret)
  676. return -EINVAL;
  677. }
  678. ctx->rotation = ctrl->val;
  679. break;
  680. case V4L2_CID_ALPHA_COMPONENT:
  681. ctx->d_frame.alpha = ctrl->val;
  682. break;
  683. }
  684. ctx->state |= GSC_PARAMS;
  685. return 0;
  686. }
  687. static int gsc_s_ctrl(struct v4l2_ctrl *ctrl)
  688. {
  689. struct gsc_ctx *ctx = ctrl_to_ctx(ctrl);
  690. unsigned long flags;
  691. int ret;
  692. spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
  693. ret = __gsc_s_ctrl(ctx, ctrl);
  694. spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
  695. return ret;
  696. }
  697. static const struct v4l2_ctrl_ops gsc_ctrl_ops = {
  698. .s_ctrl = gsc_s_ctrl,
  699. };
  700. int gsc_ctrls_create(struct gsc_ctx *ctx)
  701. {
  702. if (ctx->ctrls_rdy) {
  703. pr_err("Control handler of this context was created already");
  704. return 0;
  705. }
  706. v4l2_ctrl_handler_init(&ctx->ctrl_handler, GSC_MAX_CTRL_NUM);
  707. ctx->gsc_ctrls.rotate = v4l2_ctrl_new_std(&ctx->ctrl_handler,
  708. &gsc_ctrl_ops, V4L2_CID_ROTATE, 0, 270, 90, 0);
  709. ctx->gsc_ctrls.hflip = v4l2_ctrl_new_std(&ctx->ctrl_handler,
  710. &gsc_ctrl_ops, V4L2_CID_HFLIP, 0, 1, 1, 0);
  711. ctx->gsc_ctrls.vflip = v4l2_ctrl_new_std(&ctx->ctrl_handler,
  712. &gsc_ctrl_ops, V4L2_CID_VFLIP, 0, 1, 1, 0);
  713. ctx->gsc_ctrls.global_alpha = v4l2_ctrl_new_std(&ctx->ctrl_handler,
  714. &gsc_ctrl_ops, V4L2_CID_ALPHA_COMPONENT, 0, 255, 1, 0);
  715. ctx->ctrls_rdy = ctx->ctrl_handler.error == 0;
  716. if (ctx->ctrl_handler.error) {
  717. int err = ctx->ctrl_handler.error;
  718. v4l2_ctrl_handler_free(&ctx->ctrl_handler);
  719. pr_err("Failed to create G-Scaler control handlers");
  720. return err;
  721. }
  722. return 0;
  723. }
  724. void gsc_ctrls_delete(struct gsc_ctx *ctx)
  725. {
  726. if (ctx->ctrls_rdy) {
  727. v4l2_ctrl_handler_free(&ctx->ctrl_handler);
  728. ctx->ctrls_rdy = false;
  729. }
  730. }
  731. /* The color format (num_comp, num_planes) must be already configured. */
  732. int gsc_prepare_addr(struct gsc_ctx *ctx, struct vb2_buffer *vb,
  733. struct gsc_frame *frame, struct gsc_addr *addr)
  734. {
  735. int ret = 0;
  736. u32 pix_size;
  737. if ((vb == NULL) || (frame == NULL))
  738. return -EINVAL;
  739. pix_size = frame->f_width * frame->f_height;
  740. pr_debug("num_planes= %d, num_comp= %d, pix_size= %d",
  741. frame->fmt->num_planes, frame->fmt->num_comp, pix_size);
  742. addr->y = vb2_dma_contig_plane_dma_addr(vb, 0);
  743. if (frame->fmt->num_planes == 1) {
  744. switch (frame->fmt->num_comp) {
  745. case 1:
  746. addr->cb = 0;
  747. addr->cr = 0;
  748. break;
  749. case 2:
  750. /* decompose Y into Y/Cb */
  751. addr->cb = (dma_addr_t)(addr->y + pix_size);
  752. addr->cr = 0;
  753. break;
  754. case 3:
  755. /* decompose Y into Y/Cb/Cr */
  756. addr->cb = (dma_addr_t)(addr->y + pix_size);
  757. if (GSC_YUV420 == frame->fmt->color)
  758. addr->cr = (dma_addr_t)(addr->cb
  759. + (pix_size >> 2));
  760. else /* 422 */
  761. addr->cr = (dma_addr_t)(addr->cb
  762. + (pix_size >> 1));
  763. break;
  764. default:
  765. pr_err("Invalid the number of color planes");
  766. return -EINVAL;
  767. }
  768. } else {
  769. if (frame->fmt->num_planes >= 2)
  770. addr->cb = vb2_dma_contig_plane_dma_addr(vb, 1);
  771. if (frame->fmt->num_planes == 3)
  772. addr->cr = vb2_dma_contig_plane_dma_addr(vb, 2);
  773. }
  774. if ((frame->fmt->pixelformat == V4L2_PIX_FMT_VYUY) ||
  775. (frame->fmt->pixelformat == V4L2_PIX_FMT_YVYU) ||
  776. (frame->fmt->pixelformat == V4L2_PIX_FMT_YVU420) ||
  777. (frame->fmt->pixelformat == V4L2_PIX_FMT_YVU420M))
  778. swap(addr->cb, addr->cr);
  779. pr_debug("ADDR: y= %pad cb= %pad cr= %pad ret= %d",
  780. &addr->y, &addr->cb, &addr->cr, ret);
  781. return ret;
  782. }
  783. static irqreturn_t gsc_irq_handler(int irq, void *priv)
  784. {
  785. struct gsc_dev *gsc = priv;
  786. struct gsc_ctx *ctx;
  787. int gsc_irq;
  788. gsc_irq = gsc_hw_get_irq_status(gsc);
  789. gsc_hw_clear_irq(gsc, gsc_irq);
  790. if (gsc_irq == GSC_IRQ_OVERRUN) {
  791. pr_err("Local path input over-run interrupt has occurred!\n");
  792. return IRQ_HANDLED;
  793. }
  794. spin_lock(&gsc->slock);
  795. if (test_and_clear_bit(ST_M2M_PEND, &gsc->state)) {
  796. gsc_hw_enable_control(gsc, false);
  797. if (test_and_clear_bit(ST_M2M_SUSPENDING, &gsc->state)) {
  798. set_bit(ST_M2M_SUSPENDED, &gsc->state);
  799. wake_up(&gsc->irq_queue);
  800. goto isr_unlock;
  801. }
  802. ctx = v4l2_m2m_get_curr_priv(gsc->m2m.m2m_dev);
  803. if (!ctx || !ctx->m2m_ctx)
  804. goto isr_unlock;
  805. spin_unlock(&gsc->slock);
  806. gsc_m2m_job_finish(ctx, VB2_BUF_STATE_DONE);
  807. /* wake_up job_abort, stop_streaming */
  808. if (ctx->state & GSC_CTX_STOP_REQ) {
  809. ctx->state &= ~GSC_CTX_STOP_REQ;
  810. wake_up(&gsc->irq_queue);
  811. }
  812. return IRQ_HANDLED;
  813. }
  814. isr_unlock:
  815. spin_unlock(&gsc->slock);
  816. return IRQ_HANDLED;
  817. }
  818. static struct gsc_pix_max gsc_v_100_max = {
  819. .org_scaler_bypass_w = 8192,
  820. .org_scaler_bypass_h = 8192,
  821. .org_scaler_input_w = 4800,
  822. .org_scaler_input_h = 3344,
  823. .real_rot_dis_w = 4800,
  824. .real_rot_dis_h = 3344,
  825. .real_rot_en_w = 2047,
  826. .real_rot_en_h = 2047,
  827. .target_rot_dis_w = 4800,
  828. .target_rot_dis_h = 3344,
  829. .target_rot_en_w = 2016,
  830. .target_rot_en_h = 2016,
  831. };
  832. static struct gsc_pix_min gsc_v_100_min = {
  833. .org_w = 64,
  834. .org_h = 32,
  835. .real_w = 64,
  836. .real_h = 32,
  837. .target_rot_dis_w = 64,
  838. .target_rot_dis_h = 32,
  839. .target_rot_en_w = 32,
  840. .target_rot_en_h = 16,
  841. };
  842. static struct gsc_pix_align gsc_v_100_align = {
  843. .org_h = 16,
  844. .org_w = 16, /* yuv420 : 16, others : 8 */
  845. .offset_h = 2, /* yuv420/422 : 2, others : 1 */
  846. .real_w = 16, /* yuv420/422 : 4~16, others : 2~8 */
  847. .real_h = 16, /* yuv420 : 4~16, others : 1 */
  848. .target_w = 2, /* yuv420/422 : 2, others : 1 */
  849. .target_h = 2, /* yuv420 : 2, others : 1 */
  850. };
  851. static struct gsc_variant gsc_v_100_variant = {
  852. .pix_max = &gsc_v_100_max,
  853. .pix_min = &gsc_v_100_min,
  854. .pix_align = &gsc_v_100_align,
  855. .in_buf_cnt = 32,
  856. .out_buf_cnt = 32,
  857. .sc_up_max = 8,
  858. .sc_down_max = 16,
  859. .poly_sc_down_max = 4,
  860. .pre_sc_down_max = 4,
  861. .local_sc_down = 2,
  862. };
  863. static struct gsc_driverdata gsc_v_100_drvdata = {
  864. .variant = {
  865. [0] = &gsc_v_100_variant,
  866. [1] = &gsc_v_100_variant,
  867. [2] = &gsc_v_100_variant,
  868. [3] = &gsc_v_100_variant,
  869. },
  870. .num_entities = 4,
  871. .clk_names = { "gscl" },
  872. .num_clocks = 1,
  873. };
  874. static struct gsc_driverdata gsc_5433_drvdata = {
  875. .variant = {
  876. [0] = &gsc_v_100_variant,
  877. [1] = &gsc_v_100_variant,
  878. [2] = &gsc_v_100_variant,
  879. },
  880. .num_entities = 3,
  881. .clk_names = { "pclk", "aclk", "aclk_xiu", "aclk_gsclbend" },
  882. .num_clocks = 4,
  883. };
  884. static const struct of_device_id exynos_gsc_match[] = {
  885. {
  886. .compatible = "samsung,exynos5-gsc",
  887. .data = &gsc_v_100_drvdata,
  888. },
  889. {
  890. .compatible = "samsung,exynos5433-gsc",
  891. .data = &gsc_5433_drvdata,
  892. },
  893. {},
  894. };
  895. MODULE_DEVICE_TABLE(of, exynos_gsc_match);
  896. static int gsc_probe(struct platform_device *pdev)
  897. {
  898. struct gsc_dev *gsc;
  899. struct resource *res;
  900. struct device *dev = &pdev->dev;
  901. const struct gsc_driverdata *drv_data = of_device_get_match_data(dev);
  902. int ret;
  903. int i;
  904. gsc = devm_kzalloc(dev, sizeof(struct gsc_dev), GFP_KERNEL);
  905. if (!gsc)
  906. return -ENOMEM;
  907. ret = of_alias_get_id(pdev->dev.of_node, "gsc");
  908. if (ret < 0)
  909. return ret;
  910. gsc->id = ret;
  911. if (gsc->id >= drv_data->num_entities) {
  912. dev_err(dev, "Invalid platform device id: %d\n", gsc->id);
  913. return -EINVAL;
  914. }
  915. gsc->num_clocks = drv_data->num_clocks;
  916. gsc->variant = drv_data->variant[gsc->id];
  917. gsc->pdev = pdev;
  918. init_waitqueue_head(&gsc->irq_queue);
  919. spin_lock_init(&gsc->slock);
  920. mutex_init(&gsc->lock);
  921. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  922. gsc->regs = devm_ioremap_resource(dev, res);
  923. if (IS_ERR(gsc->regs))
  924. return PTR_ERR(gsc->regs);
  925. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  926. if (!res) {
  927. dev_err(dev, "failed to get IRQ resource\n");
  928. return -ENXIO;
  929. }
  930. for (i = 0; i < gsc->num_clocks; i++) {
  931. gsc->clock[i] = devm_clk_get(dev, drv_data->clk_names[i]);
  932. if (IS_ERR(gsc->clock[i])) {
  933. dev_err(dev, "failed to get clock: %s\n",
  934. drv_data->clk_names[i]);
  935. return PTR_ERR(gsc->clock[i]);
  936. }
  937. }
  938. for (i = 0; i < gsc->num_clocks; i++) {
  939. ret = clk_prepare_enable(gsc->clock[i]);
  940. if (ret) {
  941. dev_err(dev, "clock prepare failed for clock: %s\n",
  942. drv_data->clk_names[i]);
  943. while (--i >= 0)
  944. clk_disable_unprepare(gsc->clock[i]);
  945. return ret;
  946. }
  947. }
  948. ret = devm_request_irq(dev, res->start, gsc_irq_handler,
  949. 0, pdev->name, gsc);
  950. if (ret) {
  951. dev_err(dev, "failed to install irq (%d)\n", ret);
  952. goto err_clk;
  953. }
  954. ret = v4l2_device_register(dev, &gsc->v4l2_dev);
  955. if (ret)
  956. goto err_clk;
  957. ret = gsc_register_m2m_device(gsc);
  958. if (ret)
  959. goto err_v4l2;
  960. platform_set_drvdata(pdev, gsc);
  961. gsc_hw_set_sw_reset(gsc);
  962. gsc_wait_reset(gsc);
  963. vb2_dma_contig_set_max_seg_size(dev, DMA_BIT_MASK(32));
  964. dev_dbg(dev, "gsc-%d registered successfully\n", gsc->id);
  965. pm_runtime_set_active(dev);
  966. pm_runtime_enable(dev);
  967. return 0;
  968. err_v4l2:
  969. v4l2_device_unregister(&gsc->v4l2_dev);
  970. err_clk:
  971. for (i = gsc->num_clocks - 1; i >= 0; i--)
  972. clk_disable_unprepare(gsc->clock[i]);
  973. return ret;
  974. }
  975. static int gsc_remove(struct platform_device *pdev)
  976. {
  977. struct gsc_dev *gsc = platform_get_drvdata(pdev);
  978. int i;
  979. pm_runtime_get_sync(&pdev->dev);
  980. gsc_unregister_m2m_device(gsc);
  981. v4l2_device_unregister(&gsc->v4l2_dev);
  982. vb2_dma_contig_clear_max_seg_size(&pdev->dev);
  983. for (i = 0; i < gsc->num_clocks; i++)
  984. clk_disable_unprepare(gsc->clock[i]);
  985. pm_runtime_put_noidle(&pdev->dev);
  986. pm_runtime_disable(&pdev->dev);
  987. dev_dbg(&pdev->dev, "%s driver unloaded\n", pdev->name);
  988. return 0;
  989. }
  990. #ifdef CONFIG_PM
  991. static int gsc_m2m_suspend(struct gsc_dev *gsc)
  992. {
  993. unsigned long flags;
  994. int timeout;
  995. spin_lock_irqsave(&gsc->slock, flags);
  996. if (!gsc_m2m_pending(gsc)) {
  997. spin_unlock_irqrestore(&gsc->slock, flags);
  998. return 0;
  999. }
  1000. clear_bit(ST_M2M_SUSPENDED, &gsc->state);
  1001. set_bit(ST_M2M_SUSPENDING, &gsc->state);
  1002. spin_unlock_irqrestore(&gsc->slock, flags);
  1003. timeout = wait_event_timeout(gsc->irq_queue,
  1004. test_bit(ST_M2M_SUSPENDED, &gsc->state),
  1005. GSC_SHUTDOWN_TIMEOUT);
  1006. clear_bit(ST_M2M_SUSPENDING, &gsc->state);
  1007. return timeout == 0 ? -EAGAIN : 0;
  1008. }
  1009. static void gsc_m2m_resume(struct gsc_dev *gsc)
  1010. {
  1011. struct gsc_ctx *ctx;
  1012. unsigned long flags;
  1013. spin_lock_irqsave(&gsc->slock, flags);
  1014. /* Clear for full H/W setup in first run after resume */
  1015. ctx = gsc->m2m.ctx;
  1016. gsc->m2m.ctx = NULL;
  1017. spin_unlock_irqrestore(&gsc->slock, flags);
  1018. if (test_and_clear_bit(ST_M2M_SUSPENDED, &gsc->state))
  1019. gsc_m2m_job_finish(ctx, VB2_BUF_STATE_ERROR);
  1020. }
  1021. static int gsc_runtime_resume(struct device *dev)
  1022. {
  1023. struct gsc_dev *gsc = dev_get_drvdata(dev);
  1024. int ret = 0;
  1025. int i;
  1026. pr_debug("gsc%d: state: 0x%lx\n", gsc->id, gsc->state);
  1027. for (i = 0; i < gsc->num_clocks; i++) {
  1028. ret = clk_prepare_enable(gsc->clock[i]);
  1029. if (ret) {
  1030. while (--i >= 0)
  1031. clk_disable_unprepare(gsc->clock[i]);
  1032. return ret;
  1033. }
  1034. }
  1035. gsc_hw_set_sw_reset(gsc);
  1036. gsc_wait_reset(gsc);
  1037. gsc_m2m_resume(gsc);
  1038. return 0;
  1039. }
  1040. static int gsc_runtime_suspend(struct device *dev)
  1041. {
  1042. struct gsc_dev *gsc = dev_get_drvdata(dev);
  1043. int ret = 0;
  1044. int i;
  1045. ret = gsc_m2m_suspend(gsc);
  1046. if (ret)
  1047. return ret;
  1048. for (i = gsc->num_clocks - 1; i >= 0; i--)
  1049. clk_disable_unprepare(gsc->clock[i]);
  1050. pr_debug("gsc%d: state: 0x%lx\n", gsc->id, gsc->state);
  1051. return ret;
  1052. }
  1053. #endif
  1054. static const struct dev_pm_ops gsc_pm_ops = {
  1055. SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
  1056. pm_runtime_force_resume)
  1057. SET_RUNTIME_PM_OPS(gsc_runtime_suspend, gsc_runtime_resume, NULL)
  1058. };
  1059. static struct platform_driver gsc_driver = {
  1060. .probe = gsc_probe,
  1061. .remove = gsc_remove,
  1062. .driver = {
  1063. .name = GSC_MODULE_NAME,
  1064. .pm = &gsc_pm_ops,
  1065. .of_match_table = exynos_gsc_match,
  1066. }
  1067. };
  1068. module_platform_driver(gsc_driver);
  1069. MODULE_AUTHOR("Hyunwong Kim <khw0178.kim@samsung.com>");
  1070. MODULE_DESCRIPTION("Samsung EXYNOS5 Soc series G-Scaler driver");
  1071. MODULE_LICENSE("GPL");