rc.c 64 KB

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  1. /*
  2. * Copyright(c) 2015, 2016 Intel Corporation.
  3. *
  4. * This file is provided under a dual BSD/GPLv2 license. When using or
  5. * redistributing this file, you may do so under either license.
  6. *
  7. * GPL LICENSE SUMMARY
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of version 2 of the GNU General Public License as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. *
  18. * BSD LICENSE
  19. *
  20. * Redistribution and use in source and binary forms, with or without
  21. * modification, are permitted provided that the following conditions
  22. * are met:
  23. *
  24. * - Redistributions of source code must retain the above copyright
  25. * notice, this list of conditions and the following disclaimer.
  26. * - Redistributions in binary form must reproduce the above copyright
  27. * notice, this list of conditions and the following disclaimer in
  28. * the documentation and/or other materials provided with the
  29. * distribution.
  30. * - Neither the name of Intel Corporation nor the names of its
  31. * contributors may be used to endorse or promote products derived
  32. * from this software without specific prior written permission.
  33. *
  34. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  35. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  36. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  37. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  38. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  39. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  40. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  41. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  42. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  43. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  44. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  45. *
  46. */
  47. #include <linux/io.h>
  48. #include <rdma/rdma_vt.h>
  49. #include <rdma/rdmavt_qp.h>
  50. #include "hfi.h"
  51. #include "qp.h"
  52. #include "verbs_txreq.h"
  53. #include "trace.h"
  54. /* cut down ridiculously long IB macro names */
  55. #define OP(x) RC_OP(x)
  56. static u32 restart_sge(struct rvt_sge_state *ss, struct rvt_swqe *wqe,
  57. u32 psn, u32 pmtu)
  58. {
  59. u32 len;
  60. len = delta_psn(psn, wqe->psn) * pmtu;
  61. ss->sge = wqe->sg_list[0];
  62. ss->sg_list = wqe->sg_list + 1;
  63. ss->num_sge = wqe->wr.num_sge;
  64. ss->total_len = wqe->length;
  65. rvt_skip_sge(ss, len, false);
  66. return wqe->length - len;
  67. }
  68. /**
  69. * make_rc_ack - construct a response packet (ACK, NAK, or RDMA read)
  70. * @dev: the device for this QP
  71. * @qp: a pointer to the QP
  72. * @ohdr: a pointer to the IB header being constructed
  73. * @ps: the xmit packet state
  74. *
  75. * Return 1 if constructed; otherwise, return 0.
  76. * Note that we are in the responder's side of the QP context.
  77. * Note the QP s_lock must be held.
  78. */
  79. static int make_rc_ack(struct hfi1_ibdev *dev, struct rvt_qp *qp,
  80. struct ib_other_headers *ohdr,
  81. struct hfi1_pkt_state *ps)
  82. {
  83. struct rvt_ack_entry *e;
  84. u32 hwords;
  85. u32 len;
  86. u32 bth0;
  87. u32 bth2;
  88. int middle = 0;
  89. u32 pmtu = qp->pmtu;
  90. struct hfi1_qp_priv *priv = qp->priv;
  91. lockdep_assert_held(&qp->s_lock);
  92. /* Don't send an ACK if we aren't supposed to. */
  93. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
  94. goto bail;
  95. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  96. hwords = 5;
  97. switch (qp->s_ack_state) {
  98. case OP(RDMA_READ_RESPONSE_LAST):
  99. case OP(RDMA_READ_RESPONSE_ONLY):
  100. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  101. if (e->rdma_sge.mr) {
  102. rvt_put_mr(e->rdma_sge.mr);
  103. e->rdma_sge.mr = NULL;
  104. }
  105. /* FALLTHROUGH */
  106. case OP(ATOMIC_ACKNOWLEDGE):
  107. /*
  108. * We can increment the tail pointer now that the last
  109. * response has been sent instead of only being
  110. * constructed.
  111. */
  112. if (++qp->s_tail_ack_queue > HFI1_MAX_RDMA_ATOMIC)
  113. qp->s_tail_ack_queue = 0;
  114. /* FALLTHROUGH */
  115. case OP(SEND_ONLY):
  116. case OP(ACKNOWLEDGE):
  117. /* Check for no next entry in the queue. */
  118. if (qp->r_head_ack_queue == qp->s_tail_ack_queue) {
  119. if (qp->s_flags & RVT_S_ACK_PENDING)
  120. goto normal;
  121. goto bail;
  122. }
  123. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  124. if (e->opcode == OP(RDMA_READ_REQUEST)) {
  125. /*
  126. * If a RDMA read response is being resent and
  127. * we haven't seen the duplicate request yet,
  128. * then stop sending the remaining responses the
  129. * responder has seen until the requester re-sends it.
  130. */
  131. len = e->rdma_sge.sge_length;
  132. if (len && !e->rdma_sge.mr) {
  133. qp->s_tail_ack_queue = qp->r_head_ack_queue;
  134. goto bail;
  135. }
  136. /* Copy SGE state in case we need to resend */
  137. ps->s_txreq->mr = e->rdma_sge.mr;
  138. if (ps->s_txreq->mr)
  139. rvt_get_mr(ps->s_txreq->mr);
  140. qp->s_ack_rdma_sge.sge = e->rdma_sge;
  141. qp->s_ack_rdma_sge.num_sge = 1;
  142. ps->s_txreq->ss = &qp->s_ack_rdma_sge;
  143. if (len > pmtu) {
  144. len = pmtu;
  145. qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST);
  146. } else {
  147. qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY);
  148. e->sent = 1;
  149. }
  150. ohdr->u.aeth = rvt_compute_aeth(qp);
  151. hwords++;
  152. qp->s_ack_rdma_psn = e->psn;
  153. bth2 = mask_psn(qp->s_ack_rdma_psn++);
  154. } else {
  155. /* COMPARE_SWAP or FETCH_ADD */
  156. ps->s_txreq->ss = NULL;
  157. len = 0;
  158. qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
  159. ohdr->u.at.aeth = rvt_compute_aeth(qp);
  160. ib_u64_put(e->atomic_data, &ohdr->u.at.atomic_ack_eth);
  161. hwords += sizeof(ohdr->u.at) / sizeof(u32);
  162. bth2 = mask_psn(e->psn);
  163. e->sent = 1;
  164. }
  165. bth0 = qp->s_ack_state << 24;
  166. break;
  167. case OP(RDMA_READ_RESPONSE_FIRST):
  168. qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  169. /* FALLTHROUGH */
  170. case OP(RDMA_READ_RESPONSE_MIDDLE):
  171. ps->s_txreq->ss = &qp->s_ack_rdma_sge;
  172. ps->s_txreq->mr = qp->s_ack_rdma_sge.sge.mr;
  173. if (ps->s_txreq->mr)
  174. rvt_get_mr(ps->s_txreq->mr);
  175. len = qp->s_ack_rdma_sge.sge.sge_length;
  176. if (len > pmtu) {
  177. len = pmtu;
  178. middle = HFI1_CAP_IS_KSET(SDMA_AHG);
  179. } else {
  180. ohdr->u.aeth = rvt_compute_aeth(qp);
  181. hwords++;
  182. qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
  183. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  184. e->sent = 1;
  185. }
  186. bth0 = qp->s_ack_state << 24;
  187. bth2 = mask_psn(qp->s_ack_rdma_psn++);
  188. break;
  189. default:
  190. normal:
  191. /*
  192. * Send a regular ACK.
  193. * Set the s_ack_state so we wait until after sending
  194. * the ACK before setting s_ack_state to ACKNOWLEDGE
  195. * (see above).
  196. */
  197. qp->s_ack_state = OP(SEND_ONLY);
  198. qp->s_flags &= ~RVT_S_ACK_PENDING;
  199. ps->s_txreq->ss = NULL;
  200. if (qp->s_nak_state)
  201. ohdr->u.aeth =
  202. cpu_to_be32((qp->r_msn & IB_MSN_MASK) |
  203. (qp->s_nak_state <<
  204. IB_AETH_CREDIT_SHIFT));
  205. else
  206. ohdr->u.aeth = rvt_compute_aeth(qp);
  207. hwords++;
  208. len = 0;
  209. bth0 = OP(ACKNOWLEDGE) << 24;
  210. bth2 = mask_psn(qp->s_ack_psn);
  211. }
  212. qp->s_rdma_ack_cnt++;
  213. qp->s_hdrwords = hwords;
  214. ps->s_txreq->sde = priv->s_sde;
  215. ps->s_txreq->s_cur_size = len;
  216. hfi1_make_ruc_header(qp, ohdr, bth0, bth2, middle, ps);
  217. /* pbc */
  218. ps->s_txreq->hdr_dwords = qp->s_hdrwords + 2;
  219. return 1;
  220. bail:
  221. qp->s_ack_state = OP(ACKNOWLEDGE);
  222. /*
  223. * Ensure s_rdma_ack_cnt changes are committed prior to resetting
  224. * RVT_S_RESP_PENDING
  225. */
  226. smp_wmb();
  227. qp->s_flags &= ~(RVT_S_RESP_PENDING
  228. | RVT_S_ACK_PENDING
  229. | RVT_S_AHG_VALID);
  230. return 0;
  231. }
  232. /**
  233. * hfi1_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC)
  234. * @qp: a pointer to the QP
  235. *
  236. * Assumes s_lock is held.
  237. *
  238. * Return 1 if constructed; otherwise, return 0.
  239. */
  240. int hfi1_make_rc_req(struct rvt_qp *qp, struct hfi1_pkt_state *ps)
  241. {
  242. struct hfi1_qp_priv *priv = qp->priv;
  243. struct hfi1_ibdev *dev = to_idev(qp->ibqp.device);
  244. struct ib_other_headers *ohdr;
  245. struct rvt_sge_state *ss;
  246. struct rvt_swqe *wqe;
  247. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  248. u32 hwords = 5;
  249. u32 len;
  250. u32 bth0 = 0;
  251. u32 bth2;
  252. u32 pmtu = qp->pmtu;
  253. char newreq;
  254. int middle = 0;
  255. int delta;
  256. lockdep_assert_held(&qp->s_lock);
  257. ps->s_txreq = get_txreq(ps->dev, qp);
  258. if (IS_ERR(ps->s_txreq))
  259. goto bail_no_tx;
  260. ohdr = &ps->s_txreq->phdr.hdr.u.oth;
  261. if (qp->remote_ah_attr.ah_flags & IB_AH_GRH)
  262. ohdr = &ps->s_txreq->phdr.hdr.u.l.oth;
  263. /* Sending responses has higher priority over sending requests. */
  264. if ((qp->s_flags & RVT_S_RESP_PENDING) &&
  265. make_rc_ack(dev, qp, ohdr, ps))
  266. return 1;
  267. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_SEND_OK)) {
  268. if (!(ib_rvt_state_ops[qp->state] & RVT_FLUSH_SEND))
  269. goto bail;
  270. /* We are in the error state, flush the work request. */
  271. smp_read_barrier_depends(); /* see post_one_send() */
  272. if (qp->s_last == READ_ONCE(qp->s_head))
  273. goto bail;
  274. /* If DMAs are in progress, we can't flush immediately. */
  275. if (iowait_sdma_pending(&priv->s_iowait)) {
  276. qp->s_flags |= RVT_S_WAIT_DMA;
  277. goto bail;
  278. }
  279. clear_ahg(qp);
  280. wqe = rvt_get_swqe_ptr(qp, qp->s_last);
  281. hfi1_send_complete(qp, wqe, qp->s_last != qp->s_acked ?
  282. IB_WC_SUCCESS : IB_WC_WR_FLUSH_ERR);
  283. /* will get called again */
  284. goto done_free_tx;
  285. }
  286. if (qp->s_flags & (RVT_S_WAIT_RNR | RVT_S_WAIT_ACK))
  287. goto bail;
  288. if (cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) {
  289. if (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0) {
  290. qp->s_flags |= RVT_S_WAIT_PSN;
  291. goto bail;
  292. }
  293. qp->s_sending_psn = qp->s_psn;
  294. qp->s_sending_hpsn = qp->s_psn - 1;
  295. }
  296. /* Send a request. */
  297. wqe = rvt_get_swqe_ptr(qp, qp->s_cur);
  298. switch (qp->s_state) {
  299. default:
  300. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_NEXT_SEND_OK))
  301. goto bail;
  302. /*
  303. * Resend an old request or start a new one.
  304. *
  305. * We keep track of the current SWQE so that
  306. * we don't reset the "furthest progress" state
  307. * if we need to back up.
  308. */
  309. newreq = 0;
  310. if (qp->s_cur == qp->s_tail) {
  311. /* Check if send work queue is empty. */
  312. smp_read_barrier_depends(); /* see post_one_send() */
  313. if (qp->s_tail == READ_ONCE(qp->s_head)) {
  314. clear_ahg(qp);
  315. goto bail;
  316. }
  317. /*
  318. * If a fence is requested, wait for previous
  319. * RDMA read and atomic operations to finish.
  320. */
  321. if ((wqe->wr.send_flags & IB_SEND_FENCE) &&
  322. qp->s_num_rd_atomic) {
  323. qp->s_flags |= RVT_S_WAIT_FENCE;
  324. goto bail;
  325. }
  326. /*
  327. * Local operations are processed immediately
  328. * after all prior requests have completed
  329. */
  330. if (wqe->wr.opcode == IB_WR_REG_MR ||
  331. wqe->wr.opcode == IB_WR_LOCAL_INV) {
  332. int local_ops = 0;
  333. int err = 0;
  334. if (qp->s_last != qp->s_cur)
  335. goto bail;
  336. if (++qp->s_cur == qp->s_size)
  337. qp->s_cur = 0;
  338. if (++qp->s_tail == qp->s_size)
  339. qp->s_tail = 0;
  340. if (!(wqe->wr.send_flags &
  341. RVT_SEND_COMPLETION_ONLY)) {
  342. err = rvt_invalidate_rkey(
  343. qp,
  344. wqe->wr.ex.invalidate_rkey);
  345. local_ops = 1;
  346. }
  347. hfi1_send_complete(qp, wqe,
  348. err ? IB_WC_LOC_PROT_ERR
  349. : IB_WC_SUCCESS);
  350. if (local_ops)
  351. atomic_dec(&qp->local_ops_pending);
  352. qp->s_hdrwords = 0;
  353. goto done_free_tx;
  354. }
  355. newreq = 1;
  356. qp->s_psn = wqe->psn;
  357. }
  358. /*
  359. * Note that we have to be careful not to modify the
  360. * original work request since we may need to resend
  361. * it.
  362. */
  363. len = wqe->length;
  364. ss = &qp->s_sge;
  365. bth2 = mask_psn(qp->s_psn);
  366. switch (wqe->wr.opcode) {
  367. case IB_WR_SEND:
  368. case IB_WR_SEND_WITH_IMM:
  369. case IB_WR_SEND_WITH_INV:
  370. /* If no credit, return. */
  371. if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT) &&
  372. rvt_cmp_msn(wqe->ssn, qp->s_lsn + 1) > 0) {
  373. qp->s_flags |= RVT_S_WAIT_SSN_CREDIT;
  374. goto bail;
  375. }
  376. if (len > pmtu) {
  377. qp->s_state = OP(SEND_FIRST);
  378. len = pmtu;
  379. break;
  380. }
  381. if (wqe->wr.opcode == IB_WR_SEND) {
  382. qp->s_state = OP(SEND_ONLY);
  383. } else if (wqe->wr.opcode == IB_WR_SEND_WITH_IMM) {
  384. qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
  385. /* Immediate data comes after the BTH */
  386. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  387. hwords += 1;
  388. } else {
  389. qp->s_state = OP(SEND_ONLY_WITH_INVALIDATE);
  390. /* Invalidate rkey comes after the BTH */
  391. ohdr->u.ieth = cpu_to_be32(
  392. wqe->wr.ex.invalidate_rkey);
  393. hwords += 1;
  394. }
  395. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  396. bth0 |= IB_BTH_SOLICITED;
  397. bth2 |= IB_BTH_REQ_ACK;
  398. if (++qp->s_cur == qp->s_size)
  399. qp->s_cur = 0;
  400. break;
  401. case IB_WR_RDMA_WRITE:
  402. if (newreq && !(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
  403. qp->s_lsn++;
  404. /* FALLTHROUGH */
  405. case IB_WR_RDMA_WRITE_WITH_IMM:
  406. /* If no credit, return. */
  407. if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT) &&
  408. rvt_cmp_msn(wqe->ssn, qp->s_lsn + 1) > 0) {
  409. qp->s_flags |= RVT_S_WAIT_SSN_CREDIT;
  410. goto bail;
  411. }
  412. put_ib_reth_vaddr(
  413. wqe->rdma_wr.remote_addr,
  414. &ohdr->u.rc.reth);
  415. ohdr->u.rc.reth.rkey =
  416. cpu_to_be32(wqe->rdma_wr.rkey);
  417. ohdr->u.rc.reth.length = cpu_to_be32(len);
  418. hwords += sizeof(struct ib_reth) / sizeof(u32);
  419. if (len > pmtu) {
  420. qp->s_state = OP(RDMA_WRITE_FIRST);
  421. len = pmtu;
  422. break;
  423. }
  424. if (wqe->wr.opcode == IB_WR_RDMA_WRITE) {
  425. qp->s_state = OP(RDMA_WRITE_ONLY);
  426. } else {
  427. qp->s_state =
  428. OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
  429. /* Immediate data comes after RETH */
  430. ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
  431. hwords += 1;
  432. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  433. bth0 |= IB_BTH_SOLICITED;
  434. }
  435. bth2 |= IB_BTH_REQ_ACK;
  436. if (++qp->s_cur == qp->s_size)
  437. qp->s_cur = 0;
  438. break;
  439. case IB_WR_RDMA_READ:
  440. /*
  441. * Don't allow more operations to be started
  442. * than the QP limits allow.
  443. */
  444. if (newreq) {
  445. if (qp->s_num_rd_atomic >=
  446. qp->s_max_rd_atomic) {
  447. qp->s_flags |= RVT_S_WAIT_RDMAR;
  448. goto bail;
  449. }
  450. qp->s_num_rd_atomic++;
  451. if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
  452. qp->s_lsn++;
  453. }
  454. put_ib_reth_vaddr(
  455. wqe->rdma_wr.remote_addr,
  456. &ohdr->u.rc.reth);
  457. ohdr->u.rc.reth.rkey =
  458. cpu_to_be32(wqe->rdma_wr.rkey);
  459. ohdr->u.rc.reth.length = cpu_to_be32(len);
  460. qp->s_state = OP(RDMA_READ_REQUEST);
  461. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  462. ss = NULL;
  463. len = 0;
  464. bth2 |= IB_BTH_REQ_ACK;
  465. if (++qp->s_cur == qp->s_size)
  466. qp->s_cur = 0;
  467. break;
  468. case IB_WR_ATOMIC_CMP_AND_SWP:
  469. case IB_WR_ATOMIC_FETCH_AND_ADD:
  470. /*
  471. * Don't allow more operations to be started
  472. * than the QP limits allow.
  473. */
  474. if (newreq) {
  475. if (qp->s_num_rd_atomic >=
  476. qp->s_max_rd_atomic) {
  477. qp->s_flags |= RVT_S_WAIT_RDMAR;
  478. goto bail;
  479. }
  480. qp->s_num_rd_atomic++;
  481. if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
  482. qp->s_lsn++;
  483. }
  484. if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) {
  485. qp->s_state = OP(COMPARE_SWAP);
  486. put_ib_ateth_swap(wqe->atomic_wr.swap,
  487. &ohdr->u.atomic_eth);
  488. put_ib_ateth_compare(wqe->atomic_wr.compare_add,
  489. &ohdr->u.atomic_eth);
  490. } else {
  491. qp->s_state = OP(FETCH_ADD);
  492. put_ib_ateth_swap(wqe->atomic_wr.compare_add,
  493. &ohdr->u.atomic_eth);
  494. put_ib_ateth_compare(0, &ohdr->u.atomic_eth);
  495. }
  496. put_ib_ateth_vaddr(wqe->atomic_wr.remote_addr,
  497. &ohdr->u.atomic_eth);
  498. ohdr->u.atomic_eth.rkey = cpu_to_be32(
  499. wqe->atomic_wr.rkey);
  500. hwords += sizeof(struct ib_atomic_eth) / sizeof(u32);
  501. ss = NULL;
  502. len = 0;
  503. bth2 |= IB_BTH_REQ_ACK;
  504. if (++qp->s_cur == qp->s_size)
  505. qp->s_cur = 0;
  506. break;
  507. default:
  508. goto bail;
  509. }
  510. qp->s_sge.sge = wqe->sg_list[0];
  511. qp->s_sge.sg_list = wqe->sg_list + 1;
  512. qp->s_sge.num_sge = wqe->wr.num_sge;
  513. qp->s_sge.total_len = wqe->length;
  514. qp->s_len = wqe->length;
  515. if (newreq) {
  516. qp->s_tail++;
  517. if (qp->s_tail >= qp->s_size)
  518. qp->s_tail = 0;
  519. }
  520. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  521. qp->s_psn = wqe->lpsn + 1;
  522. else
  523. qp->s_psn++;
  524. break;
  525. case OP(RDMA_READ_RESPONSE_FIRST):
  526. /*
  527. * qp->s_state is normally set to the opcode of the
  528. * last packet constructed for new requests and therefore
  529. * is never set to RDMA read response.
  530. * RDMA_READ_RESPONSE_FIRST is used by the ACK processing
  531. * thread to indicate a SEND needs to be restarted from an
  532. * earlier PSN without interfering with the sending thread.
  533. * See restart_rc().
  534. */
  535. qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
  536. /* FALLTHROUGH */
  537. case OP(SEND_FIRST):
  538. qp->s_state = OP(SEND_MIDDLE);
  539. /* FALLTHROUGH */
  540. case OP(SEND_MIDDLE):
  541. bth2 = mask_psn(qp->s_psn++);
  542. ss = &qp->s_sge;
  543. len = qp->s_len;
  544. if (len > pmtu) {
  545. len = pmtu;
  546. middle = HFI1_CAP_IS_KSET(SDMA_AHG);
  547. break;
  548. }
  549. if (wqe->wr.opcode == IB_WR_SEND) {
  550. qp->s_state = OP(SEND_LAST);
  551. } else if (wqe->wr.opcode == IB_WR_SEND_WITH_IMM) {
  552. qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
  553. /* Immediate data comes after the BTH */
  554. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  555. hwords += 1;
  556. } else {
  557. qp->s_state = OP(SEND_LAST_WITH_INVALIDATE);
  558. /* invalidate data comes after the BTH */
  559. ohdr->u.ieth = cpu_to_be32(wqe->wr.ex.invalidate_rkey);
  560. hwords += 1;
  561. }
  562. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  563. bth0 |= IB_BTH_SOLICITED;
  564. bth2 |= IB_BTH_REQ_ACK;
  565. qp->s_cur++;
  566. if (qp->s_cur >= qp->s_size)
  567. qp->s_cur = 0;
  568. break;
  569. case OP(RDMA_READ_RESPONSE_LAST):
  570. /*
  571. * qp->s_state is normally set to the opcode of the
  572. * last packet constructed for new requests and therefore
  573. * is never set to RDMA read response.
  574. * RDMA_READ_RESPONSE_LAST is used by the ACK processing
  575. * thread to indicate a RDMA write needs to be restarted from
  576. * an earlier PSN without interfering with the sending thread.
  577. * See restart_rc().
  578. */
  579. qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
  580. /* FALLTHROUGH */
  581. case OP(RDMA_WRITE_FIRST):
  582. qp->s_state = OP(RDMA_WRITE_MIDDLE);
  583. /* FALLTHROUGH */
  584. case OP(RDMA_WRITE_MIDDLE):
  585. bth2 = mask_psn(qp->s_psn++);
  586. ss = &qp->s_sge;
  587. len = qp->s_len;
  588. if (len > pmtu) {
  589. len = pmtu;
  590. middle = HFI1_CAP_IS_KSET(SDMA_AHG);
  591. break;
  592. }
  593. if (wqe->wr.opcode == IB_WR_RDMA_WRITE) {
  594. qp->s_state = OP(RDMA_WRITE_LAST);
  595. } else {
  596. qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
  597. /* Immediate data comes after the BTH */
  598. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  599. hwords += 1;
  600. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  601. bth0 |= IB_BTH_SOLICITED;
  602. }
  603. bth2 |= IB_BTH_REQ_ACK;
  604. qp->s_cur++;
  605. if (qp->s_cur >= qp->s_size)
  606. qp->s_cur = 0;
  607. break;
  608. case OP(RDMA_READ_RESPONSE_MIDDLE):
  609. /*
  610. * qp->s_state is normally set to the opcode of the
  611. * last packet constructed for new requests and therefore
  612. * is never set to RDMA read response.
  613. * RDMA_READ_RESPONSE_MIDDLE is used by the ACK processing
  614. * thread to indicate a RDMA read needs to be restarted from
  615. * an earlier PSN without interfering with the sending thread.
  616. * See restart_rc().
  617. */
  618. len = (delta_psn(qp->s_psn, wqe->psn)) * pmtu;
  619. put_ib_reth_vaddr(
  620. wqe->rdma_wr.remote_addr + len,
  621. &ohdr->u.rc.reth);
  622. ohdr->u.rc.reth.rkey =
  623. cpu_to_be32(wqe->rdma_wr.rkey);
  624. ohdr->u.rc.reth.length = cpu_to_be32(wqe->length - len);
  625. qp->s_state = OP(RDMA_READ_REQUEST);
  626. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  627. bth2 = mask_psn(qp->s_psn) | IB_BTH_REQ_ACK;
  628. qp->s_psn = wqe->lpsn + 1;
  629. ss = NULL;
  630. len = 0;
  631. qp->s_cur++;
  632. if (qp->s_cur == qp->s_size)
  633. qp->s_cur = 0;
  634. break;
  635. }
  636. qp->s_sending_hpsn = bth2;
  637. delta = delta_psn(bth2, wqe->psn);
  638. if (delta && delta % HFI1_PSN_CREDIT == 0)
  639. bth2 |= IB_BTH_REQ_ACK;
  640. if (qp->s_flags & RVT_S_SEND_ONE) {
  641. qp->s_flags &= ~RVT_S_SEND_ONE;
  642. qp->s_flags |= RVT_S_WAIT_ACK;
  643. bth2 |= IB_BTH_REQ_ACK;
  644. }
  645. qp->s_len -= len;
  646. qp->s_hdrwords = hwords;
  647. ps->s_txreq->sde = priv->s_sde;
  648. ps->s_txreq->ss = ss;
  649. ps->s_txreq->s_cur_size = len;
  650. hfi1_make_ruc_header(
  651. qp,
  652. ohdr,
  653. bth0 | (qp->s_state << 24),
  654. bth2,
  655. middle,
  656. ps);
  657. /* pbc */
  658. ps->s_txreq->hdr_dwords = qp->s_hdrwords + 2;
  659. return 1;
  660. done_free_tx:
  661. hfi1_put_txreq(ps->s_txreq);
  662. ps->s_txreq = NULL;
  663. return 1;
  664. bail:
  665. hfi1_put_txreq(ps->s_txreq);
  666. bail_no_tx:
  667. ps->s_txreq = NULL;
  668. qp->s_flags &= ~RVT_S_BUSY;
  669. qp->s_hdrwords = 0;
  670. return 0;
  671. }
  672. /**
  673. * hfi1_send_rc_ack - Construct an ACK packet and send it
  674. * @qp: a pointer to the QP
  675. *
  676. * This is called from hfi1_rc_rcv() and handle_receive_interrupt().
  677. * Note that RDMA reads and atomics are handled in the
  678. * send side QP state and send engine.
  679. */
  680. void hfi1_send_rc_ack(struct hfi1_ctxtdata *rcd, struct rvt_qp *qp,
  681. int is_fecn)
  682. {
  683. struct hfi1_ibport *ibp = rcd_to_iport(rcd);
  684. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  685. u64 pbc, pbc_flags = 0;
  686. u16 lrh0;
  687. u16 sc5;
  688. u32 bth0;
  689. u32 hwords;
  690. u32 vl, plen;
  691. struct send_context *sc;
  692. struct pio_buf *pbuf;
  693. struct ib_header hdr;
  694. struct ib_other_headers *ohdr;
  695. unsigned long flags;
  696. struct hfi1_qp_priv *priv = qp->priv;
  697. /* clear the defer count */
  698. priv->r_adefered = 0;
  699. /* Don't send ACK or NAK if a RDMA read or atomic is pending. */
  700. if (qp->s_flags & RVT_S_RESP_PENDING)
  701. goto queue_ack;
  702. /* Ensure s_rdma_ack_cnt changes are committed */
  703. smp_read_barrier_depends();
  704. if (qp->s_rdma_ack_cnt)
  705. goto queue_ack;
  706. /* Construct the header */
  707. /* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4 */
  708. hwords = 6;
  709. if (unlikely(qp->remote_ah_attr.ah_flags & IB_AH_GRH)) {
  710. hwords += hfi1_make_grh(ibp, &hdr.u.l.grh,
  711. &qp->remote_ah_attr.grh, hwords, 0);
  712. ohdr = &hdr.u.l.oth;
  713. lrh0 = HFI1_LRH_GRH;
  714. } else {
  715. ohdr = &hdr.u.oth;
  716. lrh0 = HFI1_LRH_BTH;
  717. }
  718. /* read pkey_index w/o lock (its atomic) */
  719. bth0 = hfi1_get_pkey(ibp, qp->s_pkey_index) | (OP(ACKNOWLEDGE) << 24);
  720. if (qp->s_mig_state == IB_MIG_MIGRATED)
  721. bth0 |= IB_BTH_MIG_REQ;
  722. if (qp->r_nak_state)
  723. ohdr->u.aeth = cpu_to_be32((qp->r_msn & IB_MSN_MASK) |
  724. (qp->r_nak_state <<
  725. IB_AETH_CREDIT_SHIFT));
  726. else
  727. ohdr->u.aeth = rvt_compute_aeth(qp);
  728. sc5 = ibp->sl_to_sc[qp->remote_ah_attr.sl];
  729. /* set PBC_DC_INFO bit (aka SC[4]) in pbc_flags */
  730. pbc_flags |= ((!!(sc5 & 0x10)) << PBC_DC_INFO_SHIFT);
  731. lrh0 |= (sc5 & 0xf) << 12 | (qp->remote_ah_attr.sl & 0xf) << 4;
  732. hdr.lrh[0] = cpu_to_be16(lrh0);
  733. hdr.lrh[1] = cpu_to_be16(qp->remote_ah_attr.dlid);
  734. hdr.lrh[2] = cpu_to_be16(hwords + SIZE_OF_CRC);
  735. hdr.lrh[3] = cpu_to_be16(ppd->lid | qp->remote_ah_attr.src_path_bits);
  736. ohdr->bth[0] = cpu_to_be32(bth0);
  737. ohdr->bth[1] = cpu_to_be32(qp->remote_qpn);
  738. ohdr->bth[1] |= cpu_to_be32((!!is_fecn) << HFI1_BECN_SHIFT);
  739. ohdr->bth[2] = cpu_to_be32(mask_psn(qp->r_ack_psn));
  740. /* Don't try to send ACKs if the link isn't ACTIVE */
  741. if (driver_lstate(ppd) != IB_PORT_ACTIVE)
  742. return;
  743. sc = rcd->sc;
  744. plen = 2 /* PBC */ + hwords;
  745. vl = sc_to_vlt(ppd->dd, sc5);
  746. pbc = create_pbc(ppd, pbc_flags, qp->srate_mbps, vl, plen);
  747. pbuf = sc_buffer_alloc(sc, plen, NULL, NULL);
  748. if (!pbuf) {
  749. /*
  750. * We have no room to send at the moment. Pass
  751. * responsibility for sending the ACK to the send engine
  752. * so that when enough buffer space becomes available,
  753. * the ACK is sent ahead of other outgoing packets.
  754. */
  755. goto queue_ack;
  756. }
  757. trace_ack_output_ibhdr(dd_from_ibdev(qp->ibqp.device), &hdr);
  758. /* write the pbc and data */
  759. ppd->dd->pio_inline_send(ppd->dd, pbuf, pbc, &hdr, hwords);
  760. return;
  761. queue_ack:
  762. spin_lock_irqsave(&qp->s_lock, flags);
  763. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
  764. goto unlock;
  765. this_cpu_inc(*ibp->rvp.rc_qacks);
  766. qp->s_flags |= RVT_S_ACK_PENDING | RVT_S_RESP_PENDING;
  767. qp->s_nak_state = qp->r_nak_state;
  768. qp->s_ack_psn = qp->r_ack_psn;
  769. if (is_fecn)
  770. qp->s_flags |= RVT_S_ECN;
  771. /* Schedule the send engine. */
  772. hfi1_schedule_send(qp);
  773. unlock:
  774. spin_unlock_irqrestore(&qp->s_lock, flags);
  775. }
  776. /**
  777. * reset_psn - reset the QP state to send starting from PSN
  778. * @qp: the QP
  779. * @psn: the packet sequence number to restart at
  780. *
  781. * This is called from hfi1_rc_rcv() to process an incoming RC ACK
  782. * for the given QP.
  783. * Called at interrupt level with the QP s_lock held.
  784. */
  785. static void reset_psn(struct rvt_qp *qp, u32 psn)
  786. {
  787. u32 n = qp->s_acked;
  788. struct rvt_swqe *wqe = rvt_get_swqe_ptr(qp, n);
  789. u32 opcode;
  790. lockdep_assert_held(&qp->s_lock);
  791. qp->s_cur = n;
  792. /*
  793. * If we are starting the request from the beginning,
  794. * let the normal send code handle initialization.
  795. */
  796. if (cmp_psn(psn, wqe->psn) <= 0) {
  797. qp->s_state = OP(SEND_LAST);
  798. goto done;
  799. }
  800. /* Find the work request opcode corresponding to the given PSN. */
  801. opcode = wqe->wr.opcode;
  802. for (;;) {
  803. int diff;
  804. if (++n == qp->s_size)
  805. n = 0;
  806. if (n == qp->s_tail)
  807. break;
  808. wqe = rvt_get_swqe_ptr(qp, n);
  809. diff = cmp_psn(psn, wqe->psn);
  810. if (diff < 0)
  811. break;
  812. qp->s_cur = n;
  813. /*
  814. * If we are starting the request from the beginning,
  815. * let the normal send code handle initialization.
  816. */
  817. if (diff == 0) {
  818. qp->s_state = OP(SEND_LAST);
  819. goto done;
  820. }
  821. opcode = wqe->wr.opcode;
  822. }
  823. /*
  824. * Set the state to restart in the middle of a request.
  825. * Don't change the s_sge, s_cur_sge, or s_cur_size.
  826. * See hfi1_make_rc_req().
  827. */
  828. switch (opcode) {
  829. case IB_WR_SEND:
  830. case IB_WR_SEND_WITH_IMM:
  831. qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
  832. break;
  833. case IB_WR_RDMA_WRITE:
  834. case IB_WR_RDMA_WRITE_WITH_IMM:
  835. qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
  836. break;
  837. case IB_WR_RDMA_READ:
  838. qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  839. break;
  840. default:
  841. /*
  842. * This case shouldn't happen since its only
  843. * one PSN per req.
  844. */
  845. qp->s_state = OP(SEND_LAST);
  846. }
  847. done:
  848. qp->s_psn = psn;
  849. /*
  850. * Set RVT_S_WAIT_PSN as rc_complete() may start the timer
  851. * asynchronously before the send engine can get scheduled.
  852. * Doing it in hfi1_make_rc_req() is too late.
  853. */
  854. if ((cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) &&
  855. (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0))
  856. qp->s_flags |= RVT_S_WAIT_PSN;
  857. qp->s_flags &= ~RVT_S_AHG_VALID;
  858. }
  859. /*
  860. * Back up requester to resend the last un-ACKed request.
  861. * The QP r_lock and s_lock should be held and interrupts disabled.
  862. */
  863. void hfi1_restart_rc(struct rvt_qp *qp, u32 psn, int wait)
  864. {
  865. struct rvt_swqe *wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  866. struct hfi1_ibport *ibp;
  867. lockdep_assert_held(&qp->r_lock);
  868. lockdep_assert_held(&qp->s_lock);
  869. if (qp->s_retry == 0) {
  870. if (qp->s_mig_state == IB_MIG_ARMED) {
  871. hfi1_migrate_qp(qp);
  872. qp->s_retry = qp->s_retry_cnt;
  873. } else if (qp->s_last == qp->s_acked) {
  874. hfi1_send_complete(qp, wqe, IB_WC_RETRY_EXC_ERR);
  875. rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  876. return;
  877. } else { /* need to handle delayed completion */
  878. return;
  879. }
  880. } else {
  881. qp->s_retry--;
  882. }
  883. ibp = to_iport(qp->ibqp.device, qp->port_num);
  884. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  885. ibp->rvp.n_rc_resends++;
  886. else
  887. ibp->rvp.n_rc_resends += delta_psn(qp->s_psn, psn);
  888. qp->s_flags &= ~(RVT_S_WAIT_FENCE | RVT_S_WAIT_RDMAR |
  889. RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_PSN |
  890. RVT_S_WAIT_ACK);
  891. if (wait)
  892. qp->s_flags |= RVT_S_SEND_ONE;
  893. reset_psn(qp, psn);
  894. }
  895. /*
  896. * Set qp->s_sending_psn to the next PSN after the given one.
  897. * This would be psn+1 except when RDMA reads are present.
  898. */
  899. static void reset_sending_psn(struct rvt_qp *qp, u32 psn)
  900. {
  901. struct rvt_swqe *wqe;
  902. u32 n = qp->s_last;
  903. lockdep_assert_held(&qp->s_lock);
  904. /* Find the work request corresponding to the given PSN. */
  905. for (;;) {
  906. wqe = rvt_get_swqe_ptr(qp, n);
  907. if (cmp_psn(psn, wqe->lpsn) <= 0) {
  908. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  909. qp->s_sending_psn = wqe->lpsn + 1;
  910. else
  911. qp->s_sending_psn = psn + 1;
  912. break;
  913. }
  914. if (++n == qp->s_size)
  915. n = 0;
  916. if (n == qp->s_tail)
  917. break;
  918. }
  919. }
  920. /*
  921. * This should be called with the QP s_lock held and interrupts disabled.
  922. */
  923. void hfi1_rc_send_complete(struct rvt_qp *qp, struct ib_header *hdr)
  924. {
  925. struct ib_other_headers *ohdr;
  926. struct rvt_swqe *wqe;
  927. u32 opcode;
  928. u32 psn;
  929. lockdep_assert_held(&qp->s_lock);
  930. if (!(ib_rvt_state_ops[qp->state] & RVT_SEND_OR_FLUSH_OR_RECV_OK))
  931. return;
  932. /* Find out where the BTH is */
  933. if ((be16_to_cpu(hdr->lrh[0]) & 3) == HFI1_LRH_BTH)
  934. ohdr = &hdr->u.oth;
  935. else
  936. ohdr = &hdr->u.l.oth;
  937. opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
  938. if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
  939. opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
  940. WARN_ON(!qp->s_rdma_ack_cnt);
  941. qp->s_rdma_ack_cnt--;
  942. return;
  943. }
  944. psn = be32_to_cpu(ohdr->bth[2]);
  945. reset_sending_psn(qp, psn);
  946. /*
  947. * Start timer after a packet requesting an ACK has been sent and
  948. * there are still requests that haven't been acked.
  949. */
  950. if ((psn & IB_BTH_REQ_ACK) && qp->s_acked != qp->s_tail &&
  951. !(qp->s_flags &
  952. (RVT_S_TIMER | RVT_S_WAIT_RNR | RVT_S_WAIT_PSN)) &&
  953. (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
  954. rvt_add_retry_timer(qp);
  955. while (qp->s_last != qp->s_acked) {
  956. u32 s_last;
  957. wqe = rvt_get_swqe_ptr(qp, qp->s_last);
  958. if (cmp_psn(wqe->lpsn, qp->s_sending_psn) >= 0 &&
  959. cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0)
  960. break;
  961. s_last = qp->s_last;
  962. if (++s_last >= qp->s_size)
  963. s_last = 0;
  964. qp->s_last = s_last;
  965. /* see post_send() */
  966. barrier();
  967. rvt_put_swqe(wqe);
  968. rvt_qp_swqe_complete(qp, wqe, IB_WC_SUCCESS);
  969. }
  970. /*
  971. * If we were waiting for sends to complete before re-sending,
  972. * and they are now complete, restart sending.
  973. */
  974. trace_hfi1_sendcomplete(qp, psn);
  975. if (qp->s_flags & RVT_S_WAIT_PSN &&
  976. cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
  977. qp->s_flags &= ~RVT_S_WAIT_PSN;
  978. qp->s_sending_psn = qp->s_psn;
  979. qp->s_sending_hpsn = qp->s_psn - 1;
  980. hfi1_schedule_send(qp);
  981. }
  982. }
  983. static inline void update_last_psn(struct rvt_qp *qp, u32 psn)
  984. {
  985. qp->s_last_psn = psn;
  986. }
  987. /*
  988. * Generate a SWQE completion.
  989. * This is similar to hfi1_send_complete but has to check to be sure
  990. * that the SGEs are not being referenced if the SWQE is being resent.
  991. */
  992. static struct rvt_swqe *do_rc_completion(struct rvt_qp *qp,
  993. struct rvt_swqe *wqe,
  994. struct hfi1_ibport *ibp)
  995. {
  996. lockdep_assert_held(&qp->s_lock);
  997. /*
  998. * Don't decrement refcount and don't generate a
  999. * completion if the SWQE is being resent until the send
  1000. * is finished.
  1001. */
  1002. if (cmp_psn(wqe->lpsn, qp->s_sending_psn) < 0 ||
  1003. cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
  1004. u32 s_last;
  1005. rvt_put_swqe(wqe);
  1006. s_last = qp->s_last;
  1007. if (++s_last >= qp->s_size)
  1008. s_last = 0;
  1009. qp->s_last = s_last;
  1010. /* see post_send() */
  1011. barrier();
  1012. rvt_qp_swqe_complete(qp, wqe, IB_WC_SUCCESS);
  1013. } else {
  1014. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  1015. this_cpu_inc(*ibp->rvp.rc_delayed_comp);
  1016. /*
  1017. * If send progress not running attempt to progress
  1018. * SDMA queue.
  1019. */
  1020. if (ppd->dd->flags & HFI1_HAS_SEND_DMA) {
  1021. struct sdma_engine *engine;
  1022. u8 sc5;
  1023. /* For now use sc to find engine */
  1024. sc5 = ibp->sl_to_sc[qp->remote_ah_attr.sl];
  1025. engine = qp_to_sdma_engine(qp, sc5);
  1026. sdma_engine_progress_schedule(engine);
  1027. }
  1028. }
  1029. qp->s_retry = qp->s_retry_cnt;
  1030. update_last_psn(qp, wqe->lpsn);
  1031. /*
  1032. * If we are completing a request which is in the process of
  1033. * being resent, we can stop re-sending it since we know the
  1034. * responder has already seen it.
  1035. */
  1036. if (qp->s_acked == qp->s_cur) {
  1037. if (++qp->s_cur >= qp->s_size)
  1038. qp->s_cur = 0;
  1039. qp->s_acked = qp->s_cur;
  1040. wqe = rvt_get_swqe_ptr(qp, qp->s_cur);
  1041. if (qp->s_acked != qp->s_tail) {
  1042. qp->s_state = OP(SEND_LAST);
  1043. qp->s_psn = wqe->psn;
  1044. }
  1045. } else {
  1046. if (++qp->s_acked >= qp->s_size)
  1047. qp->s_acked = 0;
  1048. if (qp->state == IB_QPS_SQD && qp->s_acked == qp->s_cur)
  1049. qp->s_draining = 0;
  1050. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1051. }
  1052. return wqe;
  1053. }
  1054. /**
  1055. * do_rc_ack - process an incoming RC ACK
  1056. * @qp: the QP the ACK came in on
  1057. * @psn: the packet sequence number of the ACK
  1058. * @opcode: the opcode of the request that resulted in the ACK
  1059. *
  1060. * This is called from rc_rcv_resp() to process an incoming RC ACK
  1061. * for the given QP.
  1062. * May be called at interrupt level, with the QP s_lock held.
  1063. * Returns 1 if OK, 0 if current operation should be aborted (NAK).
  1064. */
  1065. static int do_rc_ack(struct rvt_qp *qp, u32 aeth, u32 psn, int opcode,
  1066. u64 val, struct hfi1_ctxtdata *rcd)
  1067. {
  1068. struct hfi1_ibport *ibp;
  1069. enum ib_wc_status status;
  1070. struct rvt_swqe *wqe;
  1071. int ret = 0;
  1072. u32 ack_psn;
  1073. int diff;
  1074. lockdep_assert_held(&qp->s_lock);
  1075. /*
  1076. * Note that NAKs implicitly ACK outstanding SEND and RDMA write
  1077. * requests and implicitly NAK RDMA read and atomic requests issued
  1078. * before the NAK'ed request. The MSN won't include the NAK'ed
  1079. * request but will include an ACK'ed request(s).
  1080. */
  1081. ack_psn = psn;
  1082. if (aeth >> IB_AETH_NAK_SHIFT)
  1083. ack_psn--;
  1084. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1085. ibp = rcd_to_iport(rcd);
  1086. /*
  1087. * The MSN might be for a later WQE than the PSN indicates so
  1088. * only complete WQEs that the PSN finishes.
  1089. */
  1090. while ((diff = delta_psn(ack_psn, wqe->lpsn)) >= 0) {
  1091. /*
  1092. * RDMA_READ_RESPONSE_ONLY is a special case since
  1093. * we want to generate completion events for everything
  1094. * before the RDMA read, copy the data, then generate
  1095. * the completion for the read.
  1096. */
  1097. if (wqe->wr.opcode == IB_WR_RDMA_READ &&
  1098. opcode == OP(RDMA_READ_RESPONSE_ONLY) &&
  1099. diff == 0) {
  1100. ret = 1;
  1101. goto bail_stop;
  1102. }
  1103. /*
  1104. * If this request is a RDMA read or atomic, and the ACK is
  1105. * for a later operation, this ACK NAKs the RDMA read or
  1106. * atomic. In other words, only a RDMA_READ_LAST or ONLY
  1107. * can ACK a RDMA read and likewise for atomic ops. Note
  1108. * that the NAK case can only happen if relaxed ordering is
  1109. * used and requests are sent after an RDMA read or atomic
  1110. * is sent but before the response is received.
  1111. */
  1112. if ((wqe->wr.opcode == IB_WR_RDMA_READ &&
  1113. (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) ||
  1114. ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1115. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&
  1116. (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) {
  1117. /* Retry this request. */
  1118. if (!(qp->r_flags & RVT_R_RDMAR_SEQ)) {
  1119. qp->r_flags |= RVT_R_RDMAR_SEQ;
  1120. hfi1_restart_rc(qp, qp->s_last_psn + 1, 0);
  1121. if (list_empty(&qp->rspwait)) {
  1122. qp->r_flags |= RVT_R_RSP_SEND;
  1123. rvt_get_qp(qp);
  1124. list_add_tail(&qp->rspwait,
  1125. &rcd->qp_wait_list);
  1126. }
  1127. }
  1128. /*
  1129. * No need to process the ACK/NAK since we are
  1130. * restarting an earlier request.
  1131. */
  1132. goto bail_stop;
  1133. }
  1134. if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1135. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) {
  1136. u64 *vaddr = wqe->sg_list[0].vaddr;
  1137. *vaddr = val;
  1138. }
  1139. if (qp->s_num_rd_atomic &&
  1140. (wqe->wr.opcode == IB_WR_RDMA_READ ||
  1141. wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1142. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) {
  1143. qp->s_num_rd_atomic--;
  1144. /* Restart sending task if fence is complete */
  1145. if ((qp->s_flags & RVT_S_WAIT_FENCE) &&
  1146. !qp->s_num_rd_atomic) {
  1147. qp->s_flags &= ~(RVT_S_WAIT_FENCE |
  1148. RVT_S_WAIT_ACK);
  1149. hfi1_schedule_send(qp);
  1150. } else if (qp->s_flags & RVT_S_WAIT_RDMAR) {
  1151. qp->s_flags &= ~(RVT_S_WAIT_RDMAR |
  1152. RVT_S_WAIT_ACK);
  1153. hfi1_schedule_send(qp);
  1154. }
  1155. }
  1156. wqe = do_rc_completion(qp, wqe, ibp);
  1157. if (qp->s_acked == qp->s_tail)
  1158. break;
  1159. }
  1160. switch (aeth >> IB_AETH_NAK_SHIFT) {
  1161. case 0: /* ACK */
  1162. this_cpu_inc(*ibp->rvp.rc_acks);
  1163. if (qp->s_acked != qp->s_tail) {
  1164. /*
  1165. * We are expecting more ACKs so
  1166. * mod the retry timer.
  1167. */
  1168. rvt_mod_retry_timer(qp);
  1169. /*
  1170. * We can stop re-sending the earlier packets and
  1171. * continue with the next packet the receiver wants.
  1172. */
  1173. if (cmp_psn(qp->s_psn, psn) <= 0)
  1174. reset_psn(qp, psn + 1);
  1175. } else {
  1176. /* No more acks - kill all timers */
  1177. rvt_stop_rc_timers(qp);
  1178. if (cmp_psn(qp->s_psn, psn) <= 0) {
  1179. qp->s_state = OP(SEND_LAST);
  1180. qp->s_psn = psn + 1;
  1181. }
  1182. }
  1183. if (qp->s_flags & RVT_S_WAIT_ACK) {
  1184. qp->s_flags &= ~RVT_S_WAIT_ACK;
  1185. hfi1_schedule_send(qp);
  1186. }
  1187. rvt_get_credit(qp, aeth);
  1188. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  1189. qp->s_retry = qp->s_retry_cnt;
  1190. update_last_psn(qp, psn);
  1191. return 1;
  1192. case 1: /* RNR NAK */
  1193. ibp->rvp.n_rnr_naks++;
  1194. if (qp->s_acked == qp->s_tail)
  1195. goto bail_stop;
  1196. if (qp->s_flags & RVT_S_WAIT_RNR)
  1197. goto bail_stop;
  1198. if (qp->s_rnr_retry == 0) {
  1199. status = IB_WC_RNR_RETRY_EXC_ERR;
  1200. goto class_b;
  1201. }
  1202. if (qp->s_rnr_retry_cnt < 7)
  1203. qp->s_rnr_retry--;
  1204. /* The last valid PSN is the previous PSN. */
  1205. update_last_psn(qp, psn - 1);
  1206. ibp->rvp.n_rc_resends += delta_psn(qp->s_psn, psn);
  1207. reset_psn(qp, psn);
  1208. qp->s_flags &= ~(RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_ACK);
  1209. rvt_stop_rc_timers(qp);
  1210. rvt_add_rnr_timer(qp, aeth);
  1211. return 0;
  1212. case 3: /* NAK */
  1213. if (qp->s_acked == qp->s_tail)
  1214. goto bail_stop;
  1215. /* The last valid PSN is the previous PSN. */
  1216. update_last_psn(qp, psn - 1);
  1217. switch ((aeth >> IB_AETH_CREDIT_SHIFT) &
  1218. IB_AETH_CREDIT_MASK) {
  1219. case 0: /* PSN sequence error */
  1220. ibp->rvp.n_seq_naks++;
  1221. /*
  1222. * Back up to the responder's expected PSN.
  1223. * Note that we might get a NAK in the middle of an
  1224. * RDMA READ response which terminates the RDMA
  1225. * READ.
  1226. */
  1227. hfi1_restart_rc(qp, psn, 0);
  1228. hfi1_schedule_send(qp);
  1229. break;
  1230. case 1: /* Invalid Request */
  1231. status = IB_WC_REM_INV_REQ_ERR;
  1232. ibp->rvp.n_other_naks++;
  1233. goto class_b;
  1234. case 2: /* Remote Access Error */
  1235. status = IB_WC_REM_ACCESS_ERR;
  1236. ibp->rvp.n_other_naks++;
  1237. goto class_b;
  1238. case 3: /* Remote Operation Error */
  1239. status = IB_WC_REM_OP_ERR;
  1240. ibp->rvp.n_other_naks++;
  1241. class_b:
  1242. if (qp->s_last == qp->s_acked) {
  1243. hfi1_send_complete(qp, wqe, status);
  1244. rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  1245. }
  1246. break;
  1247. default:
  1248. /* Ignore other reserved NAK error codes */
  1249. goto reserved;
  1250. }
  1251. qp->s_retry = qp->s_retry_cnt;
  1252. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  1253. goto bail_stop;
  1254. default: /* 2: reserved */
  1255. reserved:
  1256. /* Ignore reserved NAK codes. */
  1257. goto bail_stop;
  1258. }
  1259. /* cannot be reached */
  1260. bail_stop:
  1261. rvt_stop_rc_timers(qp);
  1262. return ret;
  1263. }
  1264. /*
  1265. * We have seen an out of sequence RDMA read middle or last packet.
  1266. * This ACKs SENDs and RDMA writes up to the first RDMA read or atomic SWQE.
  1267. */
  1268. static void rdma_seq_err(struct rvt_qp *qp, struct hfi1_ibport *ibp, u32 psn,
  1269. struct hfi1_ctxtdata *rcd)
  1270. {
  1271. struct rvt_swqe *wqe;
  1272. lockdep_assert_held(&qp->s_lock);
  1273. /* Remove QP from retry timer */
  1274. rvt_stop_rc_timers(qp);
  1275. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1276. while (cmp_psn(psn, wqe->lpsn) > 0) {
  1277. if (wqe->wr.opcode == IB_WR_RDMA_READ ||
  1278. wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1279. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
  1280. break;
  1281. wqe = do_rc_completion(qp, wqe, ibp);
  1282. }
  1283. ibp->rvp.n_rdma_seq++;
  1284. qp->r_flags |= RVT_R_RDMAR_SEQ;
  1285. hfi1_restart_rc(qp, qp->s_last_psn + 1, 0);
  1286. if (list_empty(&qp->rspwait)) {
  1287. qp->r_flags |= RVT_R_RSP_SEND;
  1288. rvt_get_qp(qp);
  1289. list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
  1290. }
  1291. }
  1292. /**
  1293. * rc_rcv_resp - process an incoming RC response packet
  1294. * @ibp: the port this packet came in on
  1295. * @ohdr: the other headers for this packet
  1296. * @data: the packet data
  1297. * @tlen: the packet length
  1298. * @qp: the QP for this packet
  1299. * @opcode: the opcode for this packet
  1300. * @psn: the packet sequence number for this packet
  1301. * @hdrsize: the header length
  1302. * @pmtu: the path MTU
  1303. *
  1304. * This is called from hfi1_rc_rcv() to process an incoming RC response
  1305. * packet for the given QP.
  1306. * Called at interrupt level.
  1307. */
  1308. static void rc_rcv_resp(struct hfi1_ibport *ibp,
  1309. struct ib_other_headers *ohdr,
  1310. void *data, u32 tlen, struct rvt_qp *qp,
  1311. u32 opcode, u32 psn, u32 hdrsize, u32 pmtu,
  1312. struct hfi1_ctxtdata *rcd)
  1313. {
  1314. struct rvt_swqe *wqe;
  1315. enum ib_wc_status status;
  1316. unsigned long flags;
  1317. int diff;
  1318. u32 pad;
  1319. u32 aeth;
  1320. u64 val;
  1321. spin_lock_irqsave(&qp->s_lock, flags);
  1322. trace_hfi1_ack(qp, psn);
  1323. /* Ignore invalid responses. */
  1324. smp_read_barrier_depends(); /* see post_one_send */
  1325. if (cmp_psn(psn, READ_ONCE(qp->s_next_psn)) >= 0)
  1326. goto ack_done;
  1327. /* Ignore duplicate responses. */
  1328. diff = cmp_psn(psn, qp->s_last_psn);
  1329. if (unlikely(diff <= 0)) {
  1330. /* Update credits for "ghost" ACKs */
  1331. if (diff == 0 && opcode == OP(ACKNOWLEDGE)) {
  1332. aeth = be32_to_cpu(ohdr->u.aeth);
  1333. if ((aeth >> IB_AETH_NAK_SHIFT) == 0)
  1334. rvt_get_credit(qp, aeth);
  1335. }
  1336. goto ack_done;
  1337. }
  1338. /*
  1339. * Skip everything other than the PSN we expect, if we are waiting
  1340. * for a reply to a restarted RDMA read or atomic op.
  1341. */
  1342. if (qp->r_flags & RVT_R_RDMAR_SEQ) {
  1343. if (cmp_psn(psn, qp->s_last_psn + 1) != 0)
  1344. goto ack_done;
  1345. qp->r_flags &= ~RVT_R_RDMAR_SEQ;
  1346. }
  1347. if (unlikely(qp->s_acked == qp->s_tail))
  1348. goto ack_done;
  1349. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1350. status = IB_WC_SUCCESS;
  1351. switch (opcode) {
  1352. case OP(ACKNOWLEDGE):
  1353. case OP(ATOMIC_ACKNOWLEDGE):
  1354. case OP(RDMA_READ_RESPONSE_FIRST):
  1355. aeth = be32_to_cpu(ohdr->u.aeth);
  1356. if (opcode == OP(ATOMIC_ACKNOWLEDGE))
  1357. val = ib_u64_get(&ohdr->u.at.atomic_ack_eth);
  1358. else
  1359. val = 0;
  1360. if (!do_rc_ack(qp, aeth, psn, opcode, val, rcd) ||
  1361. opcode != OP(RDMA_READ_RESPONSE_FIRST))
  1362. goto ack_done;
  1363. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1364. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1365. goto ack_op_err;
  1366. /*
  1367. * If this is a response to a resent RDMA read, we
  1368. * have to be careful to copy the data to the right
  1369. * location.
  1370. */
  1371. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1372. wqe, psn, pmtu);
  1373. goto read_middle;
  1374. case OP(RDMA_READ_RESPONSE_MIDDLE):
  1375. /* no AETH, no ACK */
  1376. if (unlikely(cmp_psn(psn, qp->s_last_psn + 1)))
  1377. goto ack_seq_err;
  1378. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1379. goto ack_op_err;
  1380. read_middle:
  1381. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  1382. goto ack_len_err;
  1383. if (unlikely(pmtu >= qp->s_rdma_read_len))
  1384. goto ack_len_err;
  1385. /*
  1386. * We got a response so update the timeout.
  1387. * 4.096 usec. * (1 << qp->timeout)
  1388. */
  1389. rvt_mod_retry_timer(qp);
  1390. if (qp->s_flags & RVT_S_WAIT_ACK) {
  1391. qp->s_flags &= ~RVT_S_WAIT_ACK;
  1392. hfi1_schedule_send(qp);
  1393. }
  1394. if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE))
  1395. qp->s_retry = qp->s_retry_cnt;
  1396. /*
  1397. * Update the RDMA receive state but do the copy w/o
  1398. * holding the locks and blocking interrupts.
  1399. */
  1400. qp->s_rdma_read_len -= pmtu;
  1401. update_last_psn(qp, psn);
  1402. spin_unlock_irqrestore(&qp->s_lock, flags);
  1403. hfi1_copy_sge(&qp->s_rdma_read_sge, data, pmtu, false, false);
  1404. goto bail;
  1405. case OP(RDMA_READ_RESPONSE_ONLY):
  1406. aeth = be32_to_cpu(ohdr->u.aeth);
  1407. if (!do_rc_ack(qp, aeth, psn, opcode, 0, rcd))
  1408. goto ack_done;
  1409. /* Get the number of bytes the message was padded by. */
  1410. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1411. /*
  1412. * Check that the data size is >= 0 && <= pmtu.
  1413. * Remember to account for ICRC (4).
  1414. */
  1415. if (unlikely(tlen < (hdrsize + pad + 4)))
  1416. goto ack_len_err;
  1417. /*
  1418. * If this is a response to a resent RDMA read, we
  1419. * have to be careful to copy the data to the right
  1420. * location.
  1421. */
  1422. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1423. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1424. wqe, psn, pmtu);
  1425. goto read_last;
  1426. case OP(RDMA_READ_RESPONSE_LAST):
  1427. /* ACKs READ req. */
  1428. if (unlikely(cmp_psn(psn, qp->s_last_psn + 1)))
  1429. goto ack_seq_err;
  1430. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1431. goto ack_op_err;
  1432. /* Get the number of bytes the message was padded by. */
  1433. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1434. /*
  1435. * Check that the data size is >= 1 && <= pmtu.
  1436. * Remember to account for ICRC (4).
  1437. */
  1438. if (unlikely(tlen <= (hdrsize + pad + 4)))
  1439. goto ack_len_err;
  1440. read_last:
  1441. tlen -= hdrsize + pad + 4;
  1442. if (unlikely(tlen != qp->s_rdma_read_len))
  1443. goto ack_len_err;
  1444. aeth = be32_to_cpu(ohdr->u.aeth);
  1445. hfi1_copy_sge(&qp->s_rdma_read_sge, data, tlen, false, false);
  1446. WARN_ON(qp->s_rdma_read_sge.num_sge);
  1447. (void)do_rc_ack(qp, aeth, psn,
  1448. OP(RDMA_READ_RESPONSE_LAST), 0, rcd);
  1449. goto ack_done;
  1450. }
  1451. ack_op_err:
  1452. status = IB_WC_LOC_QP_OP_ERR;
  1453. goto ack_err;
  1454. ack_seq_err:
  1455. rdma_seq_err(qp, ibp, psn, rcd);
  1456. goto ack_done;
  1457. ack_len_err:
  1458. status = IB_WC_LOC_LEN_ERR;
  1459. ack_err:
  1460. if (qp->s_last == qp->s_acked) {
  1461. hfi1_send_complete(qp, wqe, status);
  1462. rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  1463. }
  1464. ack_done:
  1465. spin_unlock_irqrestore(&qp->s_lock, flags);
  1466. bail:
  1467. return;
  1468. }
  1469. static inline void rc_defered_ack(struct hfi1_ctxtdata *rcd,
  1470. struct rvt_qp *qp)
  1471. {
  1472. if (list_empty(&qp->rspwait)) {
  1473. qp->r_flags |= RVT_R_RSP_NAK;
  1474. rvt_get_qp(qp);
  1475. list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
  1476. }
  1477. }
  1478. static inline void rc_cancel_ack(struct rvt_qp *qp)
  1479. {
  1480. struct hfi1_qp_priv *priv = qp->priv;
  1481. priv->r_adefered = 0;
  1482. if (list_empty(&qp->rspwait))
  1483. return;
  1484. list_del_init(&qp->rspwait);
  1485. qp->r_flags &= ~RVT_R_RSP_NAK;
  1486. rvt_put_qp(qp);
  1487. }
  1488. /**
  1489. * rc_rcv_error - process an incoming duplicate or error RC packet
  1490. * @ohdr: the other headers for this packet
  1491. * @data: the packet data
  1492. * @qp: the QP for this packet
  1493. * @opcode: the opcode for this packet
  1494. * @psn: the packet sequence number for this packet
  1495. * @diff: the difference between the PSN and the expected PSN
  1496. *
  1497. * This is called from hfi1_rc_rcv() to process an unexpected
  1498. * incoming RC packet for the given QP.
  1499. * Called at interrupt level.
  1500. * Return 1 if no more processing is needed; otherwise return 0 to
  1501. * schedule a response to be sent.
  1502. */
  1503. static noinline int rc_rcv_error(struct ib_other_headers *ohdr, void *data,
  1504. struct rvt_qp *qp, u32 opcode, u32 psn,
  1505. int diff, struct hfi1_ctxtdata *rcd)
  1506. {
  1507. struct hfi1_ibport *ibp = rcd_to_iport(rcd);
  1508. struct rvt_ack_entry *e;
  1509. unsigned long flags;
  1510. u8 i, prev;
  1511. int old_req;
  1512. trace_hfi1_rcv_error(qp, psn);
  1513. if (diff > 0) {
  1514. /*
  1515. * Packet sequence error.
  1516. * A NAK will ACK earlier sends and RDMA writes.
  1517. * Don't queue the NAK if we already sent one.
  1518. */
  1519. if (!qp->r_nak_state) {
  1520. ibp->rvp.n_rc_seqnak++;
  1521. qp->r_nak_state = IB_NAK_PSN_ERROR;
  1522. /* Use the expected PSN. */
  1523. qp->r_ack_psn = qp->r_psn;
  1524. /*
  1525. * Wait to send the sequence NAK until all packets
  1526. * in the receive queue have been processed.
  1527. * Otherwise, we end up propagating congestion.
  1528. */
  1529. rc_defered_ack(rcd, qp);
  1530. }
  1531. goto done;
  1532. }
  1533. /*
  1534. * Handle a duplicate request. Don't re-execute SEND, RDMA
  1535. * write or atomic op. Don't NAK errors, just silently drop
  1536. * the duplicate request. Note that r_sge, r_len, and
  1537. * r_rcv_len may be in use so don't modify them.
  1538. *
  1539. * We are supposed to ACK the earliest duplicate PSN but we
  1540. * can coalesce an outstanding duplicate ACK. We have to
  1541. * send the earliest so that RDMA reads can be restarted at
  1542. * the requester's expected PSN.
  1543. *
  1544. * First, find where this duplicate PSN falls within the
  1545. * ACKs previously sent.
  1546. * old_req is true if there is an older response that is scheduled
  1547. * to be sent before sending this one.
  1548. */
  1549. e = NULL;
  1550. old_req = 1;
  1551. ibp->rvp.n_rc_dupreq++;
  1552. spin_lock_irqsave(&qp->s_lock, flags);
  1553. for (i = qp->r_head_ack_queue; ; i = prev) {
  1554. if (i == qp->s_tail_ack_queue)
  1555. old_req = 0;
  1556. if (i)
  1557. prev = i - 1;
  1558. else
  1559. prev = HFI1_MAX_RDMA_ATOMIC;
  1560. if (prev == qp->r_head_ack_queue) {
  1561. e = NULL;
  1562. break;
  1563. }
  1564. e = &qp->s_ack_queue[prev];
  1565. if (!e->opcode) {
  1566. e = NULL;
  1567. break;
  1568. }
  1569. if (cmp_psn(psn, e->psn) >= 0) {
  1570. if (prev == qp->s_tail_ack_queue &&
  1571. cmp_psn(psn, e->lpsn) <= 0)
  1572. old_req = 0;
  1573. break;
  1574. }
  1575. }
  1576. switch (opcode) {
  1577. case OP(RDMA_READ_REQUEST): {
  1578. struct ib_reth *reth;
  1579. u32 offset;
  1580. u32 len;
  1581. /*
  1582. * If we didn't find the RDMA read request in the ack queue,
  1583. * we can ignore this request.
  1584. */
  1585. if (!e || e->opcode != OP(RDMA_READ_REQUEST))
  1586. goto unlock_done;
  1587. /* RETH comes after BTH */
  1588. reth = &ohdr->u.rc.reth;
  1589. /*
  1590. * Address range must be a subset of the original
  1591. * request and start on pmtu boundaries.
  1592. * We reuse the old ack_queue slot since the requester
  1593. * should not back up and request an earlier PSN for the
  1594. * same request.
  1595. */
  1596. offset = delta_psn(psn, e->psn) * qp->pmtu;
  1597. len = be32_to_cpu(reth->length);
  1598. if (unlikely(offset + len != e->rdma_sge.sge_length))
  1599. goto unlock_done;
  1600. if (e->rdma_sge.mr) {
  1601. rvt_put_mr(e->rdma_sge.mr);
  1602. e->rdma_sge.mr = NULL;
  1603. }
  1604. if (len != 0) {
  1605. u32 rkey = be32_to_cpu(reth->rkey);
  1606. u64 vaddr = get_ib_reth_vaddr(reth);
  1607. int ok;
  1608. ok = rvt_rkey_ok(qp, &e->rdma_sge, len, vaddr, rkey,
  1609. IB_ACCESS_REMOTE_READ);
  1610. if (unlikely(!ok))
  1611. goto unlock_done;
  1612. } else {
  1613. e->rdma_sge.vaddr = NULL;
  1614. e->rdma_sge.length = 0;
  1615. e->rdma_sge.sge_length = 0;
  1616. }
  1617. e->psn = psn;
  1618. if (old_req)
  1619. goto unlock_done;
  1620. qp->s_tail_ack_queue = prev;
  1621. break;
  1622. }
  1623. case OP(COMPARE_SWAP):
  1624. case OP(FETCH_ADD): {
  1625. /*
  1626. * If we didn't find the atomic request in the ack queue
  1627. * or the send engine is already backed up to send an
  1628. * earlier entry, we can ignore this request.
  1629. */
  1630. if (!e || e->opcode != (u8)opcode || old_req)
  1631. goto unlock_done;
  1632. qp->s_tail_ack_queue = prev;
  1633. break;
  1634. }
  1635. default:
  1636. /*
  1637. * Ignore this operation if it doesn't request an ACK
  1638. * or an earlier RDMA read or atomic is going to be resent.
  1639. */
  1640. if (!(psn & IB_BTH_REQ_ACK) || old_req)
  1641. goto unlock_done;
  1642. /*
  1643. * Resend the most recent ACK if this request is
  1644. * after all the previous RDMA reads and atomics.
  1645. */
  1646. if (i == qp->r_head_ack_queue) {
  1647. spin_unlock_irqrestore(&qp->s_lock, flags);
  1648. qp->r_nak_state = 0;
  1649. qp->r_ack_psn = qp->r_psn - 1;
  1650. goto send_ack;
  1651. }
  1652. /*
  1653. * Resend the RDMA read or atomic op which
  1654. * ACKs this duplicate request.
  1655. */
  1656. qp->s_tail_ack_queue = i;
  1657. break;
  1658. }
  1659. qp->s_ack_state = OP(ACKNOWLEDGE);
  1660. qp->s_flags |= RVT_S_RESP_PENDING;
  1661. qp->r_nak_state = 0;
  1662. hfi1_schedule_send(qp);
  1663. unlock_done:
  1664. spin_unlock_irqrestore(&qp->s_lock, flags);
  1665. done:
  1666. return 1;
  1667. send_ack:
  1668. return 0;
  1669. }
  1670. static inline void update_ack_queue(struct rvt_qp *qp, unsigned n)
  1671. {
  1672. unsigned next;
  1673. next = n + 1;
  1674. if (next > HFI1_MAX_RDMA_ATOMIC)
  1675. next = 0;
  1676. qp->s_tail_ack_queue = next;
  1677. qp->s_ack_state = OP(ACKNOWLEDGE);
  1678. }
  1679. static void log_cca_event(struct hfi1_pportdata *ppd, u8 sl, u32 rlid,
  1680. u32 lqpn, u32 rqpn, u8 svc_type)
  1681. {
  1682. struct opa_hfi1_cong_log_event_internal *cc_event;
  1683. unsigned long flags;
  1684. if (sl >= OPA_MAX_SLS)
  1685. return;
  1686. spin_lock_irqsave(&ppd->cc_log_lock, flags);
  1687. ppd->threshold_cong_event_map[sl / 8] |= 1 << (sl % 8);
  1688. ppd->threshold_event_counter++;
  1689. cc_event = &ppd->cc_events[ppd->cc_log_idx++];
  1690. if (ppd->cc_log_idx == OPA_CONG_LOG_ELEMS)
  1691. ppd->cc_log_idx = 0;
  1692. cc_event->lqpn = lqpn & RVT_QPN_MASK;
  1693. cc_event->rqpn = rqpn & RVT_QPN_MASK;
  1694. cc_event->sl = sl;
  1695. cc_event->svc_type = svc_type;
  1696. cc_event->rlid = rlid;
  1697. /* keep timestamp in units of 1.024 usec */
  1698. cc_event->timestamp = ktime_to_ns(ktime_get()) / 1024;
  1699. spin_unlock_irqrestore(&ppd->cc_log_lock, flags);
  1700. }
  1701. void process_becn(struct hfi1_pportdata *ppd, u8 sl, u16 rlid, u32 lqpn,
  1702. u32 rqpn, u8 svc_type)
  1703. {
  1704. struct cca_timer *cca_timer;
  1705. u16 ccti, ccti_incr, ccti_timer, ccti_limit;
  1706. u8 trigger_threshold;
  1707. struct cc_state *cc_state;
  1708. unsigned long flags;
  1709. if (sl >= OPA_MAX_SLS)
  1710. return;
  1711. cc_state = get_cc_state(ppd);
  1712. if (!cc_state)
  1713. return;
  1714. /*
  1715. * 1) increase CCTI (for this SL)
  1716. * 2) select IPG (i.e., call set_link_ipg())
  1717. * 3) start timer
  1718. */
  1719. ccti_limit = cc_state->cct.ccti_limit;
  1720. ccti_incr = cc_state->cong_setting.entries[sl].ccti_increase;
  1721. ccti_timer = cc_state->cong_setting.entries[sl].ccti_timer;
  1722. trigger_threshold =
  1723. cc_state->cong_setting.entries[sl].trigger_threshold;
  1724. spin_lock_irqsave(&ppd->cca_timer_lock, flags);
  1725. cca_timer = &ppd->cca_timer[sl];
  1726. if (cca_timer->ccti < ccti_limit) {
  1727. if (cca_timer->ccti + ccti_incr <= ccti_limit)
  1728. cca_timer->ccti += ccti_incr;
  1729. else
  1730. cca_timer->ccti = ccti_limit;
  1731. set_link_ipg(ppd);
  1732. }
  1733. ccti = cca_timer->ccti;
  1734. if (!hrtimer_active(&cca_timer->hrtimer)) {
  1735. /* ccti_timer is in units of 1.024 usec */
  1736. unsigned long nsec = 1024 * ccti_timer;
  1737. hrtimer_start(&cca_timer->hrtimer, ns_to_ktime(nsec),
  1738. HRTIMER_MODE_REL);
  1739. }
  1740. spin_unlock_irqrestore(&ppd->cca_timer_lock, flags);
  1741. if ((trigger_threshold != 0) && (ccti >= trigger_threshold))
  1742. log_cca_event(ppd, sl, rlid, lqpn, rqpn, svc_type);
  1743. }
  1744. /**
  1745. * hfi1_rc_rcv - process an incoming RC packet
  1746. * @rcd: the context pointer
  1747. * @hdr: the header of this packet
  1748. * @rcv_flags: flags relevant to rcv processing
  1749. * @data: the packet data
  1750. * @tlen: the packet length
  1751. * @qp: the QP for this packet
  1752. *
  1753. * This is called from qp_rcv() to process an incoming RC packet
  1754. * for the given QP.
  1755. * May be called at interrupt level.
  1756. */
  1757. void hfi1_rc_rcv(struct hfi1_packet *packet)
  1758. {
  1759. struct hfi1_ctxtdata *rcd = packet->rcd;
  1760. struct ib_header *hdr = packet->hdr;
  1761. u32 rcv_flags = packet->rcv_flags;
  1762. void *data = packet->ebuf;
  1763. u32 tlen = packet->tlen;
  1764. struct rvt_qp *qp = packet->qp;
  1765. struct hfi1_ibport *ibp = rcd_to_iport(rcd);
  1766. struct ib_other_headers *ohdr = packet->ohdr;
  1767. u32 bth0, opcode;
  1768. u32 hdrsize = packet->hlen;
  1769. u32 psn;
  1770. u32 pad;
  1771. struct ib_wc wc;
  1772. u32 pmtu = qp->pmtu;
  1773. int diff;
  1774. struct ib_reth *reth;
  1775. unsigned long flags;
  1776. int ret, is_fecn = 0;
  1777. bool copy_last = false;
  1778. u32 rkey;
  1779. lockdep_assert_held(&qp->r_lock);
  1780. bth0 = be32_to_cpu(ohdr->bth[0]);
  1781. if (hfi1_ruc_check_hdr(ibp, hdr, rcv_flags & HFI1_HAS_GRH, qp, bth0))
  1782. return;
  1783. is_fecn = process_ecn(qp, packet, false);
  1784. psn = be32_to_cpu(ohdr->bth[2]);
  1785. opcode = (bth0 >> 24) & 0xff;
  1786. /*
  1787. * Process responses (ACKs) before anything else. Note that the
  1788. * packet sequence number will be for something in the send work
  1789. * queue rather than the expected receive packet sequence number.
  1790. * In other words, this QP is the requester.
  1791. */
  1792. if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
  1793. opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
  1794. rc_rcv_resp(ibp, ohdr, data, tlen, qp, opcode, psn,
  1795. hdrsize, pmtu, rcd);
  1796. if (is_fecn)
  1797. goto send_ack;
  1798. return;
  1799. }
  1800. /* Compute 24 bits worth of difference. */
  1801. diff = delta_psn(psn, qp->r_psn);
  1802. if (unlikely(diff)) {
  1803. if (rc_rcv_error(ohdr, data, qp, opcode, psn, diff, rcd))
  1804. return;
  1805. goto send_ack;
  1806. }
  1807. /* Check for opcode sequence errors. */
  1808. switch (qp->r_state) {
  1809. case OP(SEND_FIRST):
  1810. case OP(SEND_MIDDLE):
  1811. if (opcode == OP(SEND_MIDDLE) ||
  1812. opcode == OP(SEND_LAST) ||
  1813. opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
  1814. opcode == OP(SEND_LAST_WITH_INVALIDATE))
  1815. break;
  1816. goto nack_inv;
  1817. case OP(RDMA_WRITE_FIRST):
  1818. case OP(RDMA_WRITE_MIDDLE):
  1819. if (opcode == OP(RDMA_WRITE_MIDDLE) ||
  1820. opcode == OP(RDMA_WRITE_LAST) ||
  1821. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1822. break;
  1823. goto nack_inv;
  1824. default:
  1825. if (opcode == OP(SEND_MIDDLE) ||
  1826. opcode == OP(SEND_LAST) ||
  1827. opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
  1828. opcode == OP(SEND_LAST_WITH_INVALIDATE) ||
  1829. opcode == OP(RDMA_WRITE_MIDDLE) ||
  1830. opcode == OP(RDMA_WRITE_LAST) ||
  1831. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1832. goto nack_inv;
  1833. /*
  1834. * Note that it is up to the requester to not send a new
  1835. * RDMA read or atomic operation before receiving an ACK
  1836. * for the previous operation.
  1837. */
  1838. break;
  1839. }
  1840. if (qp->state == IB_QPS_RTR && !(qp->r_flags & RVT_R_COMM_EST))
  1841. rvt_comm_est(qp);
  1842. /* OK, process the packet. */
  1843. switch (opcode) {
  1844. case OP(SEND_FIRST):
  1845. ret = hfi1_rvt_get_rwqe(qp, 0);
  1846. if (ret < 0)
  1847. goto nack_op_err;
  1848. if (!ret)
  1849. goto rnr_nak;
  1850. qp->r_rcv_len = 0;
  1851. /* FALLTHROUGH */
  1852. case OP(SEND_MIDDLE):
  1853. case OP(RDMA_WRITE_MIDDLE):
  1854. send_middle:
  1855. /* Check for invalid length PMTU or posted rwqe len. */
  1856. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  1857. goto nack_inv;
  1858. qp->r_rcv_len += pmtu;
  1859. if (unlikely(qp->r_rcv_len > qp->r_len))
  1860. goto nack_inv;
  1861. hfi1_copy_sge(&qp->r_sge, data, pmtu, true, false);
  1862. break;
  1863. case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
  1864. /* consume RWQE */
  1865. ret = hfi1_rvt_get_rwqe(qp, 1);
  1866. if (ret < 0)
  1867. goto nack_op_err;
  1868. if (!ret)
  1869. goto rnr_nak;
  1870. goto send_last_imm;
  1871. case OP(SEND_ONLY):
  1872. case OP(SEND_ONLY_WITH_IMMEDIATE):
  1873. case OP(SEND_ONLY_WITH_INVALIDATE):
  1874. ret = hfi1_rvt_get_rwqe(qp, 0);
  1875. if (ret < 0)
  1876. goto nack_op_err;
  1877. if (!ret)
  1878. goto rnr_nak;
  1879. qp->r_rcv_len = 0;
  1880. if (opcode == OP(SEND_ONLY))
  1881. goto no_immediate_data;
  1882. if (opcode == OP(SEND_ONLY_WITH_INVALIDATE))
  1883. goto send_last_inv;
  1884. /* FALLTHROUGH for SEND_ONLY_WITH_IMMEDIATE */
  1885. case OP(SEND_LAST_WITH_IMMEDIATE):
  1886. send_last_imm:
  1887. wc.ex.imm_data = ohdr->u.imm_data;
  1888. wc.wc_flags = IB_WC_WITH_IMM;
  1889. goto send_last;
  1890. case OP(SEND_LAST_WITH_INVALIDATE):
  1891. send_last_inv:
  1892. rkey = be32_to_cpu(ohdr->u.ieth);
  1893. if (rvt_invalidate_rkey(qp, rkey))
  1894. goto no_immediate_data;
  1895. wc.ex.invalidate_rkey = rkey;
  1896. wc.wc_flags = IB_WC_WITH_INVALIDATE;
  1897. goto send_last;
  1898. case OP(RDMA_WRITE_LAST):
  1899. copy_last = rvt_is_user_qp(qp);
  1900. /* fall through */
  1901. case OP(SEND_LAST):
  1902. no_immediate_data:
  1903. wc.wc_flags = 0;
  1904. wc.ex.imm_data = 0;
  1905. send_last:
  1906. /* Get the number of bytes the message was padded by. */
  1907. pad = (bth0 >> 20) & 3;
  1908. /* Check for invalid length. */
  1909. /* LAST len should be >= 1 */
  1910. if (unlikely(tlen < (hdrsize + pad + 4)))
  1911. goto nack_inv;
  1912. /* Don't count the CRC. */
  1913. tlen -= (hdrsize + pad + 4);
  1914. wc.byte_len = tlen + qp->r_rcv_len;
  1915. if (unlikely(wc.byte_len > qp->r_len))
  1916. goto nack_inv;
  1917. hfi1_copy_sge(&qp->r_sge, data, tlen, true, copy_last);
  1918. rvt_put_ss(&qp->r_sge);
  1919. qp->r_msn++;
  1920. if (!__test_and_clear_bit(RVT_R_WRID_VALID, &qp->r_aflags))
  1921. break;
  1922. wc.wr_id = qp->r_wr_id;
  1923. wc.status = IB_WC_SUCCESS;
  1924. if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) ||
  1925. opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
  1926. wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
  1927. else
  1928. wc.opcode = IB_WC_RECV;
  1929. wc.qp = &qp->ibqp;
  1930. wc.src_qp = qp->remote_qpn;
  1931. wc.slid = qp->remote_ah_attr.dlid;
  1932. /*
  1933. * It seems that IB mandates the presence of an SL in a
  1934. * work completion only for the UD transport (see section
  1935. * 11.4.2 of IBTA Vol. 1).
  1936. *
  1937. * However, the way the SL is chosen below is consistent
  1938. * with the way that IB/qib works and is trying avoid
  1939. * introducing incompatibilities.
  1940. *
  1941. * See also OPA Vol. 1, section 9.7.6, and table 9-17.
  1942. */
  1943. wc.sl = qp->remote_ah_attr.sl;
  1944. /* zero fields that are N/A */
  1945. wc.vendor_err = 0;
  1946. wc.pkey_index = 0;
  1947. wc.dlid_path_bits = 0;
  1948. wc.port_num = 0;
  1949. /* Signal completion event if the solicited bit is set. */
  1950. rvt_cq_enter(ibcq_to_rvtcq(qp->ibqp.recv_cq), &wc,
  1951. (bth0 & IB_BTH_SOLICITED) != 0);
  1952. break;
  1953. case OP(RDMA_WRITE_ONLY):
  1954. copy_last = rvt_is_user_qp(qp);
  1955. /* fall through */
  1956. case OP(RDMA_WRITE_FIRST):
  1957. case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
  1958. if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_WRITE)))
  1959. goto nack_inv;
  1960. /* consume RWQE */
  1961. reth = &ohdr->u.rc.reth;
  1962. qp->r_len = be32_to_cpu(reth->length);
  1963. qp->r_rcv_len = 0;
  1964. qp->r_sge.sg_list = NULL;
  1965. if (qp->r_len != 0) {
  1966. u32 rkey = be32_to_cpu(reth->rkey);
  1967. u64 vaddr = get_ib_reth_vaddr(reth);
  1968. int ok;
  1969. /* Check rkey & NAK */
  1970. ok = rvt_rkey_ok(qp, &qp->r_sge.sge, qp->r_len, vaddr,
  1971. rkey, IB_ACCESS_REMOTE_WRITE);
  1972. if (unlikely(!ok))
  1973. goto nack_acc;
  1974. qp->r_sge.num_sge = 1;
  1975. } else {
  1976. qp->r_sge.num_sge = 0;
  1977. qp->r_sge.sge.mr = NULL;
  1978. qp->r_sge.sge.vaddr = NULL;
  1979. qp->r_sge.sge.length = 0;
  1980. qp->r_sge.sge.sge_length = 0;
  1981. }
  1982. if (opcode == OP(RDMA_WRITE_FIRST))
  1983. goto send_middle;
  1984. else if (opcode == OP(RDMA_WRITE_ONLY))
  1985. goto no_immediate_data;
  1986. ret = hfi1_rvt_get_rwqe(qp, 1);
  1987. if (ret < 0)
  1988. goto nack_op_err;
  1989. if (!ret)
  1990. goto rnr_nak;
  1991. wc.ex.imm_data = ohdr->u.rc.imm_data;
  1992. wc.wc_flags = IB_WC_WITH_IMM;
  1993. goto send_last;
  1994. case OP(RDMA_READ_REQUEST): {
  1995. struct rvt_ack_entry *e;
  1996. u32 len;
  1997. u8 next;
  1998. if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_READ)))
  1999. goto nack_inv;
  2000. next = qp->r_head_ack_queue + 1;
  2001. /* s_ack_queue is size HFI1_MAX_RDMA_ATOMIC+1 so use > not >= */
  2002. if (next > HFI1_MAX_RDMA_ATOMIC)
  2003. next = 0;
  2004. spin_lock_irqsave(&qp->s_lock, flags);
  2005. if (unlikely(next == qp->s_tail_ack_queue)) {
  2006. if (!qp->s_ack_queue[next].sent)
  2007. goto nack_inv_unlck;
  2008. update_ack_queue(qp, next);
  2009. }
  2010. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  2011. if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
  2012. rvt_put_mr(e->rdma_sge.mr);
  2013. e->rdma_sge.mr = NULL;
  2014. }
  2015. reth = &ohdr->u.rc.reth;
  2016. len = be32_to_cpu(reth->length);
  2017. if (len) {
  2018. u32 rkey = be32_to_cpu(reth->rkey);
  2019. u64 vaddr = get_ib_reth_vaddr(reth);
  2020. int ok;
  2021. /* Check rkey & NAK */
  2022. ok = rvt_rkey_ok(qp, &e->rdma_sge, len, vaddr,
  2023. rkey, IB_ACCESS_REMOTE_READ);
  2024. if (unlikely(!ok))
  2025. goto nack_acc_unlck;
  2026. /*
  2027. * Update the next expected PSN. We add 1 later
  2028. * below, so only add the remainder here.
  2029. */
  2030. qp->r_psn += rvt_div_mtu(qp, len - 1);
  2031. } else {
  2032. e->rdma_sge.mr = NULL;
  2033. e->rdma_sge.vaddr = NULL;
  2034. e->rdma_sge.length = 0;
  2035. e->rdma_sge.sge_length = 0;
  2036. }
  2037. e->opcode = opcode;
  2038. e->sent = 0;
  2039. e->psn = psn;
  2040. e->lpsn = qp->r_psn;
  2041. /*
  2042. * We need to increment the MSN here instead of when we
  2043. * finish sending the result since a duplicate request would
  2044. * increment it more than once.
  2045. */
  2046. qp->r_msn++;
  2047. qp->r_psn++;
  2048. qp->r_state = opcode;
  2049. qp->r_nak_state = 0;
  2050. qp->r_head_ack_queue = next;
  2051. /* Schedule the send engine. */
  2052. qp->s_flags |= RVT_S_RESP_PENDING;
  2053. hfi1_schedule_send(qp);
  2054. spin_unlock_irqrestore(&qp->s_lock, flags);
  2055. if (is_fecn)
  2056. goto send_ack;
  2057. return;
  2058. }
  2059. case OP(COMPARE_SWAP):
  2060. case OP(FETCH_ADD): {
  2061. struct ib_atomic_eth *ateth;
  2062. struct rvt_ack_entry *e;
  2063. u64 vaddr;
  2064. atomic64_t *maddr;
  2065. u64 sdata;
  2066. u32 rkey;
  2067. u8 next;
  2068. if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC)))
  2069. goto nack_inv;
  2070. next = qp->r_head_ack_queue + 1;
  2071. if (next > HFI1_MAX_RDMA_ATOMIC)
  2072. next = 0;
  2073. spin_lock_irqsave(&qp->s_lock, flags);
  2074. if (unlikely(next == qp->s_tail_ack_queue)) {
  2075. if (!qp->s_ack_queue[next].sent)
  2076. goto nack_inv_unlck;
  2077. update_ack_queue(qp, next);
  2078. }
  2079. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  2080. if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
  2081. rvt_put_mr(e->rdma_sge.mr);
  2082. e->rdma_sge.mr = NULL;
  2083. }
  2084. ateth = &ohdr->u.atomic_eth;
  2085. vaddr = get_ib_ateth_vaddr(ateth);
  2086. if (unlikely(vaddr & (sizeof(u64) - 1)))
  2087. goto nack_inv_unlck;
  2088. rkey = be32_to_cpu(ateth->rkey);
  2089. /* Check rkey & NAK */
  2090. if (unlikely(!rvt_rkey_ok(qp, &qp->r_sge.sge, sizeof(u64),
  2091. vaddr, rkey,
  2092. IB_ACCESS_REMOTE_ATOMIC)))
  2093. goto nack_acc_unlck;
  2094. /* Perform atomic OP and save result. */
  2095. maddr = (atomic64_t *)qp->r_sge.sge.vaddr;
  2096. sdata = get_ib_ateth_swap(ateth);
  2097. e->atomic_data = (opcode == OP(FETCH_ADD)) ?
  2098. (u64)atomic64_add_return(sdata, maddr) - sdata :
  2099. (u64)cmpxchg((u64 *)qp->r_sge.sge.vaddr,
  2100. get_ib_ateth_compare(ateth),
  2101. sdata);
  2102. rvt_put_mr(qp->r_sge.sge.mr);
  2103. qp->r_sge.num_sge = 0;
  2104. e->opcode = opcode;
  2105. e->sent = 0;
  2106. e->psn = psn;
  2107. e->lpsn = psn;
  2108. qp->r_msn++;
  2109. qp->r_psn++;
  2110. qp->r_state = opcode;
  2111. qp->r_nak_state = 0;
  2112. qp->r_head_ack_queue = next;
  2113. /* Schedule the send engine. */
  2114. qp->s_flags |= RVT_S_RESP_PENDING;
  2115. hfi1_schedule_send(qp);
  2116. spin_unlock_irqrestore(&qp->s_lock, flags);
  2117. if (is_fecn)
  2118. goto send_ack;
  2119. return;
  2120. }
  2121. default:
  2122. /* NAK unknown opcodes. */
  2123. goto nack_inv;
  2124. }
  2125. qp->r_psn++;
  2126. qp->r_state = opcode;
  2127. qp->r_ack_psn = psn;
  2128. qp->r_nak_state = 0;
  2129. /* Send an ACK if requested or required. */
  2130. if (psn & IB_BTH_REQ_ACK) {
  2131. struct hfi1_qp_priv *priv = qp->priv;
  2132. if (packet->numpkt == 0) {
  2133. rc_cancel_ack(qp);
  2134. goto send_ack;
  2135. }
  2136. if (priv->r_adefered >= HFI1_PSN_CREDIT) {
  2137. rc_cancel_ack(qp);
  2138. goto send_ack;
  2139. }
  2140. if (unlikely(is_fecn)) {
  2141. rc_cancel_ack(qp);
  2142. goto send_ack;
  2143. }
  2144. priv->r_adefered++;
  2145. rc_defered_ack(rcd, qp);
  2146. }
  2147. return;
  2148. rnr_nak:
  2149. qp->r_nak_state = qp->r_min_rnr_timer | IB_RNR_NAK;
  2150. qp->r_ack_psn = qp->r_psn;
  2151. /* Queue RNR NAK for later */
  2152. rc_defered_ack(rcd, qp);
  2153. return;
  2154. nack_op_err:
  2155. rvt_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
  2156. qp->r_nak_state = IB_NAK_REMOTE_OPERATIONAL_ERROR;
  2157. qp->r_ack_psn = qp->r_psn;
  2158. /* Queue NAK for later */
  2159. rc_defered_ack(rcd, qp);
  2160. return;
  2161. nack_inv_unlck:
  2162. spin_unlock_irqrestore(&qp->s_lock, flags);
  2163. nack_inv:
  2164. rvt_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
  2165. qp->r_nak_state = IB_NAK_INVALID_REQUEST;
  2166. qp->r_ack_psn = qp->r_psn;
  2167. /* Queue NAK for later */
  2168. rc_defered_ack(rcd, qp);
  2169. return;
  2170. nack_acc_unlck:
  2171. spin_unlock_irqrestore(&qp->s_lock, flags);
  2172. nack_acc:
  2173. rvt_rc_error(qp, IB_WC_LOC_PROT_ERR);
  2174. qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR;
  2175. qp->r_ack_psn = qp->r_psn;
  2176. send_ack:
  2177. hfi1_send_rc_ack(rcd, qp, is_fecn);
  2178. }
  2179. void hfi1_rc_hdrerr(
  2180. struct hfi1_ctxtdata *rcd,
  2181. struct ib_header *hdr,
  2182. u32 rcv_flags,
  2183. struct rvt_qp *qp)
  2184. {
  2185. int has_grh = rcv_flags & HFI1_HAS_GRH;
  2186. struct ib_other_headers *ohdr;
  2187. struct hfi1_ibport *ibp = rcd_to_iport(rcd);
  2188. int diff;
  2189. u32 opcode;
  2190. u32 psn, bth0;
  2191. /* Check for GRH */
  2192. ohdr = &hdr->u.oth;
  2193. if (has_grh)
  2194. ohdr = &hdr->u.l.oth;
  2195. bth0 = be32_to_cpu(ohdr->bth[0]);
  2196. if (hfi1_ruc_check_hdr(ibp, hdr, has_grh, qp, bth0))
  2197. return;
  2198. psn = be32_to_cpu(ohdr->bth[2]);
  2199. opcode = (bth0 >> 24) & 0xff;
  2200. /* Only deal with RDMA Writes for now */
  2201. if (opcode < IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) {
  2202. diff = delta_psn(psn, qp->r_psn);
  2203. if (!qp->r_nak_state && diff >= 0) {
  2204. ibp->rvp.n_rc_seqnak++;
  2205. qp->r_nak_state = IB_NAK_PSN_ERROR;
  2206. /* Use the expected PSN. */
  2207. qp->r_ack_psn = qp->r_psn;
  2208. /*
  2209. * Wait to send the sequence
  2210. * NAK until all packets
  2211. * in the receive queue have
  2212. * been processed.
  2213. * Otherwise, we end up
  2214. * propagating congestion.
  2215. */
  2216. rc_defered_ack(rcd, qp);
  2217. } /* Out of sequence NAK */
  2218. } /* QP Request NAKs */
  2219. }