w83781d.c 56 KB

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  1. /*
  2. * w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
  3. * monitoring
  4. * Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
  5. * Philip Edelbrock <phil@netroedge.com>,
  6. * and Mark Studebaker <mdsxyz123@yahoo.com>
  7. * Copyright (c) 2007 - 2008 Jean Delvare <jdelvare@suse.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. /*
  24. * Supports following chips:
  25. *
  26. * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
  27. * as99127f 7 3 0 3 0x31 0x12c3 yes no
  28. * as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
  29. * w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
  30. * w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
  31. * w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
  32. *
  33. */
  34. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  35. #include <linux/module.h>
  36. #include <linux/init.h>
  37. #include <linux/slab.h>
  38. #include <linux/jiffies.h>
  39. #include <linux/i2c.h>
  40. #include <linux/hwmon.h>
  41. #include <linux/hwmon-vid.h>
  42. #include <linux/hwmon-sysfs.h>
  43. #include <linux/sysfs.h>
  44. #include <linux/err.h>
  45. #include <linux/mutex.h>
  46. #ifdef CONFIG_ISA
  47. #include <linux/platform_device.h>
  48. #include <linux/ioport.h>
  49. #include <linux/io.h>
  50. #endif
  51. #include "lm75.h"
  52. /* Addresses to scan */
  53. static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
  54. 0x2e, 0x2f, I2C_CLIENT_END };
  55. enum chips { w83781d, w83782d, w83783s, as99127f };
  56. /* Insmod parameters */
  57. static unsigned short force_subclients[4];
  58. module_param_array(force_subclients, short, NULL, 0);
  59. MODULE_PARM_DESC(force_subclients,
  60. "List of subclient addresses: {bus, clientaddr, subclientaddr1, subclientaddr2}");
  61. static bool reset;
  62. module_param(reset, bool, 0);
  63. MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
  64. static bool init = 1;
  65. module_param(init, bool, 0);
  66. MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
  67. /* Constants specified below */
  68. /* Length of ISA address segment */
  69. #define W83781D_EXTENT 8
  70. /* Where are the ISA address/data registers relative to the base address */
  71. #define W83781D_ADDR_REG_OFFSET 5
  72. #define W83781D_DATA_REG_OFFSET 6
  73. /* The device registers */
  74. /* in nr from 0 to 8 */
  75. #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
  76. (0x554 + (((nr) - 7) * 2)))
  77. #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
  78. (0x555 + (((nr) - 7) * 2)))
  79. #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
  80. (0x550 + (nr) - 7))
  81. /* fan nr from 0 to 2 */
  82. #define W83781D_REG_FAN_MIN(nr) (0x3b + (nr))
  83. #define W83781D_REG_FAN(nr) (0x28 + (nr))
  84. #define W83781D_REG_BANK 0x4E
  85. #define W83781D_REG_TEMP2_CONFIG 0x152
  86. #define W83781D_REG_TEMP3_CONFIG 0x252
  87. /* temp nr from 1 to 3 */
  88. #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
  89. ((nr == 2) ? (0x0150) : \
  90. (0x27)))
  91. #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
  92. ((nr == 2) ? (0x153) : \
  93. (0x3A)))
  94. #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
  95. ((nr == 2) ? (0x155) : \
  96. (0x39)))
  97. #define W83781D_REG_CONFIG 0x40
  98. /* Interrupt status (W83781D, AS99127F) */
  99. #define W83781D_REG_ALARM1 0x41
  100. #define W83781D_REG_ALARM2 0x42
  101. /* Real-time status (W83782D, W83783S) */
  102. #define W83782D_REG_ALARM1 0x459
  103. #define W83782D_REG_ALARM2 0x45A
  104. #define W83782D_REG_ALARM3 0x45B
  105. #define W83781D_REG_BEEP_CONFIG 0x4D
  106. #define W83781D_REG_BEEP_INTS1 0x56
  107. #define W83781D_REG_BEEP_INTS2 0x57
  108. #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
  109. #define W83781D_REG_VID_FANDIV 0x47
  110. #define W83781D_REG_CHIPID 0x49
  111. #define W83781D_REG_WCHIPID 0x58
  112. #define W83781D_REG_CHIPMAN 0x4F
  113. #define W83781D_REG_PIN 0x4B
  114. /* 782D/783S only */
  115. #define W83781D_REG_VBAT 0x5D
  116. /* PWM 782D (1-4) and 783S (1-2) only */
  117. static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };
  118. #define W83781D_REG_PWMCLK12 0x5C
  119. #define W83781D_REG_PWMCLK34 0x45C
  120. #define W83781D_REG_I2C_ADDR 0x48
  121. #define W83781D_REG_I2C_SUBADDR 0x4A
  122. /*
  123. * The following are undocumented in the data sheets however we
  124. * received the information in an email from Winbond tech support
  125. */
  126. /* Sensor selection - not on 781d */
  127. #define W83781D_REG_SCFG1 0x5D
  128. static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
  129. #define W83781D_REG_SCFG2 0x59
  130. static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
  131. #define W83781D_DEFAULT_BETA 3435
  132. /* Conversions */
  133. #define IN_TO_REG(val) clamp_val(((val) + 8) / 16, 0, 255)
  134. #define IN_FROM_REG(val) ((val) * 16)
  135. static inline u8
  136. FAN_TO_REG(long rpm, int div)
  137. {
  138. if (rpm == 0)
  139. return 255;
  140. rpm = clamp_val(rpm, 1, 1000000);
  141. return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
  142. }
  143. static inline long
  144. FAN_FROM_REG(u8 val, int div)
  145. {
  146. if (val == 0)
  147. return -1;
  148. if (val == 255)
  149. return 0;
  150. return 1350000 / (val * div);
  151. }
  152. #define TEMP_TO_REG(val) clamp_val((val) / 1000, -127, 128)
  153. #define TEMP_FROM_REG(val) ((val) * 1000)
  154. #define BEEP_MASK_FROM_REG(val, type) ((type) == as99127f ? \
  155. (~(val)) & 0x7fff : (val) & 0xff7fff)
  156. #define BEEP_MASK_TO_REG(val, type) ((type) == as99127f ? \
  157. (~(val)) & 0x7fff : (val) & 0xff7fff)
  158. #define DIV_FROM_REG(val) (1 << (val))
  159. static inline u8
  160. DIV_TO_REG(long val, enum chips type)
  161. {
  162. int i;
  163. val = clamp_val(val, 1,
  164. ((type == w83781d || type == as99127f) ? 8 : 128)) >> 1;
  165. for (i = 0; i < 7; i++) {
  166. if (val == 0)
  167. break;
  168. val >>= 1;
  169. }
  170. return i;
  171. }
  172. struct w83781d_data {
  173. struct i2c_client *client;
  174. struct device *hwmon_dev;
  175. struct mutex lock;
  176. enum chips type;
  177. /* For ISA device only */
  178. const char *name;
  179. int isa_addr;
  180. struct mutex update_lock;
  181. char valid; /* !=0 if following fields are valid */
  182. unsigned long last_updated; /* In jiffies */
  183. struct i2c_client *lm75[2]; /* for secondary I2C addresses */
  184. /* array of 2 pointers to subclients */
  185. u8 in[9]; /* Register value - 8 & 9 for 782D only */
  186. u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
  187. u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
  188. u8 fan[3]; /* Register value */
  189. u8 fan_min[3]; /* Register value */
  190. s8 temp; /* Register value */
  191. s8 temp_max; /* Register value */
  192. s8 temp_max_hyst; /* Register value */
  193. u16 temp_add[2]; /* Register value */
  194. u16 temp_max_add[2]; /* Register value */
  195. u16 temp_max_hyst_add[2]; /* Register value */
  196. u8 fan_div[3]; /* Register encoding, shifted right */
  197. u8 vid; /* Register encoding, combined */
  198. u32 alarms; /* Register encoding, combined */
  199. u32 beep_mask; /* Register encoding, combined */
  200. u8 pwm[4]; /* Register value */
  201. u8 pwm2_enable; /* Boolean */
  202. u16 sens[3]; /*
  203. * 782D/783S only.
  204. * 1 = pentium diode; 2 = 3904 diode;
  205. * 4 = thermistor
  206. */
  207. u8 vrm;
  208. };
  209. static struct w83781d_data *w83781d_data_if_isa(void);
  210. static int w83781d_alias_detect(struct i2c_client *client, u8 chipid);
  211. static int w83781d_read_value(struct w83781d_data *data, u16 reg);
  212. static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
  213. static struct w83781d_data *w83781d_update_device(struct device *dev);
  214. static void w83781d_init_device(struct device *dev);
  215. /* following are the sysfs callback functions */
  216. #define show_in_reg(reg) \
  217. static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
  218. char *buf) \
  219. { \
  220. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  221. struct w83781d_data *data = w83781d_update_device(dev); \
  222. return sprintf(buf, "%ld\n", \
  223. (long)IN_FROM_REG(data->reg[attr->index])); \
  224. }
  225. show_in_reg(in);
  226. show_in_reg(in_min);
  227. show_in_reg(in_max);
  228. #define store_in_reg(REG, reg) \
  229. static ssize_t store_in_##reg(struct device *dev, struct device_attribute \
  230. *da, const char *buf, size_t count) \
  231. { \
  232. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  233. struct w83781d_data *data = dev_get_drvdata(dev); \
  234. int nr = attr->index; \
  235. unsigned long val; \
  236. int err = kstrtoul(buf, 10, &val); \
  237. if (err) \
  238. return err; \
  239. mutex_lock(&data->update_lock); \
  240. data->in_##reg[nr] = IN_TO_REG(val); \
  241. w83781d_write_value(data, W83781D_REG_IN_##REG(nr), \
  242. data->in_##reg[nr]); \
  243. \
  244. mutex_unlock(&data->update_lock); \
  245. return count; \
  246. }
  247. store_in_reg(MIN, min);
  248. store_in_reg(MAX, max);
  249. #define sysfs_in_offsets(offset) \
  250. static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
  251. show_in, NULL, offset); \
  252. static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
  253. show_in_min, store_in_min, offset); \
  254. static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
  255. show_in_max, store_in_max, offset)
  256. sysfs_in_offsets(0);
  257. sysfs_in_offsets(1);
  258. sysfs_in_offsets(2);
  259. sysfs_in_offsets(3);
  260. sysfs_in_offsets(4);
  261. sysfs_in_offsets(5);
  262. sysfs_in_offsets(6);
  263. sysfs_in_offsets(7);
  264. sysfs_in_offsets(8);
  265. #define show_fan_reg(reg) \
  266. static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
  267. char *buf) \
  268. { \
  269. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  270. struct w83781d_data *data = w83781d_update_device(dev); \
  271. return sprintf(buf, "%ld\n", \
  272. FAN_FROM_REG(data->reg[attr->index], \
  273. DIV_FROM_REG(data->fan_div[attr->index]))); \
  274. }
  275. show_fan_reg(fan);
  276. show_fan_reg(fan_min);
  277. static ssize_t
  278. store_fan_min(struct device *dev, struct device_attribute *da,
  279. const char *buf, size_t count)
  280. {
  281. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  282. struct w83781d_data *data = dev_get_drvdata(dev);
  283. int nr = attr->index;
  284. unsigned long val;
  285. int err;
  286. err = kstrtoul(buf, 10, &val);
  287. if (err)
  288. return err;
  289. mutex_lock(&data->update_lock);
  290. data->fan_min[nr] =
  291. FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
  292. w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
  293. data->fan_min[nr]);
  294. mutex_unlock(&data->update_lock);
  295. return count;
  296. }
  297. static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
  298. static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
  299. show_fan_min, store_fan_min, 0);
  300. static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
  301. static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
  302. show_fan_min, store_fan_min, 1);
  303. static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
  304. static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
  305. show_fan_min, store_fan_min, 2);
  306. #define show_temp_reg(reg) \
  307. static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
  308. char *buf) \
  309. { \
  310. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  311. struct w83781d_data *data = w83781d_update_device(dev); \
  312. int nr = attr->index; \
  313. if (nr >= 2) { /* TEMP2 and TEMP3 */ \
  314. return sprintf(buf, "%d\n", \
  315. LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
  316. } else { /* TEMP1 */ \
  317. return sprintf(buf, "%ld\n", (long)TEMP_FROM_REG(data->reg)); \
  318. } \
  319. }
  320. show_temp_reg(temp);
  321. show_temp_reg(temp_max);
  322. show_temp_reg(temp_max_hyst);
  323. #define store_temp_reg(REG, reg) \
  324. static ssize_t store_temp_##reg(struct device *dev, \
  325. struct device_attribute *da, const char *buf, size_t count) \
  326. { \
  327. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  328. struct w83781d_data *data = dev_get_drvdata(dev); \
  329. int nr = attr->index; \
  330. long val; \
  331. int err = kstrtol(buf, 10, &val); \
  332. if (err) \
  333. return err; \
  334. mutex_lock(&data->update_lock); \
  335. \
  336. if (nr >= 2) { /* TEMP2 and TEMP3 */ \
  337. data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
  338. w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
  339. data->temp_##reg##_add[nr-2]); \
  340. } else { /* TEMP1 */ \
  341. data->temp_##reg = TEMP_TO_REG(val); \
  342. w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
  343. data->temp_##reg); \
  344. } \
  345. \
  346. mutex_unlock(&data->update_lock); \
  347. return count; \
  348. }
  349. store_temp_reg(OVER, max);
  350. store_temp_reg(HYST, max_hyst);
  351. #define sysfs_temp_offsets(offset) \
  352. static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
  353. show_temp, NULL, offset); \
  354. static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
  355. show_temp_max, store_temp_max, offset); \
  356. static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
  357. show_temp_max_hyst, store_temp_max_hyst, offset);
  358. sysfs_temp_offsets(1);
  359. sysfs_temp_offsets(2);
  360. sysfs_temp_offsets(3);
  361. static ssize_t
  362. cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf)
  363. {
  364. struct w83781d_data *data = w83781d_update_device(dev);
  365. return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
  366. }
  367. static DEVICE_ATTR_RO(cpu0_vid);
  368. static ssize_t
  369. vrm_show(struct device *dev, struct device_attribute *attr, char *buf)
  370. {
  371. struct w83781d_data *data = dev_get_drvdata(dev);
  372. return sprintf(buf, "%ld\n", (long) data->vrm);
  373. }
  374. static ssize_t
  375. vrm_store(struct device *dev, struct device_attribute *attr, const char *buf,
  376. size_t count)
  377. {
  378. struct w83781d_data *data = dev_get_drvdata(dev);
  379. unsigned long val;
  380. int err;
  381. err = kstrtoul(buf, 10, &val);
  382. if (err)
  383. return err;
  384. data->vrm = clamp_val(val, 0, 255);
  385. return count;
  386. }
  387. static DEVICE_ATTR_RW(vrm);
  388. static ssize_t
  389. alarms_show(struct device *dev, struct device_attribute *attr, char *buf)
  390. {
  391. struct w83781d_data *data = w83781d_update_device(dev);
  392. return sprintf(buf, "%u\n", data->alarms);
  393. }
  394. static DEVICE_ATTR_RO(alarms);
  395. static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
  396. char *buf)
  397. {
  398. struct w83781d_data *data = w83781d_update_device(dev);
  399. int bitnr = to_sensor_dev_attr(attr)->index;
  400. return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
  401. }
  402. /* The W83781D has a single alarm bit for temp2 and temp3 */
  403. static ssize_t show_temp3_alarm(struct device *dev,
  404. struct device_attribute *attr, char *buf)
  405. {
  406. struct w83781d_data *data = w83781d_update_device(dev);
  407. int bitnr = (data->type == w83781d) ? 5 : 13;
  408. return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
  409. }
  410. static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
  411. static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
  412. static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
  413. static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
  414. static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
  415. static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
  416. static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
  417. static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
  418. static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
  419. static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
  420. static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
  421. static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
  422. static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
  423. static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
  424. static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0);
  425. static ssize_t beep_mask_show(struct device *dev,
  426. struct device_attribute *attr, char *buf)
  427. {
  428. struct w83781d_data *data = w83781d_update_device(dev);
  429. return sprintf(buf, "%ld\n",
  430. (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
  431. }
  432. static ssize_t
  433. beep_mask_store(struct device *dev, struct device_attribute *attr,
  434. const char *buf, size_t count)
  435. {
  436. struct w83781d_data *data = dev_get_drvdata(dev);
  437. unsigned long val;
  438. int err;
  439. err = kstrtoul(buf, 10, &val);
  440. if (err)
  441. return err;
  442. mutex_lock(&data->update_lock);
  443. data->beep_mask &= 0x8000; /* preserve beep enable */
  444. data->beep_mask |= BEEP_MASK_TO_REG(val, data->type);
  445. w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
  446. data->beep_mask & 0xff);
  447. w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
  448. (data->beep_mask >> 8) & 0xff);
  449. if (data->type != w83781d && data->type != as99127f) {
  450. w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
  451. ((data->beep_mask) >> 16) & 0xff);
  452. }
  453. mutex_unlock(&data->update_lock);
  454. return count;
  455. }
  456. static DEVICE_ATTR_RW(beep_mask);
  457. static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
  458. char *buf)
  459. {
  460. struct w83781d_data *data = w83781d_update_device(dev);
  461. int bitnr = to_sensor_dev_attr(attr)->index;
  462. return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
  463. }
  464. static ssize_t
  465. store_beep(struct device *dev, struct device_attribute *attr,
  466. const char *buf, size_t count)
  467. {
  468. struct w83781d_data *data = dev_get_drvdata(dev);
  469. int bitnr = to_sensor_dev_attr(attr)->index;
  470. u8 reg;
  471. unsigned long bit;
  472. int err;
  473. err = kstrtoul(buf, 10, &bit);
  474. if (err)
  475. return err;
  476. if (bit & ~1)
  477. return -EINVAL;
  478. mutex_lock(&data->update_lock);
  479. if (bit)
  480. data->beep_mask |= (1 << bitnr);
  481. else
  482. data->beep_mask &= ~(1 << bitnr);
  483. if (bitnr < 8) {
  484. reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
  485. if (bit)
  486. reg |= (1 << bitnr);
  487. else
  488. reg &= ~(1 << bitnr);
  489. w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg);
  490. } else if (bitnr < 16) {
  491. reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
  492. if (bit)
  493. reg |= (1 << (bitnr - 8));
  494. else
  495. reg &= ~(1 << (bitnr - 8));
  496. w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg);
  497. } else {
  498. reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3);
  499. if (bit)
  500. reg |= (1 << (bitnr - 16));
  501. else
  502. reg &= ~(1 << (bitnr - 16));
  503. w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg);
  504. }
  505. mutex_unlock(&data->update_lock);
  506. return count;
  507. }
  508. /* The W83781D has a single beep bit for temp2 and temp3 */
  509. static ssize_t show_temp3_beep(struct device *dev,
  510. struct device_attribute *attr, char *buf)
  511. {
  512. struct w83781d_data *data = w83781d_update_device(dev);
  513. int bitnr = (data->type == w83781d) ? 5 : 13;
  514. return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
  515. }
  516. static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
  517. show_beep, store_beep, 0);
  518. static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
  519. show_beep, store_beep, 1);
  520. static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
  521. show_beep, store_beep, 2);
  522. static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
  523. show_beep, store_beep, 3);
  524. static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
  525. show_beep, store_beep, 8);
  526. static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
  527. show_beep, store_beep, 9);
  528. static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
  529. show_beep, store_beep, 10);
  530. static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
  531. show_beep, store_beep, 16);
  532. static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
  533. show_beep, store_beep, 17);
  534. static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
  535. show_beep, store_beep, 6);
  536. static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
  537. show_beep, store_beep, 7);
  538. static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
  539. show_beep, store_beep, 11);
  540. static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
  541. show_beep, store_beep, 4);
  542. static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
  543. show_beep, store_beep, 5);
  544. static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO,
  545. show_temp3_beep, store_beep, 13);
  546. static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
  547. show_beep, store_beep, 15);
  548. static ssize_t
  549. show_fan_div(struct device *dev, struct device_attribute *da, char *buf)
  550. {
  551. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  552. struct w83781d_data *data = w83781d_update_device(dev);
  553. return sprintf(buf, "%ld\n",
  554. (long) DIV_FROM_REG(data->fan_div[attr->index]));
  555. }
  556. /*
  557. * Note: we save and restore the fan minimum here, because its value is
  558. * determined in part by the fan divisor. This follows the principle of
  559. * least surprise; the user doesn't expect the fan minimum to change just
  560. * because the divisor changed.
  561. */
  562. static ssize_t
  563. store_fan_div(struct device *dev, struct device_attribute *da,
  564. const char *buf, size_t count)
  565. {
  566. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  567. struct w83781d_data *data = dev_get_drvdata(dev);
  568. unsigned long min;
  569. int nr = attr->index;
  570. u8 reg;
  571. unsigned long val;
  572. int err;
  573. err = kstrtoul(buf, 10, &val);
  574. if (err)
  575. return err;
  576. mutex_lock(&data->update_lock);
  577. /* Save fan_min */
  578. min = FAN_FROM_REG(data->fan_min[nr],
  579. DIV_FROM_REG(data->fan_div[nr]));
  580. data->fan_div[nr] = DIV_TO_REG(val, data->type);
  581. reg = (w83781d_read_value(data, nr == 2 ?
  582. W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
  583. & (nr == 0 ? 0xcf : 0x3f))
  584. | ((data->fan_div[nr] & 0x03) << (nr == 0 ? 4 : 6));
  585. w83781d_write_value(data, nr == 2 ?
  586. W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
  587. /* w83781d and as99127f don't have extended divisor bits */
  588. if (data->type != w83781d && data->type != as99127f) {
  589. reg = (w83781d_read_value(data, W83781D_REG_VBAT)
  590. & ~(1 << (5 + nr)))
  591. | ((data->fan_div[nr] & 0x04) << (3 + nr));
  592. w83781d_write_value(data, W83781D_REG_VBAT, reg);
  593. }
  594. /* Restore fan_min */
  595. data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
  596. w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);
  597. mutex_unlock(&data->update_lock);
  598. return count;
  599. }
  600. static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
  601. show_fan_div, store_fan_div, 0);
  602. static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
  603. show_fan_div, store_fan_div, 1);
  604. static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,
  605. show_fan_div, store_fan_div, 2);
  606. static ssize_t
  607. show_pwm(struct device *dev, struct device_attribute *da, char *buf)
  608. {
  609. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  610. struct w83781d_data *data = w83781d_update_device(dev);
  611. return sprintf(buf, "%d\n", (int)data->pwm[attr->index]);
  612. }
  613. static ssize_t
  614. pwm2_enable_show(struct device *dev, struct device_attribute *da, char *buf)
  615. {
  616. struct w83781d_data *data = w83781d_update_device(dev);
  617. return sprintf(buf, "%d\n", (int)data->pwm2_enable);
  618. }
  619. static ssize_t
  620. store_pwm(struct device *dev, struct device_attribute *da, const char *buf,
  621. size_t count)
  622. {
  623. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  624. struct w83781d_data *data = dev_get_drvdata(dev);
  625. int nr = attr->index;
  626. unsigned long val;
  627. int err;
  628. err = kstrtoul(buf, 10, &val);
  629. if (err)
  630. return err;
  631. mutex_lock(&data->update_lock);
  632. data->pwm[nr] = clamp_val(val, 0, 255);
  633. w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);
  634. mutex_unlock(&data->update_lock);
  635. return count;
  636. }
  637. static ssize_t
  638. pwm2_enable_store(struct device *dev, struct device_attribute *da,
  639. const char *buf, size_t count)
  640. {
  641. struct w83781d_data *data = dev_get_drvdata(dev);
  642. unsigned long val;
  643. u32 reg;
  644. int err;
  645. err = kstrtoul(buf, 10, &val);
  646. if (err)
  647. return err;
  648. mutex_lock(&data->update_lock);
  649. switch (val) {
  650. case 0:
  651. case 1:
  652. reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
  653. w83781d_write_value(data, W83781D_REG_PWMCLK12,
  654. (reg & 0xf7) | (val << 3));
  655. reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
  656. w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
  657. (reg & 0xef) | (!val << 4));
  658. data->pwm2_enable = val;
  659. break;
  660. default:
  661. mutex_unlock(&data->update_lock);
  662. return -EINVAL;
  663. }
  664. mutex_unlock(&data->update_lock);
  665. return count;
  666. }
  667. static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);
  668. static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);
  669. static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);
  670. static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);
  671. /* only PWM2 can be enabled/disabled */
  672. static DEVICE_ATTR_RW(pwm2_enable);
  673. static ssize_t
  674. show_sensor(struct device *dev, struct device_attribute *da, char *buf)
  675. {
  676. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  677. struct w83781d_data *data = w83781d_update_device(dev);
  678. return sprintf(buf, "%d\n", (int)data->sens[attr->index]);
  679. }
  680. static ssize_t
  681. store_sensor(struct device *dev, struct device_attribute *da,
  682. const char *buf, size_t count)
  683. {
  684. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  685. struct w83781d_data *data = dev_get_drvdata(dev);
  686. int nr = attr->index;
  687. unsigned long val;
  688. u32 tmp;
  689. int err;
  690. err = kstrtoul(buf, 10, &val);
  691. if (err)
  692. return err;
  693. mutex_lock(&data->update_lock);
  694. switch (val) {
  695. case 1: /* PII/Celeron diode */
  696. tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
  697. w83781d_write_value(data, W83781D_REG_SCFG1,
  698. tmp | BIT_SCFG1[nr]);
  699. tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
  700. w83781d_write_value(data, W83781D_REG_SCFG2,
  701. tmp | BIT_SCFG2[nr]);
  702. data->sens[nr] = val;
  703. break;
  704. case 2: /* 3904 */
  705. tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
  706. w83781d_write_value(data, W83781D_REG_SCFG1,
  707. tmp | BIT_SCFG1[nr]);
  708. tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
  709. w83781d_write_value(data, W83781D_REG_SCFG2,
  710. tmp & ~BIT_SCFG2[nr]);
  711. data->sens[nr] = val;
  712. break;
  713. case W83781D_DEFAULT_BETA:
  714. dev_warn(dev,
  715. "Sensor type %d is deprecated, please use 4 instead\n",
  716. W83781D_DEFAULT_BETA);
  717. /* fall through */
  718. case 4: /* thermistor */
  719. tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
  720. w83781d_write_value(data, W83781D_REG_SCFG1,
  721. tmp & ~BIT_SCFG1[nr]);
  722. data->sens[nr] = val;
  723. break;
  724. default:
  725. dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n",
  726. (long) val);
  727. break;
  728. }
  729. mutex_unlock(&data->update_lock);
  730. return count;
  731. }
  732. static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,
  733. show_sensor, store_sensor, 0);
  734. static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,
  735. show_sensor, store_sensor, 1);
  736. static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,
  737. show_sensor, store_sensor, 2);
  738. /*
  739. * Assumes that adapter is of I2C, not ISA variety.
  740. * OTHERWISE DON'T CALL THIS
  741. */
  742. static int
  743. w83781d_detect_subclients(struct i2c_client *new_client)
  744. {
  745. int i, val1 = 0, id;
  746. int err;
  747. int address = new_client->addr;
  748. unsigned short sc_addr[2];
  749. struct i2c_adapter *adapter = new_client->adapter;
  750. struct w83781d_data *data = i2c_get_clientdata(new_client);
  751. enum chips kind = data->type;
  752. int num_sc = 1;
  753. id = i2c_adapter_id(adapter);
  754. if (force_subclients[0] == id && force_subclients[1] == address) {
  755. for (i = 2; i <= 3; i++) {
  756. if (force_subclients[i] < 0x48 ||
  757. force_subclients[i] > 0x4f) {
  758. dev_err(&new_client->dev,
  759. "Invalid subclient address %d; must be 0x48-0x4f\n",
  760. force_subclients[i]);
  761. err = -EINVAL;
  762. goto ERROR_SC_1;
  763. }
  764. }
  765. w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
  766. (force_subclients[2] & 0x07) |
  767. ((force_subclients[3] & 0x07) << 4));
  768. sc_addr[0] = force_subclients[2];
  769. } else {
  770. val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
  771. sc_addr[0] = 0x48 + (val1 & 0x07);
  772. }
  773. if (kind != w83783s) {
  774. num_sc = 2;
  775. if (force_subclients[0] == id &&
  776. force_subclients[1] == address) {
  777. sc_addr[1] = force_subclients[3];
  778. } else {
  779. sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07);
  780. }
  781. if (sc_addr[0] == sc_addr[1]) {
  782. dev_err(&new_client->dev,
  783. "Duplicate addresses 0x%x for subclients.\n",
  784. sc_addr[0]);
  785. err = -EBUSY;
  786. goto ERROR_SC_2;
  787. }
  788. }
  789. for (i = 0; i < num_sc; i++) {
  790. data->lm75[i] = i2c_new_dummy(adapter, sc_addr[i]);
  791. if (!data->lm75[i]) {
  792. dev_err(&new_client->dev,
  793. "Subclient %d registration at address 0x%x failed.\n",
  794. i, sc_addr[i]);
  795. err = -ENOMEM;
  796. if (i == 1)
  797. goto ERROR_SC_3;
  798. goto ERROR_SC_2;
  799. }
  800. }
  801. return 0;
  802. /* Undo inits in case of errors */
  803. ERROR_SC_3:
  804. i2c_unregister_device(data->lm75[0]);
  805. ERROR_SC_2:
  806. ERROR_SC_1:
  807. return err;
  808. }
  809. #define IN_UNIT_ATTRS(X) \
  810. &sensor_dev_attr_in##X##_input.dev_attr.attr, \
  811. &sensor_dev_attr_in##X##_min.dev_attr.attr, \
  812. &sensor_dev_attr_in##X##_max.dev_attr.attr, \
  813. &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \
  814. &sensor_dev_attr_in##X##_beep.dev_attr.attr
  815. #define FAN_UNIT_ATTRS(X) \
  816. &sensor_dev_attr_fan##X##_input.dev_attr.attr, \
  817. &sensor_dev_attr_fan##X##_min.dev_attr.attr, \
  818. &sensor_dev_attr_fan##X##_div.dev_attr.attr, \
  819. &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \
  820. &sensor_dev_attr_fan##X##_beep.dev_attr.attr
  821. #define TEMP_UNIT_ATTRS(X) \
  822. &sensor_dev_attr_temp##X##_input.dev_attr.attr, \
  823. &sensor_dev_attr_temp##X##_max.dev_attr.attr, \
  824. &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \
  825. &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \
  826. &sensor_dev_attr_temp##X##_beep.dev_attr.attr
  827. static struct attribute *w83781d_attributes[] = {
  828. IN_UNIT_ATTRS(0),
  829. IN_UNIT_ATTRS(2),
  830. IN_UNIT_ATTRS(3),
  831. IN_UNIT_ATTRS(4),
  832. IN_UNIT_ATTRS(5),
  833. IN_UNIT_ATTRS(6),
  834. FAN_UNIT_ATTRS(1),
  835. FAN_UNIT_ATTRS(2),
  836. FAN_UNIT_ATTRS(3),
  837. TEMP_UNIT_ATTRS(1),
  838. TEMP_UNIT_ATTRS(2),
  839. &dev_attr_cpu0_vid.attr,
  840. &dev_attr_vrm.attr,
  841. &dev_attr_alarms.attr,
  842. &dev_attr_beep_mask.attr,
  843. &sensor_dev_attr_beep_enable.dev_attr.attr,
  844. NULL
  845. };
  846. static const struct attribute_group w83781d_group = {
  847. .attrs = w83781d_attributes,
  848. };
  849. static struct attribute *w83781d_attributes_in1[] = {
  850. IN_UNIT_ATTRS(1),
  851. NULL
  852. };
  853. static const struct attribute_group w83781d_group_in1 = {
  854. .attrs = w83781d_attributes_in1,
  855. };
  856. static struct attribute *w83781d_attributes_in78[] = {
  857. IN_UNIT_ATTRS(7),
  858. IN_UNIT_ATTRS(8),
  859. NULL
  860. };
  861. static const struct attribute_group w83781d_group_in78 = {
  862. .attrs = w83781d_attributes_in78,
  863. };
  864. static struct attribute *w83781d_attributes_temp3[] = {
  865. TEMP_UNIT_ATTRS(3),
  866. NULL
  867. };
  868. static const struct attribute_group w83781d_group_temp3 = {
  869. .attrs = w83781d_attributes_temp3,
  870. };
  871. static struct attribute *w83781d_attributes_pwm12[] = {
  872. &sensor_dev_attr_pwm1.dev_attr.attr,
  873. &sensor_dev_attr_pwm2.dev_attr.attr,
  874. &dev_attr_pwm2_enable.attr,
  875. NULL
  876. };
  877. static const struct attribute_group w83781d_group_pwm12 = {
  878. .attrs = w83781d_attributes_pwm12,
  879. };
  880. static struct attribute *w83781d_attributes_pwm34[] = {
  881. &sensor_dev_attr_pwm3.dev_attr.attr,
  882. &sensor_dev_attr_pwm4.dev_attr.attr,
  883. NULL
  884. };
  885. static const struct attribute_group w83781d_group_pwm34 = {
  886. .attrs = w83781d_attributes_pwm34,
  887. };
  888. static struct attribute *w83781d_attributes_other[] = {
  889. &sensor_dev_attr_temp1_type.dev_attr.attr,
  890. &sensor_dev_attr_temp2_type.dev_attr.attr,
  891. &sensor_dev_attr_temp3_type.dev_attr.attr,
  892. NULL
  893. };
  894. static const struct attribute_group w83781d_group_other = {
  895. .attrs = w83781d_attributes_other,
  896. };
  897. /* No clean up is done on error, it's up to the caller */
  898. static int
  899. w83781d_create_files(struct device *dev, int kind, int is_isa)
  900. {
  901. int err;
  902. err = sysfs_create_group(&dev->kobj, &w83781d_group);
  903. if (err)
  904. return err;
  905. if (kind != w83783s) {
  906. err = sysfs_create_group(&dev->kobj, &w83781d_group_in1);
  907. if (err)
  908. return err;
  909. }
  910. if (kind != as99127f && kind != w83781d && kind != w83783s) {
  911. err = sysfs_create_group(&dev->kobj, &w83781d_group_in78);
  912. if (err)
  913. return err;
  914. }
  915. if (kind != w83783s) {
  916. err = sysfs_create_group(&dev->kobj, &w83781d_group_temp3);
  917. if (err)
  918. return err;
  919. if (kind != w83781d) {
  920. err = sysfs_chmod_file(&dev->kobj,
  921. &sensor_dev_attr_temp3_alarm.dev_attr.attr,
  922. S_IRUGO | S_IWUSR);
  923. if (err)
  924. return err;
  925. }
  926. }
  927. if (kind != w83781d && kind != as99127f) {
  928. err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm12);
  929. if (err)
  930. return err;
  931. }
  932. if (kind == w83782d && !is_isa) {
  933. err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm34);
  934. if (err)
  935. return err;
  936. }
  937. if (kind != as99127f && kind != w83781d) {
  938. err = device_create_file(dev,
  939. &sensor_dev_attr_temp1_type.dev_attr);
  940. if (err)
  941. return err;
  942. err = device_create_file(dev,
  943. &sensor_dev_attr_temp2_type.dev_attr);
  944. if (err)
  945. return err;
  946. if (kind != w83783s) {
  947. err = device_create_file(dev,
  948. &sensor_dev_attr_temp3_type.dev_attr);
  949. if (err)
  950. return err;
  951. }
  952. }
  953. return 0;
  954. }
  955. /* Return 0 if detection is successful, -ENODEV otherwise */
  956. static int
  957. w83781d_detect(struct i2c_client *client, struct i2c_board_info *info)
  958. {
  959. int val1, val2;
  960. struct w83781d_data *isa = w83781d_data_if_isa();
  961. struct i2c_adapter *adapter = client->adapter;
  962. int address = client->addr;
  963. const char *client_name;
  964. enum vendor { winbond, asus } vendid;
  965. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  966. return -ENODEV;
  967. /*
  968. * We block updates of the ISA device to minimize the risk of
  969. * concurrent access to the same W83781D chip through different
  970. * interfaces.
  971. */
  972. if (isa)
  973. mutex_lock(&isa->update_lock);
  974. if (i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG) & 0x80) {
  975. dev_dbg(&adapter->dev,
  976. "Detection of w83781d chip failed at step 3\n");
  977. goto err_nodev;
  978. }
  979. val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK);
  980. val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
  981. /* Check for Winbond or Asus ID if in bank 0 */
  982. if (!(val1 & 0x07) &&
  983. ((!(val1 & 0x80) && val2 != 0xa3 && val2 != 0xc3) ||
  984. ((val1 & 0x80) && val2 != 0x5c && val2 != 0x12))) {
  985. dev_dbg(&adapter->dev,
  986. "Detection of w83781d chip failed at step 4\n");
  987. goto err_nodev;
  988. }
  989. /*
  990. * If Winbond SMBus, check address at 0x48.
  991. * Asus doesn't support, except for as99127f rev.2
  992. */
  993. if ((!(val1 & 0x80) && val2 == 0xa3) ||
  994. ((val1 & 0x80) && val2 == 0x5c)) {
  995. if (i2c_smbus_read_byte_data(client, W83781D_REG_I2C_ADDR)
  996. != address) {
  997. dev_dbg(&adapter->dev,
  998. "Detection of w83781d chip failed at step 5\n");
  999. goto err_nodev;
  1000. }
  1001. }
  1002. /* Put it now into bank 0 and Vendor ID High Byte */
  1003. i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
  1004. (i2c_smbus_read_byte_data(client, W83781D_REG_BANK)
  1005. & 0x78) | 0x80);
  1006. /* Get the vendor ID */
  1007. val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
  1008. if (val2 == 0x5c)
  1009. vendid = winbond;
  1010. else if (val2 == 0x12)
  1011. vendid = asus;
  1012. else {
  1013. dev_dbg(&adapter->dev,
  1014. "w83781d chip vendor is neither Winbond nor Asus\n");
  1015. goto err_nodev;
  1016. }
  1017. /* Determine the chip type. */
  1018. val1 = i2c_smbus_read_byte_data(client, W83781D_REG_WCHIPID);
  1019. if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
  1020. client_name = "w83781d";
  1021. else if (val1 == 0x30 && vendid == winbond)
  1022. client_name = "w83782d";
  1023. else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
  1024. client_name = "w83783s";
  1025. else if (val1 == 0x31)
  1026. client_name = "as99127f";
  1027. else
  1028. goto err_nodev;
  1029. if (val1 <= 0x30 && w83781d_alias_detect(client, val1)) {
  1030. dev_dbg(&adapter->dev,
  1031. "Device at 0x%02x appears to be the same as ISA device\n",
  1032. address);
  1033. goto err_nodev;
  1034. }
  1035. if (isa)
  1036. mutex_unlock(&isa->update_lock);
  1037. strlcpy(info->type, client_name, I2C_NAME_SIZE);
  1038. return 0;
  1039. err_nodev:
  1040. if (isa)
  1041. mutex_unlock(&isa->update_lock);
  1042. return -ENODEV;
  1043. }
  1044. static void w83781d_remove_files(struct device *dev)
  1045. {
  1046. sysfs_remove_group(&dev->kobj, &w83781d_group);
  1047. sysfs_remove_group(&dev->kobj, &w83781d_group_in1);
  1048. sysfs_remove_group(&dev->kobj, &w83781d_group_in78);
  1049. sysfs_remove_group(&dev->kobj, &w83781d_group_temp3);
  1050. sysfs_remove_group(&dev->kobj, &w83781d_group_pwm12);
  1051. sysfs_remove_group(&dev->kobj, &w83781d_group_pwm34);
  1052. sysfs_remove_group(&dev->kobj, &w83781d_group_other);
  1053. }
  1054. static int
  1055. w83781d_probe(struct i2c_client *client, const struct i2c_device_id *id)
  1056. {
  1057. struct device *dev = &client->dev;
  1058. struct w83781d_data *data;
  1059. int err;
  1060. data = devm_kzalloc(dev, sizeof(struct w83781d_data), GFP_KERNEL);
  1061. if (!data)
  1062. return -ENOMEM;
  1063. i2c_set_clientdata(client, data);
  1064. mutex_init(&data->lock);
  1065. mutex_init(&data->update_lock);
  1066. data->type = id->driver_data;
  1067. data->client = client;
  1068. /* attach secondary i2c lm75-like clients */
  1069. err = w83781d_detect_subclients(client);
  1070. if (err)
  1071. return err;
  1072. /* Initialize the chip */
  1073. w83781d_init_device(dev);
  1074. /* Register sysfs hooks */
  1075. err = w83781d_create_files(dev, data->type, 0);
  1076. if (err)
  1077. goto exit_remove_files;
  1078. data->hwmon_dev = hwmon_device_register(dev);
  1079. if (IS_ERR(data->hwmon_dev)) {
  1080. err = PTR_ERR(data->hwmon_dev);
  1081. goto exit_remove_files;
  1082. }
  1083. return 0;
  1084. exit_remove_files:
  1085. w83781d_remove_files(dev);
  1086. if (data->lm75[0])
  1087. i2c_unregister_device(data->lm75[0]);
  1088. if (data->lm75[1])
  1089. i2c_unregister_device(data->lm75[1]);
  1090. return err;
  1091. }
  1092. static int
  1093. w83781d_remove(struct i2c_client *client)
  1094. {
  1095. struct w83781d_data *data = i2c_get_clientdata(client);
  1096. struct device *dev = &client->dev;
  1097. hwmon_device_unregister(data->hwmon_dev);
  1098. w83781d_remove_files(dev);
  1099. if (data->lm75[0])
  1100. i2c_unregister_device(data->lm75[0]);
  1101. if (data->lm75[1])
  1102. i2c_unregister_device(data->lm75[1]);
  1103. return 0;
  1104. }
  1105. static int
  1106. w83781d_read_value_i2c(struct w83781d_data *data, u16 reg)
  1107. {
  1108. struct i2c_client *client = data->client;
  1109. int res, bank;
  1110. struct i2c_client *cl;
  1111. bank = (reg >> 8) & 0x0f;
  1112. if (bank > 2)
  1113. /* switch banks */
  1114. i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
  1115. bank);
  1116. if (bank == 0 || bank > 2) {
  1117. res = i2c_smbus_read_byte_data(client, reg & 0xff);
  1118. } else {
  1119. /* switch to subclient */
  1120. cl = data->lm75[bank - 1];
  1121. /* convert from ISA to LM75 I2C addresses */
  1122. switch (reg & 0xff) {
  1123. case 0x50: /* TEMP */
  1124. res = i2c_smbus_read_word_swapped(cl, 0);
  1125. break;
  1126. case 0x52: /* CONFIG */
  1127. res = i2c_smbus_read_byte_data(cl, 1);
  1128. break;
  1129. case 0x53: /* HYST */
  1130. res = i2c_smbus_read_word_swapped(cl, 2);
  1131. break;
  1132. case 0x55: /* OVER */
  1133. default:
  1134. res = i2c_smbus_read_word_swapped(cl, 3);
  1135. break;
  1136. }
  1137. }
  1138. if (bank > 2)
  1139. i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
  1140. return res;
  1141. }
  1142. static int
  1143. w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value)
  1144. {
  1145. struct i2c_client *client = data->client;
  1146. int bank;
  1147. struct i2c_client *cl;
  1148. bank = (reg >> 8) & 0x0f;
  1149. if (bank > 2)
  1150. /* switch banks */
  1151. i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
  1152. bank);
  1153. if (bank == 0 || bank > 2) {
  1154. i2c_smbus_write_byte_data(client, reg & 0xff,
  1155. value & 0xff);
  1156. } else {
  1157. /* switch to subclient */
  1158. cl = data->lm75[bank - 1];
  1159. /* convert from ISA to LM75 I2C addresses */
  1160. switch (reg & 0xff) {
  1161. case 0x52: /* CONFIG */
  1162. i2c_smbus_write_byte_data(cl, 1, value & 0xff);
  1163. break;
  1164. case 0x53: /* HYST */
  1165. i2c_smbus_write_word_swapped(cl, 2, value);
  1166. break;
  1167. case 0x55: /* OVER */
  1168. i2c_smbus_write_word_swapped(cl, 3, value);
  1169. break;
  1170. }
  1171. }
  1172. if (bank > 2)
  1173. i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
  1174. return 0;
  1175. }
  1176. static void
  1177. w83781d_init_device(struct device *dev)
  1178. {
  1179. struct w83781d_data *data = dev_get_drvdata(dev);
  1180. int i, p;
  1181. int type = data->type;
  1182. u8 tmp;
  1183. if (reset && type != as99127f) { /*
  1184. * this resets registers we don't have
  1185. * documentation for on the as99127f
  1186. */
  1187. /*
  1188. * Resetting the chip has been the default for a long time,
  1189. * but it causes the BIOS initializations (fan clock dividers,
  1190. * thermal sensor types...) to be lost, so it is now optional.
  1191. * It might even go away if nobody reports it as being useful,
  1192. * as I see very little reason why this would be needed at
  1193. * all.
  1194. */
  1195. dev_info(dev,
  1196. "If reset=1 solved a problem you were having, please report!\n");
  1197. /* save these registers */
  1198. i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
  1199. p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
  1200. /*
  1201. * Reset all except Watchdog values and last conversion values
  1202. * This sets fan-divs to 2, among others
  1203. */
  1204. w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
  1205. /*
  1206. * Restore the registers and disable power-on abnormal beep.
  1207. * This saves FAN 1/2/3 input/output values set by BIOS.
  1208. */
  1209. w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
  1210. w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
  1211. /*
  1212. * Disable master beep-enable (reset turns it on).
  1213. * Individual beep_mask should be reset to off but for some
  1214. * reason disabling this bit helps some people not get beeped
  1215. */
  1216. w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
  1217. }
  1218. /*
  1219. * Disable power-on abnormal beep, as advised by the datasheet.
  1220. * Already done if reset=1.
  1221. */
  1222. if (init && !reset && type != as99127f) {
  1223. i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
  1224. w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
  1225. }
  1226. data->vrm = vid_which_vrm();
  1227. if ((type != w83781d) && (type != as99127f)) {
  1228. tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
  1229. for (i = 1; i <= 3; i++) {
  1230. if (!(tmp & BIT_SCFG1[i - 1])) {
  1231. data->sens[i - 1] = 4;
  1232. } else {
  1233. if (w83781d_read_value
  1234. (data,
  1235. W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
  1236. data->sens[i - 1] = 1;
  1237. else
  1238. data->sens[i - 1] = 2;
  1239. }
  1240. if (type == w83783s && i == 2)
  1241. break;
  1242. }
  1243. }
  1244. if (init && type != as99127f) {
  1245. /* Enable temp2 */
  1246. tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
  1247. if (tmp & 0x01) {
  1248. dev_warn(dev,
  1249. "Enabling temp2, readings might not make sense\n");
  1250. w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
  1251. tmp & 0xfe);
  1252. }
  1253. /* Enable temp3 */
  1254. if (type != w83783s) {
  1255. tmp = w83781d_read_value(data,
  1256. W83781D_REG_TEMP3_CONFIG);
  1257. if (tmp & 0x01) {
  1258. dev_warn(dev,
  1259. "Enabling temp3, readings might not make sense\n");
  1260. w83781d_write_value(data,
  1261. W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
  1262. }
  1263. }
  1264. }
  1265. /* Start monitoring */
  1266. w83781d_write_value(data, W83781D_REG_CONFIG,
  1267. (w83781d_read_value(data,
  1268. W83781D_REG_CONFIG) & 0xf7)
  1269. | 0x01);
  1270. /* A few vars need to be filled upon startup */
  1271. for (i = 0; i < 3; i++) {
  1272. data->fan_min[i] = w83781d_read_value(data,
  1273. W83781D_REG_FAN_MIN(i));
  1274. }
  1275. mutex_init(&data->update_lock);
  1276. }
  1277. static struct w83781d_data *w83781d_update_device(struct device *dev)
  1278. {
  1279. struct w83781d_data *data = dev_get_drvdata(dev);
  1280. struct i2c_client *client = data->client;
  1281. int i;
  1282. mutex_lock(&data->update_lock);
  1283. if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
  1284. || !data->valid) {
  1285. dev_dbg(dev, "Starting device update\n");
  1286. for (i = 0; i <= 8; i++) {
  1287. if (data->type == w83783s && i == 1)
  1288. continue; /* 783S has no in1 */
  1289. data->in[i] =
  1290. w83781d_read_value(data, W83781D_REG_IN(i));
  1291. data->in_min[i] =
  1292. w83781d_read_value(data, W83781D_REG_IN_MIN(i));
  1293. data->in_max[i] =
  1294. w83781d_read_value(data, W83781D_REG_IN_MAX(i));
  1295. if ((data->type != w83782d) && (i == 6))
  1296. break;
  1297. }
  1298. for (i = 0; i < 3; i++) {
  1299. data->fan[i] =
  1300. w83781d_read_value(data, W83781D_REG_FAN(i));
  1301. data->fan_min[i] =
  1302. w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
  1303. }
  1304. if (data->type != w83781d && data->type != as99127f) {
  1305. for (i = 0; i < 4; i++) {
  1306. data->pwm[i] =
  1307. w83781d_read_value(data,
  1308. W83781D_REG_PWM[i]);
  1309. /* Only W83782D on SMBus has PWM3 and PWM4 */
  1310. if ((data->type != w83782d || !client)
  1311. && i == 1)
  1312. break;
  1313. }
  1314. /* Only PWM2 can be disabled */
  1315. data->pwm2_enable = (w83781d_read_value(data,
  1316. W83781D_REG_PWMCLK12) & 0x08) >> 3;
  1317. }
  1318. data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
  1319. data->temp_max =
  1320. w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
  1321. data->temp_max_hyst =
  1322. w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
  1323. data->temp_add[0] =
  1324. w83781d_read_value(data, W83781D_REG_TEMP(2));
  1325. data->temp_max_add[0] =
  1326. w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
  1327. data->temp_max_hyst_add[0] =
  1328. w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
  1329. if (data->type != w83783s) {
  1330. data->temp_add[1] =
  1331. w83781d_read_value(data, W83781D_REG_TEMP(3));
  1332. data->temp_max_add[1] =
  1333. w83781d_read_value(data,
  1334. W83781D_REG_TEMP_OVER(3));
  1335. data->temp_max_hyst_add[1] =
  1336. w83781d_read_value(data,
  1337. W83781D_REG_TEMP_HYST(3));
  1338. }
  1339. i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
  1340. data->vid = i & 0x0f;
  1341. data->vid |= (w83781d_read_value(data,
  1342. W83781D_REG_CHIPID) & 0x01) << 4;
  1343. data->fan_div[0] = (i >> 4) & 0x03;
  1344. data->fan_div[1] = (i >> 6) & 0x03;
  1345. data->fan_div[2] = (w83781d_read_value(data,
  1346. W83781D_REG_PIN) >> 6) & 0x03;
  1347. if ((data->type != w83781d) && (data->type != as99127f)) {
  1348. i = w83781d_read_value(data, W83781D_REG_VBAT);
  1349. data->fan_div[0] |= (i >> 3) & 0x04;
  1350. data->fan_div[1] |= (i >> 4) & 0x04;
  1351. data->fan_div[2] |= (i >> 5) & 0x04;
  1352. }
  1353. if (data->type == w83782d) {
  1354. data->alarms = w83781d_read_value(data,
  1355. W83782D_REG_ALARM1)
  1356. | (w83781d_read_value(data,
  1357. W83782D_REG_ALARM2) << 8)
  1358. | (w83781d_read_value(data,
  1359. W83782D_REG_ALARM3) << 16);
  1360. } else if (data->type == w83783s) {
  1361. data->alarms = w83781d_read_value(data,
  1362. W83782D_REG_ALARM1)
  1363. | (w83781d_read_value(data,
  1364. W83782D_REG_ALARM2) << 8);
  1365. } else {
  1366. /*
  1367. * No real-time status registers, fall back to
  1368. * interrupt status registers
  1369. */
  1370. data->alarms = w83781d_read_value(data,
  1371. W83781D_REG_ALARM1)
  1372. | (w83781d_read_value(data,
  1373. W83781D_REG_ALARM2) << 8);
  1374. }
  1375. i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
  1376. data->beep_mask = (i << 8) +
  1377. w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
  1378. if ((data->type != w83781d) && (data->type != as99127f)) {
  1379. data->beep_mask |=
  1380. w83781d_read_value(data,
  1381. W83781D_REG_BEEP_INTS3) << 16;
  1382. }
  1383. data->last_updated = jiffies;
  1384. data->valid = 1;
  1385. }
  1386. mutex_unlock(&data->update_lock);
  1387. return data;
  1388. }
  1389. static const struct i2c_device_id w83781d_ids[] = {
  1390. { "w83781d", w83781d, },
  1391. { "w83782d", w83782d, },
  1392. { "w83783s", w83783s, },
  1393. { "as99127f", as99127f },
  1394. { /* LIST END */ }
  1395. };
  1396. MODULE_DEVICE_TABLE(i2c, w83781d_ids);
  1397. static struct i2c_driver w83781d_driver = {
  1398. .class = I2C_CLASS_HWMON,
  1399. .driver = {
  1400. .name = "w83781d",
  1401. },
  1402. .probe = w83781d_probe,
  1403. .remove = w83781d_remove,
  1404. .id_table = w83781d_ids,
  1405. .detect = w83781d_detect,
  1406. .address_list = normal_i2c,
  1407. };
  1408. /*
  1409. * ISA related code
  1410. */
  1411. #ifdef CONFIG_ISA
  1412. /* ISA device, if found */
  1413. static struct platform_device *pdev;
  1414. static unsigned short isa_address = 0x290;
  1415. /*
  1416. * I2C devices get this name attribute automatically, but for ISA devices
  1417. * we must create it by ourselves.
  1418. */
  1419. static ssize_t
  1420. name_show(struct device *dev, struct device_attribute *devattr, char *buf)
  1421. {
  1422. struct w83781d_data *data = dev_get_drvdata(dev);
  1423. return sprintf(buf, "%s\n", data->name);
  1424. }
  1425. static DEVICE_ATTR_RO(name);
  1426. static struct w83781d_data *w83781d_data_if_isa(void)
  1427. {
  1428. return pdev ? platform_get_drvdata(pdev) : NULL;
  1429. }
  1430. /* Returns 1 if the I2C chip appears to be an alias of the ISA chip */
  1431. static int w83781d_alias_detect(struct i2c_client *client, u8 chipid)
  1432. {
  1433. struct w83781d_data *isa;
  1434. int i;
  1435. if (!pdev) /* No ISA chip */
  1436. return 0;
  1437. isa = platform_get_drvdata(pdev);
  1438. if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr)
  1439. return 0; /* Address doesn't match */
  1440. if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid)
  1441. return 0; /* Chip type doesn't match */
  1442. /*
  1443. * We compare all the limit registers, the config register and the
  1444. * interrupt mask registers
  1445. */
  1446. for (i = 0x2b; i <= 0x3d; i++) {
  1447. if (w83781d_read_value(isa, i) !=
  1448. i2c_smbus_read_byte_data(client, i))
  1449. return 0;
  1450. }
  1451. if (w83781d_read_value(isa, W83781D_REG_CONFIG) !=
  1452. i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG))
  1453. return 0;
  1454. for (i = 0x43; i <= 0x46; i++) {
  1455. if (w83781d_read_value(isa, i) !=
  1456. i2c_smbus_read_byte_data(client, i))
  1457. return 0;
  1458. }
  1459. return 1;
  1460. }
  1461. static int
  1462. w83781d_read_value_isa(struct w83781d_data *data, u16 reg)
  1463. {
  1464. int word_sized, res;
  1465. word_sized = (((reg & 0xff00) == 0x100)
  1466. || ((reg & 0xff00) == 0x200))
  1467. && (((reg & 0x00ff) == 0x50)
  1468. || ((reg & 0x00ff) == 0x53)
  1469. || ((reg & 0x00ff) == 0x55));
  1470. if (reg & 0xff00) {
  1471. outb_p(W83781D_REG_BANK,
  1472. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1473. outb_p(reg >> 8,
  1474. data->isa_addr + W83781D_DATA_REG_OFFSET);
  1475. }
  1476. outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1477. res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET);
  1478. if (word_sized) {
  1479. outb_p((reg & 0xff) + 1,
  1480. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1481. res =
  1482. (res << 8) + inb_p(data->isa_addr +
  1483. W83781D_DATA_REG_OFFSET);
  1484. }
  1485. if (reg & 0xff00) {
  1486. outb_p(W83781D_REG_BANK,
  1487. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1488. outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
  1489. }
  1490. return res;
  1491. }
  1492. static void
  1493. w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value)
  1494. {
  1495. int word_sized;
  1496. word_sized = (((reg & 0xff00) == 0x100)
  1497. || ((reg & 0xff00) == 0x200))
  1498. && (((reg & 0x00ff) == 0x53)
  1499. || ((reg & 0x00ff) == 0x55));
  1500. if (reg & 0xff00) {
  1501. outb_p(W83781D_REG_BANK,
  1502. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1503. outb_p(reg >> 8,
  1504. data->isa_addr + W83781D_DATA_REG_OFFSET);
  1505. }
  1506. outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1507. if (word_sized) {
  1508. outb_p(value >> 8,
  1509. data->isa_addr + W83781D_DATA_REG_OFFSET);
  1510. outb_p((reg & 0xff) + 1,
  1511. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1512. }
  1513. outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET);
  1514. if (reg & 0xff00) {
  1515. outb_p(W83781D_REG_BANK,
  1516. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1517. outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
  1518. }
  1519. }
  1520. /*
  1521. * The SMBus locks itself, usually, but nothing may access the Winbond between
  1522. * bank switches. ISA access must always be locked explicitly!
  1523. * We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
  1524. * would slow down the W83781D access and should not be necessary.
  1525. * There are some ugly typecasts here, but the good news is - they should
  1526. * nowhere else be necessary!
  1527. */
  1528. static int
  1529. w83781d_read_value(struct w83781d_data *data, u16 reg)
  1530. {
  1531. struct i2c_client *client = data->client;
  1532. int res;
  1533. mutex_lock(&data->lock);
  1534. if (client)
  1535. res = w83781d_read_value_i2c(data, reg);
  1536. else
  1537. res = w83781d_read_value_isa(data, reg);
  1538. mutex_unlock(&data->lock);
  1539. return res;
  1540. }
  1541. static int
  1542. w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
  1543. {
  1544. struct i2c_client *client = data->client;
  1545. mutex_lock(&data->lock);
  1546. if (client)
  1547. w83781d_write_value_i2c(data, reg, value);
  1548. else
  1549. w83781d_write_value_isa(data, reg, value);
  1550. mutex_unlock(&data->lock);
  1551. return 0;
  1552. }
  1553. static int
  1554. w83781d_isa_probe(struct platform_device *pdev)
  1555. {
  1556. int err, reg;
  1557. struct w83781d_data *data;
  1558. struct resource *res;
  1559. /* Reserve the ISA region */
  1560. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  1561. if (!devm_request_region(&pdev->dev,
  1562. res->start + W83781D_ADDR_REG_OFFSET, 2,
  1563. "w83781d"))
  1564. return -EBUSY;
  1565. data = devm_kzalloc(&pdev->dev, sizeof(struct w83781d_data),
  1566. GFP_KERNEL);
  1567. if (!data)
  1568. return -ENOMEM;
  1569. mutex_init(&data->lock);
  1570. data->isa_addr = res->start;
  1571. platform_set_drvdata(pdev, data);
  1572. reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
  1573. switch (reg) {
  1574. case 0x30:
  1575. data->type = w83782d;
  1576. data->name = "w83782d";
  1577. break;
  1578. default:
  1579. data->type = w83781d;
  1580. data->name = "w83781d";
  1581. }
  1582. /* Initialize the W83781D chip */
  1583. w83781d_init_device(&pdev->dev);
  1584. /* Register sysfs hooks */
  1585. err = w83781d_create_files(&pdev->dev, data->type, 1);
  1586. if (err)
  1587. goto exit_remove_files;
  1588. err = device_create_file(&pdev->dev, &dev_attr_name);
  1589. if (err)
  1590. goto exit_remove_files;
  1591. data->hwmon_dev = hwmon_device_register(&pdev->dev);
  1592. if (IS_ERR(data->hwmon_dev)) {
  1593. err = PTR_ERR(data->hwmon_dev);
  1594. goto exit_remove_files;
  1595. }
  1596. return 0;
  1597. exit_remove_files:
  1598. w83781d_remove_files(&pdev->dev);
  1599. device_remove_file(&pdev->dev, &dev_attr_name);
  1600. return err;
  1601. }
  1602. static int
  1603. w83781d_isa_remove(struct platform_device *pdev)
  1604. {
  1605. struct w83781d_data *data = platform_get_drvdata(pdev);
  1606. hwmon_device_unregister(data->hwmon_dev);
  1607. w83781d_remove_files(&pdev->dev);
  1608. device_remove_file(&pdev->dev, &dev_attr_name);
  1609. return 0;
  1610. }
  1611. static struct platform_driver w83781d_isa_driver = {
  1612. .driver = {
  1613. .name = "w83781d",
  1614. },
  1615. .probe = w83781d_isa_probe,
  1616. .remove = w83781d_isa_remove,
  1617. };
  1618. /* return 1 if a supported chip is found, 0 otherwise */
  1619. static int __init
  1620. w83781d_isa_found(unsigned short address)
  1621. {
  1622. int val, save, found = 0;
  1623. int port;
  1624. /*
  1625. * Some boards declare base+0 to base+7 as a PNP device, some base+4
  1626. * to base+7 and some base+5 to base+6. So we better request each port
  1627. * individually for the probing phase.
  1628. */
  1629. for (port = address; port < address + W83781D_EXTENT; port++) {
  1630. if (!request_region(port, 1, "w83781d")) {
  1631. pr_debug("Failed to request port 0x%x\n", port);
  1632. goto release;
  1633. }
  1634. }
  1635. #define REALLY_SLOW_IO
  1636. /*
  1637. * We need the timeouts for at least some W83781D-like
  1638. * chips. But only if we read 'undefined' registers.
  1639. */
  1640. val = inb_p(address + 1);
  1641. if (inb_p(address + 2) != val
  1642. || inb_p(address + 3) != val
  1643. || inb_p(address + 7) != val) {
  1644. pr_debug("Detection failed at step %d\n", 1);
  1645. goto release;
  1646. }
  1647. #undef REALLY_SLOW_IO
  1648. /*
  1649. * We should be able to change the 7 LSB of the address port. The
  1650. * MSB (busy flag) should be clear initially, set after the write.
  1651. */
  1652. save = inb_p(address + W83781D_ADDR_REG_OFFSET);
  1653. if (save & 0x80) {
  1654. pr_debug("Detection failed at step %d\n", 2);
  1655. goto release;
  1656. }
  1657. val = ~save & 0x7f;
  1658. outb_p(val, address + W83781D_ADDR_REG_OFFSET);
  1659. if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
  1660. outb_p(save, address + W83781D_ADDR_REG_OFFSET);
  1661. pr_debug("Detection failed at step %d\n", 3);
  1662. goto release;
  1663. }
  1664. /* We found a device, now see if it could be a W83781D */
  1665. outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
  1666. val = inb_p(address + W83781D_DATA_REG_OFFSET);
  1667. if (val & 0x80) {
  1668. pr_debug("Detection failed at step %d\n", 4);
  1669. goto release;
  1670. }
  1671. outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
  1672. save = inb_p(address + W83781D_DATA_REG_OFFSET);
  1673. outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
  1674. val = inb_p(address + W83781D_DATA_REG_OFFSET);
  1675. if ((!(save & 0x80) && (val != 0xa3))
  1676. || ((save & 0x80) && (val != 0x5c))) {
  1677. pr_debug("Detection failed at step %d\n", 5);
  1678. goto release;
  1679. }
  1680. outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
  1681. val = inb_p(address + W83781D_DATA_REG_OFFSET);
  1682. if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */
  1683. pr_debug("Detection failed at step %d\n", 6);
  1684. goto release;
  1685. }
  1686. /* The busy flag should be clear again */
  1687. if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
  1688. pr_debug("Detection failed at step %d\n", 7);
  1689. goto release;
  1690. }
  1691. /* Determine the chip type */
  1692. outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
  1693. save = inb_p(address + W83781D_DATA_REG_OFFSET);
  1694. outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
  1695. outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
  1696. val = inb_p(address + W83781D_DATA_REG_OFFSET);
  1697. if ((val & 0xfe) == 0x10 /* W83781D */
  1698. || val == 0x30) /* W83782D */
  1699. found = 1;
  1700. if (found)
  1701. pr_info("Found a %s chip at %#x\n",
  1702. val == 0x30 ? "W83782D" : "W83781D", (int)address);
  1703. release:
  1704. for (port--; port >= address; port--)
  1705. release_region(port, 1);
  1706. return found;
  1707. }
  1708. static int __init
  1709. w83781d_isa_device_add(unsigned short address)
  1710. {
  1711. struct resource res = {
  1712. .start = address,
  1713. .end = address + W83781D_EXTENT - 1,
  1714. .name = "w83781d",
  1715. .flags = IORESOURCE_IO,
  1716. };
  1717. int err;
  1718. pdev = platform_device_alloc("w83781d", address);
  1719. if (!pdev) {
  1720. err = -ENOMEM;
  1721. pr_err("Device allocation failed\n");
  1722. goto exit;
  1723. }
  1724. err = platform_device_add_resources(pdev, &res, 1);
  1725. if (err) {
  1726. pr_err("Device resource addition failed (%d)\n", err);
  1727. goto exit_device_put;
  1728. }
  1729. err = platform_device_add(pdev);
  1730. if (err) {
  1731. pr_err("Device addition failed (%d)\n", err);
  1732. goto exit_device_put;
  1733. }
  1734. return 0;
  1735. exit_device_put:
  1736. platform_device_put(pdev);
  1737. exit:
  1738. pdev = NULL;
  1739. return err;
  1740. }
  1741. static int __init
  1742. w83781d_isa_register(void)
  1743. {
  1744. int res;
  1745. if (w83781d_isa_found(isa_address)) {
  1746. res = platform_driver_register(&w83781d_isa_driver);
  1747. if (res)
  1748. goto exit;
  1749. /* Sets global pdev as a side effect */
  1750. res = w83781d_isa_device_add(isa_address);
  1751. if (res)
  1752. goto exit_unreg_isa_driver;
  1753. }
  1754. return 0;
  1755. exit_unreg_isa_driver:
  1756. platform_driver_unregister(&w83781d_isa_driver);
  1757. exit:
  1758. return res;
  1759. }
  1760. static void
  1761. w83781d_isa_unregister(void)
  1762. {
  1763. if (pdev) {
  1764. platform_device_unregister(pdev);
  1765. platform_driver_unregister(&w83781d_isa_driver);
  1766. }
  1767. }
  1768. #else /* !CONFIG_ISA */
  1769. static struct w83781d_data *w83781d_data_if_isa(void)
  1770. {
  1771. return NULL;
  1772. }
  1773. static int
  1774. w83781d_alias_detect(struct i2c_client *client, u8 chipid)
  1775. {
  1776. return 0;
  1777. }
  1778. static int
  1779. w83781d_read_value(struct w83781d_data *data, u16 reg)
  1780. {
  1781. int res;
  1782. mutex_lock(&data->lock);
  1783. res = w83781d_read_value_i2c(data, reg);
  1784. mutex_unlock(&data->lock);
  1785. return res;
  1786. }
  1787. static int
  1788. w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
  1789. {
  1790. mutex_lock(&data->lock);
  1791. w83781d_write_value_i2c(data, reg, value);
  1792. mutex_unlock(&data->lock);
  1793. return 0;
  1794. }
  1795. static int __init
  1796. w83781d_isa_register(void)
  1797. {
  1798. return 0;
  1799. }
  1800. static void
  1801. w83781d_isa_unregister(void)
  1802. {
  1803. }
  1804. #endif /* CONFIG_ISA */
  1805. static int __init
  1806. sensors_w83781d_init(void)
  1807. {
  1808. int res;
  1809. /*
  1810. * We register the ISA device first, so that we can skip the
  1811. * registration of an I2C interface to the same device.
  1812. */
  1813. res = w83781d_isa_register();
  1814. if (res)
  1815. goto exit;
  1816. res = i2c_add_driver(&w83781d_driver);
  1817. if (res)
  1818. goto exit_unreg_isa;
  1819. return 0;
  1820. exit_unreg_isa:
  1821. w83781d_isa_unregister();
  1822. exit:
  1823. return res;
  1824. }
  1825. static void __exit
  1826. sensors_w83781d_exit(void)
  1827. {
  1828. w83781d_isa_unregister();
  1829. i2c_del_driver(&w83781d_driver);
  1830. }
  1831. MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
  1832. "Philip Edelbrock <phil@netroedge.com>, "
  1833. "and Mark Studebaker <mdsxyz123@yahoo.com>");
  1834. MODULE_DESCRIPTION("W83781D driver");
  1835. MODULE_LICENSE("GPL");
  1836. module_init(sensors_w83781d_init);
  1837. module_exit(sensors_w83781d_exit);