cl5070.h 2.4 KB

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  1. #ifndef __NVIF_CL5070_H__
  2. #define __NVIF_CL5070_H__
  3. #define NV50_DISP_MTHD 0x00
  4. struct nv50_disp_mthd_v0 {
  5. __u8 version;
  6. #define NV50_DISP_SCANOUTPOS 0x00
  7. __u8 method;
  8. __u8 head;
  9. __u8 pad03[5];
  10. };
  11. struct nv50_disp_scanoutpos_v0 {
  12. __u8 version;
  13. __u8 pad01[7];
  14. __s64 time[2];
  15. __u16 vblanks;
  16. __u16 vblanke;
  17. __u16 vtotal;
  18. __u16 vline;
  19. __u16 hblanks;
  20. __u16 hblanke;
  21. __u16 htotal;
  22. __u16 hline;
  23. };
  24. struct nv50_disp_mthd_v1 {
  25. __u8 version;
  26. #define NV50_DISP_MTHD_V1_DAC_PWR 0x10
  27. #define NV50_DISP_MTHD_V1_DAC_LOAD 0x11
  28. #define NV50_DISP_MTHD_V1_SOR_PWR 0x20
  29. #define NV50_DISP_MTHD_V1_SOR_HDA_ELD 0x21
  30. #define NV50_DISP_MTHD_V1_SOR_HDMI_PWR 0x22
  31. #define NV50_DISP_MTHD_V1_SOR_LVDS_SCRIPT 0x23
  32. #define NV50_DISP_MTHD_V1_SOR_DP_PWR 0x24
  33. #define NV50_DISP_MTHD_V1_SOR_DP_MST_LINK 0x25
  34. #define NV50_DISP_MTHD_V1_SOR_DP_MST_VCPI 0x26
  35. #define NV50_DISP_MTHD_V1_PIOR_PWR 0x30
  36. __u8 method;
  37. __u16 hasht;
  38. __u16 hashm;
  39. __u8 pad06[2];
  40. };
  41. struct nv50_disp_dac_pwr_v0 {
  42. __u8 version;
  43. __u8 state;
  44. __u8 data;
  45. __u8 vsync;
  46. __u8 hsync;
  47. __u8 pad05[3];
  48. };
  49. struct nv50_disp_dac_load_v0 {
  50. __u8 version;
  51. __u8 load;
  52. __u8 pad02[2];
  53. __u32 data;
  54. };
  55. struct nv50_disp_sor_pwr_v0 {
  56. __u8 version;
  57. __u8 state;
  58. __u8 pad02[6];
  59. };
  60. struct nv50_disp_sor_hda_eld_v0 {
  61. __u8 version;
  62. __u8 pad01[7];
  63. __u8 data[];
  64. };
  65. struct nv50_disp_sor_hdmi_pwr_v0 {
  66. __u8 version;
  67. __u8 state;
  68. __u8 max_ac_packet;
  69. __u8 rekey;
  70. __u8 pad04[4];
  71. };
  72. struct nv50_disp_sor_lvds_script_v0 {
  73. __u8 version;
  74. __u8 pad01[1];
  75. __u16 script;
  76. __u8 pad04[4];
  77. };
  78. struct nv50_disp_sor_dp_pwr_v0 {
  79. __u8 version;
  80. __u8 state;
  81. __u8 pad02[6];
  82. };
  83. struct nv50_disp_sor_dp_mst_link_v0 {
  84. __u8 version;
  85. __u8 state;
  86. __u8 pad02[6];
  87. };
  88. struct nv50_disp_sor_dp_mst_vcpi_v0 {
  89. __u8 version;
  90. __u8 pad01[1];
  91. __u8 start_slot;
  92. __u8 num_slots;
  93. __u16 pbn;
  94. __u16 aligned_pbn;
  95. };
  96. struct nv50_disp_pior_pwr_v0 {
  97. __u8 version;
  98. __u8 state;
  99. __u8 type;
  100. __u8 pad03[5];
  101. };
  102. #endif