mtk-platform.h 6.0 KB

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  1. /*
  2. * Driver for EIP97 cryptographic accelerator.
  3. *
  4. * Copyright (c) 2016 Ryder Lee <ryder.lee@mediatek.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. */
  11. #ifndef __MTK_PLATFORM_H_
  12. #define __MTK_PLATFORM_H_
  13. #include <crypto/algapi.h>
  14. #include <crypto/internal/aead.h>
  15. #include <crypto/internal/hash.h>
  16. #include <crypto/scatterwalk.h>
  17. #include <crypto/skcipher.h>
  18. #include <linux/crypto.h>
  19. #include <linux/dma-mapping.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/scatterlist.h>
  22. #include "mtk-regs.h"
  23. #define MTK_RDR_PROC_THRESH BIT(0)
  24. #define MTK_RDR_PROC_MODE BIT(23)
  25. #define MTK_CNT_RST BIT(31)
  26. #define MTK_IRQ_RDR0 BIT(1)
  27. #define MTK_IRQ_RDR1 BIT(3)
  28. #define MTK_IRQ_RDR2 BIT(5)
  29. #define MTK_IRQ_RDR3 BIT(7)
  30. #define SIZE_IN_WORDS(x) ((x) >> 2)
  31. /**
  32. * Ring 0/1 are used by AES encrypt and decrypt.
  33. * Ring 2/3 are used by SHA.
  34. */
  35. enum {
  36. RING0 = 0,
  37. RING1,
  38. RING2,
  39. RING3,
  40. RING_MAX,
  41. };
  42. #define MTK_REC_NUM (RING_MAX / 2)
  43. #define MTK_IRQ_NUM 5
  44. /**
  45. * struct mtk_desc - DMA descriptor
  46. * @hdr: the descriptor control header
  47. * @buf: DMA address of input buffer segment
  48. * @ct: DMA address of command token that control operation flow
  49. * @ct_hdr: the command token control header
  50. * @tag: the user-defined field
  51. * @tfm: DMA address of transform state
  52. * @bound: align descriptors offset boundary
  53. *
  54. * Structure passed to the crypto engine to describe where source
  55. * data needs to be fetched and how it needs to be processed.
  56. */
  57. struct mtk_desc {
  58. __le32 hdr;
  59. __le32 buf;
  60. __le32 ct;
  61. __le32 ct_hdr;
  62. __le32 tag;
  63. __le32 tfm;
  64. __le32 bound[2];
  65. };
  66. #define MTK_DESC_NUM 512
  67. #define MTK_DESC_OFF SIZE_IN_WORDS(sizeof(struct mtk_desc))
  68. #define MTK_DESC_SZ (MTK_DESC_OFF - 2)
  69. #define MTK_DESC_RING_SZ ((sizeof(struct mtk_desc) * MTK_DESC_NUM))
  70. #define MTK_DESC_CNT(x) ((MTK_DESC_OFF * (x)) << 2)
  71. #define MTK_DESC_LAST cpu_to_le32(BIT(22))
  72. #define MTK_DESC_FIRST cpu_to_le32(BIT(23))
  73. #define MTK_DESC_BUF_LEN(x) cpu_to_le32(x)
  74. #define MTK_DESC_CT_LEN(x) cpu_to_le32((x) << 24)
  75. /**
  76. * struct mtk_ring - Descriptor ring
  77. * @cmd_base: pointer to command descriptor ring base
  78. * @cmd_dma: DMA address of command descriptor ring
  79. * @cmd_pos: current position in the command descriptor ring
  80. * @res_base: pointer to result descriptor ring base
  81. * @res_dma: DMA address of result descriptor ring
  82. * @res_pos: current position in the result descriptor ring
  83. *
  84. * A descriptor ring is a circular buffer that is used to manage
  85. * one or more descriptors. There are two type of descriptor rings;
  86. * the command descriptor ring and result descriptor ring.
  87. */
  88. struct mtk_ring {
  89. struct mtk_desc *cmd_base;
  90. dma_addr_t cmd_dma;
  91. u32 cmd_pos;
  92. struct mtk_desc *res_base;
  93. dma_addr_t res_dma;
  94. u32 res_pos;
  95. };
  96. /**
  97. * struct mtk_aes_dma - Structure that holds sg list info
  98. * @sg: pointer to scatter-gather list
  99. * @nents: number of entries in the sg list
  100. * @remainder: remainder of sg list
  101. * @sg_len: number of entries in the sg mapped list
  102. */
  103. struct mtk_aes_dma {
  104. struct scatterlist *sg;
  105. int nents;
  106. u32 remainder;
  107. u32 sg_len;
  108. };
  109. struct mtk_aes_base_ctx;
  110. struct mtk_aes_rec;
  111. struct mtk_cryp;
  112. typedef int (*mtk_aes_fn)(struct mtk_cryp *cryp, struct mtk_aes_rec *aes);
  113. /**
  114. * struct mtk_aes_rec - AES operation record
  115. * @queue: crypto request queue
  116. * @areq: pointer to async request
  117. * @task: the tasklet is use in AES interrupt
  118. * @ctx: pointer to current context
  119. * @src: the structure that holds source sg list info
  120. * @dst: the structure that holds destination sg list info
  121. * @aligned_sg: the scatter list is use to alignment
  122. * @real_dst: pointer to the destination sg list
  123. * @resume: pointer to resume function
  124. * @total: request buffer length
  125. * @buf: pointer to page buffer
  126. * @id: record identification
  127. * @flags: it's describing AES operation state
  128. * @lock: the async queue lock
  129. *
  130. * Structure used to record AES execution state.
  131. */
  132. struct mtk_aes_rec {
  133. struct crypto_queue queue;
  134. struct crypto_async_request *areq;
  135. struct tasklet_struct task;
  136. struct mtk_aes_base_ctx *ctx;
  137. struct mtk_aes_dma src;
  138. struct mtk_aes_dma dst;
  139. struct scatterlist aligned_sg;
  140. struct scatterlist *real_dst;
  141. mtk_aes_fn resume;
  142. size_t total;
  143. void *buf;
  144. u8 id;
  145. unsigned long flags;
  146. /* queue lock */
  147. spinlock_t lock;
  148. };
  149. /**
  150. * struct mtk_sha_rec - SHA operation record
  151. * @queue: crypto request queue
  152. * @req: pointer to ahash request
  153. * @task: the tasklet is use in SHA interrupt
  154. * @id: record identification
  155. * @flags: it's describing SHA operation state
  156. * @lock: the ablkcipher queue lock
  157. *
  158. * Structure used to record SHA execution state.
  159. */
  160. struct mtk_sha_rec {
  161. struct crypto_queue queue;
  162. struct ahash_request *req;
  163. struct tasklet_struct task;
  164. u8 id;
  165. unsigned long flags;
  166. /* queue lock */
  167. spinlock_t lock;
  168. };
  169. /**
  170. * struct mtk_cryp - Cryptographic device
  171. * @base: pointer to mapped register I/O base
  172. * @dev: pointer to device
  173. * @clk_ethif: pointer to ethif clock
  174. * @clk_cryp: pointer to crypto clock
  175. * @irq: global system and rings IRQ
  176. * @ring: pointer to execution state of AES
  177. * @aes: pointer to execution state of SHA
  178. * @sha: each execution record map to a ring
  179. * @aes_list: device list of AES
  180. * @sha_list: device list of SHA
  181. * @tmp: pointer to temporary buffer for internal use
  182. * @tmp_dma: DMA address of temporary buffer
  183. * @rec: it's used to select SHA record for tfm
  184. *
  185. * Structure storing cryptographic device information.
  186. */
  187. struct mtk_cryp {
  188. void __iomem *base;
  189. struct device *dev;
  190. struct clk *clk_ethif;
  191. struct clk *clk_cryp;
  192. int irq[MTK_IRQ_NUM];
  193. struct mtk_ring *ring[RING_MAX];
  194. struct mtk_aes_rec *aes[MTK_REC_NUM];
  195. struct mtk_sha_rec *sha[MTK_REC_NUM];
  196. struct list_head aes_list;
  197. struct list_head sha_list;
  198. void *tmp;
  199. dma_addr_t tmp_dma;
  200. bool rec;
  201. };
  202. int mtk_cipher_alg_register(struct mtk_cryp *cryp);
  203. void mtk_cipher_alg_release(struct mtk_cryp *cryp);
  204. int mtk_hash_alg_register(struct mtk_cryp *cryp);
  205. void mtk_hash_alg_release(struct mtk_cryp *cryp);
  206. #endif /* __MTK_PLATFORM_H_ */