tpm_tis_spi.c 6.7 KB

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  1. /*
  2. * Copyright (C) 2015 Infineon Technologies AG
  3. * Copyright (C) 2016 STMicroelectronics SAS
  4. *
  5. * Authors:
  6. * Peter Huewe <peter.huewe@infineon.com>
  7. * Christophe Ricard <christophe-h.ricard@st.com>
  8. *
  9. * Maintained by: <tpmdd-devel@lists.sourceforge.net>
  10. *
  11. * Device driver for TCG/TCPA TPM (trusted platform module).
  12. * Specifications at www.trustedcomputinggroup.org
  13. *
  14. * This device driver implements the TPM interface as defined in
  15. * the TCG TPM Interface Spec version 1.3, revision 27 via _raw/native
  16. * SPI access_.
  17. *
  18. * It is based on the original tpm_tis device driver from Leendert van
  19. * Dorn and Kyleen Hall and Jarko Sakkinnen.
  20. *
  21. * This program is free software; you can redistribute it and/or
  22. * modify it under the terms of the GNU General Public License as
  23. * published by the Free Software Foundation, version 2 of the
  24. * License.
  25. */
  26. #include <linux/init.h>
  27. #include <linux/module.h>
  28. #include <linux/moduleparam.h>
  29. #include <linux/slab.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/wait.h>
  32. #include <linux/acpi.h>
  33. #include <linux/freezer.h>
  34. #include <linux/spi/spi.h>
  35. #include <linux/gpio.h>
  36. #include <linux/of_irq.h>
  37. #include <linux/of_gpio.h>
  38. #include <linux/tpm.h>
  39. #include "tpm.h"
  40. #include "tpm_tis_core.h"
  41. #define MAX_SPI_FRAMESIZE 64
  42. struct tpm_tis_spi_phy {
  43. struct tpm_tis_data priv;
  44. struct spi_device *spi_device;
  45. u8 tx_buf[MAX_SPI_FRAMESIZE + 4];
  46. u8 rx_buf[MAX_SPI_FRAMESIZE + 4];
  47. };
  48. static inline struct tpm_tis_spi_phy *to_tpm_tis_spi_phy(struct tpm_tis_data *data)
  49. {
  50. return container_of(data, struct tpm_tis_spi_phy, priv);
  51. }
  52. static int tpm_tis_spi_read_bytes(struct tpm_tis_data *data, u32 addr,
  53. u16 len, u8 *result)
  54. {
  55. struct tpm_tis_spi_phy *phy = to_tpm_tis_spi_phy(data);
  56. int ret, i;
  57. struct spi_message m;
  58. struct spi_transfer spi_xfer = {
  59. .tx_buf = phy->tx_buf,
  60. .rx_buf = phy->rx_buf,
  61. .len = 4,
  62. };
  63. if (len > MAX_SPI_FRAMESIZE)
  64. return -ENOMEM;
  65. phy->tx_buf[0] = 0x80 | (len - 1);
  66. phy->tx_buf[1] = 0xd4;
  67. phy->tx_buf[2] = (addr >> 8) & 0xFF;
  68. phy->tx_buf[3] = addr & 0xFF;
  69. spi_xfer.cs_change = 1;
  70. spi_message_init(&m);
  71. spi_message_add_tail(&spi_xfer, &m);
  72. spi_bus_lock(phy->spi_device->master);
  73. ret = spi_sync_locked(phy->spi_device, &m);
  74. if (ret < 0)
  75. goto exit;
  76. memset(phy->tx_buf, 0, len);
  77. /* According to TCG PTP specification, if there is no TPM present at
  78. * all, then the design has a weak pull-up on MISO. If a TPM is not
  79. * present, a pull-up on MISO means that the SB controller sees a 1,
  80. * and will latch in 0xFF on the read.
  81. */
  82. for (i = 0; (phy->rx_buf[0] & 0x01) == 0 && i < TPM_RETRY; i++) {
  83. spi_xfer.len = 1;
  84. spi_message_init(&m);
  85. spi_message_add_tail(&spi_xfer, &m);
  86. ret = spi_sync_locked(phy->spi_device, &m);
  87. if (ret < 0)
  88. goto exit;
  89. }
  90. spi_xfer.cs_change = 0;
  91. spi_xfer.len = len;
  92. spi_xfer.rx_buf = result;
  93. spi_message_init(&m);
  94. spi_message_add_tail(&spi_xfer, &m);
  95. ret = spi_sync_locked(phy->spi_device, &m);
  96. exit:
  97. spi_bus_unlock(phy->spi_device->master);
  98. return ret;
  99. }
  100. static int tpm_tis_spi_write_bytes(struct tpm_tis_data *data, u32 addr,
  101. u16 len, u8 *value)
  102. {
  103. struct tpm_tis_spi_phy *phy = to_tpm_tis_spi_phy(data);
  104. int ret, i;
  105. struct spi_message m;
  106. struct spi_transfer spi_xfer = {
  107. .tx_buf = phy->tx_buf,
  108. .rx_buf = phy->rx_buf,
  109. .len = 4,
  110. };
  111. if (len > MAX_SPI_FRAMESIZE)
  112. return -ENOMEM;
  113. phy->tx_buf[0] = len - 1;
  114. phy->tx_buf[1] = 0xd4;
  115. phy->tx_buf[2] = (addr >> 8) & 0xFF;
  116. phy->tx_buf[3] = addr & 0xFF;
  117. spi_xfer.cs_change = 1;
  118. spi_message_init(&m);
  119. spi_message_add_tail(&spi_xfer, &m);
  120. spi_bus_lock(phy->spi_device->master);
  121. ret = spi_sync_locked(phy->spi_device, &m);
  122. if (ret < 0)
  123. goto exit;
  124. memset(phy->tx_buf, 0, len);
  125. /* According to TCG PTP specification, if there is no TPM present at
  126. * all, then the design has a weak pull-up on MISO. If a TPM is not
  127. * present, a pull-up on MISO means that the SB controller sees a 1,
  128. * and will latch in 0xFF on the read.
  129. */
  130. for (i = 0; (phy->rx_buf[0] & 0x01) == 0 && i < TPM_RETRY; i++) {
  131. spi_xfer.len = 1;
  132. spi_message_init(&m);
  133. spi_message_add_tail(&spi_xfer, &m);
  134. ret = spi_sync_locked(phy->spi_device, &m);
  135. if (ret < 0)
  136. goto exit;
  137. }
  138. spi_xfer.len = len;
  139. spi_xfer.tx_buf = value;
  140. spi_xfer.cs_change = 0;
  141. spi_xfer.tx_buf = value;
  142. spi_message_init(&m);
  143. spi_message_add_tail(&spi_xfer, &m);
  144. ret = spi_sync_locked(phy->spi_device, &m);
  145. exit:
  146. spi_bus_unlock(phy->spi_device->master);
  147. return ret;
  148. }
  149. static int tpm_tis_spi_read16(struct tpm_tis_data *data, u32 addr, u16 *result)
  150. {
  151. int rc;
  152. rc = data->phy_ops->read_bytes(data, addr, sizeof(u16), (u8 *)result);
  153. if (!rc)
  154. *result = le16_to_cpu(*result);
  155. return rc;
  156. }
  157. static int tpm_tis_spi_read32(struct tpm_tis_data *data, u32 addr, u32 *result)
  158. {
  159. int rc;
  160. rc = data->phy_ops->read_bytes(data, addr, sizeof(u32), (u8 *)result);
  161. if (!rc)
  162. *result = le32_to_cpu(*result);
  163. return rc;
  164. }
  165. static int tpm_tis_spi_write32(struct tpm_tis_data *data, u32 addr, u32 value)
  166. {
  167. value = cpu_to_le32(value);
  168. return data->phy_ops->write_bytes(data, addr, sizeof(u32),
  169. (u8 *)&value);
  170. }
  171. static const struct tpm_tis_phy_ops tpm_spi_phy_ops = {
  172. .read_bytes = tpm_tis_spi_read_bytes,
  173. .write_bytes = tpm_tis_spi_write_bytes,
  174. .read16 = tpm_tis_spi_read16,
  175. .read32 = tpm_tis_spi_read32,
  176. .write32 = tpm_tis_spi_write32,
  177. };
  178. static int tpm_tis_spi_probe(struct spi_device *dev)
  179. {
  180. struct tpm_tis_spi_phy *phy;
  181. phy = devm_kzalloc(&dev->dev, sizeof(struct tpm_tis_spi_phy),
  182. GFP_KERNEL);
  183. if (!phy)
  184. return -ENOMEM;
  185. phy->spi_device = dev;
  186. return tpm_tis_core_init(&dev->dev, &phy->priv, -1, &tpm_spi_phy_ops,
  187. NULL);
  188. }
  189. static SIMPLE_DEV_PM_OPS(tpm_tis_pm, tpm_pm_suspend, tpm_tis_resume);
  190. static int tpm_tis_spi_remove(struct spi_device *dev)
  191. {
  192. struct tpm_chip *chip = spi_get_drvdata(dev);
  193. tpm_chip_unregister(chip);
  194. tpm_tis_remove(chip);
  195. return 0;
  196. }
  197. static const struct spi_device_id tpm_tis_spi_id[] = {
  198. {"tpm_tis_spi", 0},
  199. {}
  200. };
  201. MODULE_DEVICE_TABLE(spi, tpm_tis_spi_id);
  202. static const struct of_device_id of_tis_spi_match[] = {
  203. { .compatible = "st,st33htpm-spi", },
  204. { .compatible = "infineon,slb9670", },
  205. { .compatible = "tcg,tpm_tis-spi", },
  206. {}
  207. };
  208. MODULE_DEVICE_TABLE(of, of_tis_spi_match);
  209. static const struct acpi_device_id acpi_tis_spi_match[] = {
  210. {"SMO0768", 0},
  211. {}
  212. };
  213. MODULE_DEVICE_TABLE(acpi, acpi_tis_spi_match);
  214. static struct spi_driver tpm_tis_spi_driver = {
  215. .driver = {
  216. .owner = THIS_MODULE,
  217. .name = "tpm_tis_spi",
  218. .pm = &tpm_tis_pm,
  219. .of_match_table = of_match_ptr(of_tis_spi_match),
  220. .acpi_match_table = ACPI_PTR(acpi_tis_spi_match),
  221. },
  222. .probe = tpm_tis_spi_probe,
  223. .remove = tpm_tis_spi_remove,
  224. .id_table = tpm_tis_spi_id,
  225. };
  226. module_spi_driver(tpm_tis_spi_driver);
  227. MODULE_DESCRIPTION("TPM Driver for native SPI access");
  228. MODULE_LICENSE("GPL");