bytcr_rt5651.c 31 KB

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  1. /*
  2. * bytcr_rt5651.c - ASoc Machine driver for Intel Byt CR platform
  3. * (derived from bytcr_rt5640.c)
  4. *
  5. * Copyright (C) 2015 Intel Corp
  6. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  18. */
  19. #include <linux/init.h>
  20. #include <linux/i2c.h>
  21. #include <linux/module.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/property.h>
  24. #include <linux/acpi.h>
  25. #include <linux/clk.h>
  26. #include <linux/device.h>
  27. #include <linux/dmi.h>
  28. #include <linux/input.h>
  29. #include <linux/gpio/consumer.h>
  30. #include <linux/gpio/machine.h>
  31. #include <linux/slab.h>
  32. #include <asm/cpu_device_id.h>
  33. #include <asm/intel-family.h>
  34. #include <asm/platform_sst_audio.h>
  35. #include <sound/pcm.h>
  36. #include <sound/pcm_params.h>
  37. #include <sound/soc.h>
  38. #include <sound/jack.h>
  39. #include <sound/soc-acpi.h>
  40. #include "../../codecs/rt5651.h"
  41. #include "../atom/sst-atom-controls.h"
  42. enum {
  43. BYT_RT5651_DMIC_MAP,
  44. BYT_RT5651_IN1_MAP,
  45. BYT_RT5651_IN2_MAP,
  46. BYT_RT5651_IN1_IN2_MAP,
  47. };
  48. enum {
  49. BYT_RT5651_JD_NULL = (RT5651_JD_NULL << 4),
  50. BYT_RT5651_JD1_1 = (RT5651_JD1_1 << 4),
  51. BYT_RT5651_JD1_2 = (RT5651_JD1_2 << 4),
  52. BYT_RT5651_JD2 = (RT5651_JD2 << 4),
  53. };
  54. enum {
  55. BYT_RT5651_OVCD_TH_600UA = (6 << 8),
  56. BYT_RT5651_OVCD_TH_1500UA = (15 << 8),
  57. BYT_RT5651_OVCD_TH_2000UA = (20 << 8),
  58. };
  59. enum {
  60. BYT_RT5651_OVCD_SF_0P5 = (RT5651_OVCD_SF_0P5 << 13),
  61. BYT_RT5651_OVCD_SF_0P75 = (RT5651_OVCD_SF_0P75 << 13),
  62. BYT_RT5651_OVCD_SF_1P0 = (RT5651_OVCD_SF_1P0 << 13),
  63. BYT_RT5651_OVCD_SF_1P5 = (RT5651_OVCD_SF_1P5 << 13),
  64. };
  65. #define BYT_RT5651_MAP(quirk) ((quirk) & GENMASK(3, 0))
  66. #define BYT_RT5651_JDSRC(quirk) (((quirk) & GENMASK(7, 4)) >> 4)
  67. #define BYT_RT5651_OVCD_TH(quirk) (((quirk) & GENMASK(12, 8)) >> 8)
  68. #define BYT_RT5651_OVCD_SF(quirk) (((quirk) & GENMASK(14, 13)) >> 13)
  69. #define BYT_RT5651_DMIC_EN BIT(16)
  70. #define BYT_RT5651_MCLK_EN BIT(17)
  71. #define BYT_RT5651_MCLK_25MHZ BIT(18)
  72. #define BYT_RT5651_SSP2_AIF2 BIT(19) /* default is using AIF1 */
  73. #define BYT_RT5651_SSP0_AIF1 BIT(20)
  74. #define BYT_RT5651_SSP0_AIF2 BIT(21)
  75. #define BYT_RT5651_HP_LR_SWAPPED BIT(22)
  76. #define BYT_RT5651_MONO_SPEAKER BIT(23)
  77. #define BYT_RT5651_DEFAULT_QUIRKS (BYT_RT5651_MCLK_EN | \
  78. BYT_RT5651_JD1_1 | \
  79. BYT_RT5651_OVCD_TH_2000UA | \
  80. BYT_RT5651_OVCD_SF_0P75)
  81. /* jack-detect-source + dmic-en + ovcd-th + -sf + terminating empty entry */
  82. #define MAX_NO_PROPS 5
  83. struct byt_rt5651_private {
  84. struct clk *mclk;
  85. struct gpio_desc *ext_amp_gpio;
  86. struct snd_soc_jack jack;
  87. };
  88. /* Default: jack-detect on JD1_1, internal mic on in2, headsetmic on in3 */
  89. static unsigned long byt_rt5651_quirk = BYT_RT5651_DEFAULT_QUIRKS |
  90. BYT_RT5651_IN2_MAP;
  91. static void log_quirks(struct device *dev)
  92. {
  93. if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_DMIC_MAP)
  94. dev_info(dev, "quirk DMIC_MAP enabled");
  95. if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN1_MAP)
  96. dev_info(dev, "quirk IN1_MAP enabled");
  97. if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN2_MAP)
  98. dev_info(dev, "quirk IN2_MAP enabled");
  99. if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN1_IN2_MAP)
  100. dev_info(dev, "quirk IN1_IN2_MAP enabled");
  101. if (BYT_RT5651_JDSRC(byt_rt5651_quirk)) {
  102. dev_info(dev, "quirk realtek,jack-detect-source %ld\n",
  103. BYT_RT5651_JDSRC(byt_rt5651_quirk));
  104. dev_info(dev, "quirk realtek,over-current-threshold-microamp %ld\n",
  105. BYT_RT5651_OVCD_TH(byt_rt5651_quirk) * 100);
  106. dev_info(dev, "quirk realtek,over-current-scale-factor %ld\n",
  107. BYT_RT5651_OVCD_SF(byt_rt5651_quirk));
  108. }
  109. if (byt_rt5651_quirk & BYT_RT5651_DMIC_EN)
  110. dev_info(dev, "quirk DMIC enabled");
  111. if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
  112. dev_info(dev, "quirk MCLK_EN enabled");
  113. if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
  114. dev_info(dev, "quirk MCLK_25MHZ enabled");
  115. if (byt_rt5651_quirk & BYT_RT5651_SSP2_AIF2)
  116. dev_info(dev, "quirk SSP2_AIF2 enabled\n");
  117. if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1)
  118. dev_info(dev, "quirk SSP0_AIF1 enabled\n");
  119. if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)
  120. dev_info(dev, "quirk SSP0_AIF2 enabled\n");
  121. if (byt_rt5651_quirk & BYT_RT5651_MONO_SPEAKER)
  122. dev_info(dev, "quirk MONO_SPEAKER enabled\n");
  123. }
  124. #define BYT_CODEC_DAI1 "rt5651-aif1"
  125. #define BYT_CODEC_DAI2 "rt5651-aif2"
  126. static int byt_rt5651_prepare_and_enable_pll1(struct snd_soc_dai *codec_dai,
  127. int rate, int bclk_ratio)
  128. {
  129. int clk_id, clk_freq, ret;
  130. /* Configure the PLL before selecting it */
  131. if (!(byt_rt5651_quirk & BYT_RT5651_MCLK_EN)) {
  132. clk_id = RT5651_PLL1_S_BCLK1,
  133. clk_freq = rate * bclk_ratio;
  134. } else {
  135. clk_id = RT5651_PLL1_S_MCLK;
  136. if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
  137. clk_freq = 25000000;
  138. else
  139. clk_freq = 19200000;
  140. }
  141. ret = snd_soc_dai_set_pll(codec_dai, 0, clk_id, clk_freq, rate * 512);
  142. if (ret < 0) {
  143. dev_err(codec_dai->component->dev, "can't set pll: %d\n", ret);
  144. return ret;
  145. }
  146. ret = snd_soc_dai_set_sysclk(codec_dai, RT5651_SCLK_S_PLL1,
  147. rate * 512, SND_SOC_CLOCK_IN);
  148. if (ret < 0) {
  149. dev_err(codec_dai->component->dev, "can't set clock %d\n", ret);
  150. return ret;
  151. }
  152. return 0;
  153. }
  154. static int platform_clock_control(struct snd_soc_dapm_widget *w,
  155. struct snd_kcontrol *k, int event)
  156. {
  157. struct snd_soc_dapm_context *dapm = w->dapm;
  158. struct snd_soc_card *card = dapm->card;
  159. struct snd_soc_dai *codec_dai;
  160. struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);
  161. int ret;
  162. codec_dai = snd_soc_card_get_codec_dai(card, BYT_CODEC_DAI1);
  163. if (!codec_dai)
  164. codec_dai = snd_soc_card_get_codec_dai(card, BYT_CODEC_DAI2);
  165. if (!codec_dai) {
  166. dev_err(card->dev,
  167. "Codec dai not found; Unable to set platform clock\n");
  168. return -EIO;
  169. }
  170. if (SND_SOC_DAPM_EVENT_ON(event)) {
  171. if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
  172. ret = clk_prepare_enable(priv->mclk);
  173. if (ret < 0) {
  174. dev_err(card->dev,
  175. "could not configure MCLK state");
  176. return ret;
  177. }
  178. }
  179. ret = byt_rt5651_prepare_and_enable_pll1(codec_dai, 48000, 50);
  180. } else {
  181. /*
  182. * Set codec clock source to internal clock before
  183. * turning off the platform clock. Codec needs clock
  184. * for Jack detection and button press
  185. */
  186. ret = snd_soc_dai_set_sysclk(codec_dai, RT5651_SCLK_S_RCCLK,
  187. 48000 * 512,
  188. SND_SOC_CLOCK_IN);
  189. if (!ret)
  190. if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
  191. clk_disable_unprepare(priv->mclk);
  192. }
  193. if (ret < 0) {
  194. dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
  195. return ret;
  196. }
  197. return 0;
  198. }
  199. static int rt5651_ext_amp_power_event(struct snd_soc_dapm_widget *w,
  200. struct snd_kcontrol *kcontrol, int event)
  201. {
  202. struct snd_soc_card *card = w->dapm->card;
  203. struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);
  204. if (SND_SOC_DAPM_EVENT_ON(event))
  205. gpiod_set_value_cansleep(priv->ext_amp_gpio, 1);
  206. else
  207. gpiod_set_value_cansleep(priv->ext_amp_gpio, 0);
  208. return 0;
  209. }
  210. static const struct snd_soc_dapm_widget byt_rt5651_widgets[] = {
  211. SND_SOC_DAPM_HP("Headphone", NULL),
  212. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  213. SND_SOC_DAPM_MIC("Internal Mic", NULL),
  214. SND_SOC_DAPM_SPK("Speaker", NULL),
  215. SND_SOC_DAPM_LINE("Line In", NULL),
  216. SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
  217. platform_clock_control, SND_SOC_DAPM_PRE_PMU |
  218. SND_SOC_DAPM_POST_PMD),
  219. SND_SOC_DAPM_SUPPLY("Ext Amp Power", SND_SOC_NOPM, 0, 0,
  220. rt5651_ext_amp_power_event,
  221. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
  222. };
  223. static const struct snd_soc_dapm_route byt_rt5651_audio_map[] = {
  224. {"Headphone", NULL, "Platform Clock"},
  225. {"Headset Mic", NULL, "Platform Clock"},
  226. {"Internal Mic", NULL, "Platform Clock"},
  227. {"Speaker", NULL, "Platform Clock"},
  228. {"Speaker", NULL, "Ext Amp Power"},
  229. {"Line In", NULL, "Platform Clock"},
  230. {"Headset Mic", NULL, "micbias1"}, /* lowercase for rt5651 */
  231. {"Headphone", NULL, "HPOL"},
  232. {"Headphone", NULL, "HPOR"},
  233. {"Speaker", NULL, "LOUTL"},
  234. {"Speaker", NULL, "LOUTR"},
  235. {"IN2P", NULL, "Line In"},
  236. {"IN2N", NULL, "Line In"},
  237. };
  238. static const struct snd_soc_dapm_route byt_rt5651_intmic_dmic_map[] = {
  239. {"DMIC L1", NULL, "Internal Mic"},
  240. {"DMIC R1", NULL, "Internal Mic"},
  241. {"IN3P", NULL, "Headset Mic"},
  242. };
  243. static const struct snd_soc_dapm_route byt_rt5651_intmic_in1_map[] = {
  244. {"Internal Mic", NULL, "micbias1"},
  245. {"IN1P", NULL, "Internal Mic"},
  246. {"IN3P", NULL, "Headset Mic"},
  247. };
  248. static const struct snd_soc_dapm_route byt_rt5651_intmic_in2_map[] = {
  249. {"Internal Mic", NULL, "micbias1"},
  250. {"IN2P", NULL, "Internal Mic"},
  251. {"IN3P", NULL, "Headset Mic"},
  252. };
  253. static const struct snd_soc_dapm_route byt_rt5651_intmic_in1_in2_map[] = {
  254. {"Internal Mic", NULL, "micbias1"},
  255. {"IN1P", NULL, "Internal Mic"},
  256. {"IN2P", NULL, "Internal Mic"},
  257. {"IN3P", NULL, "Headset Mic"},
  258. };
  259. static const struct snd_soc_dapm_route byt_rt5651_ssp0_aif1_map[] = {
  260. {"ssp0 Tx", NULL, "modem_out"},
  261. {"modem_in", NULL, "ssp0 Rx"},
  262. {"AIF1 Playback", NULL, "ssp0 Tx"},
  263. {"ssp0 Rx", NULL, "AIF1 Capture"},
  264. };
  265. static const struct snd_soc_dapm_route byt_rt5651_ssp0_aif2_map[] = {
  266. {"ssp0 Tx", NULL, "modem_out"},
  267. {"modem_in", NULL, "ssp0 Rx"},
  268. {"AIF2 Playback", NULL, "ssp0 Tx"},
  269. {"ssp0 Rx", NULL, "AIF2 Capture"},
  270. };
  271. static const struct snd_soc_dapm_route byt_rt5651_ssp2_aif1_map[] = {
  272. {"ssp2 Tx", NULL, "codec_out0"},
  273. {"ssp2 Tx", NULL, "codec_out1"},
  274. {"codec_in0", NULL, "ssp2 Rx"},
  275. {"codec_in1", NULL, "ssp2 Rx"},
  276. {"AIF1 Playback", NULL, "ssp2 Tx"},
  277. {"ssp2 Rx", NULL, "AIF1 Capture"},
  278. };
  279. static const struct snd_soc_dapm_route byt_rt5651_ssp2_aif2_map[] = {
  280. {"ssp2 Tx", NULL, "codec_out0"},
  281. {"ssp2 Tx", NULL, "codec_out1"},
  282. {"codec_in0", NULL, "ssp2 Rx"},
  283. {"codec_in1", NULL, "ssp2 Rx"},
  284. {"AIF2 Playback", NULL, "ssp2 Tx"},
  285. {"ssp2 Rx", NULL, "AIF2 Capture"},
  286. };
  287. static const struct snd_kcontrol_new byt_rt5651_controls[] = {
  288. SOC_DAPM_PIN_SWITCH("Headphone"),
  289. SOC_DAPM_PIN_SWITCH("Headset Mic"),
  290. SOC_DAPM_PIN_SWITCH("Internal Mic"),
  291. SOC_DAPM_PIN_SWITCH("Speaker"),
  292. SOC_DAPM_PIN_SWITCH("Line In"),
  293. };
  294. static struct snd_soc_jack_pin bytcr_jack_pins[] = {
  295. {
  296. .pin = "Headphone",
  297. .mask = SND_JACK_HEADPHONE,
  298. },
  299. {
  300. .pin = "Headset Mic",
  301. .mask = SND_JACK_MICROPHONE,
  302. },
  303. };
  304. static int byt_rt5651_aif1_hw_params(struct snd_pcm_substream *substream,
  305. struct snd_pcm_hw_params *params)
  306. {
  307. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  308. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  309. snd_pcm_format_t format = params_format(params);
  310. int rate = params_rate(params);
  311. int bclk_ratio;
  312. if (format == SNDRV_PCM_FORMAT_S16_LE)
  313. bclk_ratio = 32;
  314. else
  315. bclk_ratio = 50;
  316. return byt_rt5651_prepare_and_enable_pll1(codec_dai, rate, bclk_ratio);
  317. }
  318. static int byt_rt5651_quirk_cb(const struct dmi_system_id *id)
  319. {
  320. byt_rt5651_quirk = (unsigned long)id->driver_data;
  321. return 1;
  322. }
  323. static const struct dmi_system_id byt_rt5651_quirk_table[] = {
  324. {
  325. /* Chuwi Hi8 Pro (CWI513) */
  326. .callback = byt_rt5651_quirk_cb,
  327. .matches = {
  328. DMI_MATCH(DMI_SYS_VENDOR, "Hampoo"),
  329. DMI_MATCH(DMI_PRODUCT_NAME, "X1D3_C806N"),
  330. },
  331. .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
  332. BYT_RT5651_IN2_MAP |
  333. BYT_RT5651_HP_LR_SWAPPED |
  334. BYT_RT5651_MONO_SPEAKER),
  335. },
  336. {
  337. /* Chuwi Vi8 Plus (CWI519) */
  338. .callback = byt_rt5651_quirk_cb,
  339. .matches = {
  340. DMI_MATCH(DMI_SYS_VENDOR, "Hampoo"),
  341. DMI_MATCH(DMI_PRODUCT_NAME, "D2D3_Vi8A1"),
  342. },
  343. .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
  344. BYT_RT5651_IN2_MAP |
  345. BYT_RT5651_HP_LR_SWAPPED |
  346. BYT_RT5651_MONO_SPEAKER),
  347. },
  348. {
  349. /* I.T.Works TW701, Ployer Momo7w and Trekstor ST70416-6
  350. * (these all use the same mainboard) */
  351. .callback = byt_rt5651_quirk_cb,
  352. .matches = {
  353. DMI_MATCH(DMI_BIOS_VENDOR, "INSYDE Corp."),
  354. /* Partial match for all of itWORKS.G.WI71C.JGBMRBA,
  355. * TREK.G.WI71C.JGBMRBA0x and MOMO.G.WI71C.MABMRBA02 */
  356. DMI_MATCH(DMI_BIOS_VERSION, ".G.WI71C."),
  357. },
  358. .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
  359. BYT_RT5651_IN2_MAP |
  360. BYT_RT5651_SSP0_AIF1 |
  361. BYT_RT5651_MONO_SPEAKER),
  362. },
  363. {
  364. /* KIANO SlimNote 14.2 */
  365. .callback = byt_rt5651_quirk_cb,
  366. .matches = {
  367. DMI_MATCH(DMI_SYS_VENDOR, "KIANO"),
  368. DMI_MATCH(DMI_PRODUCT_NAME, "KIANO SlimNote 14.2"),
  369. },
  370. .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
  371. BYT_RT5651_IN1_IN2_MAP),
  372. },
  373. {
  374. /* Minnowboard Max B3 */
  375. .callback = byt_rt5651_quirk_cb,
  376. .matches = {
  377. DMI_MATCH(DMI_SYS_VENDOR, "Circuitco"),
  378. DMI_MATCH(DMI_PRODUCT_NAME, "Minnowboard Max B3 PLATFORM"),
  379. },
  380. .driver_data = (void *)(BYT_RT5651_IN1_MAP),
  381. },
  382. {
  383. /* Minnowboard Turbot */
  384. .callback = byt_rt5651_quirk_cb,
  385. .matches = {
  386. DMI_MATCH(DMI_SYS_VENDOR, "ADI"),
  387. DMI_MATCH(DMI_PRODUCT_NAME, "Minnowboard Turbot"),
  388. },
  389. .driver_data = (void *)(BYT_RT5651_MCLK_EN |
  390. BYT_RT5651_IN1_MAP),
  391. },
  392. {
  393. /* VIOS LTH17 */
  394. .callback = byt_rt5651_quirk_cb,
  395. .matches = {
  396. DMI_MATCH(DMI_SYS_VENDOR, "VIOS"),
  397. DMI_MATCH(DMI_PRODUCT_NAME, "LTH17"),
  398. },
  399. .driver_data = (void *)(BYT_RT5651_IN1_IN2_MAP |
  400. BYT_RT5651_JD1_1 |
  401. BYT_RT5651_OVCD_TH_2000UA |
  402. BYT_RT5651_OVCD_SF_1P0 |
  403. BYT_RT5651_MCLK_EN),
  404. },
  405. {
  406. /* Yours Y8W81 (and others using the same mainboard) */
  407. .callback = byt_rt5651_quirk_cb,
  408. .matches = {
  409. DMI_MATCH(DMI_BIOS_VENDOR, "INSYDE Corp."),
  410. /* Partial match for all devs with a W86C mainboard */
  411. DMI_MATCH(DMI_BIOS_VERSION, ".F.W86C."),
  412. },
  413. .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
  414. BYT_RT5651_IN2_MAP |
  415. BYT_RT5651_SSP0_AIF1 |
  416. BYT_RT5651_MONO_SPEAKER),
  417. },
  418. {}
  419. };
  420. /*
  421. * Note this MUST be called before snd_soc_register_card(), so that the props
  422. * are in place before the codec component driver's probe function parses them.
  423. */
  424. static int byt_rt5651_add_codec_device_props(struct device *i2c_dev)
  425. {
  426. struct property_entry props[MAX_NO_PROPS] = {};
  427. int cnt = 0;
  428. props[cnt++] = PROPERTY_ENTRY_U32("realtek,jack-detect-source",
  429. BYT_RT5651_JDSRC(byt_rt5651_quirk));
  430. props[cnt++] = PROPERTY_ENTRY_U32("realtek,over-current-threshold-microamp",
  431. BYT_RT5651_OVCD_TH(byt_rt5651_quirk) * 100);
  432. props[cnt++] = PROPERTY_ENTRY_U32("realtek,over-current-scale-factor",
  433. BYT_RT5651_OVCD_SF(byt_rt5651_quirk));
  434. if (byt_rt5651_quirk & BYT_RT5651_DMIC_EN)
  435. props[cnt++] = PROPERTY_ENTRY_BOOL("realtek,dmic-en");
  436. return device_add_properties(i2c_dev, props);
  437. }
  438. static int byt_rt5651_init(struct snd_soc_pcm_runtime *runtime)
  439. {
  440. struct snd_soc_card *card = runtime->card;
  441. struct snd_soc_component *codec = runtime->codec_dai->component;
  442. struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);
  443. const struct snd_soc_dapm_route *custom_map;
  444. int num_routes;
  445. int ret;
  446. card->dapm.idle_bias_off = true;
  447. /* Start with RC clk for jack-detect (we disable MCLK below) */
  448. if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
  449. snd_soc_component_update_bits(codec, RT5651_GLB_CLK,
  450. RT5651_SCLK_SRC_MASK, RT5651_SCLK_SRC_RCCLK);
  451. switch (BYT_RT5651_MAP(byt_rt5651_quirk)) {
  452. case BYT_RT5651_IN1_MAP:
  453. custom_map = byt_rt5651_intmic_in1_map;
  454. num_routes = ARRAY_SIZE(byt_rt5651_intmic_in1_map);
  455. break;
  456. case BYT_RT5651_IN2_MAP:
  457. custom_map = byt_rt5651_intmic_in2_map;
  458. num_routes = ARRAY_SIZE(byt_rt5651_intmic_in2_map);
  459. break;
  460. case BYT_RT5651_IN1_IN2_MAP:
  461. custom_map = byt_rt5651_intmic_in1_in2_map;
  462. num_routes = ARRAY_SIZE(byt_rt5651_intmic_in1_in2_map);
  463. break;
  464. default:
  465. custom_map = byt_rt5651_intmic_dmic_map;
  466. num_routes = ARRAY_SIZE(byt_rt5651_intmic_dmic_map);
  467. }
  468. ret = snd_soc_dapm_add_routes(&card->dapm, custom_map, num_routes);
  469. if (ret)
  470. return ret;
  471. if (byt_rt5651_quirk & BYT_RT5651_SSP2_AIF2) {
  472. ret = snd_soc_dapm_add_routes(&card->dapm,
  473. byt_rt5651_ssp2_aif2_map,
  474. ARRAY_SIZE(byt_rt5651_ssp2_aif2_map));
  475. } else if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) {
  476. ret = snd_soc_dapm_add_routes(&card->dapm,
  477. byt_rt5651_ssp0_aif1_map,
  478. ARRAY_SIZE(byt_rt5651_ssp0_aif1_map));
  479. } else if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2) {
  480. ret = snd_soc_dapm_add_routes(&card->dapm,
  481. byt_rt5651_ssp0_aif2_map,
  482. ARRAY_SIZE(byt_rt5651_ssp0_aif2_map));
  483. } else {
  484. ret = snd_soc_dapm_add_routes(&card->dapm,
  485. byt_rt5651_ssp2_aif1_map,
  486. ARRAY_SIZE(byt_rt5651_ssp2_aif1_map));
  487. }
  488. if (ret)
  489. return ret;
  490. ret = snd_soc_add_card_controls(card, byt_rt5651_controls,
  491. ARRAY_SIZE(byt_rt5651_controls));
  492. if (ret) {
  493. dev_err(card->dev, "unable to add card controls\n");
  494. return ret;
  495. }
  496. snd_soc_dapm_ignore_suspend(&card->dapm, "Headphone");
  497. snd_soc_dapm_ignore_suspend(&card->dapm, "Speaker");
  498. if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
  499. /*
  500. * The firmware might enable the clock at
  501. * boot (this information may or may not
  502. * be reflected in the enable clock register).
  503. * To change the rate we must disable the clock
  504. * first to cover these cases. Due to common
  505. * clock framework restrictions that do not allow
  506. * to disable a clock that has not been enabled,
  507. * we need to enable the clock first.
  508. */
  509. ret = clk_prepare_enable(priv->mclk);
  510. if (!ret)
  511. clk_disable_unprepare(priv->mclk);
  512. if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
  513. ret = clk_set_rate(priv->mclk, 25000000);
  514. else
  515. ret = clk_set_rate(priv->mclk, 19200000);
  516. if (ret)
  517. dev_err(card->dev, "unable to set MCLK rate\n");
  518. }
  519. if (BYT_RT5651_JDSRC(byt_rt5651_quirk)) {
  520. ret = snd_soc_card_jack_new(runtime->card, "Headset",
  521. SND_JACK_HEADSET | SND_JACK_BTN_0,
  522. &priv->jack, bytcr_jack_pins,
  523. ARRAY_SIZE(bytcr_jack_pins));
  524. if (ret) {
  525. dev_err(runtime->dev, "jack creation failed %d\n", ret);
  526. return ret;
  527. }
  528. snd_jack_set_key(priv->jack.jack, SND_JACK_BTN_0,
  529. KEY_PLAYPAUSE);
  530. ret = snd_soc_component_set_jack(codec, &priv->jack, NULL);
  531. if (ret)
  532. return ret;
  533. }
  534. return 0;
  535. }
  536. static const struct snd_soc_pcm_stream byt_rt5651_dai_params = {
  537. .formats = SNDRV_PCM_FMTBIT_S24_LE,
  538. .rate_min = 48000,
  539. .rate_max = 48000,
  540. .channels_min = 2,
  541. .channels_max = 2,
  542. };
  543. static int byt_rt5651_codec_fixup(struct snd_soc_pcm_runtime *rtd,
  544. struct snd_pcm_hw_params *params)
  545. {
  546. struct snd_interval *rate = hw_param_interval(params,
  547. SNDRV_PCM_HW_PARAM_RATE);
  548. struct snd_interval *channels = hw_param_interval(params,
  549. SNDRV_PCM_HW_PARAM_CHANNELS);
  550. int ret, bits;
  551. /* The DSP will covert the FE rate to 48k, stereo */
  552. rate->min = rate->max = 48000;
  553. channels->min = channels->max = 2;
  554. if ((byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) ||
  555. (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)) {
  556. /* set SSP0 to 16-bit */
  557. params_set_format(params, SNDRV_PCM_FORMAT_S16_LE);
  558. bits = 16;
  559. } else {
  560. /* set SSP2 to 24-bit */
  561. params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
  562. bits = 24;
  563. }
  564. /*
  565. * Default mode for SSP configuration is TDM 4 slot, override config
  566. * with explicit setting to I2S 2ch. The word length is set with
  567. * dai_set_tdm_slot() since there is no other API exposed
  568. */
  569. ret = snd_soc_dai_set_fmt(rtd->cpu_dai,
  570. SND_SOC_DAIFMT_I2S |
  571. SND_SOC_DAIFMT_NB_NF |
  572. SND_SOC_DAIFMT_CBS_CFS
  573. );
  574. if (ret < 0) {
  575. dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
  576. return ret;
  577. }
  578. ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2, bits);
  579. if (ret < 0) {
  580. dev_err(rtd->dev, "can't set I2S config, err %d\n", ret);
  581. return ret;
  582. }
  583. return 0;
  584. }
  585. static const unsigned int rates_48000[] = {
  586. 48000,
  587. };
  588. static const struct snd_pcm_hw_constraint_list constraints_48000 = {
  589. .count = ARRAY_SIZE(rates_48000),
  590. .list = rates_48000,
  591. };
  592. static int byt_rt5651_aif1_startup(struct snd_pcm_substream *substream)
  593. {
  594. return snd_pcm_hw_constraint_list(substream->runtime, 0,
  595. SNDRV_PCM_HW_PARAM_RATE,
  596. &constraints_48000);
  597. }
  598. static const struct snd_soc_ops byt_rt5651_aif1_ops = {
  599. .startup = byt_rt5651_aif1_startup,
  600. };
  601. static const struct snd_soc_ops byt_rt5651_be_ssp2_ops = {
  602. .hw_params = byt_rt5651_aif1_hw_params,
  603. };
  604. static struct snd_soc_dai_link byt_rt5651_dais[] = {
  605. [MERR_DPCM_AUDIO] = {
  606. .name = "Audio Port",
  607. .stream_name = "Audio",
  608. .cpu_dai_name = "media-cpu-dai",
  609. .codec_dai_name = "snd-soc-dummy-dai",
  610. .codec_name = "snd-soc-dummy",
  611. .platform_name = "sst-mfld-platform",
  612. .nonatomic = true,
  613. .dynamic = 1,
  614. .dpcm_playback = 1,
  615. .dpcm_capture = 1,
  616. .ops = &byt_rt5651_aif1_ops,
  617. },
  618. [MERR_DPCM_DEEP_BUFFER] = {
  619. .name = "Deep-Buffer Audio Port",
  620. .stream_name = "Deep-Buffer Audio",
  621. .cpu_dai_name = "deepbuffer-cpu-dai",
  622. .codec_dai_name = "snd-soc-dummy-dai",
  623. .codec_name = "snd-soc-dummy",
  624. .platform_name = "sst-mfld-platform",
  625. .nonatomic = true,
  626. .dynamic = 1,
  627. .dpcm_playback = 1,
  628. .ops = &byt_rt5651_aif1_ops,
  629. },
  630. /* CODEC<->CODEC link */
  631. /* back ends */
  632. {
  633. .name = "SSP2-Codec",
  634. .id = 0,
  635. .cpu_dai_name = "ssp2-port",
  636. .platform_name = "sst-mfld-platform",
  637. .no_pcm = 1,
  638. .codec_dai_name = "rt5651-aif1",
  639. .codec_name = "i2c-10EC5651:00",
  640. .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
  641. | SND_SOC_DAIFMT_CBS_CFS,
  642. .be_hw_params_fixup = byt_rt5651_codec_fixup,
  643. .ignore_suspend = 1,
  644. .nonatomic = true,
  645. .dpcm_playback = 1,
  646. .dpcm_capture = 1,
  647. .init = byt_rt5651_init,
  648. .ops = &byt_rt5651_be_ssp2_ops,
  649. },
  650. };
  651. /* SoC card */
  652. static char byt_rt5651_codec_name[SND_ACPI_I2C_ID_LEN];
  653. static char byt_rt5651_codec_aif_name[12]; /* = "rt5651-aif[1|2]" */
  654. static char byt_rt5651_cpu_dai_name[10]; /* = "ssp[0|2]-port" */
  655. static char byt_rt5651_long_name[50]; /* = "bytcr-rt5651-*-spk-*-mic[-swapped-hp]" */
  656. static int byt_rt5651_suspend(struct snd_soc_card *card)
  657. {
  658. struct snd_soc_component *component;
  659. if (!BYT_RT5651_JDSRC(byt_rt5651_quirk))
  660. return 0;
  661. list_for_each_entry(component, &card->component_dev_list, card_list) {
  662. if (!strcmp(component->name, byt_rt5651_codec_name)) {
  663. dev_dbg(component->dev, "disabling jack detect before suspend\n");
  664. snd_soc_component_set_jack(component, NULL, NULL);
  665. break;
  666. }
  667. }
  668. return 0;
  669. }
  670. static int byt_rt5651_resume(struct snd_soc_card *card)
  671. {
  672. struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);
  673. struct snd_soc_component *component;
  674. if (!BYT_RT5651_JDSRC(byt_rt5651_quirk))
  675. return 0;
  676. list_for_each_entry(component, &card->component_dev_list, card_list) {
  677. if (!strcmp(component->name, byt_rt5651_codec_name)) {
  678. dev_dbg(component->dev, "re-enabling jack detect after resume\n");
  679. snd_soc_component_set_jack(component, &priv->jack, NULL);
  680. break;
  681. }
  682. }
  683. return 0;
  684. }
  685. static struct snd_soc_card byt_rt5651_card = {
  686. .name = "bytcr-rt5651",
  687. .owner = THIS_MODULE,
  688. .dai_link = byt_rt5651_dais,
  689. .num_links = ARRAY_SIZE(byt_rt5651_dais),
  690. .dapm_widgets = byt_rt5651_widgets,
  691. .num_dapm_widgets = ARRAY_SIZE(byt_rt5651_widgets),
  692. .dapm_routes = byt_rt5651_audio_map,
  693. .num_dapm_routes = ARRAY_SIZE(byt_rt5651_audio_map),
  694. .fully_routed = true,
  695. .suspend_pre = byt_rt5651_suspend,
  696. .resume_post = byt_rt5651_resume,
  697. };
  698. static const struct x86_cpu_id baytrail_cpu_ids[] = {
  699. { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT }, /* Valleyview */
  700. {}
  701. };
  702. static const struct x86_cpu_id cherrytrail_cpu_ids[] = {
  703. { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT }, /* Braswell */
  704. {}
  705. };
  706. static const struct acpi_gpio_params first_gpio = { 0, 0, false };
  707. static const struct acpi_gpio_params second_gpio = { 1, 0, false };
  708. static const struct acpi_gpio_mapping byt_rt5651_amp_en_first[] = {
  709. { "ext-amp-enable-gpios", &first_gpio, 1 },
  710. { },
  711. };
  712. static const struct acpi_gpio_mapping byt_rt5651_amp_en_second[] = {
  713. { "ext-amp-enable-gpios", &second_gpio, 1 },
  714. { },
  715. };
  716. /*
  717. * Some boards have I2cSerialBusV2, GpioIo, GpioInt as ACPI resources, other
  718. * boards may have I2cSerialBusV2, GpioInt, GpioIo instead. We want the
  719. * GpioIo one for the ext-amp-enable-gpio and both count for the index in
  720. * acpi_gpio_params index. So we have 2 different mappings and the code
  721. * below figures out which one to use.
  722. */
  723. struct byt_rt5651_acpi_resource_data {
  724. int gpio_count;
  725. int gpio_int_idx;
  726. };
  727. static int snd_byt_rt5651_acpi_resource(struct acpi_resource *ares, void *arg)
  728. {
  729. struct byt_rt5651_acpi_resource_data *data = arg;
  730. if (ares->type != ACPI_RESOURCE_TYPE_GPIO)
  731. return 0;
  732. if (ares->data.gpio.connection_type == ACPI_RESOURCE_GPIO_TYPE_INT)
  733. data->gpio_int_idx = data->gpio_count;
  734. data->gpio_count++;
  735. return 0;
  736. }
  737. static void snd_byt_rt5651_mc_add_amp_en_gpio_mapping(struct device *codec)
  738. {
  739. struct byt_rt5651_acpi_resource_data data = { 0, -1 };
  740. LIST_HEAD(resources);
  741. int ret;
  742. ret = acpi_dev_get_resources(ACPI_COMPANION(codec), &resources,
  743. snd_byt_rt5651_acpi_resource, &data);
  744. if (ret < 0) {
  745. dev_warn(codec, "Failed to get ACPI resources, not adding external amplifier GPIO mapping\n");
  746. return;
  747. }
  748. /* All info we need is gathered during the walk */
  749. acpi_dev_free_resource_list(&resources);
  750. switch (data.gpio_int_idx) {
  751. case 0:
  752. devm_acpi_dev_add_driver_gpios(codec, byt_rt5651_amp_en_second);
  753. break;
  754. case 1:
  755. devm_acpi_dev_add_driver_gpios(codec, byt_rt5651_amp_en_first);
  756. break;
  757. default:
  758. dev_warn(codec, "Unknown GpioInt index %d, not adding external amplifier GPIO mapping\n",
  759. data.gpio_int_idx);
  760. }
  761. }
  762. struct acpi_chan_package { /* ACPICA seems to require 64 bit integers */
  763. u64 aif_value; /* 1: AIF1, 2: AIF2 */
  764. u64 mclock_value; /* usually 25MHz (0x17d7940), ignored */
  765. };
  766. static int snd_byt_rt5651_mc_probe(struct platform_device *pdev)
  767. {
  768. const char * const mic_name[] = { "dmic", "in1", "in2", "in12" };
  769. struct byt_rt5651_private *priv;
  770. struct snd_soc_acpi_mach *mach;
  771. struct device *codec_dev;
  772. const char *i2c_name = NULL;
  773. const char *hp_swapped;
  774. bool is_bytcr = false;
  775. int ret_val = 0;
  776. int dai_index = 0;
  777. int i;
  778. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  779. if (!priv)
  780. return -ENOMEM;
  781. /* register the soc card */
  782. byt_rt5651_card.dev = &pdev->dev;
  783. mach = byt_rt5651_card.dev->platform_data;
  784. snd_soc_card_set_drvdata(&byt_rt5651_card, priv);
  785. /* fix index of codec dai */
  786. for (i = 0; i < ARRAY_SIZE(byt_rt5651_dais); i++) {
  787. if (!strcmp(byt_rt5651_dais[i].codec_name, "i2c-10EC5651:00")) {
  788. dai_index = i;
  789. break;
  790. }
  791. }
  792. /* fixup codec name based on HID */
  793. i2c_name = acpi_dev_get_first_match_name(mach->id, NULL, -1);
  794. if (!i2c_name) {
  795. dev_err(&pdev->dev, "Error cannot find '%s' dev\n", mach->id);
  796. return -ENODEV;
  797. }
  798. snprintf(byt_rt5651_codec_name, sizeof(byt_rt5651_codec_name),
  799. "%s%s", "i2c-", i2c_name);
  800. byt_rt5651_dais[dai_index].codec_name = byt_rt5651_codec_name;
  801. codec_dev = bus_find_device_by_name(&i2c_bus_type, NULL,
  802. byt_rt5651_codec_name);
  803. if (!codec_dev)
  804. return -EPROBE_DEFER;
  805. /*
  806. * swap SSP0 if bytcr is detected
  807. * (will be overridden if DMI quirk is detected)
  808. */
  809. if (x86_match_cpu(baytrail_cpu_ids)) {
  810. struct sst_platform_info *p_info = mach->pdata;
  811. const struct sst_res_info *res_info = p_info->res_info;
  812. if (res_info->acpi_ipc_irq_index == 0)
  813. is_bytcr = true;
  814. }
  815. if (is_bytcr) {
  816. /*
  817. * Baytrail CR platforms may have CHAN package in BIOS, try
  818. * to find relevant routing quirk based as done on Windows
  819. * platforms. We have to read the information directly from the
  820. * BIOS, at this stage the card is not created and the links
  821. * with the codec driver/pdata are non-existent
  822. */
  823. struct acpi_chan_package chan_package;
  824. /* format specified: 2 64-bit integers */
  825. struct acpi_buffer format = {sizeof("NN"), "NN"};
  826. struct acpi_buffer state = {0, NULL};
  827. struct snd_soc_acpi_package_context pkg_ctx;
  828. bool pkg_found = false;
  829. state.length = sizeof(chan_package);
  830. state.pointer = &chan_package;
  831. pkg_ctx.name = "CHAN";
  832. pkg_ctx.length = 2;
  833. pkg_ctx.format = &format;
  834. pkg_ctx.state = &state;
  835. pkg_ctx.data_valid = false;
  836. pkg_found = snd_soc_acpi_find_package_from_hid(mach->id,
  837. &pkg_ctx);
  838. if (pkg_found) {
  839. if (chan_package.aif_value == 1) {
  840. dev_info(&pdev->dev, "BIOS Routing: AIF1 connected\n");
  841. byt_rt5651_quirk |= BYT_RT5651_SSP0_AIF1;
  842. } else if (chan_package.aif_value == 2) {
  843. dev_info(&pdev->dev, "BIOS Routing: AIF2 connected\n");
  844. byt_rt5651_quirk |= BYT_RT5651_SSP0_AIF2;
  845. } else {
  846. dev_info(&pdev->dev, "BIOS Routing isn't valid, ignored\n");
  847. pkg_found = false;
  848. }
  849. }
  850. if (!pkg_found) {
  851. /* no BIOS indications, assume SSP0-AIF2 connection */
  852. byt_rt5651_quirk |= BYT_RT5651_SSP0_AIF2;
  853. }
  854. }
  855. /* check quirks before creating card */
  856. dmi_check_system(byt_rt5651_quirk_table);
  857. /* Must be called before register_card, also see declaration comment. */
  858. ret_val = byt_rt5651_add_codec_device_props(codec_dev);
  859. if (ret_val) {
  860. put_device(codec_dev);
  861. return ret_val;
  862. }
  863. /* Cherry Trail devices use an external amplifier enable gpio */
  864. if (x86_match_cpu(cherrytrail_cpu_ids)) {
  865. snd_byt_rt5651_mc_add_amp_en_gpio_mapping(codec_dev);
  866. priv->ext_amp_gpio = devm_fwnode_get_index_gpiod_from_child(
  867. &pdev->dev, "ext-amp-enable", 0,
  868. codec_dev->fwnode,
  869. GPIOD_OUT_LOW, "speaker-amp");
  870. if (IS_ERR(priv->ext_amp_gpio)) {
  871. ret_val = PTR_ERR(priv->ext_amp_gpio);
  872. switch (ret_val) {
  873. case -ENOENT:
  874. priv->ext_amp_gpio = NULL;
  875. break;
  876. default:
  877. dev_err(&pdev->dev, "Failed to get ext-amp-enable GPIO: %d\n",
  878. ret_val);
  879. /* fall through */
  880. case -EPROBE_DEFER:
  881. put_device(codec_dev);
  882. return ret_val;
  883. }
  884. }
  885. }
  886. put_device(codec_dev);
  887. log_quirks(&pdev->dev);
  888. if ((byt_rt5651_quirk & BYT_RT5651_SSP2_AIF2) ||
  889. (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)) {
  890. /* fixup codec aif name */
  891. snprintf(byt_rt5651_codec_aif_name,
  892. sizeof(byt_rt5651_codec_aif_name),
  893. "%s", "rt5651-aif2");
  894. byt_rt5651_dais[dai_index].codec_dai_name =
  895. byt_rt5651_codec_aif_name;
  896. }
  897. if ((byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) ||
  898. (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)) {
  899. /* fixup cpu dai name name */
  900. snprintf(byt_rt5651_cpu_dai_name,
  901. sizeof(byt_rt5651_cpu_dai_name),
  902. "%s", "ssp0-port");
  903. byt_rt5651_dais[dai_index].cpu_dai_name =
  904. byt_rt5651_cpu_dai_name;
  905. }
  906. if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
  907. priv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
  908. if (IS_ERR(priv->mclk)) {
  909. ret_val = PTR_ERR(priv->mclk);
  910. dev_err(&pdev->dev,
  911. "Failed to get MCLK from pmc_plt_clk_3: %d\n",
  912. ret_val);
  913. /*
  914. * Fall back to bit clock usage for -ENOENT (clock not
  915. * available likely due to missing dependencies), bail
  916. * for all other errors, including -EPROBE_DEFER
  917. */
  918. if (ret_val != -ENOENT)
  919. return ret_val;
  920. byt_rt5651_quirk &= ~BYT_RT5651_MCLK_EN;
  921. }
  922. }
  923. if (byt_rt5651_quirk & BYT_RT5651_HP_LR_SWAPPED)
  924. hp_swapped = "-hp-swapped";
  925. else
  926. hp_swapped = "";
  927. snprintf(byt_rt5651_long_name, sizeof(byt_rt5651_long_name),
  928. "bytcr-rt5651-%s-spk-%s-mic%s",
  929. (byt_rt5651_quirk & BYT_RT5651_MONO_SPEAKER) ?
  930. "mono" : "stereo",
  931. mic_name[BYT_RT5651_MAP(byt_rt5651_quirk)], hp_swapped);
  932. byt_rt5651_card.long_name = byt_rt5651_long_name;
  933. ret_val = devm_snd_soc_register_card(&pdev->dev, &byt_rt5651_card);
  934. if (ret_val) {
  935. dev_err(&pdev->dev, "devm_snd_soc_register_card failed %d\n",
  936. ret_val);
  937. return ret_val;
  938. }
  939. platform_set_drvdata(pdev, &byt_rt5651_card);
  940. return ret_val;
  941. }
  942. static struct platform_driver snd_byt_rt5651_mc_driver = {
  943. .driver = {
  944. .name = "bytcr_rt5651",
  945. },
  946. .probe = snd_byt_rt5651_mc_probe,
  947. };
  948. module_platform_driver(snd_byt_rt5651_mc_driver);
  949. MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver for RT5651");
  950. MODULE_AUTHOR("Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>");
  951. MODULE_LICENSE("GPL v2");
  952. MODULE_ALIAS("platform:bytcr_rt5651");