setup-common.c 18 KB

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  1. /*
  2. * Common boot and setup code for both 32-bit and 64-bit.
  3. * Extracted from arch/powerpc/kernel/setup_64.c.
  4. *
  5. * Copyright (C) 2001 PPC64 Team, IBM Corp
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #undef DEBUG
  13. #include <linux/export.h>
  14. #include <linux/string.h>
  15. #include <linux/sched.h>
  16. #include <linux/init.h>
  17. #include <linux/kernel.h>
  18. #include <linux/reboot.h>
  19. #include <linux/delay.h>
  20. #include <linux/initrd.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/seq_file.h>
  23. #include <linux/ioport.h>
  24. #include <linux/console.h>
  25. #include <linux/screen_info.h>
  26. #include <linux/root_dev.h>
  27. #include <linux/notifier.h>
  28. #include <linux/cpu.h>
  29. #include <linux/unistd.h>
  30. #include <linux/serial.h>
  31. #include <linux/serial_8250.h>
  32. #include <linux/debugfs.h>
  33. #include <linux/percpu.h>
  34. #include <linux/memblock.h>
  35. #include <linux/of_platform.h>
  36. #include <asm/io.h>
  37. #include <asm/paca.h>
  38. #include <asm/prom.h>
  39. #include <asm/processor.h>
  40. #include <asm/vdso_datapage.h>
  41. #include <asm/pgtable.h>
  42. #include <asm/smp.h>
  43. #include <asm/elf.h>
  44. #include <asm/machdep.h>
  45. #include <asm/time.h>
  46. #include <asm/cputable.h>
  47. #include <asm/sections.h>
  48. #include <asm/firmware.h>
  49. #include <asm/btext.h>
  50. #include <asm/nvram.h>
  51. #include <asm/setup.h>
  52. #include <asm/rtas.h>
  53. #include <asm/iommu.h>
  54. #include <asm/serial.h>
  55. #include <asm/cache.h>
  56. #include <asm/page.h>
  57. #include <asm/mmu.h>
  58. #include <asm/xmon.h>
  59. #include <asm/cputhreads.h>
  60. #include <mm/mmu_decl.h>
  61. #include <asm/fadump.h>
  62. #ifdef DEBUG
  63. #include <asm/udbg.h>
  64. #define DBG(fmt...) udbg_printf(fmt)
  65. #else
  66. #define DBG(fmt...)
  67. #endif
  68. /* The main machine-dep calls structure
  69. */
  70. struct machdep_calls ppc_md;
  71. EXPORT_SYMBOL(ppc_md);
  72. struct machdep_calls *machine_id;
  73. EXPORT_SYMBOL(machine_id);
  74. int boot_cpuid = -1;
  75. EXPORT_SYMBOL_GPL(boot_cpuid);
  76. unsigned long klimit = (unsigned long) _end;
  77. /*
  78. * This still seems to be needed... -- paulus
  79. */
  80. struct screen_info screen_info = {
  81. .orig_x = 0,
  82. .orig_y = 25,
  83. .orig_video_cols = 80,
  84. .orig_video_lines = 25,
  85. .orig_video_isVGA = 1,
  86. .orig_video_points = 16
  87. };
  88. #if defined(CONFIG_FB_VGA16_MODULE)
  89. EXPORT_SYMBOL(screen_info);
  90. #endif
  91. /* Variables required to store legacy IO irq routing */
  92. int of_i8042_kbd_irq;
  93. EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
  94. int of_i8042_aux_irq;
  95. EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
  96. #ifdef __DO_IRQ_CANON
  97. /* XXX should go elsewhere eventually */
  98. int ppc_do_canonicalize_irqs;
  99. EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
  100. #endif
  101. /* also used by kexec */
  102. void machine_shutdown(void)
  103. {
  104. #ifdef CONFIG_FA_DUMP
  105. /*
  106. * if fadump is active, cleanup the fadump registration before we
  107. * shutdown.
  108. */
  109. fadump_cleanup();
  110. #endif
  111. if (ppc_md.machine_shutdown)
  112. ppc_md.machine_shutdown();
  113. }
  114. void machine_restart(char *cmd)
  115. {
  116. machine_shutdown();
  117. if (ppc_md.restart)
  118. ppc_md.restart(cmd);
  119. smp_send_stop();
  120. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  121. local_irq_disable();
  122. while (1) ;
  123. }
  124. void machine_power_off(void)
  125. {
  126. machine_shutdown();
  127. if (pm_power_off)
  128. pm_power_off();
  129. smp_send_stop();
  130. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  131. local_irq_disable();
  132. while (1) ;
  133. }
  134. /* Used by the G5 thermal driver */
  135. EXPORT_SYMBOL_GPL(machine_power_off);
  136. void (*pm_power_off)(void);
  137. EXPORT_SYMBOL_GPL(pm_power_off);
  138. void machine_halt(void)
  139. {
  140. machine_shutdown();
  141. if (ppc_md.halt)
  142. ppc_md.halt();
  143. smp_send_stop();
  144. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  145. local_irq_disable();
  146. while (1) ;
  147. }
  148. #ifdef CONFIG_TAU
  149. extern u32 cpu_temp(unsigned long cpu);
  150. extern u32 cpu_temp_both(unsigned long cpu);
  151. #endif /* CONFIG_TAU */
  152. #ifdef CONFIG_SMP
  153. DEFINE_PER_CPU(unsigned int, cpu_pvr);
  154. #endif
  155. static void show_cpuinfo_summary(struct seq_file *m)
  156. {
  157. struct device_node *root;
  158. const char *model = NULL;
  159. #if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
  160. unsigned long bogosum = 0;
  161. int i;
  162. for_each_online_cpu(i)
  163. bogosum += loops_per_jiffy;
  164. seq_printf(m, "total bogomips\t: %lu.%02lu\n",
  165. bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
  166. #endif /* CONFIG_SMP && CONFIG_PPC32 */
  167. seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
  168. if (ppc_md.name)
  169. seq_printf(m, "platform\t: %s\n", ppc_md.name);
  170. root = of_find_node_by_path("/");
  171. if (root)
  172. model = of_get_property(root, "model", NULL);
  173. if (model)
  174. seq_printf(m, "model\t\t: %s\n", model);
  175. of_node_put(root);
  176. if (ppc_md.show_cpuinfo != NULL)
  177. ppc_md.show_cpuinfo(m);
  178. #ifdef CONFIG_PPC32
  179. /* Display the amount of memory */
  180. seq_printf(m, "Memory\t\t: %d MB\n",
  181. (unsigned int)(total_memory / (1024 * 1024)));
  182. #endif
  183. }
  184. static int show_cpuinfo(struct seq_file *m, void *v)
  185. {
  186. unsigned long cpu_id = (unsigned long)v - 1;
  187. unsigned int pvr;
  188. unsigned long proc_freq;
  189. unsigned short maj;
  190. unsigned short min;
  191. /* We only show online cpus: disable preempt (overzealous, I
  192. * knew) to prevent cpu going down. */
  193. preempt_disable();
  194. if (!cpu_online(cpu_id)) {
  195. preempt_enable();
  196. return 0;
  197. }
  198. #ifdef CONFIG_SMP
  199. pvr = per_cpu(cpu_pvr, cpu_id);
  200. #else
  201. pvr = mfspr(SPRN_PVR);
  202. #endif
  203. maj = (pvr >> 8) & 0xFF;
  204. min = pvr & 0xFF;
  205. seq_printf(m, "processor\t: %lu\n", cpu_id);
  206. seq_printf(m, "cpu\t\t: ");
  207. if (cur_cpu_spec->pvr_mask)
  208. seq_printf(m, "%s", cur_cpu_spec->cpu_name);
  209. else
  210. seq_printf(m, "unknown (%08x)", pvr);
  211. #ifdef CONFIG_ALTIVEC
  212. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  213. seq_printf(m, ", altivec supported");
  214. #endif /* CONFIG_ALTIVEC */
  215. seq_printf(m, "\n");
  216. #ifdef CONFIG_TAU
  217. if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
  218. #ifdef CONFIG_TAU_AVERAGE
  219. /* more straightforward, but potentially misleading */
  220. seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
  221. cpu_temp(cpu_id));
  222. #else
  223. /* show the actual temp sensor range */
  224. u32 temp;
  225. temp = cpu_temp_both(cpu_id);
  226. seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
  227. temp & 0xff, temp >> 16);
  228. #endif
  229. }
  230. #endif /* CONFIG_TAU */
  231. /*
  232. * Platforms that have variable clock rates, should implement
  233. * the method ppc_md.get_proc_freq() that reports the clock
  234. * rate of a given cpu. The rest can use ppc_proc_freq to
  235. * report the clock rate that is same across all cpus.
  236. */
  237. if (ppc_md.get_proc_freq)
  238. proc_freq = ppc_md.get_proc_freq(cpu_id);
  239. else
  240. proc_freq = ppc_proc_freq;
  241. if (proc_freq)
  242. seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
  243. proc_freq / 1000000, proc_freq % 1000000);
  244. if (ppc_md.show_percpuinfo != NULL)
  245. ppc_md.show_percpuinfo(m, cpu_id);
  246. /* If we are a Freescale core do a simple check so
  247. * we dont have to keep adding cases in the future */
  248. if (PVR_VER(pvr) & 0x8000) {
  249. switch (PVR_VER(pvr)) {
  250. case 0x8000: /* 7441/7450/7451, Voyager */
  251. case 0x8001: /* 7445/7455, Apollo 6 */
  252. case 0x8002: /* 7447/7457, Apollo 7 */
  253. case 0x8003: /* 7447A, Apollo 7 PM */
  254. case 0x8004: /* 7448, Apollo 8 */
  255. case 0x800c: /* 7410, Nitro */
  256. maj = ((pvr >> 8) & 0xF);
  257. min = PVR_MIN(pvr);
  258. break;
  259. default: /* e500/book-e */
  260. maj = PVR_MAJ(pvr);
  261. min = PVR_MIN(pvr);
  262. break;
  263. }
  264. } else {
  265. switch (PVR_VER(pvr)) {
  266. case 0x0020: /* 403 family */
  267. maj = PVR_MAJ(pvr) + 1;
  268. min = PVR_MIN(pvr);
  269. break;
  270. case 0x1008: /* 740P/750P ?? */
  271. maj = ((pvr >> 8) & 0xFF) - 1;
  272. min = pvr & 0xFF;
  273. break;
  274. default:
  275. maj = (pvr >> 8) & 0xFF;
  276. min = pvr & 0xFF;
  277. break;
  278. }
  279. }
  280. seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
  281. maj, min, PVR_VER(pvr), PVR_REV(pvr));
  282. #ifdef CONFIG_PPC32
  283. seq_printf(m, "bogomips\t: %lu.%02lu\n",
  284. loops_per_jiffy / (500000/HZ),
  285. (loops_per_jiffy / (5000/HZ)) % 100);
  286. #endif
  287. #ifdef CONFIG_SMP
  288. seq_printf(m, "\n");
  289. #endif
  290. preempt_enable();
  291. /* If this is the last cpu, print the summary */
  292. if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
  293. show_cpuinfo_summary(m);
  294. return 0;
  295. }
  296. static void *c_start(struct seq_file *m, loff_t *pos)
  297. {
  298. if (*pos == 0) /* just in case, cpu 0 is not the first */
  299. *pos = cpumask_first(cpu_online_mask);
  300. else
  301. *pos = cpumask_next(*pos - 1, cpu_online_mask);
  302. if ((*pos) < nr_cpu_ids)
  303. return (void *)(unsigned long)(*pos + 1);
  304. return NULL;
  305. }
  306. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  307. {
  308. (*pos)++;
  309. return c_start(m, pos);
  310. }
  311. static void c_stop(struct seq_file *m, void *v)
  312. {
  313. }
  314. const struct seq_operations cpuinfo_op = {
  315. .start =c_start,
  316. .next = c_next,
  317. .stop = c_stop,
  318. .show = show_cpuinfo,
  319. };
  320. void __init check_for_initrd(void)
  321. {
  322. #ifdef CONFIG_BLK_DEV_INITRD
  323. DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
  324. initrd_start, initrd_end);
  325. /* If we were passed an initrd, set the ROOT_DEV properly if the values
  326. * look sensible. If not, clear initrd reference.
  327. */
  328. if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
  329. initrd_end > initrd_start)
  330. ROOT_DEV = Root_RAM0;
  331. else
  332. initrd_start = initrd_end = 0;
  333. if (initrd_start)
  334. pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
  335. DBG(" <- check_for_initrd()\n");
  336. #endif /* CONFIG_BLK_DEV_INITRD */
  337. }
  338. #ifdef CONFIG_SMP
  339. int threads_per_core, threads_per_subcore, threads_shift;
  340. cpumask_t threads_core_mask;
  341. EXPORT_SYMBOL_GPL(threads_per_core);
  342. EXPORT_SYMBOL_GPL(threads_per_subcore);
  343. EXPORT_SYMBOL_GPL(threads_shift);
  344. EXPORT_SYMBOL_GPL(threads_core_mask);
  345. static void __init cpu_init_thread_core_maps(int tpc)
  346. {
  347. int i;
  348. threads_per_core = tpc;
  349. threads_per_subcore = tpc;
  350. cpumask_clear(&threads_core_mask);
  351. /* This implementation only supports power of 2 number of threads
  352. * for simplicity and performance
  353. */
  354. threads_shift = ilog2(tpc);
  355. BUG_ON(tpc != (1 << threads_shift));
  356. for (i = 0; i < tpc; i++)
  357. cpumask_set_cpu(i, &threads_core_mask);
  358. printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
  359. tpc, tpc > 1 ? "s" : "");
  360. printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
  361. }
  362. /**
  363. * setup_cpu_maps - initialize the following cpu maps:
  364. * cpu_possible_mask
  365. * cpu_present_mask
  366. *
  367. * Having the possible map set up early allows us to restrict allocations
  368. * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
  369. *
  370. * We do not initialize the online map here; cpus set their own bits in
  371. * cpu_online_mask as they come up.
  372. *
  373. * This function is valid only for Open Firmware systems. finish_device_tree
  374. * must be called before using this.
  375. *
  376. * While we're here, we may as well set the "physical" cpu ids in the paca.
  377. *
  378. * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
  379. */
  380. void __init smp_setup_cpu_maps(void)
  381. {
  382. struct device_node *dn = NULL;
  383. int cpu = 0;
  384. int nthreads = 1;
  385. DBG("smp_setup_cpu_maps()\n");
  386. while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < nr_cpu_ids) {
  387. const __be32 *intserv;
  388. __be32 cpu_be;
  389. int j, len;
  390. DBG(" * %s...\n", dn->full_name);
  391. intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
  392. &len);
  393. if (intserv) {
  394. DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
  395. nthreads);
  396. } else {
  397. DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
  398. intserv = of_get_property(dn, "reg", &len);
  399. if (!intserv) {
  400. cpu_be = cpu_to_be32(cpu);
  401. intserv = &cpu_be; /* assume logical == phys */
  402. len = 4;
  403. }
  404. }
  405. nthreads = len / sizeof(int);
  406. for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
  407. bool avail;
  408. DBG(" thread %d -> cpu %d (hard id %d)\n",
  409. j, cpu, be32_to_cpu(intserv[j]));
  410. avail = of_device_is_available(dn);
  411. if (!avail)
  412. avail = !of_property_match_string(dn,
  413. "enable-method", "spin-table");
  414. set_cpu_present(cpu, avail);
  415. set_hard_smp_processor_id(cpu, be32_to_cpu(intserv[j]));
  416. set_cpu_possible(cpu, true);
  417. cpu++;
  418. }
  419. }
  420. /* If no SMT supported, nthreads is forced to 1 */
  421. if (!cpu_has_feature(CPU_FTR_SMT)) {
  422. DBG(" SMT disabled ! nthreads forced to 1\n");
  423. nthreads = 1;
  424. }
  425. #ifdef CONFIG_PPC64
  426. /*
  427. * On pSeries LPAR, we need to know how many cpus
  428. * could possibly be added to this partition.
  429. */
  430. if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) &&
  431. (dn = of_find_node_by_path("/rtas"))) {
  432. int num_addr_cell, num_size_cell, maxcpus;
  433. const __be32 *ireg;
  434. num_addr_cell = of_n_addr_cells(dn);
  435. num_size_cell = of_n_size_cells(dn);
  436. ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
  437. if (!ireg)
  438. goto out;
  439. maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
  440. /* Double maxcpus for processors which have SMT capability */
  441. if (cpu_has_feature(CPU_FTR_SMT))
  442. maxcpus *= nthreads;
  443. if (maxcpus > nr_cpu_ids) {
  444. printk(KERN_WARNING
  445. "Partition configured for %d cpus, "
  446. "operating system maximum is %d.\n",
  447. maxcpus, nr_cpu_ids);
  448. maxcpus = nr_cpu_ids;
  449. } else
  450. printk(KERN_INFO "Partition configured for %d cpus.\n",
  451. maxcpus);
  452. for (cpu = 0; cpu < maxcpus; cpu++)
  453. set_cpu_possible(cpu, true);
  454. out:
  455. of_node_put(dn);
  456. }
  457. vdso_data->processorCount = num_present_cpus();
  458. #endif /* CONFIG_PPC64 */
  459. /* Initialize CPU <=> thread mapping/
  460. *
  461. * WARNING: We assume that the number of threads is the same for
  462. * every CPU in the system. If that is not the case, then some code
  463. * here will have to be reworked
  464. */
  465. cpu_init_thread_core_maps(nthreads);
  466. /* Now that possible cpus are set, set nr_cpu_ids for later use */
  467. setup_nr_cpu_ids();
  468. free_unused_pacas();
  469. }
  470. #endif /* CONFIG_SMP */
  471. #ifdef CONFIG_PCSPKR_PLATFORM
  472. static __init int add_pcspkr(void)
  473. {
  474. struct device_node *np;
  475. struct platform_device *pd;
  476. int ret;
  477. np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
  478. of_node_put(np);
  479. if (!np)
  480. return -ENODEV;
  481. pd = platform_device_alloc("pcspkr", -1);
  482. if (!pd)
  483. return -ENOMEM;
  484. ret = platform_device_add(pd);
  485. if (ret)
  486. platform_device_put(pd);
  487. return ret;
  488. }
  489. device_initcall(add_pcspkr);
  490. #endif /* CONFIG_PCSPKR_PLATFORM */
  491. void probe_machine(void)
  492. {
  493. extern struct machdep_calls __machine_desc_start;
  494. extern struct machdep_calls __machine_desc_end;
  495. /*
  496. * Iterate all ppc_md structures until we find the proper
  497. * one for the current machine type
  498. */
  499. DBG("Probing machine type ...\n");
  500. for (machine_id = &__machine_desc_start;
  501. machine_id < &__machine_desc_end;
  502. machine_id++) {
  503. DBG(" %s ...", machine_id->name);
  504. memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
  505. if (ppc_md.probe()) {
  506. DBG(" match !\n");
  507. break;
  508. }
  509. DBG("\n");
  510. }
  511. /* What can we do if we didn't find ? */
  512. if (machine_id >= &__machine_desc_end) {
  513. DBG("No suitable machine found !\n");
  514. for (;;);
  515. }
  516. printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
  517. }
  518. /* Match a class of boards, not a specific device configuration. */
  519. int check_legacy_ioport(unsigned long base_port)
  520. {
  521. struct device_node *parent, *np = NULL;
  522. int ret = -ENODEV;
  523. switch(base_port) {
  524. case I8042_DATA_REG:
  525. if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
  526. np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
  527. if (np) {
  528. parent = of_get_parent(np);
  529. of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
  530. if (!of_i8042_kbd_irq)
  531. of_i8042_kbd_irq = 1;
  532. of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
  533. if (!of_i8042_aux_irq)
  534. of_i8042_aux_irq = 12;
  535. of_node_put(np);
  536. np = parent;
  537. break;
  538. }
  539. np = of_find_node_by_type(NULL, "8042");
  540. /* Pegasos has no device_type on its 8042 node, look for the
  541. * name instead */
  542. if (!np)
  543. np = of_find_node_by_name(NULL, "8042");
  544. if (np) {
  545. of_i8042_kbd_irq = 1;
  546. of_i8042_aux_irq = 12;
  547. }
  548. break;
  549. case FDC_BASE: /* FDC1 */
  550. np = of_find_node_by_type(NULL, "fdc");
  551. break;
  552. default:
  553. /* ipmi is supposed to fail here */
  554. break;
  555. }
  556. if (!np)
  557. return ret;
  558. parent = of_get_parent(np);
  559. if (parent) {
  560. if (strcmp(parent->type, "isa") == 0)
  561. ret = 0;
  562. of_node_put(parent);
  563. }
  564. of_node_put(np);
  565. return ret;
  566. }
  567. EXPORT_SYMBOL(check_legacy_ioport);
  568. static int ppc_panic_event(struct notifier_block *this,
  569. unsigned long event, void *ptr)
  570. {
  571. /*
  572. * If firmware-assisted dump has been registered then trigger
  573. * firmware-assisted dump and let firmware handle everything else.
  574. */
  575. crash_fadump(NULL, ptr);
  576. ppc_md.panic(ptr); /* May not return */
  577. return NOTIFY_DONE;
  578. }
  579. static struct notifier_block ppc_panic_block = {
  580. .notifier_call = ppc_panic_event,
  581. .priority = INT_MIN /* may not return; must be done last */
  582. };
  583. void __init setup_panic(void)
  584. {
  585. atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
  586. }
  587. #ifdef CONFIG_CHECK_CACHE_COHERENCY
  588. /*
  589. * For platforms that have configurable cache-coherency. This function
  590. * checks that the cache coherency setting of the kernel matches the setting
  591. * left by the firmware, as indicated in the device tree. Since a mismatch
  592. * will eventually result in DMA failures, we print * and error and call
  593. * BUG() in that case.
  594. */
  595. #ifdef CONFIG_NOT_COHERENT_CACHE
  596. #define KERNEL_COHERENCY 0
  597. #else
  598. #define KERNEL_COHERENCY 1
  599. #endif
  600. static int __init check_cache_coherency(void)
  601. {
  602. struct device_node *np;
  603. const void *prop;
  604. int devtree_coherency;
  605. np = of_find_node_by_path("/");
  606. prop = of_get_property(np, "coherency-off", NULL);
  607. of_node_put(np);
  608. devtree_coherency = prop ? 0 : 1;
  609. if (devtree_coherency != KERNEL_COHERENCY) {
  610. printk(KERN_ERR
  611. "kernel coherency:%s != device tree_coherency:%s\n",
  612. KERNEL_COHERENCY ? "on" : "off",
  613. devtree_coherency ? "on" : "off");
  614. BUG();
  615. }
  616. return 0;
  617. }
  618. late_initcall(check_cache_coherency);
  619. #endif /* CONFIG_CHECK_CACHE_COHERENCY */
  620. #ifdef CONFIG_DEBUG_FS
  621. struct dentry *powerpc_debugfs_root;
  622. EXPORT_SYMBOL(powerpc_debugfs_root);
  623. static int powerpc_debugfs_init(void)
  624. {
  625. powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
  626. return powerpc_debugfs_root == NULL;
  627. }
  628. arch_initcall(powerpc_debugfs_init);
  629. #endif
  630. void ppc_printk_progress(char *s, unsigned short hex)
  631. {
  632. pr_info("%s\n", s);
  633. }
  634. void arch_setup_pdev_archdata(struct platform_device *pdev)
  635. {
  636. pdev->archdata.dma_mask = DMA_BIT_MASK(32);
  637. pdev->dev.dma_mask = &pdev->archdata.dma_mask;
  638. set_dma_ops(&pdev->dev, &dma_direct_ops);
  639. }