net2280.c 100 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Driver for the PLX NET2280 USB device controller.
  4. * Specs and errata are available from <http://www.plxtech.com>.
  5. *
  6. * PLX Technology Inc. (formerly NetChip Technology) supported the
  7. * development of this driver.
  8. *
  9. *
  10. * CODE STATUS HIGHLIGHTS
  11. *
  12. * This driver should work well with most "gadget" drivers, including
  13. * the Mass Storage, Serial, and Ethernet/RNDIS gadget drivers
  14. * as well as Gadget Zero and Gadgetfs.
  15. *
  16. * DMA is enabled by default.
  17. *
  18. * MSI is enabled by default. The legacy IRQ is used if MSI couldn't
  19. * be enabled.
  20. *
  21. * Note that almost all the errata workarounds here are only needed for
  22. * rev1 chips. Rev1a silicon (0110) fixes almost all of them.
  23. */
  24. /*
  25. * Copyright (C) 2003 David Brownell
  26. * Copyright (C) 2003-2005 PLX Technology, Inc.
  27. * Copyright (C) 2014 Ricardo Ribalda - Qtechnology/AS
  28. *
  29. * Modified Seth Levy 2005 PLX Technology, Inc. to provide compatibility
  30. * with 2282 chip
  31. *
  32. * Modified Ricardo Ribalda Qtechnology AS to provide compatibility
  33. * with usb 338x chip. Based on PLX driver
  34. */
  35. #include <linux/module.h>
  36. #include <linux/pci.h>
  37. #include <linux/dma-mapping.h>
  38. #include <linux/kernel.h>
  39. #include <linux/delay.h>
  40. #include <linux/ioport.h>
  41. #include <linux/slab.h>
  42. #include <linux/errno.h>
  43. #include <linux/init.h>
  44. #include <linux/timer.h>
  45. #include <linux/list.h>
  46. #include <linux/interrupt.h>
  47. #include <linux/moduleparam.h>
  48. #include <linux/device.h>
  49. #include <linux/usb/ch9.h>
  50. #include <linux/usb/gadget.h>
  51. #include <linux/prefetch.h>
  52. #include <linux/io.h>
  53. #include <asm/byteorder.h>
  54. #include <asm/irq.h>
  55. #include <asm/unaligned.h>
  56. #define DRIVER_DESC "PLX NET228x/USB338x USB Peripheral Controller"
  57. #define DRIVER_VERSION "2005 Sept 27/v3.0"
  58. #define EP_DONTUSE 13 /* nonzero */
  59. #define USE_RDK_LEDS /* GPIO pins control three LEDs */
  60. static const char driver_name[] = "net2280";
  61. static const char driver_desc[] = DRIVER_DESC;
  62. static const u32 ep_bit[9] = { 0, 17, 2, 19, 4, 1, 18, 3, 20 };
  63. static const char ep0name[] = "ep0";
  64. #define EP_INFO(_name, _caps) \
  65. { \
  66. .name = _name, \
  67. .caps = _caps, \
  68. }
  69. static const struct {
  70. const char *name;
  71. const struct usb_ep_caps caps;
  72. } ep_info_dft[] = { /* Default endpoint configuration */
  73. EP_INFO(ep0name,
  74. USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)),
  75. EP_INFO("ep-a",
  76. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  77. EP_INFO("ep-b",
  78. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  79. EP_INFO("ep-c",
  80. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  81. EP_INFO("ep-d",
  82. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  83. EP_INFO("ep-e",
  84. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  85. EP_INFO("ep-f",
  86. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  87. EP_INFO("ep-g",
  88. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  89. EP_INFO("ep-h",
  90. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  91. }, ep_info_adv[] = { /* Endpoints for usb3380 advance mode */
  92. EP_INFO(ep0name,
  93. USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)),
  94. EP_INFO("ep1in",
  95. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)),
  96. EP_INFO("ep2out",
  97. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)),
  98. EP_INFO("ep3in",
  99. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)),
  100. EP_INFO("ep4out",
  101. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)),
  102. EP_INFO("ep1out",
  103. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)),
  104. EP_INFO("ep2in",
  105. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)),
  106. EP_INFO("ep3out",
  107. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)),
  108. EP_INFO("ep4in",
  109. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)),
  110. };
  111. #undef EP_INFO
  112. /* mode 0 == ep-{a,b,c,d} 1K fifo each
  113. * mode 1 == ep-{a,b} 2K fifo each, ep-{c,d} unavailable
  114. * mode 2 == ep-a 2K fifo, ep-{b,c} 1K each, ep-d unavailable
  115. */
  116. static ushort fifo_mode;
  117. /* "modprobe net2280 fifo_mode=1" etc */
  118. module_param(fifo_mode, ushort, 0644);
  119. /* enable_suspend -- When enabled, the driver will respond to
  120. * USB suspend requests by powering down the NET2280. Otherwise,
  121. * USB suspend requests will be ignored. This is acceptable for
  122. * self-powered devices
  123. */
  124. static bool enable_suspend;
  125. /* "modprobe net2280 enable_suspend=1" etc */
  126. module_param(enable_suspend, bool, 0444);
  127. #define DIR_STRING(bAddress) (((bAddress) & USB_DIR_IN) ? "in" : "out")
  128. static char *type_string(u8 bmAttributes)
  129. {
  130. switch ((bmAttributes) & USB_ENDPOINT_XFERTYPE_MASK) {
  131. case USB_ENDPOINT_XFER_BULK: return "bulk";
  132. case USB_ENDPOINT_XFER_ISOC: return "iso";
  133. case USB_ENDPOINT_XFER_INT: return "intr";
  134. }
  135. return "control";
  136. }
  137. #include "net2280.h"
  138. #define valid_bit cpu_to_le32(BIT(VALID_BIT))
  139. #define dma_done_ie cpu_to_le32(BIT(DMA_DONE_INTERRUPT_ENABLE))
  140. static void ep_clear_seqnum(struct net2280_ep *ep);
  141. static void stop_activity(struct net2280 *dev,
  142. struct usb_gadget_driver *driver);
  143. static void ep0_start(struct net2280 *dev);
  144. /*-------------------------------------------------------------------------*/
  145. static inline void enable_pciirqenb(struct net2280_ep *ep)
  146. {
  147. u32 tmp = readl(&ep->dev->regs->pciirqenb0);
  148. if (ep->dev->quirks & PLX_LEGACY)
  149. tmp |= BIT(ep->num);
  150. else
  151. tmp |= BIT(ep_bit[ep->num]);
  152. writel(tmp, &ep->dev->regs->pciirqenb0);
  153. return;
  154. }
  155. static int
  156. net2280_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
  157. {
  158. struct net2280 *dev;
  159. struct net2280_ep *ep;
  160. u32 max;
  161. u32 tmp = 0;
  162. u32 type;
  163. unsigned long flags;
  164. static const u32 ep_key[9] = { 1, 0, 1, 0, 1, 1, 0, 1, 0 };
  165. int ret = 0;
  166. ep = container_of(_ep, struct net2280_ep, ep);
  167. if (!_ep || !desc || ep->desc || _ep->name == ep0name ||
  168. desc->bDescriptorType != USB_DT_ENDPOINT) {
  169. pr_err("%s: failed at line=%d\n", __func__, __LINE__);
  170. return -EINVAL;
  171. }
  172. dev = ep->dev;
  173. if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
  174. ret = -ESHUTDOWN;
  175. goto print_err;
  176. }
  177. /* erratum 0119 workaround ties up an endpoint number */
  178. if ((desc->bEndpointAddress & 0x0f) == EP_DONTUSE) {
  179. ret = -EDOM;
  180. goto print_err;
  181. }
  182. if (dev->quirks & PLX_PCIE) {
  183. if ((desc->bEndpointAddress & 0x0f) >= 0x0c) {
  184. ret = -EDOM;
  185. goto print_err;
  186. }
  187. ep->is_in = !!usb_endpoint_dir_in(desc);
  188. if (dev->enhanced_mode && ep->is_in && ep_key[ep->num]) {
  189. ret = -EINVAL;
  190. goto print_err;
  191. }
  192. }
  193. /* sanity check ep-e/ep-f since their fifos are small */
  194. max = usb_endpoint_maxp(desc);
  195. if (ep->num > 4 && max > 64 && (dev->quirks & PLX_LEGACY)) {
  196. ret = -ERANGE;
  197. goto print_err;
  198. }
  199. spin_lock_irqsave(&dev->lock, flags);
  200. _ep->maxpacket = max;
  201. ep->desc = desc;
  202. /* ep_reset() has already been called */
  203. ep->stopped = 0;
  204. ep->wedged = 0;
  205. ep->out_overflow = 0;
  206. /* set speed-dependent max packet; may kick in high bandwidth */
  207. set_max_speed(ep, max);
  208. /* set type, direction, address; reset fifo counters */
  209. writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat);
  210. if ((dev->quirks & PLX_PCIE) && dev->enhanced_mode) {
  211. tmp = readl(&ep->cfg->ep_cfg);
  212. /* If USB ep number doesn't match hardware ep number */
  213. if ((tmp & 0xf) != usb_endpoint_num(desc)) {
  214. ret = -EINVAL;
  215. spin_unlock_irqrestore(&dev->lock, flags);
  216. goto print_err;
  217. }
  218. if (ep->is_in)
  219. tmp &= ~USB3380_EP_CFG_MASK_IN;
  220. else
  221. tmp &= ~USB3380_EP_CFG_MASK_OUT;
  222. }
  223. type = (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK);
  224. if (type == USB_ENDPOINT_XFER_INT) {
  225. /* erratum 0105 workaround prevents hs NYET */
  226. if (dev->chiprev == 0100 &&
  227. dev->gadget.speed == USB_SPEED_HIGH &&
  228. !(desc->bEndpointAddress & USB_DIR_IN))
  229. writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE),
  230. &ep->regs->ep_rsp);
  231. } else if (type == USB_ENDPOINT_XFER_BULK) {
  232. /* catch some particularly blatant driver bugs */
  233. if ((dev->gadget.speed == USB_SPEED_SUPER && max != 1024) ||
  234. (dev->gadget.speed == USB_SPEED_HIGH && max != 512) ||
  235. (dev->gadget.speed == USB_SPEED_FULL && max > 64)) {
  236. spin_unlock_irqrestore(&dev->lock, flags);
  237. ret = -ERANGE;
  238. goto print_err;
  239. }
  240. }
  241. ep->is_iso = (type == USB_ENDPOINT_XFER_ISOC);
  242. /* Enable this endpoint */
  243. if (dev->quirks & PLX_LEGACY) {
  244. tmp |= type << ENDPOINT_TYPE;
  245. tmp |= desc->bEndpointAddress;
  246. /* default full fifo lines */
  247. tmp |= (4 << ENDPOINT_BYTE_COUNT);
  248. tmp |= BIT(ENDPOINT_ENABLE);
  249. ep->is_in = (tmp & USB_DIR_IN) != 0;
  250. } else {
  251. /* In Legacy mode, only OUT endpoints are used */
  252. if (dev->enhanced_mode && ep->is_in) {
  253. tmp |= type << IN_ENDPOINT_TYPE;
  254. tmp |= BIT(IN_ENDPOINT_ENABLE);
  255. } else {
  256. tmp |= type << OUT_ENDPOINT_TYPE;
  257. tmp |= BIT(OUT_ENDPOINT_ENABLE);
  258. tmp |= (ep->is_in << ENDPOINT_DIRECTION);
  259. }
  260. tmp |= (4 << ENDPOINT_BYTE_COUNT);
  261. if (!dev->enhanced_mode)
  262. tmp |= usb_endpoint_num(desc);
  263. tmp |= (ep->ep.maxburst << MAX_BURST_SIZE);
  264. }
  265. /* Make sure all the registers are written before ep_rsp*/
  266. wmb();
  267. /* for OUT transfers, block the rx fifo until a read is posted */
  268. if (!ep->is_in)
  269. writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
  270. else if (!(dev->quirks & PLX_2280)) {
  271. /* Added for 2282, Don't use nak packets on an in endpoint,
  272. * this was ignored on 2280
  273. */
  274. writel(BIT(CLEAR_NAK_OUT_PACKETS) |
  275. BIT(CLEAR_NAK_OUT_PACKETS_MODE), &ep->regs->ep_rsp);
  276. }
  277. if (dev->quirks & PLX_PCIE)
  278. ep_clear_seqnum(ep);
  279. writel(tmp, &ep->cfg->ep_cfg);
  280. /* enable irqs */
  281. if (!ep->dma) { /* pio, per-packet */
  282. enable_pciirqenb(ep);
  283. tmp = BIT(DATA_PACKET_RECEIVED_INTERRUPT_ENABLE) |
  284. BIT(DATA_PACKET_TRANSMITTED_INTERRUPT_ENABLE);
  285. if (dev->quirks & PLX_2280)
  286. tmp |= readl(&ep->regs->ep_irqenb);
  287. writel(tmp, &ep->regs->ep_irqenb);
  288. } else { /* dma, per-request */
  289. tmp = BIT((8 + ep->num)); /* completion */
  290. tmp |= readl(&dev->regs->pciirqenb1);
  291. writel(tmp, &dev->regs->pciirqenb1);
  292. /* for short OUT transfers, dma completions can't
  293. * advance the queue; do it pio-style, by hand.
  294. * NOTE erratum 0112 workaround #2
  295. */
  296. if ((desc->bEndpointAddress & USB_DIR_IN) == 0) {
  297. tmp = BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT_ENABLE);
  298. writel(tmp, &ep->regs->ep_irqenb);
  299. enable_pciirqenb(ep);
  300. }
  301. }
  302. tmp = desc->bEndpointAddress;
  303. ep_dbg(dev, "enabled %s (ep%d%s-%s) %s max %04x\n",
  304. _ep->name, tmp & 0x0f, DIR_STRING(tmp),
  305. type_string(desc->bmAttributes),
  306. ep->dma ? "dma" : "pio", max);
  307. /* pci writes may still be posted */
  308. spin_unlock_irqrestore(&dev->lock, flags);
  309. return ret;
  310. print_err:
  311. dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, ret);
  312. return ret;
  313. }
  314. static int handshake(u32 __iomem *ptr, u32 mask, u32 done, int usec)
  315. {
  316. u32 result;
  317. do {
  318. result = readl(ptr);
  319. if (result == ~(u32)0) /* "device unplugged" */
  320. return -ENODEV;
  321. result &= mask;
  322. if (result == done)
  323. return 0;
  324. udelay(1);
  325. usec--;
  326. } while (usec > 0);
  327. return -ETIMEDOUT;
  328. }
  329. static const struct usb_ep_ops net2280_ep_ops;
  330. static void ep_reset_228x(struct net2280_regs __iomem *regs,
  331. struct net2280_ep *ep)
  332. {
  333. u32 tmp;
  334. ep->desc = NULL;
  335. INIT_LIST_HEAD(&ep->queue);
  336. usb_ep_set_maxpacket_limit(&ep->ep, ~0);
  337. ep->ep.ops = &net2280_ep_ops;
  338. /* disable the dma, irqs, endpoint... */
  339. if (ep->dma) {
  340. writel(0, &ep->dma->dmactl);
  341. writel(BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
  342. BIT(DMA_TRANSACTION_DONE_INTERRUPT) |
  343. BIT(DMA_ABORT),
  344. &ep->dma->dmastat);
  345. tmp = readl(&regs->pciirqenb0);
  346. tmp &= ~BIT(ep->num);
  347. writel(tmp, &regs->pciirqenb0);
  348. } else {
  349. tmp = readl(&regs->pciirqenb1);
  350. tmp &= ~BIT((8 + ep->num)); /* completion */
  351. writel(tmp, &regs->pciirqenb1);
  352. }
  353. writel(0, &ep->regs->ep_irqenb);
  354. /* init to our chosen defaults, notably so that we NAK OUT
  355. * packets until the driver queues a read (+note erratum 0112)
  356. */
  357. if (!ep->is_in || (ep->dev->quirks & PLX_2280)) {
  358. tmp = BIT(SET_NAK_OUT_PACKETS_MODE) |
  359. BIT(SET_NAK_OUT_PACKETS) |
  360. BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
  361. BIT(CLEAR_INTERRUPT_MODE);
  362. } else {
  363. /* added for 2282 */
  364. tmp = BIT(CLEAR_NAK_OUT_PACKETS_MODE) |
  365. BIT(CLEAR_NAK_OUT_PACKETS) |
  366. BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
  367. BIT(CLEAR_INTERRUPT_MODE);
  368. }
  369. if (ep->num != 0) {
  370. tmp |= BIT(CLEAR_ENDPOINT_TOGGLE) |
  371. BIT(CLEAR_ENDPOINT_HALT);
  372. }
  373. writel(tmp, &ep->regs->ep_rsp);
  374. /* scrub most status bits, and flush any fifo state */
  375. if (ep->dev->quirks & PLX_2280)
  376. tmp = BIT(FIFO_OVERFLOW) |
  377. BIT(FIFO_UNDERFLOW);
  378. else
  379. tmp = 0;
  380. writel(tmp | BIT(TIMEOUT) |
  381. BIT(USB_STALL_SENT) |
  382. BIT(USB_IN_NAK_SENT) |
  383. BIT(USB_IN_ACK_RCVD) |
  384. BIT(USB_OUT_PING_NAK_SENT) |
  385. BIT(USB_OUT_ACK_SENT) |
  386. BIT(FIFO_FLUSH) |
  387. BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
  388. BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
  389. BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
  390. BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
  391. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  392. BIT(DATA_IN_TOKEN_INTERRUPT),
  393. &ep->regs->ep_stat);
  394. /* fifo size is handled separately */
  395. }
  396. static void ep_reset_338x(struct net2280_regs __iomem *regs,
  397. struct net2280_ep *ep)
  398. {
  399. u32 tmp, dmastat;
  400. ep->desc = NULL;
  401. INIT_LIST_HEAD(&ep->queue);
  402. usb_ep_set_maxpacket_limit(&ep->ep, ~0);
  403. ep->ep.ops = &net2280_ep_ops;
  404. /* disable the dma, irqs, endpoint... */
  405. if (ep->dma) {
  406. writel(0, &ep->dma->dmactl);
  407. writel(BIT(DMA_ABORT_DONE_INTERRUPT) |
  408. BIT(DMA_PAUSE_DONE_INTERRUPT) |
  409. BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
  410. BIT(DMA_TRANSACTION_DONE_INTERRUPT),
  411. /* | BIT(DMA_ABORT), */
  412. &ep->dma->dmastat);
  413. dmastat = readl(&ep->dma->dmastat);
  414. if (dmastat == 0x5002) {
  415. ep_warn(ep->dev, "The dmastat return = %x!!\n",
  416. dmastat);
  417. writel(0x5a, &ep->dma->dmastat);
  418. }
  419. tmp = readl(&regs->pciirqenb0);
  420. tmp &= ~BIT(ep_bit[ep->num]);
  421. writel(tmp, &regs->pciirqenb0);
  422. } else {
  423. if (ep->num < 5) {
  424. tmp = readl(&regs->pciirqenb1);
  425. tmp &= ~BIT((8 + ep->num)); /* completion */
  426. writel(tmp, &regs->pciirqenb1);
  427. }
  428. }
  429. writel(0, &ep->regs->ep_irqenb);
  430. writel(BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
  431. BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
  432. BIT(FIFO_OVERFLOW) |
  433. BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
  434. BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
  435. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  436. BIT(DATA_IN_TOKEN_INTERRUPT), &ep->regs->ep_stat);
  437. tmp = readl(&ep->cfg->ep_cfg);
  438. if (ep->is_in)
  439. tmp &= ~USB3380_EP_CFG_MASK_IN;
  440. else
  441. tmp &= ~USB3380_EP_CFG_MASK_OUT;
  442. writel(tmp, &ep->cfg->ep_cfg);
  443. }
  444. static void nuke(struct net2280_ep *);
  445. static int net2280_disable(struct usb_ep *_ep)
  446. {
  447. struct net2280_ep *ep;
  448. unsigned long flags;
  449. ep = container_of(_ep, struct net2280_ep, ep);
  450. if (!_ep || !ep->desc || _ep->name == ep0name) {
  451. pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
  452. return -EINVAL;
  453. }
  454. spin_lock_irqsave(&ep->dev->lock, flags);
  455. nuke(ep);
  456. if (ep->dev->quirks & PLX_PCIE)
  457. ep_reset_338x(ep->dev->regs, ep);
  458. else
  459. ep_reset_228x(ep->dev->regs, ep);
  460. ep_vdbg(ep->dev, "disabled %s %s\n",
  461. ep->dma ? "dma" : "pio", _ep->name);
  462. /* synch memory views with the device */
  463. (void)readl(&ep->cfg->ep_cfg);
  464. if (!ep->dma && ep->num >= 1 && ep->num <= 4)
  465. ep->dma = &ep->dev->dma[ep->num - 1];
  466. spin_unlock_irqrestore(&ep->dev->lock, flags);
  467. return 0;
  468. }
  469. /*-------------------------------------------------------------------------*/
  470. static struct usb_request
  471. *net2280_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
  472. {
  473. struct net2280_ep *ep;
  474. struct net2280_request *req;
  475. if (!_ep) {
  476. pr_err("%s: Invalid ep\n", __func__);
  477. return NULL;
  478. }
  479. ep = container_of(_ep, struct net2280_ep, ep);
  480. req = kzalloc(sizeof(*req), gfp_flags);
  481. if (!req)
  482. return NULL;
  483. INIT_LIST_HEAD(&req->queue);
  484. /* this dma descriptor may be swapped with the previous dummy */
  485. if (ep->dma) {
  486. struct net2280_dma *td;
  487. td = dma_pool_alloc(ep->dev->requests, gfp_flags,
  488. &req->td_dma);
  489. if (!td) {
  490. kfree(req);
  491. return NULL;
  492. }
  493. td->dmacount = 0; /* not VALID */
  494. td->dmadesc = td->dmaaddr;
  495. req->td = td;
  496. }
  497. return &req->req;
  498. }
  499. static void net2280_free_request(struct usb_ep *_ep, struct usb_request *_req)
  500. {
  501. struct net2280_ep *ep;
  502. struct net2280_request *req;
  503. ep = container_of(_ep, struct net2280_ep, ep);
  504. if (!_ep || !_req) {
  505. dev_err(&ep->dev->pdev->dev, "%s: Invalid ep=%p or req=%p\n",
  506. __func__, _ep, _req);
  507. return;
  508. }
  509. req = container_of(_req, struct net2280_request, req);
  510. WARN_ON(!list_empty(&req->queue));
  511. if (req->td)
  512. dma_pool_free(ep->dev->requests, req->td, req->td_dma);
  513. kfree(req);
  514. }
  515. /*-------------------------------------------------------------------------*/
  516. /* load a packet into the fifo we use for usb IN transfers.
  517. * works for all endpoints.
  518. *
  519. * NOTE: pio with ep-a..ep-d could stuff multiple packets into the fifo
  520. * at a time, but this code is simpler because it knows it only writes
  521. * one packet. ep-a..ep-d should use dma instead.
  522. */
  523. static void write_fifo(struct net2280_ep *ep, struct usb_request *req)
  524. {
  525. struct net2280_ep_regs __iomem *regs = ep->regs;
  526. u8 *buf;
  527. u32 tmp;
  528. unsigned count, total;
  529. /* INVARIANT: fifo is currently empty. (testable) */
  530. if (req) {
  531. buf = req->buf + req->actual;
  532. prefetch(buf);
  533. total = req->length - req->actual;
  534. } else {
  535. total = 0;
  536. buf = NULL;
  537. }
  538. /* write just one packet at a time */
  539. count = ep->ep.maxpacket;
  540. if (count > total) /* min() cannot be used on a bitfield */
  541. count = total;
  542. ep_vdbg(ep->dev, "write %s fifo (IN) %d bytes%s req %p\n",
  543. ep->ep.name, count,
  544. (count != ep->ep.maxpacket) ? " (short)" : "",
  545. req);
  546. while (count >= 4) {
  547. /* NOTE be careful if you try to align these. fifo lines
  548. * should normally be full (4 bytes) and successive partial
  549. * lines are ok only in certain cases.
  550. */
  551. tmp = get_unaligned((u32 *)buf);
  552. cpu_to_le32s(&tmp);
  553. writel(tmp, &regs->ep_data);
  554. buf += 4;
  555. count -= 4;
  556. }
  557. /* last fifo entry is "short" unless we wrote a full packet.
  558. * also explicitly validate last word in (periodic) transfers
  559. * when maxpacket is not a multiple of 4 bytes.
  560. */
  561. if (count || total < ep->ep.maxpacket) {
  562. tmp = count ? get_unaligned((u32 *)buf) : count;
  563. cpu_to_le32s(&tmp);
  564. set_fifo_bytecount(ep, count & 0x03);
  565. writel(tmp, &regs->ep_data);
  566. }
  567. /* pci writes may still be posted */
  568. }
  569. /* work around erratum 0106: PCI and USB race over the OUT fifo.
  570. * caller guarantees chiprev 0100, out endpoint is NAKing, and
  571. * there's no real data in the fifo.
  572. *
  573. * NOTE: also used in cases where that erratum doesn't apply:
  574. * where the host wrote "too much" data to us.
  575. */
  576. static void out_flush(struct net2280_ep *ep)
  577. {
  578. u32 __iomem *statp;
  579. u32 tmp;
  580. statp = &ep->regs->ep_stat;
  581. tmp = readl(statp);
  582. if (tmp & BIT(NAK_OUT_PACKETS)) {
  583. ep_dbg(ep->dev, "%s %s %08x !NAK\n",
  584. ep->ep.name, __func__, tmp);
  585. writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
  586. }
  587. writel(BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  588. BIT(DATA_PACKET_RECEIVED_INTERRUPT),
  589. statp);
  590. writel(BIT(FIFO_FLUSH), statp);
  591. /* Make sure that stap is written */
  592. mb();
  593. tmp = readl(statp);
  594. if (tmp & BIT(DATA_OUT_PING_TOKEN_INTERRUPT) &&
  595. /* high speed did bulk NYET; fifo isn't filling */
  596. ep->dev->gadget.speed == USB_SPEED_FULL) {
  597. unsigned usec;
  598. usec = 50; /* 64 byte bulk/interrupt */
  599. handshake(statp, BIT(USB_OUT_PING_NAK_SENT),
  600. BIT(USB_OUT_PING_NAK_SENT), usec);
  601. /* NAK done; now CLEAR_NAK_OUT_PACKETS is safe */
  602. }
  603. }
  604. /* unload packet(s) from the fifo we use for usb OUT transfers.
  605. * returns true iff the request completed, because of short packet
  606. * or the request buffer having filled with full packets.
  607. *
  608. * for ep-a..ep-d this will read multiple packets out when they
  609. * have been accepted.
  610. */
  611. static int read_fifo(struct net2280_ep *ep, struct net2280_request *req)
  612. {
  613. struct net2280_ep_regs __iomem *regs = ep->regs;
  614. u8 *buf = req->req.buf + req->req.actual;
  615. unsigned count, tmp, is_short;
  616. unsigned cleanup = 0, prevent = 0;
  617. /* erratum 0106 ... packets coming in during fifo reads might
  618. * be incompletely rejected. not all cases have workarounds.
  619. */
  620. if (ep->dev->chiprev == 0x0100 &&
  621. ep->dev->gadget.speed == USB_SPEED_FULL) {
  622. udelay(1);
  623. tmp = readl(&ep->regs->ep_stat);
  624. if ((tmp & BIT(NAK_OUT_PACKETS)))
  625. cleanup = 1;
  626. else if ((tmp & BIT(FIFO_FULL))) {
  627. start_out_naking(ep);
  628. prevent = 1;
  629. }
  630. /* else: hope we don't see the problem */
  631. }
  632. /* never overflow the rx buffer. the fifo reads packets until
  633. * it sees a short one; we might not be ready for them all.
  634. */
  635. prefetchw(buf);
  636. count = readl(&regs->ep_avail);
  637. if (unlikely(count == 0)) {
  638. udelay(1);
  639. tmp = readl(&ep->regs->ep_stat);
  640. count = readl(&regs->ep_avail);
  641. /* handled that data already? */
  642. if (count == 0 && (tmp & BIT(NAK_OUT_PACKETS)) == 0)
  643. return 0;
  644. }
  645. tmp = req->req.length - req->req.actual;
  646. if (count > tmp) {
  647. /* as with DMA, data overflow gets flushed */
  648. if ((tmp % ep->ep.maxpacket) != 0) {
  649. ep_err(ep->dev,
  650. "%s out fifo %d bytes, expected %d\n",
  651. ep->ep.name, count, tmp);
  652. req->req.status = -EOVERFLOW;
  653. cleanup = 1;
  654. /* NAK_OUT_PACKETS will be set, so flushing is safe;
  655. * the next read will start with the next packet
  656. */
  657. } /* else it's a ZLP, no worries */
  658. count = tmp;
  659. }
  660. req->req.actual += count;
  661. is_short = (count == 0) || ((count % ep->ep.maxpacket) != 0);
  662. ep_vdbg(ep->dev, "read %s fifo (OUT) %d bytes%s%s%s req %p %d/%d\n",
  663. ep->ep.name, count, is_short ? " (short)" : "",
  664. cleanup ? " flush" : "", prevent ? " nak" : "",
  665. req, req->req.actual, req->req.length);
  666. while (count >= 4) {
  667. tmp = readl(&regs->ep_data);
  668. cpu_to_le32s(&tmp);
  669. put_unaligned(tmp, (u32 *)buf);
  670. buf += 4;
  671. count -= 4;
  672. }
  673. if (count) {
  674. tmp = readl(&regs->ep_data);
  675. /* LE conversion is implicit here: */
  676. do {
  677. *buf++ = (u8) tmp;
  678. tmp >>= 8;
  679. } while (--count);
  680. }
  681. if (cleanup)
  682. out_flush(ep);
  683. if (prevent) {
  684. writel(BIT(CLEAR_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
  685. (void) readl(&ep->regs->ep_rsp);
  686. }
  687. return is_short || ((req->req.actual == req->req.length) &&
  688. !req->req.zero);
  689. }
  690. /* fill out dma descriptor to match a given request */
  691. static void fill_dma_desc(struct net2280_ep *ep,
  692. struct net2280_request *req, int valid)
  693. {
  694. struct net2280_dma *td = req->td;
  695. u32 dmacount = req->req.length;
  696. /* don't let DMA continue after a short OUT packet,
  697. * so overruns can't affect the next transfer.
  698. * in case of overruns on max-size packets, we can't
  699. * stop the fifo from filling but we can flush it.
  700. */
  701. if (ep->is_in)
  702. dmacount |= BIT(DMA_DIRECTION);
  703. if ((!ep->is_in && (dmacount % ep->ep.maxpacket) != 0) ||
  704. !(ep->dev->quirks & PLX_2280))
  705. dmacount |= BIT(END_OF_CHAIN);
  706. req->valid = valid;
  707. if (valid)
  708. dmacount |= BIT(VALID_BIT);
  709. dmacount |= BIT(DMA_DONE_INTERRUPT_ENABLE);
  710. /* td->dmadesc = previously set by caller */
  711. td->dmaaddr = cpu_to_le32 (req->req.dma);
  712. /* 2280 may be polling VALID_BIT through ep->dma->dmadesc */
  713. wmb();
  714. td->dmacount = cpu_to_le32(dmacount);
  715. }
  716. static const u32 dmactl_default =
  717. BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
  718. BIT(DMA_CLEAR_COUNT_ENABLE) |
  719. /* erratum 0116 workaround part 1 (use POLLING) */
  720. (POLL_100_USEC << DESCRIPTOR_POLLING_RATE) |
  721. BIT(DMA_VALID_BIT_POLLING_ENABLE) |
  722. BIT(DMA_VALID_BIT_ENABLE) |
  723. BIT(DMA_SCATTER_GATHER_ENABLE) |
  724. /* erratum 0116 workaround part 2 (no AUTOSTART) */
  725. BIT(DMA_ENABLE);
  726. static inline void spin_stop_dma(struct net2280_dma_regs __iomem *dma)
  727. {
  728. handshake(&dma->dmactl, BIT(DMA_ENABLE), 0, 50);
  729. }
  730. static inline void stop_dma(struct net2280_dma_regs __iomem *dma)
  731. {
  732. writel(readl(&dma->dmactl) & ~BIT(DMA_ENABLE), &dma->dmactl);
  733. spin_stop_dma(dma);
  734. }
  735. static void start_queue(struct net2280_ep *ep, u32 dmactl, u32 td_dma)
  736. {
  737. struct net2280_dma_regs __iomem *dma = ep->dma;
  738. unsigned int tmp = BIT(VALID_BIT) | (ep->is_in << DMA_DIRECTION);
  739. if (!(ep->dev->quirks & PLX_2280))
  740. tmp |= BIT(END_OF_CHAIN);
  741. writel(tmp, &dma->dmacount);
  742. writel(readl(&dma->dmastat), &dma->dmastat);
  743. writel(td_dma, &dma->dmadesc);
  744. if (ep->dev->quirks & PLX_PCIE)
  745. dmactl |= BIT(DMA_REQUEST_OUTSTANDING);
  746. writel(dmactl, &dma->dmactl);
  747. /* erratum 0116 workaround part 3: pci arbiter away from net2280 */
  748. (void) readl(&ep->dev->pci->pcimstctl);
  749. writel(BIT(DMA_START), &dma->dmastat);
  750. if (!ep->is_in)
  751. stop_out_naking(ep);
  752. }
  753. static void start_dma(struct net2280_ep *ep, struct net2280_request *req)
  754. {
  755. u32 tmp;
  756. struct net2280_dma_regs __iomem *dma = ep->dma;
  757. /* FIXME can't use DMA for ZLPs */
  758. /* on this path we "know" there's no dma active (yet) */
  759. WARN_ON(readl(&dma->dmactl) & BIT(DMA_ENABLE));
  760. writel(0, &ep->dma->dmactl);
  761. /* previous OUT packet might have been short */
  762. if (!ep->is_in && (readl(&ep->regs->ep_stat) &
  763. BIT(NAK_OUT_PACKETS))) {
  764. writel(BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT),
  765. &ep->regs->ep_stat);
  766. tmp = readl(&ep->regs->ep_avail);
  767. if (tmp) {
  768. writel(readl(&dma->dmastat), &dma->dmastat);
  769. /* transfer all/some fifo data */
  770. writel(req->req.dma, &dma->dmaaddr);
  771. tmp = min(tmp, req->req.length);
  772. /* dma irq, faking scatterlist status */
  773. req->td->dmacount = cpu_to_le32(req->req.length - tmp);
  774. writel(BIT(DMA_DONE_INTERRUPT_ENABLE) | tmp,
  775. &dma->dmacount);
  776. req->td->dmadesc = 0;
  777. req->valid = 1;
  778. writel(BIT(DMA_ENABLE), &dma->dmactl);
  779. writel(BIT(DMA_START), &dma->dmastat);
  780. return;
  781. }
  782. }
  783. tmp = dmactl_default;
  784. /* force packet boundaries between dma requests, but prevent the
  785. * controller from automagically writing a last "short" packet
  786. * (zero length) unless the driver explicitly said to do that.
  787. */
  788. if (ep->is_in) {
  789. if (likely((req->req.length % ep->ep.maxpacket) ||
  790. req->req.zero)){
  791. tmp |= BIT(DMA_FIFO_VALIDATE);
  792. ep->in_fifo_validate = 1;
  793. } else
  794. ep->in_fifo_validate = 0;
  795. }
  796. /* init req->td, pointing to the current dummy */
  797. req->td->dmadesc = cpu_to_le32 (ep->td_dma);
  798. fill_dma_desc(ep, req, 1);
  799. req->td->dmacount |= cpu_to_le32(BIT(END_OF_CHAIN));
  800. start_queue(ep, tmp, req->td_dma);
  801. }
  802. static inline void
  803. queue_dma(struct net2280_ep *ep, struct net2280_request *req, int valid)
  804. {
  805. struct net2280_dma *end;
  806. dma_addr_t tmp;
  807. /* swap new dummy for old, link; fill and maybe activate */
  808. end = ep->dummy;
  809. ep->dummy = req->td;
  810. req->td = end;
  811. tmp = ep->td_dma;
  812. ep->td_dma = req->td_dma;
  813. req->td_dma = tmp;
  814. end->dmadesc = cpu_to_le32 (ep->td_dma);
  815. fill_dma_desc(ep, req, valid);
  816. }
  817. static void
  818. done(struct net2280_ep *ep, struct net2280_request *req, int status)
  819. {
  820. struct net2280 *dev;
  821. unsigned stopped = ep->stopped;
  822. list_del_init(&req->queue);
  823. if (req->req.status == -EINPROGRESS)
  824. req->req.status = status;
  825. else
  826. status = req->req.status;
  827. dev = ep->dev;
  828. if (ep->dma)
  829. usb_gadget_unmap_request(&dev->gadget, &req->req, ep->is_in);
  830. if (status && status != -ESHUTDOWN)
  831. ep_vdbg(dev, "complete %s req %p stat %d len %u/%u\n",
  832. ep->ep.name, &req->req, status,
  833. req->req.actual, req->req.length);
  834. /* don't modify queue heads during completion callback */
  835. ep->stopped = 1;
  836. spin_unlock(&dev->lock);
  837. usb_gadget_giveback_request(&ep->ep, &req->req);
  838. spin_lock(&dev->lock);
  839. ep->stopped = stopped;
  840. }
  841. /*-------------------------------------------------------------------------*/
  842. static int
  843. net2280_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
  844. {
  845. struct net2280_request *req;
  846. struct net2280_ep *ep;
  847. struct net2280 *dev;
  848. unsigned long flags;
  849. int ret = 0;
  850. /* we always require a cpu-view buffer, so that we can
  851. * always use pio (as fallback or whatever).
  852. */
  853. ep = container_of(_ep, struct net2280_ep, ep);
  854. if (!_ep || (!ep->desc && ep->num != 0)) {
  855. pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
  856. return -EINVAL;
  857. }
  858. req = container_of(_req, struct net2280_request, req);
  859. if (!_req || !_req->complete || !_req->buf ||
  860. !list_empty(&req->queue)) {
  861. ret = -EINVAL;
  862. goto print_err;
  863. }
  864. if (_req->length > (~0 & DMA_BYTE_COUNT_MASK)) {
  865. ret = -EDOM;
  866. goto print_err;
  867. }
  868. dev = ep->dev;
  869. if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
  870. ret = -ESHUTDOWN;
  871. goto print_err;
  872. }
  873. /* FIXME implement PIO fallback for ZLPs with DMA */
  874. if (ep->dma && _req->length == 0) {
  875. ret = -EOPNOTSUPP;
  876. goto print_err;
  877. }
  878. /* set up dma mapping in case the caller didn't */
  879. if (ep->dma) {
  880. ret = usb_gadget_map_request(&dev->gadget, _req,
  881. ep->is_in);
  882. if (ret)
  883. goto print_err;
  884. }
  885. ep_vdbg(dev, "%s queue req %p, len %d buf %p\n",
  886. _ep->name, _req, _req->length, _req->buf);
  887. spin_lock_irqsave(&dev->lock, flags);
  888. _req->status = -EINPROGRESS;
  889. _req->actual = 0;
  890. /* kickstart this i/o queue? */
  891. if (list_empty(&ep->queue) && !ep->stopped &&
  892. !((dev->quirks & PLX_PCIE) && ep->dma &&
  893. (readl(&ep->regs->ep_rsp) & BIT(CLEAR_ENDPOINT_HALT)))) {
  894. /* use DMA if the endpoint supports it, else pio */
  895. if (ep->dma)
  896. start_dma(ep, req);
  897. else {
  898. /* maybe there's no control data, just status ack */
  899. if (ep->num == 0 && _req->length == 0) {
  900. allow_status(ep);
  901. done(ep, req, 0);
  902. ep_vdbg(dev, "%s status ack\n", ep->ep.name);
  903. goto done;
  904. }
  905. /* PIO ... stuff the fifo, or unblock it. */
  906. if (ep->is_in)
  907. write_fifo(ep, _req);
  908. else if (list_empty(&ep->queue)) {
  909. u32 s;
  910. /* OUT FIFO might have packet(s) buffered */
  911. s = readl(&ep->regs->ep_stat);
  912. if ((s & BIT(FIFO_EMPTY)) == 0) {
  913. /* note: _req->short_not_ok is
  914. * ignored here since PIO _always_
  915. * stops queue advance here, and
  916. * _req->status doesn't change for
  917. * short reads (only _req->actual)
  918. */
  919. if (read_fifo(ep, req) &&
  920. ep->num == 0) {
  921. done(ep, req, 0);
  922. allow_status(ep);
  923. /* don't queue it */
  924. req = NULL;
  925. } else if (read_fifo(ep, req) &&
  926. ep->num != 0) {
  927. done(ep, req, 0);
  928. req = NULL;
  929. } else
  930. s = readl(&ep->regs->ep_stat);
  931. }
  932. /* don't NAK, let the fifo fill */
  933. if (req && (s & BIT(NAK_OUT_PACKETS)))
  934. writel(BIT(CLEAR_NAK_OUT_PACKETS),
  935. &ep->regs->ep_rsp);
  936. }
  937. }
  938. } else if (ep->dma) {
  939. int valid = 1;
  940. if (ep->is_in) {
  941. int expect;
  942. /* preventing magic zlps is per-engine state, not
  943. * per-transfer; irq logic must recover hiccups.
  944. */
  945. expect = likely(req->req.zero ||
  946. (req->req.length % ep->ep.maxpacket));
  947. if (expect != ep->in_fifo_validate)
  948. valid = 0;
  949. }
  950. queue_dma(ep, req, valid);
  951. } /* else the irq handler advances the queue. */
  952. ep->responded = 1;
  953. if (req)
  954. list_add_tail(&req->queue, &ep->queue);
  955. done:
  956. spin_unlock_irqrestore(&dev->lock, flags);
  957. /* pci writes may still be posted */
  958. return ret;
  959. print_err:
  960. dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, ret);
  961. return ret;
  962. }
  963. static inline void
  964. dma_done(struct net2280_ep *ep, struct net2280_request *req, u32 dmacount,
  965. int status)
  966. {
  967. req->req.actual = req->req.length - (DMA_BYTE_COUNT_MASK & dmacount);
  968. done(ep, req, status);
  969. }
  970. static int scan_dma_completions(struct net2280_ep *ep)
  971. {
  972. int num_completed = 0;
  973. /* only look at descriptors that were "naturally" retired,
  974. * so fifo and list head state won't matter
  975. */
  976. while (!list_empty(&ep->queue)) {
  977. struct net2280_request *req;
  978. u32 req_dma_count;
  979. req = list_entry(ep->queue.next,
  980. struct net2280_request, queue);
  981. if (!req->valid)
  982. break;
  983. rmb();
  984. req_dma_count = le32_to_cpup(&req->td->dmacount);
  985. if ((req_dma_count & BIT(VALID_BIT)) != 0)
  986. break;
  987. /* SHORT_PACKET_TRANSFERRED_INTERRUPT handles "usb-short"
  988. * cases where DMA must be aborted; this code handles
  989. * all non-abort DMA completions.
  990. */
  991. if (unlikely(req->td->dmadesc == 0)) {
  992. /* paranoia */
  993. u32 const ep_dmacount = readl(&ep->dma->dmacount);
  994. if (ep_dmacount & DMA_BYTE_COUNT_MASK)
  995. break;
  996. /* single transfer mode */
  997. dma_done(ep, req, req_dma_count, 0);
  998. num_completed++;
  999. break;
  1000. } else if (!ep->is_in &&
  1001. (req->req.length % ep->ep.maxpacket) &&
  1002. !(ep->dev->quirks & PLX_PCIE)) {
  1003. u32 const ep_stat = readl(&ep->regs->ep_stat);
  1004. /* AVOID TROUBLE HERE by not issuing short reads from
  1005. * your gadget driver. That helps avoids errata 0121,
  1006. * 0122, and 0124; not all cases trigger the warning.
  1007. */
  1008. if ((ep_stat & BIT(NAK_OUT_PACKETS)) == 0) {
  1009. ep_warn(ep->dev, "%s lost packet sync!\n",
  1010. ep->ep.name);
  1011. req->req.status = -EOVERFLOW;
  1012. } else {
  1013. u32 const ep_avail = readl(&ep->regs->ep_avail);
  1014. if (ep_avail) {
  1015. /* fifo gets flushed later */
  1016. ep->out_overflow = 1;
  1017. ep_dbg(ep->dev,
  1018. "%s dma, discard %d len %d\n",
  1019. ep->ep.name, ep_avail,
  1020. req->req.length);
  1021. req->req.status = -EOVERFLOW;
  1022. }
  1023. }
  1024. }
  1025. dma_done(ep, req, req_dma_count, 0);
  1026. num_completed++;
  1027. }
  1028. return num_completed;
  1029. }
  1030. static void restart_dma(struct net2280_ep *ep)
  1031. {
  1032. struct net2280_request *req;
  1033. if (ep->stopped)
  1034. return;
  1035. req = list_entry(ep->queue.next, struct net2280_request, queue);
  1036. start_dma(ep, req);
  1037. }
  1038. static void abort_dma(struct net2280_ep *ep)
  1039. {
  1040. /* abort the current transfer */
  1041. if (likely(!list_empty(&ep->queue))) {
  1042. /* FIXME work around errata 0121, 0122, 0124 */
  1043. writel(BIT(DMA_ABORT), &ep->dma->dmastat);
  1044. spin_stop_dma(ep->dma);
  1045. } else
  1046. stop_dma(ep->dma);
  1047. scan_dma_completions(ep);
  1048. }
  1049. /* dequeue ALL requests */
  1050. static void nuke(struct net2280_ep *ep)
  1051. {
  1052. struct net2280_request *req;
  1053. /* called with spinlock held */
  1054. ep->stopped = 1;
  1055. if (ep->dma)
  1056. abort_dma(ep);
  1057. while (!list_empty(&ep->queue)) {
  1058. req = list_entry(ep->queue.next,
  1059. struct net2280_request,
  1060. queue);
  1061. done(ep, req, -ESHUTDOWN);
  1062. }
  1063. }
  1064. /* dequeue JUST ONE request */
  1065. static int net2280_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  1066. {
  1067. struct net2280_ep *ep;
  1068. struct net2280_request *req;
  1069. unsigned long flags;
  1070. u32 dmactl;
  1071. int stopped;
  1072. ep = container_of(_ep, struct net2280_ep, ep);
  1073. if (!_ep || (!ep->desc && ep->num != 0) || !_req) {
  1074. pr_err("%s: Invalid ep=%p or ep->desc or req=%p\n",
  1075. __func__, _ep, _req);
  1076. return -EINVAL;
  1077. }
  1078. spin_lock_irqsave(&ep->dev->lock, flags);
  1079. stopped = ep->stopped;
  1080. /* quiesce dma while we patch the queue */
  1081. dmactl = 0;
  1082. ep->stopped = 1;
  1083. if (ep->dma) {
  1084. dmactl = readl(&ep->dma->dmactl);
  1085. /* WARNING erratum 0127 may kick in ... */
  1086. stop_dma(ep->dma);
  1087. scan_dma_completions(ep);
  1088. }
  1089. /* make sure it's still queued on this endpoint */
  1090. list_for_each_entry(req, &ep->queue, queue) {
  1091. if (&req->req == _req)
  1092. break;
  1093. }
  1094. if (&req->req != _req) {
  1095. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1096. dev_err(&ep->dev->pdev->dev, "%s: Request mismatch\n",
  1097. __func__);
  1098. return -EINVAL;
  1099. }
  1100. /* queue head may be partially complete. */
  1101. if (ep->queue.next == &req->queue) {
  1102. if (ep->dma) {
  1103. ep_dbg(ep->dev, "unlink (%s) dma\n", _ep->name);
  1104. _req->status = -ECONNRESET;
  1105. abort_dma(ep);
  1106. if (likely(ep->queue.next == &req->queue)) {
  1107. /* NOTE: misreports single-transfer mode*/
  1108. req->td->dmacount = 0; /* invalidate */
  1109. dma_done(ep, req,
  1110. readl(&ep->dma->dmacount),
  1111. -ECONNRESET);
  1112. }
  1113. } else {
  1114. ep_dbg(ep->dev, "unlink (%s) pio\n", _ep->name);
  1115. done(ep, req, -ECONNRESET);
  1116. }
  1117. req = NULL;
  1118. }
  1119. if (req)
  1120. done(ep, req, -ECONNRESET);
  1121. ep->stopped = stopped;
  1122. if (ep->dma) {
  1123. /* turn off dma on inactive queues */
  1124. if (list_empty(&ep->queue))
  1125. stop_dma(ep->dma);
  1126. else if (!ep->stopped) {
  1127. /* resume current request, or start new one */
  1128. if (req)
  1129. writel(dmactl, &ep->dma->dmactl);
  1130. else
  1131. start_dma(ep, list_entry(ep->queue.next,
  1132. struct net2280_request, queue));
  1133. }
  1134. }
  1135. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1136. return 0;
  1137. }
  1138. /*-------------------------------------------------------------------------*/
  1139. static int net2280_fifo_status(struct usb_ep *_ep);
  1140. static int
  1141. net2280_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedged)
  1142. {
  1143. struct net2280_ep *ep;
  1144. unsigned long flags;
  1145. int retval = 0;
  1146. ep = container_of(_ep, struct net2280_ep, ep);
  1147. if (!_ep || (!ep->desc && ep->num != 0)) {
  1148. pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
  1149. return -EINVAL;
  1150. }
  1151. if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) {
  1152. retval = -ESHUTDOWN;
  1153. goto print_err;
  1154. }
  1155. if (ep->desc /* not ep0 */ && (ep->desc->bmAttributes & 0x03)
  1156. == USB_ENDPOINT_XFER_ISOC) {
  1157. retval = -EINVAL;
  1158. goto print_err;
  1159. }
  1160. spin_lock_irqsave(&ep->dev->lock, flags);
  1161. if (!list_empty(&ep->queue)) {
  1162. retval = -EAGAIN;
  1163. goto print_unlock;
  1164. } else if (ep->is_in && value && net2280_fifo_status(_ep) != 0) {
  1165. retval = -EAGAIN;
  1166. goto print_unlock;
  1167. } else {
  1168. ep_vdbg(ep->dev, "%s %s %s\n", _ep->name,
  1169. value ? "set" : "clear",
  1170. wedged ? "wedge" : "halt");
  1171. /* set/clear, then synch memory views with the device */
  1172. if (value) {
  1173. if (ep->num == 0)
  1174. ep->dev->protocol_stall = 1;
  1175. else
  1176. set_halt(ep);
  1177. if (wedged)
  1178. ep->wedged = 1;
  1179. } else {
  1180. clear_halt(ep);
  1181. if (ep->dev->quirks & PLX_PCIE &&
  1182. !list_empty(&ep->queue) && ep->td_dma)
  1183. restart_dma(ep);
  1184. ep->wedged = 0;
  1185. }
  1186. (void) readl(&ep->regs->ep_rsp);
  1187. }
  1188. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1189. return retval;
  1190. print_unlock:
  1191. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1192. print_err:
  1193. dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, retval);
  1194. return retval;
  1195. }
  1196. static int net2280_set_halt(struct usb_ep *_ep, int value)
  1197. {
  1198. return net2280_set_halt_and_wedge(_ep, value, 0);
  1199. }
  1200. static int net2280_set_wedge(struct usb_ep *_ep)
  1201. {
  1202. if (!_ep || _ep->name == ep0name) {
  1203. pr_err("%s: Invalid ep=%p or ep0\n", __func__, _ep);
  1204. return -EINVAL;
  1205. }
  1206. return net2280_set_halt_and_wedge(_ep, 1, 1);
  1207. }
  1208. static int net2280_fifo_status(struct usb_ep *_ep)
  1209. {
  1210. struct net2280_ep *ep;
  1211. u32 avail;
  1212. ep = container_of(_ep, struct net2280_ep, ep);
  1213. if (!_ep || (!ep->desc && ep->num != 0)) {
  1214. pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
  1215. return -ENODEV;
  1216. }
  1217. if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) {
  1218. dev_err(&ep->dev->pdev->dev,
  1219. "%s: Invalid driver=%p or speed=%d\n",
  1220. __func__, ep->dev->driver, ep->dev->gadget.speed);
  1221. return -ESHUTDOWN;
  1222. }
  1223. avail = readl(&ep->regs->ep_avail) & (BIT(12) - 1);
  1224. if (avail > ep->fifo_size) {
  1225. dev_err(&ep->dev->pdev->dev, "%s: Fifo overflow\n", __func__);
  1226. return -EOVERFLOW;
  1227. }
  1228. if (ep->is_in)
  1229. avail = ep->fifo_size - avail;
  1230. return avail;
  1231. }
  1232. static void net2280_fifo_flush(struct usb_ep *_ep)
  1233. {
  1234. struct net2280_ep *ep;
  1235. ep = container_of(_ep, struct net2280_ep, ep);
  1236. if (!_ep || (!ep->desc && ep->num != 0)) {
  1237. pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
  1238. return;
  1239. }
  1240. if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) {
  1241. dev_err(&ep->dev->pdev->dev,
  1242. "%s: Invalid driver=%p or speed=%d\n",
  1243. __func__, ep->dev->driver, ep->dev->gadget.speed);
  1244. return;
  1245. }
  1246. writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat);
  1247. (void) readl(&ep->regs->ep_rsp);
  1248. }
  1249. static const struct usb_ep_ops net2280_ep_ops = {
  1250. .enable = net2280_enable,
  1251. .disable = net2280_disable,
  1252. .alloc_request = net2280_alloc_request,
  1253. .free_request = net2280_free_request,
  1254. .queue = net2280_queue,
  1255. .dequeue = net2280_dequeue,
  1256. .set_halt = net2280_set_halt,
  1257. .set_wedge = net2280_set_wedge,
  1258. .fifo_status = net2280_fifo_status,
  1259. .fifo_flush = net2280_fifo_flush,
  1260. };
  1261. /*-------------------------------------------------------------------------*/
  1262. static int net2280_get_frame(struct usb_gadget *_gadget)
  1263. {
  1264. struct net2280 *dev;
  1265. unsigned long flags;
  1266. u16 retval;
  1267. if (!_gadget)
  1268. return -ENODEV;
  1269. dev = container_of(_gadget, struct net2280, gadget);
  1270. spin_lock_irqsave(&dev->lock, flags);
  1271. retval = get_idx_reg(dev->regs, REG_FRAME) & 0x03ff;
  1272. spin_unlock_irqrestore(&dev->lock, flags);
  1273. return retval;
  1274. }
  1275. static int net2280_wakeup(struct usb_gadget *_gadget)
  1276. {
  1277. struct net2280 *dev;
  1278. u32 tmp;
  1279. unsigned long flags;
  1280. if (!_gadget)
  1281. return 0;
  1282. dev = container_of(_gadget, struct net2280, gadget);
  1283. spin_lock_irqsave(&dev->lock, flags);
  1284. tmp = readl(&dev->usb->usbctl);
  1285. if (tmp & BIT(DEVICE_REMOTE_WAKEUP_ENABLE))
  1286. writel(BIT(GENERATE_RESUME), &dev->usb->usbstat);
  1287. spin_unlock_irqrestore(&dev->lock, flags);
  1288. /* pci writes may still be posted */
  1289. return 0;
  1290. }
  1291. static int net2280_set_selfpowered(struct usb_gadget *_gadget, int value)
  1292. {
  1293. struct net2280 *dev;
  1294. u32 tmp;
  1295. unsigned long flags;
  1296. if (!_gadget)
  1297. return 0;
  1298. dev = container_of(_gadget, struct net2280, gadget);
  1299. spin_lock_irqsave(&dev->lock, flags);
  1300. tmp = readl(&dev->usb->usbctl);
  1301. if (value) {
  1302. tmp |= BIT(SELF_POWERED_STATUS);
  1303. _gadget->is_selfpowered = 1;
  1304. } else {
  1305. tmp &= ~BIT(SELF_POWERED_STATUS);
  1306. _gadget->is_selfpowered = 0;
  1307. }
  1308. writel(tmp, &dev->usb->usbctl);
  1309. spin_unlock_irqrestore(&dev->lock, flags);
  1310. return 0;
  1311. }
  1312. static int net2280_pullup(struct usb_gadget *_gadget, int is_on)
  1313. {
  1314. struct net2280 *dev;
  1315. u32 tmp;
  1316. unsigned long flags;
  1317. if (!_gadget)
  1318. return -ENODEV;
  1319. dev = container_of(_gadget, struct net2280, gadget);
  1320. spin_lock_irqsave(&dev->lock, flags);
  1321. tmp = readl(&dev->usb->usbctl);
  1322. dev->softconnect = (is_on != 0);
  1323. if (is_on) {
  1324. ep0_start(dev);
  1325. writel(tmp | BIT(USB_DETECT_ENABLE), &dev->usb->usbctl);
  1326. } else {
  1327. writel(tmp & ~BIT(USB_DETECT_ENABLE), &dev->usb->usbctl);
  1328. stop_activity(dev, NULL);
  1329. }
  1330. spin_unlock_irqrestore(&dev->lock, flags);
  1331. if (!is_on && dev->driver)
  1332. dev->driver->disconnect(&dev->gadget);
  1333. return 0;
  1334. }
  1335. static struct usb_ep *net2280_match_ep(struct usb_gadget *_gadget,
  1336. struct usb_endpoint_descriptor *desc,
  1337. struct usb_ss_ep_comp_descriptor *ep_comp)
  1338. {
  1339. char name[8];
  1340. struct usb_ep *ep;
  1341. if (usb_endpoint_type(desc) == USB_ENDPOINT_XFER_INT) {
  1342. /* ep-e, ep-f are PIO with only 64 byte fifos */
  1343. ep = gadget_find_ep_by_name(_gadget, "ep-e");
  1344. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1345. return ep;
  1346. ep = gadget_find_ep_by_name(_gadget, "ep-f");
  1347. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1348. return ep;
  1349. }
  1350. /* USB3380: Only first four endpoints have DMA channels. Allocate
  1351. * slower interrupt endpoints from PIO hw endpoints, to allow bulk/isoc
  1352. * endpoints use DMA hw endpoints.
  1353. */
  1354. if (usb_endpoint_type(desc) == USB_ENDPOINT_XFER_INT &&
  1355. usb_endpoint_dir_in(desc)) {
  1356. ep = gadget_find_ep_by_name(_gadget, "ep2in");
  1357. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1358. return ep;
  1359. ep = gadget_find_ep_by_name(_gadget, "ep4in");
  1360. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1361. return ep;
  1362. } else if (usb_endpoint_type(desc) == USB_ENDPOINT_XFER_INT &&
  1363. !usb_endpoint_dir_in(desc)) {
  1364. ep = gadget_find_ep_by_name(_gadget, "ep1out");
  1365. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1366. return ep;
  1367. ep = gadget_find_ep_by_name(_gadget, "ep3out");
  1368. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1369. return ep;
  1370. } else if (usb_endpoint_type(desc) != USB_ENDPOINT_XFER_BULK &&
  1371. usb_endpoint_dir_in(desc)) {
  1372. ep = gadget_find_ep_by_name(_gadget, "ep1in");
  1373. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1374. return ep;
  1375. ep = gadget_find_ep_by_name(_gadget, "ep3in");
  1376. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1377. return ep;
  1378. } else if (usb_endpoint_type(desc) != USB_ENDPOINT_XFER_BULK &&
  1379. !usb_endpoint_dir_in(desc)) {
  1380. ep = gadget_find_ep_by_name(_gadget, "ep2out");
  1381. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1382. return ep;
  1383. ep = gadget_find_ep_by_name(_gadget, "ep4out");
  1384. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1385. return ep;
  1386. }
  1387. /* USB3380: use same address for usb and hardware endpoints */
  1388. snprintf(name, sizeof(name), "ep%d%s", usb_endpoint_num(desc),
  1389. usb_endpoint_dir_in(desc) ? "in" : "out");
  1390. ep = gadget_find_ep_by_name(_gadget, name);
  1391. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1392. return ep;
  1393. return NULL;
  1394. }
  1395. static int net2280_start(struct usb_gadget *_gadget,
  1396. struct usb_gadget_driver *driver);
  1397. static int net2280_stop(struct usb_gadget *_gadget);
  1398. static const struct usb_gadget_ops net2280_ops = {
  1399. .get_frame = net2280_get_frame,
  1400. .wakeup = net2280_wakeup,
  1401. .set_selfpowered = net2280_set_selfpowered,
  1402. .pullup = net2280_pullup,
  1403. .udc_start = net2280_start,
  1404. .udc_stop = net2280_stop,
  1405. .match_ep = net2280_match_ep,
  1406. };
  1407. /*-------------------------------------------------------------------------*/
  1408. #ifdef CONFIG_USB_GADGET_DEBUG_FILES
  1409. /* FIXME move these into procfs, and use seq_file.
  1410. * Sysfs _still_ doesn't behave for arbitrarily sized files,
  1411. * and also doesn't help products using this with 2.4 kernels.
  1412. */
  1413. /* "function" sysfs attribute */
  1414. static ssize_t function_show(struct device *_dev, struct device_attribute *attr,
  1415. char *buf)
  1416. {
  1417. struct net2280 *dev = dev_get_drvdata(_dev);
  1418. if (!dev->driver || !dev->driver->function ||
  1419. strlen(dev->driver->function) > PAGE_SIZE)
  1420. return 0;
  1421. return scnprintf(buf, PAGE_SIZE, "%s\n", dev->driver->function);
  1422. }
  1423. static DEVICE_ATTR_RO(function);
  1424. static ssize_t registers_show(struct device *_dev,
  1425. struct device_attribute *attr, char *buf)
  1426. {
  1427. struct net2280 *dev;
  1428. char *next;
  1429. unsigned size, t;
  1430. unsigned long flags;
  1431. int i;
  1432. u32 t1, t2;
  1433. const char *s;
  1434. dev = dev_get_drvdata(_dev);
  1435. next = buf;
  1436. size = PAGE_SIZE;
  1437. spin_lock_irqsave(&dev->lock, flags);
  1438. if (dev->driver)
  1439. s = dev->driver->driver.name;
  1440. else
  1441. s = "(none)";
  1442. /* Main Control Registers */
  1443. t = scnprintf(next, size, "%s version " DRIVER_VERSION
  1444. ", chiprev %04x\n\n"
  1445. "devinit %03x fifoctl %08x gadget '%s'\n"
  1446. "pci irqenb0 %02x irqenb1 %08x "
  1447. "irqstat0 %04x irqstat1 %08x\n",
  1448. driver_name, dev->chiprev,
  1449. readl(&dev->regs->devinit),
  1450. readl(&dev->regs->fifoctl),
  1451. s,
  1452. readl(&dev->regs->pciirqenb0),
  1453. readl(&dev->regs->pciirqenb1),
  1454. readl(&dev->regs->irqstat0),
  1455. readl(&dev->regs->irqstat1));
  1456. size -= t;
  1457. next += t;
  1458. /* USB Control Registers */
  1459. t1 = readl(&dev->usb->usbctl);
  1460. t2 = readl(&dev->usb->usbstat);
  1461. if (t1 & BIT(VBUS_PIN)) {
  1462. if (t2 & BIT(HIGH_SPEED))
  1463. s = "high speed";
  1464. else if (dev->gadget.speed == USB_SPEED_UNKNOWN)
  1465. s = "powered";
  1466. else
  1467. s = "full speed";
  1468. /* full speed bit (6) not working?? */
  1469. } else
  1470. s = "not attached";
  1471. t = scnprintf(next, size,
  1472. "stdrsp %08x usbctl %08x usbstat %08x "
  1473. "addr 0x%02x (%s)\n",
  1474. readl(&dev->usb->stdrsp), t1, t2,
  1475. readl(&dev->usb->ouraddr), s);
  1476. size -= t;
  1477. next += t;
  1478. /* PCI Master Control Registers */
  1479. /* DMA Control Registers */
  1480. /* Configurable EP Control Registers */
  1481. for (i = 0; i < dev->n_ep; i++) {
  1482. struct net2280_ep *ep;
  1483. ep = &dev->ep[i];
  1484. if (i && !ep->desc)
  1485. continue;
  1486. t1 = readl(&ep->cfg->ep_cfg);
  1487. t2 = readl(&ep->regs->ep_rsp) & 0xff;
  1488. t = scnprintf(next, size,
  1489. "\n%s\tcfg %05x rsp (%02x) %s%s%s%s%s%s%s%s"
  1490. "irqenb %02x\n",
  1491. ep->ep.name, t1, t2,
  1492. (t2 & BIT(CLEAR_NAK_OUT_PACKETS))
  1493. ? "NAK " : "",
  1494. (t2 & BIT(CLEAR_EP_HIDE_STATUS_PHASE))
  1495. ? "hide " : "",
  1496. (t2 & BIT(CLEAR_EP_FORCE_CRC_ERROR))
  1497. ? "CRC " : "",
  1498. (t2 & BIT(CLEAR_INTERRUPT_MODE))
  1499. ? "interrupt " : "",
  1500. (t2 & BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE))
  1501. ? "status " : "",
  1502. (t2 & BIT(CLEAR_NAK_OUT_PACKETS_MODE))
  1503. ? "NAKmode " : "",
  1504. (t2 & BIT(CLEAR_ENDPOINT_TOGGLE))
  1505. ? "DATA1 " : "DATA0 ",
  1506. (t2 & BIT(CLEAR_ENDPOINT_HALT))
  1507. ? "HALT " : "",
  1508. readl(&ep->regs->ep_irqenb));
  1509. size -= t;
  1510. next += t;
  1511. t = scnprintf(next, size,
  1512. "\tstat %08x avail %04x "
  1513. "(ep%d%s-%s)%s\n",
  1514. readl(&ep->regs->ep_stat),
  1515. readl(&ep->regs->ep_avail),
  1516. t1 & 0x0f, DIR_STRING(t1),
  1517. type_string(t1 >> 8),
  1518. ep->stopped ? "*" : "");
  1519. size -= t;
  1520. next += t;
  1521. if (!ep->dma)
  1522. continue;
  1523. t = scnprintf(next, size,
  1524. " dma\tctl %08x stat %08x count %08x\n"
  1525. "\taddr %08x desc %08x\n",
  1526. readl(&ep->dma->dmactl),
  1527. readl(&ep->dma->dmastat),
  1528. readl(&ep->dma->dmacount),
  1529. readl(&ep->dma->dmaaddr),
  1530. readl(&ep->dma->dmadesc));
  1531. size -= t;
  1532. next += t;
  1533. }
  1534. /* Indexed Registers (none yet) */
  1535. /* Statistics */
  1536. t = scnprintf(next, size, "\nirqs: ");
  1537. size -= t;
  1538. next += t;
  1539. for (i = 0; i < dev->n_ep; i++) {
  1540. struct net2280_ep *ep;
  1541. ep = &dev->ep[i];
  1542. if (i && !ep->irqs)
  1543. continue;
  1544. t = scnprintf(next, size, " %s/%lu", ep->ep.name, ep->irqs);
  1545. size -= t;
  1546. next += t;
  1547. }
  1548. t = scnprintf(next, size, "\n");
  1549. size -= t;
  1550. next += t;
  1551. spin_unlock_irqrestore(&dev->lock, flags);
  1552. return PAGE_SIZE - size;
  1553. }
  1554. static DEVICE_ATTR_RO(registers);
  1555. static ssize_t queues_show(struct device *_dev, struct device_attribute *attr,
  1556. char *buf)
  1557. {
  1558. struct net2280 *dev;
  1559. char *next;
  1560. unsigned size;
  1561. unsigned long flags;
  1562. int i;
  1563. dev = dev_get_drvdata(_dev);
  1564. next = buf;
  1565. size = PAGE_SIZE;
  1566. spin_lock_irqsave(&dev->lock, flags);
  1567. for (i = 0; i < dev->n_ep; i++) {
  1568. struct net2280_ep *ep = &dev->ep[i];
  1569. struct net2280_request *req;
  1570. int t;
  1571. if (i != 0) {
  1572. const struct usb_endpoint_descriptor *d;
  1573. d = ep->desc;
  1574. if (!d)
  1575. continue;
  1576. t = d->bEndpointAddress;
  1577. t = scnprintf(next, size,
  1578. "\n%s (ep%d%s-%s) max %04x %s fifo %d\n",
  1579. ep->ep.name, t & USB_ENDPOINT_NUMBER_MASK,
  1580. (t & USB_DIR_IN) ? "in" : "out",
  1581. type_string(d->bmAttributes),
  1582. usb_endpoint_maxp(d),
  1583. ep->dma ? "dma" : "pio", ep->fifo_size
  1584. );
  1585. } else /* ep0 should only have one transfer queued */
  1586. t = scnprintf(next, size, "ep0 max 64 pio %s\n",
  1587. ep->is_in ? "in" : "out");
  1588. if (t <= 0 || t > size)
  1589. goto done;
  1590. size -= t;
  1591. next += t;
  1592. if (list_empty(&ep->queue)) {
  1593. t = scnprintf(next, size, "\t(nothing queued)\n");
  1594. if (t <= 0 || t > size)
  1595. goto done;
  1596. size -= t;
  1597. next += t;
  1598. continue;
  1599. }
  1600. list_for_each_entry(req, &ep->queue, queue) {
  1601. if (ep->dma && req->td_dma == readl(&ep->dma->dmadesc))
  1602. t = scnprintf(next, size,
  1603. "\treq %p len %d/%d "
  1604. "buf %p (dmacount %08x)\n",
  1605. &req->req, req->req.actual,
  1606. req->req.length, req->req.buf,
  1607. readl(&ep->dma->dmacount));
  1608. else
  1609. t = scnprintf(next, size,
  1610. "\treq %p len %d/%d buf %p\n",
  1611. &req->req, req->req.actual,
  1612. req->req.length, req->req.buf);
  1613. if (t <= 0 || t > size)
  1614. goto done;
  1615. size -= t;
  1616. next += t;
  1617. if (ep->dma) {
  1618. struct net2280_dma *td;
  1619. td = req->td;
  1620. t = scnprintf(next, size, "\t td %08x "
  1621. " count %08x buf %08x desc %08x\n",
  1622. (u32) req->td_dma,
  1623. le32_to_cpu(td->dmacount),
  1624. le32_to_cpu(td->dmaaddr),
  1625. le32_to_cpu(td->dmadesc));
  1626. if (t <= 0 || t > size)
  1627. goto done;
  1628. size -= t;
  1629. next += t;
  1630. }
  1631. }
  1632. }
  1633. done:
  1634. spin_unlock_irqrestore(&dev->lock, flags);
  1635. return PAGE_SIZE - size;
  1636. }
  1637. static DEVICE_ATTR_RO(queues);
  1638. #else
  1639. #define device_create_file(a, b) (0)
  1640. #define device_remove_file(a, b) do { } while (0)
  1641. #endif
  1642. /*-------------------------------------------------------------------------*/
  1643. /* another driver-specific mode might be a request type doing dma
  1644. * to/from another device fifo instead of to/from memory.
  1645. */
  1646. static void set_fifo_mode(struct net2280 *dev, int mode)
  1647. {
  1648. /* keeping high bits preserves BAR2 */
  1649. writel((0xffff << PCI_BASE2_RANGE) | mode, &dev->regs->fifoctl);
  1650. /* always ep-{a,b,e,f} ... maybe not ep-c or ep-d */
  1651. INIT_LIST_HEAD(&dev->gadget.ep_list);
  1652. list_add_tail(&dev->ep[1].ep.ep_list, &dev->gadget.ep_list);
  1653. list_add_tail(&dev->ep[2].ep.ep_list, &dev->gadget.ep_list);
  1654. switch (mode) {
  1655. case 0:
  1656. list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list);
  1657. list_add_tail(&dev->ep[4].ep.ep_list, &dev->gadget.ep_list);
  1658. dev->ep[1].fifo_size = dev->ep[2].fifo_size = 1024;
  1659. break;
  1660. case 1:
  1661. dev->ep[1].fifo_size = dev->ep[2].fifo_size = 2048;
  1662. break;
  1663. case 2:
  1664. list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list);
  1665. dev->ep[1].fifo_size = 2048;
  1666. dev->ep[2].fifo_size = 1024;
  1667. break;
  1668. }
  1669. /* fifo sizes for ep0, ep-c, ep-d, ep-e, and ep-f never change */
  1670. list_add_tail(&dev->ep[5].ep.ep_list, &dev->gadget.ep_list);
  1671. list_add_tail(&dev->ep[6].ep.ep_list, &dev->gadget.ep_list);
  1672. }
  1673. static void defect7374_disable_data_eps(struct net2280 *dev)
  1674. {
  1675. /*
  1676. * For Defect 7374, disable data EPs (and more):
  1677. * - This phase undoes the earlier phase of the Defect 7374 workaround,
  1678. * returing ep regs back to normal.
  1679. */
  1680. struct net2280_ep *ep;
  1681. int i;
  1682. unsigned char ep_sel;
  1683. u32 tmp_reg;
  1684. for (i = 1; i < 5; i++) {
  1685. ep = &dev->ep[i];
  1686. writel(i, &ep->cfg->ep_cfg);
  1687. }
  1688. /* CSROUT, CSRIN, PCIOUT, PCIIN, STATIN, RCIN */
  1689. for (i = 0; i < 6; i++)
  1690. writel(0, &dev->dep[i].dep_cfg);
  1691. for (ep_sel = 0; ep_sel <= 21; ep_sel++) {
  1692. /* Select an endpoint for subsequent operations: */
  1693. tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
  1694. writel(((tmp_reg & ~0x1f) | ep_sel), &dev->plregs->pl_ep_ctrl);
  1695. if (ep_sel < 2 || (ep_sel > 9 && ep_sel < 14) ||
  1696. ep_sel == 18 || ep_sel == 20)
  1697. continue;
  1698. /* Change settings on some selected endpoints */
  1699. tmp_reg = readl(&dev->plregs->pl_ep_cfg_4);
  1700. tmp_reg &= ~BIT(NON_CTRL_IN_TOLERATE_BAD_DIR);
  1701. writel(tmp_reg, &dev->plregs->pl_ep_cfg_4);
  1702. tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
  1703. tmp_reg |= BIT(EP_INITIALIZED);
  1704. writel(tmp_reg, &dev->plregs->pl_ep_ctrl);
  1705. }
  1706. }
  1707. static void defect7374_enable_data_eps_zero(struct net2280 *dev)
  1708. {
  1709. u32 tmp = 0, tmp_reg;
  1710. u32 scratch;
  1711. int i;
  1712. unsigned char ep_sel;
  1713. scratch = get_idx_reg(dev->regs, SCRATCH);
  1714. WARN_ON((scratch & (0xf << DEFECT7374_FSM_FIELD))
  1715. == DEFECT7374_FSM_SS_CONTROL_READ);
  1716. scratch &= ~(0xf << DEFECT7374_FSM_FIELD);
  1717. ep_warn(dev, "Operate Defect 7374 workaround soft this time");
  1718. ep_warn(dev, "It will operate on cold-reboot and SS connect");
  1719. /*GPEPs:*/
  1720. tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_DIRECTION) |
  1721. (2 << OUT_ENDPOINT_TYPE) | (2 << IN_ENDPOINT_TYPE) |
  1722. ((dev->enhanced_mode) ?
  1723. BIT(OUT_ENDPOINT_ENABLE) | BIT(IN_ENDPOINT_ENABLE) :
  1724. BIT(ENDPOINT_ENABLE)));
  1725. for (i = 1; i < 5; i++)
  1726. writel(tmp, &dev->ep[i].cfg->ep_cfg);
  1727. /* CSRIN, PCIIN, STATIN, RCIN*/
  1728. tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_ENABLE));
  1729. writel(tmp, &dev->dep[1].dep_cfg);
  1730. writel(tmp, &dev->dep[3].dep_cfg);
  1731. writel(tmp, &dev->dep[4].dep_cfg);
  1732. writel(tmp, &dev->dep[5].dep_cfg);
  1733. /*Implemented for development and debug.
  1734. * Can be refined/tuned later.*/
  1735. for (ep_sel = 0; ep_sel <= 21; ep_sel++) {
  1736. /* Select an endpoint for subsequent operations: */
  1737. tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
  1738. writel(((tmp_reg & ~0x1f) | ep_sel),
  1739. &dev->plregs->pl_ep_ctrl);
  1740. if (ep_sel == 1) {
  1741. tmp =
  1742. (readl(&dev->plregs->pl_ep_ctrl) |
  1743. BIT(CLEAR_ACK_ERROR_CODE) | 0);
  1744. writel(tmp, &dev->plregs->pl_ep_ctrl);
  1745. continue;
  1746. }
  1747. if (ep_sel == 0 || (ep_sel > 9 && ep_sel < 14) ||
  1748. ep_sel == 18 || ep_sel == 20)
  1749. continue;
  1750. tmp = (readl(&dev->plregs->pl_ep_cfg_4) |
  1751. BIT(NON_CTRL_IN_TOLERATE_BAD_DIR) | 0);
  1752. writel(tmp, &dev->plregs->pl_ep_cfg_4);
  1753. tmp = readl(&dev->plregs->pl_ep_ctrl) &
  1754. ~BIT(EP_INITIALIZED);
  1755. writel(tmp, &dev->plregs->pl_ep_ctrl);
  1756. }
  1757. /* Set FSM to focus on the first Control Read:
  1758. * - Tip: Connection speed is known upon the first
  1759. * setup request.*/
  1760. scratch |= DEFECT7374_FSM_WAITING_FOR_CONTROL_READ;
  1761. set_idx_reg(dev->regs, SCRATCH, scratch);
  1762. }
  1763. /* keeping it simple:
  1764. * - one bus driver, initted first;
  1765. * - one function driver, initted second
  1766. *
  1767. * most of the work to support multiple net2280 controllers would
  1768. * be to associate this gadget driver (yes?) with all of them, or
  1769. * perhaps to bind specific drivers to specific devices.
  1770. */
  1771. static void usb_reset_228x(struct net2280 *dev)
  1772. {
  1773. u32 tmp;
  1774. dev->gadget.speed = USB_SPEED_UNKNOWN;
  1775. (void) readl(&dev->usb->usbctl);
  1776. net2280_led_init(dev);
  1777. /* disable automatic responses, and irqs */
  1778. writel(0, &dev->usb->stdrsp);
  1779. writel(0, &dev->regs->pciirqenb0);
  1780. writel(0, &dev->regs->pciirqenb1);
  1781. /* clear old dma and irq state */
  1782. for (tmp = 0; tmp < 4; tmp++) {
  1783. struct net2280_ep *ep = &dev->ep[tmp + 1];
  1784. if (ep->dma)
  1785. abort_dma(ep);
  1786. }
  1787. writel(~0, &dev->regs->irqstat0),
  1788. writel(~(u32)BIT(SUSPEND_REQUEST_INTERRUPT), &dev->regs->irqstat1),
  1789. /* reset, and enable pci */
  1790. tmp = readl(&dev->regs->devinit) |
  1791. BIT(PCI_ENABLE) |
  1792. BIT(FIFO_SOFT_RESET) |
  1793. BIT(USB_SOFT_RESET) |
  1794. BIT(M8051_RESET);
  1795. writel(tmp, &dev->regs->devinit);
  1796. /* standard fifo and endpoint allocations */
  1797. set_fifo_mode(dev, (fifo_mode <= 2) ? fifo_mode : 0);
  1798. }
  1799. static void usb_reset_338x(struct net2280 *dev)
  1800. {
  1801. u32 tmp;
  1802. dev->gadget.speed = USB_SPEED_UNKNOWN;
  1803. (void)readl(&dev->usb->usbctl);
  1804. net2280_led_init(dev);
  1805. if (dev->bug7734_patched) {
  1806. /* disable automatic responses, and irqs */
  1807. writel(0, &dev->usb->stdrsp);
  1808. writel(0, &dev->regs->pciirqenb0);
  1809. writel(0, &dev->regs->pciirqenb1);
  1810. }
  1811. /* clear old dma and irq state */
  1812. for (tmp = 0; tmp < 4; tmp++) {
  1813. struct net2280_ep *ep = &dev->ep[tmp + 1];
  1814. struct net2280_dma_regs __iomem *dma;
  1815. if (ep->dma) {
  1816. abort_dma(ep);
  1817. } else {
  1818. dma = &dev->dma[tmp];
  1819. writel(BIT(DMA_ABORT), &dma->dmastat);
  1820. writel(0, &dma->dmactl);
  1821. }
  1822. }
  1823. writel(~0, &dev->regs->irqstat0), writel(~0, &dev->regs->irqstat1);
  1824. if (dev->bug7734_patched) {
  1825. /* reset, and enable pci */
  1826. tmp = readl(&dev->regs->devinit) |
  1827. BIT(PCI_ENABLE) |
  1828. BIT(FIFO_SOFT_RESET) |
  1829. BIT(USB_SOFT_RESET) |
  1830. BIT(M8051_RESET);
  1831. writel(tmp, &dev->regs->devinit);
  1832. }
  1833. /* always ep-{1,2,3,4} ... maybe not ep-3 or ep-4 */
  1834. INIT_LIST_HEAD(&dev->gadget.ep_list);
  1835. for (tmp = 1; tmp < dev->n_ep; tmp++)
  1836. list_add_tail(&dev->ep[tmp].ep.ep_list, &dev->gadget.ep_list);
  1837. }
  1838. static void usb_reset(struct net2280 *dev)
  1839. {
  1840. if (dev->quirks & PLX_LEGACY)
  1841. return usb_reset_228x(dev);
  1842. return usb_reset_338x(dev);
  1843. }
  1844. static void usb_reinit_228x(struct net2280 *dev)
  1845. {
  1846. u32 tmp;
  1847. /* basic endpoint init */
  1848. for (tmp = 0; tmp < 7; tmp++) {
  1849. struct net2280_ep *ep = &dev->ep[tmp];
  1850. ep->ep.name = ep_info_dft[tmp].name;
  1851. ep->ep.caps = ep_info_dft[tmp].caps;
  1852. ep->dev = dev;
  1853. ep->num = tmp;
  1854. if (tmp > 0 && tmp <= 4) {
  1855. ep->fifo_size = 1024;
  1856. ep->dma = &dev->dma[tmp - 1];
  1857. } else
  1858. ep->fifo_size = 64;
  1859. ep->regs = &dev->epregs[tmp];
  1860. ep->cfg = &dev->epregs[tmp];
  1861. ep_reset_228x(dev->regs, ep);
  1862. }
  1863. usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 64);
  1864. usb_ep_set_maxpacket_limit(&dev->ep[5].ep, 64);
  1865. usb_ep_set_maxpacket_limit(&dev->ep[6].ep, 64);
  1866. dev->gadget.ep0 = &dev->ep[0].ep;
  1867. dev->ep[0].stopped = 0;
  1868. INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
  1869. /* we want to prevent lowlevel/insecure access from the USB host,
  1870. * but erratum 0119 means this enable bit is ignored
  1871. */
  1872. for (tmp = 0; tmp < 5; tmp++)
  1873. writel(EP_DONTUSE, &dev->dep[tmp].dep_cfg);
  1874. }
  1875. static void usb_reinit_338x(struct net2280 *dev)
  1876. {
  1877. int i;
  1878. u32 tmp, val;
  1879. static const u32 ne[9] = { 0, 1, 2, 3, 4, 1, 2, 3, 4 };
  1880. static const u32 ep_reg_addr[9] = { 0x00, 0xC0, 0x00, 0xC0, 0x00,
  1881. 0x00, 0xC0, 0x00, 0xC0 };
  1882. /* basic endpoint init */
  1883. for (i = 0; i < dev->n_ep; i++) {
  1884. struct net2280_ep *ep = &dev->ep[i];
  1885. ep->ep.name = dev->enhanced_mode ? ep_info_adv[i].name :
  1886. ep_info_dft[i].name;
  1887. ep->ep.caps = dev->enhanced_mode ? ep_info_adv[i].caps :
  1888. ep_info_dft[i].caps;
  1889. ep->dev = dev;
  1890. ep->num = i;
  1891. if (i > 0 && i <= 4)
  1892. ep->dma = &dev->dma[i - 1];
  1893. if (dev->enhanced_mode) {
  1894. ep->cfg = &dev->epregs[ne[i]];
  1895. /*
  1896. * Set USB endpoint number, hardware allows same number
  1897. * in both directions.
  1898. */
  1899. if (i > 0 && i < 5)
  1900. writel(ne[i], &ep->cfg->ep_cfg);
  1901. ep->regs = (struct net2280_ep_regs __iomem *)
  1902. (((void __iomem *)&dev->epregs[ne[i]]) +
  1903. ep_reg_addr[i]);
  1904. } else {
  1905. ep->cfg = &dev->epregs[i];
  1906. ep->regs = &dev->epregs[i];
  1907. }
  1908. ep->fifo_size = (i != 0) ? 2048 : 512;
  1909. ep_reset_338x(dev->regs, ep);
  1910. }
  1911. usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 512);
  1912. dev->gadget.ep0 = &dev->ep[0].ep;
  1913. dev->ep[0].stopped = 0;
  1914. /* Link layer set up */
  1915. if (dev->bug7734_patched) {
  1916. tmp = readl(&dev->usb_ext->usbctl2) &
  1917. ~(BIT(U1_ENABLE) | BIT(U2_ENABLE) | BIT(LTM_ENABLE));
  1918. writel(tmp, &dev->usb_ext->usbctl2);
  1919. }
  1920. /* Hardware Defect and Workaround */
  1921. val = readl(&dev->ll_lfps_regs->ll_lfps_5);
  1922. val &= ~(0xf << TIMER_LFPS_6US);
  1923. val |= 0x5 << TIMER_LFPS_6US;
  1924. writel(val, &dev->ll_lfps_regs->ll_lfps_5);
  1925. val = readl(&dev->ll_lfps_regs->ll_lfps_6);
  1926. val &= ~(0xffff << TIMER_LFPS_80US);
  1927. val |= 0x0100 << TIMER_LFPS_80US;
  1928. writel(val, &dev->ll_lfps_regs->ll_lfps_6);
  1929. /*
  1930. * AA_AB Errata. Issue 4. Workaround for SuperSpeed USB
  1931. * Hot Reset Exit Handshake may Fail in Specific Case using
  1932. * Default Register Settings. Workaround for Enumeration test.
  1933. */
  1934. val = readl(&dev->ll_tsn_regs->ll_tsn_counters_2);
  1935. val &= ~(0x1f << HOT_TX_NORESET_TS2);
  1936. val |= 0x10 << HOT_TX_NORESET_TS2;
  1937. writel(val, &dev->ll_tsn_regs->ll_tsn_counters_2);
  1938. val = readl(&dev->ll_tsn_regs->ll_tsn_counters_3);
  1939. val &= ~(0x1f << HOT_RX_RESET_TS2);
  1940. val |= 0x3 << HOT_RX_RESET_TS2;
  1941. writel(val, &dev->ll_tsn_regs->ll_tsn_counters_3);
  1942. /*
  1943. * Set Recovery Idle to Recover bit:
  1944. * - On SS connections, setting Recovery Idle to Recover Fmw improves
  1945. * link robustness with various hosts and hubs.
  1946. * - It is safe to set for all connection speeds; all chip revisions.
  1947. * - R-M-W to leave other bits undisturbed.
  1948. * - Reference PLX TT-7372
  1949. */
  1950. val = readl(&dev->ll_chicken_reg->ll_tsn_chicken_bit);
  1951. val |= BIT(RECOVERY_IDLE_TO_RECOVER_FMW);
  1952. writel(val, &dev->ll_chicken_reg->ll_tsn_chicken_bit);
  1953. INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
  1954. /* disable dedicated endpoints */
  1955. writel(0x0D, &dev->dep[0].dep_cfg);
  1956. writel(0x0D, &dev->dep[1].dep_cfg);
  1957. writel(0x0E, &dev->dep[2].dep_cfg);
  1958. writel(0x0E, &dev->dep[3].dep_cfg);
  1959. writel(0x0F, &dev->dep[4].dep_cfg);
  1960. writel(0x0C, &dev->dep[5].dep_cfg);
  1961. }
  1962. static void usb_reinit(struct net2280 *dev)
  1963. {
  1964. if (dev->quirks & PLX_LEGACY)
  1965. return usb_reinit_228x(dev);
  1966. return usb_reinit_338x(dev);
  1967. }
  1968. static void ep0_start_228x(struct net2280 *dev)
  1969. {
  1970. writel(BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
  1971. BIT(CLEAR_NAK_OUT_PACKETS) |
  1972. BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE),
  1973. &dev->epregs[0].ep_rsp);
  1974. /*
  1975. * hardware optionally handles a bunch of standard requests
  1976. * that the API hides from drivers anyway. have it do so.
  1977. * endpoint status/features are handled in software, to
  1978. * help pass tests for some dubious behavior.
  1979. */
  1980. writel(BIT(SET_TEST_MODE) |
  1981. BIT(SET_ADDRESS) |
  1982. BIT(DEVICE_SET_CLEAR_DEVICE_REMOTE_WAKEUP) |
  1983. BIT(GET_DEVICE_STATUS) |
  1984. BIT(GET_INTERFACE_STATUS),
  1985. &dev->usb->stdrsp);
  1986. writel(BIT(USB_ROOT_PORT_WAKEUP_ENABLE) |
  1987. BIT(SELF_POWERED_USB_DEVICE) |
  1988. BIT(REMOTE_WAKEUP_SUPPORT) |
  1989. (dev->softconnect << USB_DETECT_ENABLE) |
  1990. BIT(SELF_POWERED_STATUS),
  1991. &dev->usb->usbctl);
  1992. /* enable irqs so we can see ep0 and general operation */
  1993. writel(BIT(SETUP_PACKET_INTERRUPT_ENABLE) |
  1994. BIT(ENDPOINT_0_INTERRUPT_ENABLE),
  1995. &dev->regs->pciirqenb0);
  1996. writel(BIT(PCI_INTERRUPT_ENABLE) |
  1997. BIT(PCI_MASTER_ABORT_RECEIVED_INTERRUPT_ENABLE) |
  1998. BIT(PCI_TARGET_ABORT_RECEIVED_INTERRUPT_ENABLE) |
  1999. BIT(PCI_RETRY_ABORT_INTERRUPT_ENABLE) |
  2000. BIT(VBUS_INTERRUPT_ENABLE) |
  2001. BIT(ROOT_PORT_RESET_INTERRUPT_ENABLE) |
  2002. BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE),
  2003. &dev->regs->pciirqenb1);
  2004. /* don't leave any writes posted */
  2005. (void) readl(&dev->usb->usbctl);
  2006. }
  2007. static void ep0_start_338x(struct net2280 *dev)
  2008. {
  2009. if (dev->bug7734_patched)
  2010. writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE) |
  2011. BIT(SET_EP_HIDE_STATUS_PHASE),
  2012. &dev->epregs[0].ep_rsp);
  2013. /*
  2014. * hardware optionally handles a bunch of standard requests
  2015. * that the API hides from drivers anyway. have it do so.
  2016. * endpoint status/features are handled in software, to
  2017. * help pass tests for some dubious behavior.
  2018. */
  2019. writel(BIT(SET_ISOCHRONOUS_DELAY) |
  2020. BIT(SET_SEL) |
  2021. BIT(SET_TEST_MODE) |
  2022. BIT(SET_ADDRESS) |
  2023. BIT(GET_INTERFACE_STATUS) |
  2024. BIT(GET_DEVICE_STATUS),
  2025. &dev->usb->stdrsp);
  2026. dev->wakeup_enable = 1;
  2027. writel(BIT(USB_ROOT_PORT_WAKEUP_ENABLE) |
  2028. (dev->softconnect << USB_DETECT_ENABLE) |
  2029. BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
  2030. &dev->usb->usbctl);
  2031. /* enable irqs so we can see ep0 and general operation */
  2032. writel(BIT(SETUP_PACKET_INTERRUPT_ENABLE) |
  2033. BIT(ENDPOINT_0_INTERRUPT_ENABLE),
  2034. &dev->regs->pciirqenb0);
  2035. writel(BIT(PCI_INTERRUPT_ENABLE) |
  2036. BIT(ROOT_PORT_RESET_INTERRUPT_ENABLE) |
  2037. BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE) |
  2038. BIT(VBUS_INTERRUPT_ENABLE),
  2039. &dev->regs->pciirqenb1);
  2040. /* don't leave any writes posted */
  2041. (void)readl(&dev->usb->usbctl);
  2042. }
  2043. static void ep0_start(struct net2280 *dev)
  2044. {
  2045. if (dev->quirks & PLX_LEGACY)
  2046. return ep0_start_228x(dev);
  2047. return ep0_start_338x(dev);
  2048. }
  2049. /* when a driver is successfully registered, it will receive
  2050. * control requests including set_configuration(), which enables
  2051. * non-control requests. then usb traffic follows until a
  2052. * disconnect is reported. then a host may connect again, or
  2053. * the driver might get unbound.
  2054. */
  2055. static int net2280_start(struct usb_gadget *_gadget,
  2056. struct usb_gadget_driver *driver)
  2057. {
  2058. struct net2280 *dev;
  2059. int retval;
  2060. unsigned i;
  2061. /* insist on high speed support from the driver, since
  2062. * (dev->usb->xcvrdiag & FORCE_FULL_SPEED_MODE)
  2063. * "must not be used in normal operation"
  2064. */
  2065. if (!driver || driver->max_speed < USB_SPEED_HIGH ||
  2066. !driver->setup)
  2067. return -EINVAL;
  2068. dev = container_of(_gadget, struct net2280, gadget);
  2069. for (i = 0; i < dev->n_ep; i++)
  2070. dev->ep[i].irqs = 0;
  2071. /* hook up the driver ... */
  2072. driver->driver.bus = NULL;
  2073. dev->driver = driver;
  2074. retval = device_create_file(&dev->pdev->dev, &dev_attr_function);
  2075. if (retval)
  2076. goto err_unbind;
  2077. retval = device_create_file(&dev->pdev->dev, &dev_attr_queues);
  2078. if (retval)
  2079. goto err_func;
  2080. /* enable host detection and ep0; and we're ready
  2081. * for set_configuration as well as eventual disconnect.
  2082. */
  2083. net2280_led_active(dev, 1);
  2084. if ((dev->quirks & PLX_PCIE) && !dev->bug7734_patched)
  2085. defect7374_enable_data_eps_zero(dev);
  2086. ep0_start(dev);
  2087. /* pci writes may still be posted */
  2088. return 0;
  2089. err_func:
  2090. device_remove_file(&dev->pdev->dev, &dev_attr_function);
  2091. err_unbind:
  2092. dev->driver = NULL;
  2093. return retval;
  2094. }
  2095. static void stop_activity(struct net2280 *dev, struct usb_gadget_driver *driver)
  2096. {
  2097. int i;
  2098. /* don't disconnect if it's not connected */
  2099. if (dev->gadget.speed == USB_SPEED_UNKNOWN)
  2100. driver = NULL;
  2101. /* stop hardware; prevent new request submissions;
  2102. * and kill any outstanding requests.
  2103. */
  2104. usb_reset(dev);
  2105. for (i = 0; i < dev->n_ep; i++)
  2106. nuke(&dev->ep[i]);
  2107. /* report disconnect; the driver is already quiesced */
  2108. if (driver) {
  2109. spin_unlock(&dev->lock);
  2110. driver->disconnect(&dev->gadget);
  2111. spin_lock(&dev->lock);
  2112. }
  2113. usb_reinit(dev);
  2114. }
  2115. static int net2280_stop(struct usb_gadget *_gadget)
  2116. {
  2117. struct net2280 *dev;
  2118. unsigned long flags;
  2119. dev = container_of(_gadget, struct net2280, gadget);
  2120. spin_lock_irqsave(&dev->lock, flags);
  2121. stop_activity(dev, NULL);
  2122. spin_unlock_irqrestore(&dev->lock, flags);
  2123. net2280_led_active(dev, 0);
  2124. device_remove_file(&dev->pdev->dev, &dev_attr_function);
  2125. device_remove_file(&dev->pdev->dev, &dev_attr_queues);
  2126. dev->driver = NULL;
  2127. return 0;
  2128. }
  2129. /*-------------------------------------------------------------------------*/
  2130. /* handle ep0, ep-e, ep-f with 64 byte packets: packet per irq.
  2131. * also works for dma-capable endpoints, in pio mode or just
  2132. * to manually advance the queue after short OUT transfers.
  2133. */
  2134. static void handle_ep_small(struct net2280_ep *ep)
  2135. {
  2136. struct net2280_request *req;
  2137. u32 t;
  2138. /* 0 error, 1 mid-data, 2 done */
  2139. int mode = 1;
  2140. if (!list_empty(&ep->queue))
  2141. req = list_entry(ep->queue.next,
  2142. struct net2280_request, queue);
  2143. else
  2144. req = NULL;
  2145. /* ack all, and handle what we care about */
  2146. t = readl(&ep->regs->ep_stat);
  2147. ep->irqs++;
  2148. ep_vdbg(ep->dev, "%s ack ep_stat %08x, req %p\n",
  2149. ep->ep.name, t, req ? &req->req : NULL);
  2150. if (!ep->is_in || (ep->dev->quirks & PLX_2280))
  2151. writel(t & ~BIT(NAK_OUT_PACKETS), &ep->regs->ep_stat);
  2152. else
  2153. /* Added for 2282 */
  2154. writel(t, &ep->regs->ep_stat);
  2155. /* for ep0, monitor token irqs to catch data stage length errors
  2156. * and to synchronize on status.
  2157. *
  2158. * also, to defer reporting of protocol stalls ... here's where
  2159. * data or status first appears, handling stalls here should never
  2160. * cause trouble on the host side..
  2161. *
  2162. * control requests could be slightly faster without token synch for
  2163. * status, but status can jam up that way.
  2164. */
  2165. if (unlikely(ep->num == 0)) {
  2166. if (ep->is_in) {
  2167. /* status; stop NAKing */
  2168. if (t & BIT(DATA_OUT_PING_TOKEN_INTERRUPT)) {
  2169. if (ep->dev->protocol_stall) {
  2170. ep->stopped = 1;
  2171. set_halt(ep);
  2172. }
  2173. if (!req)
  2174. allow_status(ep);
  2175. mode = 2;
  2176. /* reply to extra IN data tokens with a zlp */
  2177. } else if (t & BIT(DATA_IN_TOKEN_INTERRUPT)) {
  2178. if (ep->dev->protocol_stall) {
  2179. ep->stopped = 1;
  2180. set_halt(ep);
  2181. mode = 2;
  2182. } else if (ep->responded &&
  2183. !req && !ep->stopped)
  2184. write_fifo(ep, NULL);
  2185. }
  2186. } else {
  2187. /* status; stop NAKing */
  2188. if (t & BIT(DATA_IN_TOKEN_INTERRUPT)) {
  2189. if (ep->dev->protocol_stall) {
  2190. ep->stopped = 1;
  2191. set_halt(ep);
  2192. }
  2193. mode = 2;
  2194. /* an extra OUT token is an error */
  2195. } else if (((t & BIT(DATA_OUT_PING_TOKEN_INTERRUPT)) &&
  2196. req &&
  2197. req->req.actual == req->req.length) ||
  2198. (ep->responded && !req)) {
  2199. ep->dev->protocol_stall = 1;
  2200. set_halt(ep);
  2201. ep->stopped = 1;
  2202. if (req)
  2203. done(ep, req, -EOVERFLOW);
  2204. req = NULL;
  2205. }
  2206. }
  2207. }
  2208. if (unlikely(!req))
  2209. return;
  2210. /* manual DMA queue advance after short OUT */
  2211. if (likely(ep->dma)) {
  2212. if (t & BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT)) {
  2213. struct net2280_request *stuck_req = NULL;
  2214. int stopped = ep->stopped;
  2215. int num_completed;
  2216. int stuck = 0;
  2217. u32 count;
  2218. /* TRANSFERRED works around OUT_DONE erratum 0112.
  2219. * we expect (N <= maxpacket) bytes; host wrote M.
  2220. * iff (M < N) we won't ever see a DMA interrupt.
  2221. */
  2222. ep->stopped = 1;
  2223. for (count = 0; ; t = readl(&ep->regs->ep_stat)) {
  2224. /* any preceding dma transfers must finish.
  2225. * dma handles (M >= N), may empty the queue
  2226. */
  2227. num_completed = scan_dma_completions(ep);
  2228. if (unlikely(list_empty(&ep->queue) ||
  2229. ep->out_overflow)) {
  2230. req = NULL;
  2231. break;
  2232. }
  2233. req = list_entry(ep->queue.next,
  2234. struct net2280_request, queue);
  2235. /* here either (M < N), a "real" short rx;
  2236. * or (M == N) and the queue didn't empty
  2237. */
  2238. if (likely(t & BIT(FIFO_EMPTY))) {
  2239. count = readl(&ep->dma->dmacount);
  2240. count &= DMA_BYTE_COUNT_MASK;
  2241. if (readl(&ep->dma->dmadesc)
  2242. != req->td_dma)
  2243. req = NULL;
  2244. break;
  2245. }
  2246. /* Escape loop if no dma transfers completed
  2247. * after few retries.
  2248. */
  2249. if (num_completed == 0) {
  2250. if (stuck_req == req &&
  2251. readl(&ep->dma->dmadesc) !=
  2252. req->td_dma && stuck++ > 5) {
  2253. count = readl(
  2254. &ep->dma->dmacount);
  2255. count &= DMA_BYTE_COUNT_MASK;
  2256. req = NULL;
  2257. ep_dbg(ep->dev, "%s escape stuck %d, count %u\n",
  2258. ep->ep.name, stuck,
  2259. count);
  2260. break;
  2261. } else if (stuck_req != req) {
  2262. stuck_req = req;
  2263. stuck = 0;
  2264. }
  2265. } else {
  2266. stuck_req = NULL;
  2267. stuck = 0;
  2268. }
  2269. udelay(1);
  2270. }
  2271. /* stop DMA, leave ep NAKing */
  2272. writel(BIT(DMA_ABORT), &ep->dma->dmastat);
  2273. spin_stop_dma(ep->dma);
  2274. if (likely(req)) {
  2275. req->td->dmacount = 0;
  2276. t = readl(&ep->regs->ep_avail);
  2277. dma_done(ep, req, count,
  2278. (ep->out_overflow || t)
  2279. ? -EOVERFLOW : 0);
  2280. }
  2281. /* also flush to prevent erratum 0106 trouble */
  2282. if (unlikely(ep->out_overflow ||
  2283. (ep->dev->chiprev == 0x0100 &&
  2284. ep->dev->gadget.speed
  2285. == USB_SPEED_FULL))) {
  2286. out_flush(ep);
  2287. ep->out_overflow = 0;
  2288. }
  2289. /* (re)start dma if needed, stop NAKing */
  2290. ep->stopped = stopped;
  2291. if (!list_empty(&ep->queue))
  2292. restart_dma(ep);
  2293. } else
  2294. ep_dbg(ep->dev, "%s dma ep_stat %08x ??\n",
  2295. ep->ep.name, t);
  2296. return;
  2297. /* data packet(s) received (in the fifo, OUT) */
  2298. } else if (t & BIT(DATA_PACKET_RECEIVED_INTERRUPT)) {
  2299. if (read_fifo(ep, req) && ep->num != 0)
  2300. mode = 2;
  2301. /* data packet(s) transmitted (IN) */
  2302. } else if (t & BIT(DATA_PACKET_TRANSMITTED_INTERRUPT)) {
  2303. unsigned len;
  2304. len = req->req.length - req->req.actual;
  2305. if (len > ep->ep.maxpacket)
  2306. len = ep->ep.maxpacket;
  2307. req->req.actual += len;
  2308. /* if we wrote it all, we're usually done */
  2309. /* send zlps until the status stage */
  2310. if ((req->req.actual == req->req.length) &&
  2311. (!req->req.zero || len != ep->ep.maxpacket) && ep->num)
  2312. mode = 2;
  2313. /* there was nothing to do ... */
  2314. } else if (mode == 1)
  2315. return;
  2316. /* done */
  2317. if (mode == 2) {
  2318. /* stream endpoints often resubmit/unlink in completion */
  2319. done(ep, req, 0);
  2320. /* maybe advance queue to next request */
  2321. if (ep->num == 0) {
  2322. /* NOTE: net2280 could let gadget driver start the
  2323. * status stage later. since not all controllers let
  2324. * them control that, the api doesn't (yet) allow it.
  2325. */
  2326. if (!ep->stopped)
  2327. allow_status(ep);
  2328. req = NULL;
  2329. } else {
  2330. if (!list_empty(&ep->queue) && !ep->stopped)
  2331. req = list_entry(ep->queue.next,
  2332. struct net2280_request, queue);
  2333. else
  2334. req = NULL;
  2335. if (req && !ep->is_in)
  2336. stop_out_naking(ep);
  2337. }
  2338. }
  2339. /* is there a buffer for the next packet?
  2340. * for best streaming performance, make sure there is one.
  2341. */
  2342. if (req && !ep->stopped) {
  2343. /* load IN fifo with next packet (may be zlp) */
  2344. if (t & BIT(DATA_PACKET_TRANSMITTED_INTERRUPT))
  2345. write_fifo(ep, &req->req);
  2346. }
  2347. }
  2348. static struct net2280_ep *get_ep_by_addr(struct net2280 *dev, u16 wIndex)
  2349. {
  2350. struct net2280_ep *ep;
  2351. if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
  2352. return &dev->ep[0];
  2353. list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
  2354. u8 bEndpointAddress;
  2355. if (!ep->desc)
  2356. continue;
  2357. bEndpointAddress = ep->desc->bEndpointAddress;
  2358. if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
  2359. continue;
  2360. if ((wIndex & 0x0f) == (bEndpointAddress & 0x0f))
  2361. return ep;
  2362. }
  2363. return NULL;
  2364. }
  2365. static void defect7374_workaround(struct net2280 *dev, struct usb_ctrlrequest r)
  2366. {
  2367. u32 scratch, fsmvalue;
  2368. u32 ack_wait_timeout, state;
  2369. /* Workaround for Defect 7374 (U1/U2 erroneously rejected): */
  2370. scratch = get_idx_reg(dev->regs, SCRATCH);
  2371. fsmvalue = scratch & (0xf << DEFECT7374_FSM_FIELD);
  2372. scratch &= ~(0xf << DEFECT7374_FSM_FIELD);
  2373. if (!((fsmvalue == DEFECT7374_FSM_WAITING_FOR_CONTROL_READ) &&
  2374. (r.bRequestType & USB_DIR_IN)))
  2375. return;
  2376. /* This is the first Control Read for this connection: */
  2377. if (!(readl(&dev->usb->usbstat) & BIT(SUPER_SPEED_MODE))) {
  2378. /*
  2379. * Connection is NOT SS:
  2380. * - Connection must be FS or HS.
  2381. * - This FSM state should allow workaround software to
  2382. * run after the next USB connection.
  2383. */
  2384. scratch |= DEFECT7374_FSM_NON_SS_CONTROL_READ;
  2385. dev->bug7734_patched = 1;
  2386. goto restore_data_eps;
  2387. }
  2388. /* Connection is SS: */
  2389. for (ack_wait_timeout = 0;
  2390. ack_wait_timeout < DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS;
  2391. ack_wait_timeout++) {
  2392. state = readl(&dev->plregs->pl_ep_status_1)
  2393. & (0xff << STATE);
  2394. if ((state >= (ACK_GOOD_NORMAL << STATE)) &&
  2395. (state <= (ACK_GOOD_MORE_ACKS_TO_COME << STATE))) {
  2396. scratch |= DEFECT7374_FSM_SS_CONTROL_READ;
  2397. dev->bug7734_patched = 1;
  2398. break;
  2399. }
  2400. /*
  2401. * We have not yet received host's Data Phase ACK
  2402. * - Wait and try again.
  2403. */
  2404. udelay(DEFECT_7374_PROCESSOR_WAIT_TIME);
  2405. continue;
  2406. }
  2407. if (ack_wait_timeout >= DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS) {
  2408. ep_err(dev, "FAIL: Defect 7374 workaround waited but failed "
  2409. "to detect SS host's data phase ACK.");
  2410. ep_err(dev, "PL_EP_STATUS_1(23:16):.Expected from 0x11 to 0x16"
  2411. "got 0x%2.2x.\n", state >> STATE);
  2412. } else {
  2413. ep_warn(dev, "INFO: Defect 7374 workaround waited about\n"
  2414. "%duSec for Control Read Data Phase ACK\n",
  2415. DEFECT_7374_PROCESSOR_WAIT_TIME * ack_wait_timeout);
  2416. }
  2417. restore_data_eps:
  2418. /*
  2419. * Restore data EPs to their pre-workaround settings (disabled,
  2420. * initialized, and other details).
  2421. */
  2422. defect7374_disable_data_eps(dev);
  2423. set_idx_reg(dev->regs, SCRATCH, scratch);
  2424. return;
  2425. }
  2426. static void ep_clear_seqnum(struct net2280_ep *ep)
  2427. {
  2428. struct net2280 *dev = ep->dev;
  2429. u32 val;
  2430. static const u32 ep_pl[9] = { 0, 3, 4, 7, 8, 2, 5, 6, 9 };
  2431. val = readl(&dev->plregs->pl_ep_ctrl) & ~0x1f;
  2432. val |= ep_pl[ep->num];
  2433. writel(val, &dev->plregs->pl_ep_ctrl);
  2434. val |= BIT(SEQUENCE_NUMBER_RESET);
  2435. writel(val, &dev->plregs->pl_ep_ctrl);
  2436. return;
  2437. }
  2438. static void handle_stat0_irqs_superspeed(struct net2280 *dev,
  2439. struct net2280_ep *ep, struct usb_ctrlrequest r)
  2440. {
  2441. int tmp = 0;
  2442. #define w_value le16_to_cpu(r.wValue)
  2443. #define w_index le16_to_cpu(r.wIndex)
  2444. #define w_length le16_to_cpu(r.wLength)
  2445. switch (r.bRequest) {
  2446. struct net2280_ep *e;
  2447. u16 status;
  2448. case USB_REQ_SET_CONFIGURATION:
  2449. dev->addressed_state = !w_value;
  2450. goto usb3_delegate;
  2451. case USB_REQ_GET_STATUS:
  2452. switch (r.bRequestType) {
  2453. case (USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
  2454. status = dev->wakeup_enable ? 0x02 : 0x00;
  2455. if (dev->gadget.is_selfpowered)
  2456. status |= BIT(0);
  2457. status |= (dev->u1_enable << 2 | dev->u2_enable << 3 |
  2458. dev->ltm_enable << 4);
  2459. writel(0, &dev->epregs[0].ep_irqenb);
  2460. set_fifo_bytecount(ep, sizeof(status));
  2461. writel((__force u32) status, &dev->epregs[0].ep_data);
  2462. allow_status_338x(ep);
  2463. break;
  2464. case (USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
  2465. e = get_ep_by_addr(dev, w_index);
  2466. if (!e)
  2467. goto do_stall3;
  2468. status = readl(&e->regs->ep_rsp) &
  2469. BIT(CLEAR_ENDPOINT_HALT);
  2470. writel(0, &dev->epregs[0].ep_irqenb);
  2471. set_fifo_bytecount(ep, sizeof(status));
  2472. writel((__force u32) status, &dev->epregs[0].ep_data);
  2473. allow_status_338x(ep);
  2474. break;
  2475. default:
  2476. goto usb3_delegate;
  2477. }
  2478. break;
  2479. case USB_REQ_CLEAR_FEATURE:
  2480. switch (r.bRequestType) {
  2481. case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
  2482. if (!dev->addressed_state) {
  2483. switch (w_value) {
  2484. case USB_DEVICE_U1_ENABLE:
  2485. dev->u1_enable = 0;
  2486. writel(readl(&dev->usb_ext->usbctl2) &
  2487. ~BIT(U1_ENABLE),
  2488. &dev->usb_ext->usbctl2);
  2489. allow_status_338x(ep);
  2490. goto next_endpoints3;
  2491. case USB_DEVICE_U2_ENABLE:
  2492. dev->u2_enable = 0;
  2493. writel(readl(&dev->usb_ext->usbctl2) &
  2494. ~BIT(U2_ENABLE),
  2495. &dev->usb_ext->usbctl2);
  2496. allow_status_338x(ep);
  2497. goto next_endpoints3;
  2498. case USB_DEVICE_LTM_ENABLE:
  2499. dev->ltm_enable = 0;
  2500. writel(readl(&dev->usb_ext->usbctl2) &
  2501. ~BIT(LTM_ENABLE),
  2502. &dev->usb_ext->usbctl2);
  2503. allow_status_338x(ep);
  2504. goto next_endpoints3;
  2505. default:
  2506. break;
  2507. }
  2508. }
  2509. if (w_value == USB_DEVICE_REMOTE_WAKEUP) {
  2510. dev->wakeup_enable = 0;
  2511. writel(readl(&dev->usb->usbctl) &
  2512. ~BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
  2513. &dev->usb->usbctl);
  2514. allow_status_338x(ep);
  2515. break;
  2516. }
  2517. goto usb3_delegate;
  2518. case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
  2519. e = get_ep_by_addr(dev, w_index);
  2520. if (!e)
  2521. goto do_stall3;
  2522. if (w_value != USB_ENDPOINT_HALT)
  2523. goto do_stall3;
  2524. ep_vdbg(dev, "%s clear halt\n", e->ep.name);
  2525. /*
  2526. * Workaround for SS SeqNum not cleared via
  2527. * Endpoint Halt (Clear) bit. select endpoint
  2528. */
  2529. ep_clear_seqnum(e);
  2530. clear_halt(e);
  2531. if (!list_empty(&e->queue) && e->td_dma)
  2532. restart_dma(e);
  2533. allow_status(ep);
  2534. ep->stopped = 1;
  2535. break;
  2536. default:
  2537. goto usb3_delegate;
  2538. }
  2539. break;
  2540. case USB_REQ_SET_FEATURE:
  2541. switch (r.bRequestType) {
  2542. case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
  2543. if (!dev->addressed_state) {
  2544. switch (w_value) {
  2545. case USB_DEVICE_U1_ENABLE:
  2546. dev->u1_enable = 1;
  2547. writel(readl(&dev->usb_ext->usbctl2) |
  2548. BIT(U1_ENABLE),
  2549. &dev->usb_ext->usbctl2);
  2550. allow_status_338x(ep);
  2551. goto next_endpoints3;
  2552. case USB_DEVICE_U2_ENABLE:
  2553. dev->u2_enable = 1;
  2554. writel(readl(&dev->usb_ext->usbctl2) |
  2555. BIT(U2_ENABLE),
  2556. &dev->usb_ext->usbctl2);
  2557. allow_status_338x(ep);
  2558. goto next_endpoints3;
  2559. case USB_DEVICE_LTM_ENABLE:
  2560. dev->ltm_enable = 1;
  2561. writel(readl(&dev->usb_ext->usbctl2) |
  2562. BIT(LTM_ENABLE),
  2563. &dev->usb_ext->usbctl2);
  2564. allow_status_338x(ep);
  2565. goto next_endpoints3;
  2566. default:
  2567. break;
  2568. }
  2569. }
  2570. if (w_value == USB_DEVICE_REMOTE_WAKEUP) {
  2571. dev->wakeup_enable = 1;
  2572. writel(readl(&dev->usb->usbctl) |
  2573. BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
  2574. &dev->usb->usbctl);
  2575. allow_status_338x(ep);
  2576. break;
  2577. }
  2578. goto usb3_delegate;
  2579. case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
  2580. e = get_ep_by_addr(dev, w_index);
  2581. if (!e || (w_value != USB_ENDPOINT_HALT))
  2582. goto do_stall3;
  2583. ep->stopped = 1;
  2584. if (ep->num == 0)
  2585. ep->dev->protocol_stall = 1;
  2586. else {
  2587. if (ep->dma)
  2588. abort_dma(ep);
  2589. set_halt(ep);
  2590. }
  2591. allow_status_338x(ep);
  2592. break;
  2593. default:
  2594. goto usb3_delegate;
  2595. }
  2596. break;
  2597. default:
  2598. usb3_delegate:
  2599. ep_vdbg(dev, "setup %02x.%02x v%04x i%04x l%04x ep_cfg %08x\n",
  2600. r.bRequestType, r.bRequest,
  2601. w_value, w_index, w_length,
  2602. readl(&ep->cfg->ep_cfg));
  2603. ep->responded = 0;
  2604. spin_unlock(&dev->lock);
  2605. tmp = dev->driver->setup(&dev->gadget, &r);
  2606. spin_lock(&dev->lock);
  2607. }
  2608. do_stall3:
  2609. if (tmp < 0) {
  2610. ep_vdbg(dev, "req %02x.%02x protocol STALL; stat %d\n",
  2611. r.bRequestType, r.bRequest, tmp);
  2612. dev->protocol_stall = 1;
  2613. /* TD 9.9 Halt Endpoint test. TD 9.22 Set feature test */
  2614. set_halt(ep);
  2615. }
  2616. next_endpoints3:
  2617. #undef w_value
  2618. #undef w_index
  2619. #undef w_length
  2620. return;
  2621. }
  2622. static void usb338x_handle_ep_intr(struct net2280 *dev, u32 stat0)
  2623. {
  2624. u32 index;
  2625. u32 bit;
  2626. for (index = 0; index < ARRAY_SIZE(ep_bit); index++) {
  2627. bit = BIT(ep_bit[index]);
  2628. if (!stat0)
  2629. break;
  2630. if (!(stat0 & bit))
  2631. continue;
  2632. stat0 &= ~bit;
  2633. handle_ep_small(&dev->ep[index]);
  2634. }
  2635. }
  2636. static void handle_stat0_irqs(struct net2280 *dev, u32 stat)
  2637. {
  2638. struct net2280_ep *ep;
  2639. u32 num, scratch;
  2640. /* most of these don't need individual acks */
  2641. stat &= ~BIT(INTA_ASSERTED);
  2642. if (!stat)
  2643. return;
  2644. /* ep_dbg(dev, "irqstat0 %04x\n", stat); */
  2645. /* starting a control request? */
  2646. if (unlikely(stat & BIT(SETUP_PACKET_INTERRUPT))) {
  2647. union {
  2648. u32 raw[2];
  2649. struct usb_ctrlrequest r;
  2650. } u;
  2651. int tmp;
  2652. struct net2280_request *req;
  2653. if (dev->gadget.speed == USB_SPEED_UNKNOWN) {
  2654. u32 val = readl(&dev->usb->usbstat);
  2655. if (val & BIT(SUPER_SPEED)) {
  2656. dev->gadget.speed = USB_SPEED_SUPER;
  2657. usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
  2658. EP0_SS_MAX_PACKET_SIZE);
  2659. } else if (val & BIT(HIGH_SPEED)) {
  2660. dev->gadget.speed = USB_SPEED_HIGH;
  2661. usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
  2662. EP0_HS_MAX_PACKET_SIZE);
  2663. } else {
  2664. dev->gadget.speed = USB_SPEED_FULL;
  2665. usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
  2666. EP0_HS_MAX_PACKET_SIZE);
  2667. }
  2668. net2280_led_speed(dev, dev->gadget.speed);
  2669. ep_dbg(dev, "%s\n",
  2670. usb_speed_string(dev->gadget.speed));
  2671. }
  2672. ep = &dev->ep[0];
  2673. ep->irqs++;
  2674. /* make sure any leftover request state is cleared */
  2675. stat &= ~BIT(ENDPOINT_0_INTERRUPT);
  2676. while (!list_empty(&ep->queue)) {
  2677. req = list_entry(ep->queue.next,
  2678. struct net2280_request, queue);
  2679. done(ep, req, (req->req.actual == req->req.length)
  2680. ? 0 : -EPROTO);
  2681. }
  2682. ep->stopped = 0;
  2683. dev->protocol_stall = 0;
  2684. if (!(dev->quirks & PLX_PCIE)) {
  2685. if (ep->dev->quirks & PLX_2280)
  2686. tmp = BIT(FIFO_OVERFLOW) |
  2687. BIT(FIFO_UNDERFLOW);
  2688. else
  2689. tmp = 0;
  2690. writel(tmp | BIT(TIMEOUT) |
  2691. BIT(USB_STALL_SENT) |
  2692. BIT(USB_IN_NAK_SENT) |
  2693. BIT(USB_IN_ACK_RCVD) |
  2694. BIT(USB_OUT_PING_NAK_SENT) |
  2695. BIT(USB_OUT_ACK_SENT) |
  2696. BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
  2697. BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
  2698. BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
  2699. BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
  2700. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  2701. BIT(DATA_IN_TOKEN_INTERRUPT),
  2702. &ep->regs->ep_stat);
  2703. }
  2704. u.raw[0] = readl(&dev->usb->setup0123);
  2705. u.raw[1] = readl(&dev->usb->setup4567);
  2706. cpu_to_le32s(&u.raw[0]);
  2707. cpu_to_le32s(&u.raw[1]);
  2708. if ((dev->quirks & PLX_PCIE) && !dev->bug7734_patched)
  2709. defect7374_workaround(dev, u.r);
  2710. tmp = 0;
  2711. #define w_value le16_to_cpu(u.r.wValue)
  2712. #define w_index le16_to_cpu(u.r.wIndex)
  2713. #define w_length le16_to_cpu(u.r.wLength)
  2714. /* ack the irq */
  2715. writel(BIT(SETUP_PACKET_INTERRUPT), &dev->regs->irqstat0);
  2716. stat ^= BIT(SETUP_PACKET_INTERRUPT);
  2717. /* watch control traffic at the token level, and force
  2718. * synchronization before letting the status stage happen.
  2719. * FIXME ignore tokens we'll NAK, until driver responds.
  2720. * that'll mean a lot less irqs for some drivers.
  2721. */
  2722. ep->is_in = (u.r.bRequestType & USB_DIR_IN) != 0;
  2723. if (ep->is_in) {
  2724. scratch = BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
  2725. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  2726. BIT(DATA_IN_TOKEN_INTERRUPT);
  2727. stop_out_naking(ep);
  2728. } else
  2729. scratch = BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
  2730. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  2731. BIT(DATA_IN_TOKEN_INTERRUPT);
  2732. writel(scratch, &dev->epregs[0].ep_irqenb);
  2733. /* we made the hardware handle most lowlevel requests;
  2734. * everything else goes uplevel to the gadget code.
  2735. */
  2736. ep->responded = 1;
  2737. if (dev->gadget.speed == USB_SPEED_SUPER) {
  2738. handle_stat0_irqs_superspeed(dev, ep, u.r);
  2739. goto next_endpoints;
  2740. }
  2741. switch (u.r.bRequest) {
  2742. case USB_REQ_GET_STATUS: {
  2743. struct net2280_ep *e;
  2744. __le32 status;
  2745. /* hw handles device and interface status */
  2746. if (u.r.bRequestType != (USB_DIR_IN|USB_RECIP_ENDPOINT))
  2747. goto delegate;
  2748. e = get_ep_by_addr(dev, w_index);
  2749. if (!e || w_length > 2)
  2750. goto do_stall;
  2751. if (readl(&e->regs->ep_rsp) & BIT(SET_ENDPOINT_HALT))
  2752. status = cpu_to_le32(1);
  2753. else
  2754. status = cpu_to_le32(0);
  2755. /* don't bother with a request object! */
  2756. writel(0, &dev->epregs[0].ep_irqenb);
  2757. set_fifo_bytecount(ep, w_length);
  2758. writel((__force u32)status, &dev->epregs[0].ep_data);
  2759. allow_status(ep);
  2760. ep_vdbg(dev, "%s stat %02x\n", ep->ep.name, status);
  2761. goto next_endpoints;
  2762. }
  2763. break;
  2764. case USB_REQ_CLEAR_FEATURE: {
  2765. struct net2280_ep *e;
  2766. /* hw handles device features */
  2767. if (u.r.bRequestType != USB_RECIP_ENDPOINT)
  2768. goto delegate;
  2769. if (w_value != USB_ENDPOINT_HALT || w_length != 0)
  2770. goto do_stall;
  2771. e = get_ep_by_addr(dev, w_index);
  2772. if (!e)
  2773. goto do_stall;
  2774. if (e->wedged) {
  2775. ep_vdbg(dev, "%s wedged, halt not cleared\n",
  2776. ep->ep.name);
  2777. } else {
  2778. ep_vdbg(dev, "%s clear halt\n", e->ep.name);
  2779. clear_halt(e);
  2780. if ((ep->dev->quirks & PLX_PCIE) &&
  2781. !list_empty(&e->queue) && e->td_dma)
  2782. restart_dma(e);
  2783. }
  2784. allow_status(ep);
  2785. goto next_endpoints;
  2786. }
  2787. break;
  2788. case USB_REQ_SET_FEATURE: {
  2789. struct net2280_ep *e;
  2790. /* hw handles device features */
  2791. if (u.r.bRequestType != USB_RECIP_ENDPOINT)
  2792. goto delegate;
  2793. if (w_value != USB_ENDPOINT_HALT || w_length != 0)
  2794. goto do_stall;
  2795. e = get_ep_by_addr(dev, w_index);
  2796. if (!e)
  2797. goto do_stall;
  2798. if (e->ep.name == ep0name)
  2799. goto do_stall;
  2800. set_halt(e);
  2801. if ((dev->quirks & PLX_PCIE) && e->dma)
  2802. abort_dma(e);
  2803. allow_status(ep);
  2804. ep_vdbg(dev, "%s set halt\n", ep->ep.name);
  2805. goto next_endpoints;
  2806. }
  2807. break;
  2808. default:
  2809. delegate:
  2810. ep_vdbg(dev, "setup %02x.%02x v%04x i%04x l%04x "
  2811. "ep_cfg %08x\n",
  2812. u.r.bRequestType, u.r.bRequest,
  2813. w_value, w_index, w_length,
  2814. readl(&ep->cfg->ep_cfg));
  2815. ep->responded = 0;
  2816. spin_unlock(&dev->lock);
  2817. tmp = dev->driver->setup(&dev->gadget, &u.r);
  2818. spin_lock(&dev->lock);
  2819. }
  2820. /* stall ep0 on error */
  2821. if (tmp < 0) {
  2822. do_stall:
  2823. ep_vdbg(dev, "req %02x.%02x protocol STALL; stat %d\n",
  2824. u.r.bRequestType, u.r.bRequest, tmp);
  2825. dev->protocol_stall = 1;
  2826. }
  2827. /* some in/out token irq should follow; maybe stall then.
  2828. * driver must queue a request (even zlp) or halt ep0
  2829. * before the host times out.
  2830. */
  2831. }
  2832. #undef w_value
  2833. #undef w_index
  2834. #undef w_length
  2835. next_endpoints:
  2836. if ((dev->quirks & PLX_PCIE) && dev->enhanced_mode) {
  2837. u32 mask = (BIT(ENDPOINT_0_INTERRUPT) |
  2838. USB3380_IRQSTAT0_EP_INTR_MASK_IN |
  2839. USB3380_IRQSTAT0_EP_INTR_MASK_OUT);
  2840. if (stat & mask) {
  2841. usb338x_handle_ep_intr(dev, stat & mask);
  2842. stat &= ~mask;
  2843. }
  2844. } else {
  2845. /* endpoint data irq ? */
  2846. scratch = stat & 0x7f;
  2847. stat &= ~0x7f;
  2848. for (num = 0; scratch; num++) {
  2849. u32 t;
  2850. /* do this endpoint's FIFO and queue need tending? */
  2851. t = BIT(num);
  2852. if ((scratch & t) == 0)
  2853. continue;
  2854. scratch ^= t;
  2855. ep = &dev->ep[num];
  2856. handle_ep_small(ep);
  2857. }
  2858. }
  2859. if (stat)
  2860. ep_dbg(dev, "unhandled irqstat0 %08x\n", stat);
  2861. }
  2862. #define DMA_INTERRUPTS (BIT(DMA_D_INTERRUPT) | \
  2863. BIT(DMA_C_INTERRUPT) | \
  2864. BIT(DMA_B_INTERRUPT) | \
  2865. BIT(DMA_A_INTERRUPT))
  2866. #define PCI_ERROR_INTERRUPTS ( \
  2867. BIT(PCI_MASTER_ABORT_RECEIVED_INTERRUPT) | \
  2868. BIT(PCI_TARGET_ABORT_RECEIVED_INTERRUPT) | \
  2869. BIT(PCI_RETRY_ABORT_INTERRUPT))
  2870. static void handle_stat1_irqs(struct net2280 *dev, u32 stat)
  2871. __releases(dev->lock)
  2872. __acquires(dev->lock)
  2873. {
  2874. struct net2280_ep *ep;
  2875. u32 tmp, num, mask, scratch;
  2876. /* after disconnect there's nothing else to do! */
  2877. tmp = BIT(VBUS_INTERRUPT) | BIT(ROOT_PORT_RESET_INTERRUPT);
  2878. mask = BIT(SUPER_SPEED) | BIT(HIGH_SPEED) | BIT(FULL_SPEED);
  2879. /* VBUS disconnect is indicated by VBUS_PIN and VBUS_INTERRUPT set.
  2880. * Root Port Reset is indicated by ROOT_PORT_RESET_INTERRUPT set and
  2881. * both HIGH_SPEED and FULL_SPEED clear (as ROOT_PORT_RESET_INTERRUPT
  2882. * only indicates a change in the reset state).
  2883. */
  2884. if (stat & tmp) {
  2885. bool reset = false;
  2886. bool disconnect = false;
  2887. /*
  2888. * Ignore disconnects and resets if the speed hasn't been set.
  2889. * VBUS can bounce and there's always an initial reset.
  2890. */
  2891. writel(tmp, &dev->regs->irqstat1);
  2892. if (dev->gadget.speed != USB_SPEED_UNKNOWN) {
  2893. if ((stat & BIT(VBUS_INTERRUPT)) &&
  2894. (readl(&dev->usb->usbctl) &
  2895. BIT(VBUS_PIN)) == 0) {
  2896. disconnect = true;
  2897. ep_dbg(dev, "disconnect %s\n",
  2898. dev->driver->driver.name);
  2899. } else if ((stat & BIT(ROOT_PORT_RESET_INTERRUPT)) &&
  2900. (readl(&dev->usb->usbstat) & mask)
  2901. == 0) {
  2902. reset = true;
  2903. ep_dbg(dev, "reset %s\n",
  2904. dev->driver->driver.name);
  2905. }
  2906. if (disconnect || reset) {
  2907. stop_activity(dev, dev->driver);
  2908. ep0_start(dev);
  2909. spin_unlock(&dev->lock);
  2910. if (reset)
  2911. usb_gadget_udc_reset
  2912. (&dev->gadget, dev->driver);
  2913. else
  2914. (dev->driver->disconnect)
  2915. (&dev->gadget);
  2916. spin_lock(&dev->lock);
  2917. return;
  2918. }
  2919. }
  2920. stat &= ~tmp;
  2921. /* vBUS can bounce ... one of many reasons to ignore the
  2922. * notion of hotplug events on bus connect/disconnect!
  2923. */
  2924. if (!stat)
  2925. return;
  2926. }
  2927. /* NOTE: chip stays in PCI D0 state for now, but it could
  2928. * enter D1 to save more power
  2929. */
  2930. tmp = BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT);
  2931. if (stat & tmp) {
  2932. writel(tmp, &dev->regs->irqstat1);
  2933. spin_unlock(&dev->lock);
  2934. if (stat & BIT(SUSPEND_REQUEST_INTERRUPT)) {
  2935. if (dev->driver->suspend)
  2936. dev->driver->suspend(&dev->gadget);
  2937. if (!enable_suspend)
  2938. stat &= ~BIT(SUSPEND_REQUEST_INTERRUPT);
  2939. } else {
  2940. if (dev->driver->resume)
  2941. dev->driver->resume(&dev->gadget);
  2942. /* at high speed, note erratum 0133 */
  2943. }
  2944. spin_lock(&dev->lock);
  2945. stat &= ~tmp;
  2946. }
  2947. /* clear any other status/irqs */
  2948. if (stat)
  2949. writel(stat, &dev->regs->irqstat1);
  2950. /* some status we can just ignore */
  2951. if (dev->quirks & PLX_2280)
  2952. stat &= ~(BIT(CONTROL_STATUS_INTERRUPT) |
  2953. BIT(SUSPEND_REQUEST_INTERRUPT) |
  2954. BIT(RESUME_INTERRUPT) |
  2955. BIT(SOF_INTERRUPT));
  2956. else
  2957. stat &= ~(BIT(CONTROL_STATUS_INTERRUPT) |
  2958. BIT(RESUME_INTERRUPT) |
  2959. BIT(SOF_DOWN_INTERRUPT) |
  2960. BIT(SOF_INTERRUPT));
  2961. if (!stat)
  2962. return;
  2963. /* ep_dbg(dev, "irqstat1 %08x\n", stat);*/
  2964. /* DMA status, for ep-{a,b,c,d} */
  2965. scratch = stat & DMA_INTERRUPTS;
  2966. stat &= ~DMA_INTERRUPTS;
  2967. scratch >>= 9;
  2968. for (num = 0; scratch; num++) {
  2969. struct net2280_dma_regs __iomem *dma;
  2970. tmp = BIT(num);
  2971. if ((tmp & scratch) == 0)
  2972. continue;
  2973. scratch ^= tmp;
  2974. ep = &dev->ep[num + 1];
  2975. dma = ep->dma;
  2976. if (!dma)
  2977. continue;
  2978. /* clear ep's dma status */
  2979. tmp = readl(&dma->dmastat);
  2980. writel(tmp, &dma->dmastat);
  2981. /* dma sync*/
  2982. if (dev->quirks & PLX_PCIE) {
  2983. u32 r_dmacount = readl(&dma->dmacount);
  2984. if (!ep->is_in && (r_dmacount & 0x00FFFFFF) &&
  2985. (tmp & BIT(DMA_TRANSACTION_DONE_INTERRUPT)))
  2986. continue;
  2987. }
  2988. if (!(tmp & BIT(DMA_TRANSACTION_DONE_INTERRUPT))) {
  2989. ep_dbg(ep->dev, "%s no xact done? %08x\n",
  2990. ep->ep.name, tmp);
  2991. continue;
  2992. }
  2993. stop_dma(ep->dma);
  2994. /* OUT transfers terminate when the data from the
  2995. * host is in our memory. Process whatever's done.
  2996. * On this path, we know transfer's last packet wasn't
  2997. * less than req->length. NAK_OUT_PACKETS may be set,
  2998. * or the FIFO may already be holding new packets.
  2999. *
  3000. * IN transfers can linger in the FIFO for a very
  3001. * long time ... we ignore that for now, accounting
  3002. * precisely (like PIO does) needs per-packet irqs
  3003. */
  3004. scan_dma_completions(ep);
  3005. /* disable dma on inactive queues; else maybe restart */
  3006. if (!list_empty(&ep->queue)) {
  3007. tmp = readl(&dma->dmactl);
  3008. restart_dma(ep);
  3009. }
  3010. ep->irqs++;
  3011. }
  3012. /* NOTE: there are other PCI errors we might usefully notice.
  3013. * if they appear very often, here's where to try recovering.
  3014. */
  3015. if (stat & PCI_ERROR_INTERRUPTS) {
  3016. ep_err(dev, "pci dma error; stat %08x\n", stat);
  3017. stat &= ~PCI_ERROR_INTERRUPTS;
  3018. /* these are fatal errors, but "maybe" they won't
  3019. * happen again ...
  3020. */
  3021. stop_activity(dev, dev->driver);
  3022. ep0_start(dev);
  3023. stat = 0;
  3024. }
  3025. if (stat)
  3026. ep_dbg(dev, "unhandled irqstat1 %08x\n", stat);
  3027. }
  3028. static irqreturn_t net2280_irq(int irq, void *_dev)
  3029. {
  3030. struct net2280 *dev = _dev;
  3031. /* shared interrupt, not ours */
  3032. if ((dev->quirks & PLX_LEGACY) &&
  3033. (!(readl(&dev->regs->irqstat0) & BIT(INTA_ASSERTED))))
  3034. return IRQ_NONE;
  3035. spin_lock(&dev->lock);
  3036. /* handle disconnect, dma, and more */
  3037. handle_stat1_irqs(dev, readl(&dev->regs->irqstat1));
  3038. /* control requests and PIO */
  3039. handle_stat0_irqs(dev, readl(&dev->regs->irqstat0));
  3040. if (dev->quirks & PLX_PCIE) {
  3041. /* re-enable interrupt to trigger any possible new interrupt */
  3042. u32 pciirqenb1 = readl(&dev->regs->pciirqenb1);
  3043. writel(pciirqenb1 & 0x7FFFFFFF, &dev->regs->pciirqenb1);
  3044. writel(pciirqenb1, &dev->regs->pciirqenb1);
  3045. }
  3046. spin_unlock(&dev->lock);
  3047. return IRQ_HANDLED;
  3048. }
  3049. /*-------------------------------------------------------------------------*/
  3050. static void gadget_release(struct device *_dev)
  3051. {
  3052. struct net2280 *dev = dev_get_drvdata(_dev);
  3053. kfree(dev);
  3054. }
  3055. /* tear down the binding between this driver and the pci device */
  3056. static void net2280_remove(struct pci_dev *pdev)
  3057. {
  3058. struct net2280 *dev = pci_get_drvdata(pdev);
  3059. usb_del_gadget_udc(&dev->gadget);
  3060. BUG_ON(dev->driver);
  3061. /* then clean up the resources we allocated during probe() */
  3062. if (dev->requests) {
  3063. int i;
  3064. for (i = 1; i < 5; i++) {
  3065. if (!dev->ep[i].dummy)
  3066. continue;
  3067. dma_pool_free(dev->requests, dev->ep[i].dummy,
  3068. dev->ep[i].td_dma);
  3069. }
  3070. dma_pool_destroy(dev->requests);
  3071. }
  3072. if (dev->got_irq)
  3073. free_irq(pdev->irq, dev);
  3074. if (dev->quirks & PLX_PCIE)
  3075. pci_disable_msi(pdev);
  3076. if (dev->regs) {
  3077. net2280_led_shutdown(dev);
  3078. iounmap(dev->regs);
  3079. }
  3080. if (dev->region)
  3081. release_mem_region(pci_resource_start(pdev, 0),
  3082. pci_resource_len(pdev, 0));
  3083. if (dev->enabled)
  3084. pci_disable_device(pdev);
  3085. device_remove_file(&pdev->dev, &dev_attr_registers);
  3086. ep_info(dev, "unbind\n");
  3087. }
  3088. /* wrap this driver around the specified device, but
  3089. * don't respond over USB until a gadget driver binds to us.
  3090. */
  3091. static int net2280_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  3092. {
  3093. struct net2280 *dev;
  3094. unsigned long resource, len;
  3095. void __iomem *base = NULL;
  3096. int retval, i;
  3097. /* alloc, and start init */
  3098. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  3099. if (dev == NULL) {
  3100. retval = -ENOMEM;
  3101. goto done;
  3102. }
  3103. pci_set_drvdata(pdev, dev);
  3104. spin_lock_init(&dev->lock);
  3105. dev->quirks = id->driver_data;
  3106. dev->pdev = pdev;
  3107. dev->gadget.ops = &net2280_ops;
  3108. dev->gadget.max_speed = (dev->quirks & PLX_SUPERSPEED) ?
  3109. USB_SPEED_SUPER : USB_SPEED_HIGH;
  3110. /* the "gadget" abstracts/virtualizes the controller */
  3111. dev->gadget.name = driver_name;
  3112. /* now all the pci goodies ... */
  3113. if (pci_enable_device(pdev) < 0) {
  3114. retval = -ENODEV;
  3115. goto done;
  3116. }
  3117. dev->enabled = 1;
  3118. /* BAR 0 holds all the registers
  3119. * BAR 1 is 8051 memory; unused here (note erratum 0103)
  3120. * BAR 2 is fifo memory; unused here
  3121. */
  3122. resource = pci_resource_start(pdev, 0);
  3123. len = pci_resource_len(pdev, 0);
  3124. if (!request_mem_region(resource, len, driver_name)) {
  3125. ep_dbg(dev, "controller already in use\n");
  3126. retval = -EBUSY;
  3127. goto done;
  3128. }
  3129. dev->region = 1;
  3130. /* FIXME provide firmware download interface to put
  3131. * 8051 code into the chip, e.g. to turn on PCI PM.
  3132. */
  3133. base = ioremap_nocache(resource, len);
  3134. if (base == NULL) {
  3135. ep_dbg(dev, "can't map memory\n");
  3136. retval = -EFAULT;
  3137. goto done;
  3138. }
  3139. dev->regs = (struct net2280_regs __iomem *) base;
  3140. dev->usb = (struct net2280_usb_regs __iomem *) (base + 0x0080);
  3141. dev->pci = (struct net2280_pci_regs __iomem *) (base + 0x0100);
  3142. dev->dma = (struct net2280_dma_regs __iomem *) (base + 0x0180);
  3143. dev->dep = (struct net2280_dep_regs __iomem *) (base + 0x0200);
  3144. dev->epregs = (struct net2280_ep_regs __iomem *) (base + 0x0300);
  3145. if (dev->quirks & PLX_PCIE) {
  3146. u32 fsmvalue;
  3147. u32 usbstat;
  3148. dev->usb_ext = (struct usb338x_usb_ext_regs __iomem *)
  3149. (base + 0x00b4);
  3150. dev->llregs = (struct usb338x_ll_regs __iomem *)
  3151. (base + 0x0700);
  3152. dev->ll_lfps_regs = (struct usb338x_ll_lfps_regs __iomem *)
  3153. (base + 0x0748);
  3154. dev->ll_tsn_regs = (struct usb338x_ll_tsn_regs __iomem *)
  3155. (base + 0x077c);
  3156. dev->ll_chicken_reg = (struct usb338x_ll_chi_regs __iomem *)
  3157. (base + 0x079c);
  3158. dev->plregs = (struct usb338x_pl_regs __iomem *)
  3159. (base + 0x0800);
  3160. usbstat = readl(&dev->usb->usbstat);
  3161. dev->enhanced_mode = !!(usbstat & BIT(11));
  3162. dev->n_ep = (dev->enhanced_mode) ? 9 : 5;
  3163. /* put into initial config, link up all endpoints */
  3164. fsmvalue = get_idx_reg(dev->regs, SCRATCH) &
  3165. (0xf << DEFECT7374_FSM_FIELD);
  3166. /* See if firmware needs to set up for workaround: */
  3167. if (fsmvalue == DEFECT7374_FSM_SS_CONTROL_READ) {
  3168. dev->bug7734_patched = 1;
  3169. writel(0, &dev->usb->usbctl);
  3170. } else
  3171. dev->bug7734_patched = 0;
  3172. } else {
  3173. dev->enhanced_mode = 0;
  3174. dev->n_ep = 7;
  3175. /* put into initial config, link up all endpoints */
  3176. writel(0, &dev->usb->usbctl);
  3177. }
  3178. usb_reset(dev);
  3179. usb_reinit(dev);
  3180. /* irq setup after old hardware is cleaned up */
  3181. if (!pdev->irq) {
  3182. ep_err(dev, "No IRQ. Check PCI setup!\n");
  3183. retval = -ENODEV;
  3184. goto done;
  3185. }
  3186. if (dev->quirks & PLX_PCIE)
  3187. if (pci_enable_msi(pdev))
  3188. ep_err(dev, "Failed to enable MSI mode\n");
  3189. if (request_irq(pdev->irq, net2280_irq, IRQF_SHARED,
  3190. driver_name, dev)) {
  3191. ep_err(dev, "request interrupt %d failed\n", pdev->irq);
  3192. retval = -EBUSY;
  3193. goto done;
  3194. }
  3195. dev->got_irq = 1;
  3196. /* DMA setup */
  3197. /* NOTE: we know only the 32 LSBs of dma addresses may be nonzero */
  3198. dev->requests = dma_pool_create("requests", &pdev->dev,
  3199. sizeof(struct net2280_dma),
  3200. 0 /* no alignment requirements */,
  3201. 0 /* or page-crossing issues */);
  3202. if (!dev->requests) {
  3203. ep_dbg(dev, "can't get request pool\n");
  3204. retval = -ENOMEM;
  3205. goto done;
  3206. }
  3207. for (i = 1; i < 5; i++) {
  3208. struct net2280_dma *td;
  3209. td = dma_pool_alloc(dev->requests, GFP_KERNEL,
  3210. &dev->ep[i].td_dma);
  3211. if (!td) {
  3212. ep_dbg(dev, "can't get dummy %d\n", i);
  3213. retval = -ENOMEM;
  3214. goto done;
  3215. }
  3216. td->dmacount = 0; /* not VALID */
  3217. td->dmadesc = td->dmaaddr;
  3218. dev->ep[i].dummy = td;
  3219. }
  3220. /* enable lower-overhead pci memory bursts during DMA */
  3221. if (dev->quirks & PLX_LEGACY)
  3222. writel(BIT(DMA_MEMORY_WRITE_AND_INVALIDATE_ENABLE) |
  3223. /*
  3224. * 256 write retries may not be enough...
  3225. BIT(PCI_RETRY_ABORT_ENABLE) |
  3226. */
  3227. BIT(DMA_READ_MULTIPLE_ENABLE) |
  3228. BIT(DMA_READ_LINE_ENABLE),
  3229. &dev->pci->pcimstctl);
  3230. /* erratum 0115 shouldn't appear: Linux inits PCI_LATENCY_TIMER */
  3231. pci_set_master(pdev);
  3232. pci_try_set_mwi(pdev);
  3233. /* ... also flushes any posted pci writes */
  3234. dev->chiprev = get_idx_reg(dev->regs, REG_CHIPREV) & 0xffff;
  3235. /* done */
  3236. ep_info(dev, "%s\n", driver_desc);
  3237. ep_info(dev, "irq %d, pci mem %p, chip rev %04x\n",
  3238. pdev->irq, base, dev->chiprev);
  3239. ep_info(dev, "version: " DRIVER_VERSION "; %s\n",
  3240. dev->enhanced_mode ? "enhanced mode" : "legacy mode");
  3241. retval = device_create_file(&pdev->dev, &dev_attr_registers);
  3242. if (retval)
  3243. goto done;
  3244. retval = usb_add_gadget_udc_release(&pdev->dev, &dev->gadget,
  3245. gadget_release);
  3246. if (retval)
  3247. goto done;
  3248. return 0;
  3249. done:
  3250. if (dev)
  3251. net2280_remove(pdev);
  3252. return retval;
  3253. }
  3254. /* make sure the board is quiescent; otherwise it will continue
  3255. * generating IRQs across the upcoming reboot.
  3256. */
  3257. static void net2280_shutdown(struct pci_dev *pdev)
  3258. {
  3259. struct net2280 *dev = pci_get_drvdata(pdev);
  3260. /* disable IRQs */
  3261. writel(0, &dev->regs->pciirqenb0);
  3262. writel(0, &dev->regs->pciirqenb1);
  3263. /* disable the pullup so the host will think we're gone */
  3264. writel(0, &dev->usb->usbctl);
  3265. }
  3266. /*-------------------------------------------------------------------------*/
  3267. static const struct pci_device_id pci_ids[] = { {
  3268. .class = PCI_CLASS_SERIAL_USB_DEVICE,
  3269. .class_mask = ~0,
  3270. .vendor = PCI_VENDOR_ID_PLX_LEGACY,
  3271. .device = 0x2280,
  3272. .subvendor = PCI_ANY_ID,
  3273. .subdevice = PCI_ANY_ID,
  3274. .driver_data = PLX_LEGACY | PLX_2280,
  3275. }, {
  3276. .class = PCI_CLASS_SERIAL_USB_DEVICE,
  3277. .class_mask = ~0,
  3278. .vendor = PCI_VENDOR_ID_PLX_LEGACY,
  3279. .device = 0x2282,
  3280. .subvendor = PCI_ANY_ID,
  3281. .subdevice = PCI_ANY_ID,
  3282. .driver_data = PLX_LEGACY,
  3283. },
  3284. {
  3285. .class = PCI_CLASS_SERIAL_USB_DEVICE,
  3286. .class_mask = ~0,
  3287. .vendor = PCI_VENDOR_ID_PLX,
  3288. .device = 0x2380,
  3289. .subvendor = PCI_ANY_ID,
  3290. .subdevice = PCI_ANY_ID,
  3291. .driver_data = PLX_PCIE,
  3292. },
  3293. {
  3294. .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
  3295. .class_mask = ~0,
  3296. .vendor = PCI_VENDOR_ID_PLX,
  3297. .device = 0x3380,
  3298. .subvendor = PCI_ANY_ID,
  3299. .subdevice = PCI_ANY_ID,
  3300. .driver_data = PLX_PCIE | PLX_SUPERSPEED,
  3301. },
  3302. {
  3303. .class = PCI_CLASS_SERIAL_USB_DEVICE,
  3304. .class_mask = ~0,
  3305. .vendor = PCI_VENDOR_ID_PLX,
  3306. .device = 0x3382,
  3307. .subvendor = PCI_ANY_ID,
  3308. .subdevice = PCI_ANY_ID,
  3309. .driver_data = PLX_PCIE | PLX_SUPERSPEED,
  3310. },
  3311. { /* end: all zeroes */ }
  3312. };
  3313. MODULE_DEVICE_TABLE(pci, pci_ids);
  3314. /* pci driver glue; this is a "new style" PCI driver module */
  3315. static struct pci_driver net2280_pci_driver = {
  3316. .name = (char *) driver_name,
  3317. .id_table = pci_ids,
  3318. .probe = net2280_probe,
  3319. .remove = net2280_remove,
  3320. .shutdown = net2280_shutdown,
  3321. /* FIXME add power management support */
  3322. };
  3323. module_pci_driver(net2280_pci_driver);
  3324. MODULE_DESCRIPTION(DRIVER_DESC);
  3325. MODULE_AUTHOR("David Brownell");
  3326. MODULE_LICENSE("GPL");