amdgpu_sched.c 3.6 KB

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  1. /*
  2. * Copyright 2015 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. *
  23. */
  24. #include <linux/kthread.h>
  25. #include <linux/wait.h>
  26. #include <linux/sched.h>
  27. #include <drm/drmP.h>
  28. #include "amdgpu.h"
  29. static struct fence *amdgpu_sched_run_job(struct amd_gpu_scheduler *sched,
  30. struct amd_sched_entity *entity,
  31. struct amd_sched_job *job)
  32. {
  33. int r = 0;
  34. struct amdgpu_job *sched_job;
  35. struct amdgpu_fence *fence;
  36. if (!job) {
  37. DRM_ERROR("job is null\n");
  38. return NULL;
  39. }
  40. sched_job = (struct amdgpu_job *)job;
  41. mutex_lock(&sched_job->job_lock);
  42. r = amdgpu_ib_schedule(sched_job->adev,
  43. sched_job->num_ibs,
  44. sched_job->ibs,
  45. sched_job->owner);
  46. if (r)
  47. goto err;
  48. fence = amdgpu_fence_ref(sched_job->ibs[sched_job->num_ibs - 1].fence);
  49. if (sched_job->free_job)
  50. sched_job->free_job(sched_job);
  51. mutex_unlock(&sched_job->job_lock);
  52. return &fence->base;
  53. err:
  54. DRM_ERROR("Run job error\n");
  55. mutex_unlock(&sched_job->job_lock);
  56. sched->ops->process_job(sched, (struct amd_sched_job *)sched_job);
  57. return NULL;
  58. }
  59. static void amdgpu_sched_process_job(struct amd_gpu_scheduler *sched,
  60. struct amd_sched_job *job)
  61. {
  62. struct amdgpu_job *sched_job;
  63. if (!job) {
  64. DRM_ERROR("job is null\n");
  65. return;
  66. }
  67. sched_job = (struct amdgpu_job *)job;
  68. /* after processing job, free memory */
  69. fence_put(&sched_job->base.s_fence->base);
  70. kfree(sched_job);
  71. }
  72. struct amd_sched_backend_ops amdgpu_sched_ops = {
  73. .run_job = amdgpu_sched_run_job,
  74. .process_job = amdgpu_sched_process_job
  75. };
  76. int amdgpu_sched_ib_submit_kernel_helper(struct amdgpu_device *adev,
  77. struct amdgpu_ring *ring,
  78. struct amdgpu_ib *ibs,
  79. unsigned num_ibs,
  80. int (*free_job)(struct amdgpu_job *),
  81. void *owner,
  82. struct fence **f)
  83. {
  84. int r = 0;
  85. if (amdgpu_enable_scheduler) {
  86. struct amdgpu_job *job =
  87. kzalloc(sizeof(struct amdgpu_job), GFP_KERNEL);
  88. if (!job)
  89. return -ENOMEM;
  90. job->base.sched = ring->scheduler;
  91. job->base.s_entity = &adev->kernel_ctx.rings[ring->idx].entity;
  92. job->adev = adev;
  93. job->ibs = ibs;
  94. job->num_ibs = num_ibs;
  95. job->owner = owner;
  96. mutex_init(&job->job_lock);
  97. job->free_job = free_job;
  98. mutex_lock(&job->job_lock);
  99. r = amd_sched_push_job((struct amd_sched_job *)job);
  100. if (r) {
  101. mutex_unlock(&job->job_lock);
  102. kfree(job);
  103. return r;
  104. }
  105. ibs[num_ibs - 1].sequence = job->base.s_fence->v_seq;
  106. *f = fence_get(&job->base.s_fence->base);
  107. mutex_unlock(&job->job_lock);
  108. } else {
  109. r = amdgpu_ib_schedule(adev, num_ibs, ibs, owner);
  110. if (r)
  111. return r;
  112. *f = fence_get(&ibs[num_ibs - 1].fence->base);
  113. }
  114. return 0;
  115. }